Index: atari800core_mcc.vhd
===================================================================
--- atari800core_mcc.vhd	(revision 270)
+++ atari800core_mcc.vhd	(working copy)
@@ -245,8 +223,15 @@
 	signal CLK_SDRAM : std_logic;
 
 	-- SDRAM
+	signal PREREG_SDRAM_REQUEST : std_logic;
+	signal PREREG_SDRAM_READ_ENABLE :  STD_LOGIC;
+	signal PREREG_SDRAM_WRITE_ENABLE : std_logic;
+	signal PREREG_SDRAM_ADDR : STD_LOGIC_VECTOR(22 DOWNTO 0);
+	SIGNAL PREREG_SDRAM_DI : std_logic_vector(31 downto 0);
+	SIGNAL PREREG_SDRAM_WIDTH_32BIT_ACCESS : std_logic;
+	SIGNAL PREREG_SDRAM_WIDTH_16BIT_ACCESS : std_logic;
+	SIGNAL PREREG_SDRAM_WIDTH_8BIT_ACCESS : std_logic;
 	signal SDRAM_REQUEST : std_logic;
-	signal SDRAM_REQUEST_COMPLETE : std_logic;
 	signal SDRAM_READ_ENABLE :  STD_LOGIC;
 	signal SDRAM_WRITE_ENABLE : std_logic;
 	signal SDRAM_ADDR : STD_LOGIC_VECTOR(22 DOWNTO 0);
@@ -254,6 +239,8 @@
 	SIGNAL SDRAM_WIDTH_32BIT_ACCESS : std_logic;
 	SIGNAL SDRAM_WIDTH_16BIT_ACCESS : std_logic;
 	SIGNAL SDRAM_WIDTH_8BIT_ACCESS : std_logic;
+
+	signal SDRAM_REQUEST_COMPLETE : std_logic;
 	
 	signal SDRAM_REFRESH : std_logic;
 
@@ -570,16 +535,16 @@
 		CONSOL_SELECT => CONSOL_SELECT,
 		CONSOL_START => CONSOL_START,
 
-		SDRAM_REQUEST => SDRAM_REQUEST,
+		SDRAM_REQUEST => PREREG_SDRAM_REQUEST,
 		SDRAM_REQUEST_COMPLETE => SDRAM_REQUEST_COMPLETE,
-		SDRAM_READ_ENABLE => SDRAM_READ_ENABLE,
-		SDRAM_WRITE_ENABLE => SDRAM_WRITE_ENABLE,
-		SDRAM_ADDR => SDRAM_ADDR,
+		SDRAM_READ_ENABLE => PREREG_SDRAM_READ_ENABLE,
+		SDRAM_WRITE_ENABLE => PREREG_SDRAM_WRITE_ENABLE,
+		SDRAM_ADDR => PREREG_SDRAM_ADDR,
 		SDRAM_DO => ram_do_reg,
-		SDRAM_DI => SDRAM_DI,
-		SDRAM_32BIT_WRITE_ENABLE => SDRAM_WIDTH_32bit_ACCESS,
-		SDRAM_16BIT_WRITE_ENABLE => SDRAM_WIDTH_16bit_ACCESS,
-		SDRAM_8BIT_WRITE_ENABLE => SDRAM_WIDTH_8bit_ACCESS,
+		SDRAM_DI => PREREG_SDRAM_DI,
+		SDRAM_32BIT_WRITE_ENABLE => PREREG_SDRAM_WIDTH_32bit_ACCESS,
+		SDRAM_16BIT_WRITE_ENABLE => PREREG_SDRAM_WIDTH_16bit_ACCESS,
+		SDRAM_8BIT_WRITE_ENABLE => PREREG_SDRAM_WIDTH_8bit_ACCESS,
 		SDRAM_REFRESH => SDRAM_REFRESH,
 
 		DMA_FETCH => dma_fetch,
@@ -605,7 +570,7 @@
 	process(clk_sdram,sdram_reset_ctrl_n_reg)
 	begin
 		if (sdram_reset_ctrl_n_reg='0') then
-			seq_reg <= "100000000000";
+			seq_reg <= "010000000000";
 			seq_ph_reg <= '1';
 			ref_reg <= '0';
 
@@ -653,7 +618,7 @@
 	process(seq_reg, seq_next, sdram_rdy, sdram_reset_n_reg, reset_atari)
 	begin
 		sdram_reset_n_next <= sdram_reset_n_reg;
-		if (sdram_rdy = '1' and seq_next(8)='1' and seq_reg(8)='0') then
+		if (sdram_rdy = '1' and seq_next(7)='1' and seq_reg(7)='0') then
 			sdram_reset_n_next <= '1';
 		end if;
 		if (reset_atari = '1') then
@@ -661,10 +626,34 @@
 		end if;
 	end process;
 
+	-- register sdram request on the falling edge, 1/3 timing not enough, but 1/2 timing should be... This pushes back request 1 clock cycle. Result can also be clocking on the falling edge!
+	process(clk,reset_n)
+	begin
+		if (reset_n='0') then
+			SDRAM_REQUEST <= '0';
+			SDRAM_READ_ENABLE <= '0';
+			SDRAM_WRITE_ENABLE <= '0';
+			SDRAM_ADDR <= (others=>'0');
+			SDRAM_DI <= (others=>'0');
+			SDRAM_WIDTH_32BIT_ACCESS <= '0';
+			SDRAM_WIDTH_16BIT_ACCESS <= '0';
+			SDRAM_WIDTH_8BIT_ACCESS <= '0';
+		elsif(clk'event and clk='0') then -- FALLING EDGE
+			SDRAM_REQUEST <= PREREG_SDRAM_REQUEST;
+			SDRAM_READ_ENABLE <= PREREG_SDRAM_READ_ENABLE;
+			SDRAM_WRITE_ENABLE <= PREREG_SDRAM_WRITE_ENABLE;
+			SDRAM_ADDR <= PREREG_SDRAM_ADDR;
+			SDRAM_DI <= PREREG_SDRAM_DI;
+			SDRAM_WIDTH_32BIT_ACCESS <= PREREG_SDRAM_WIDTH_32BIT_ACCESS;
+			SDRAM_WIDTH_16BIT_ACCESS <= PREREG_SDRAM_WIDTH_16BIT_ACCESS;
+			SDRAM_WIDTH_8BIT_ACCESS <= PREREG_SDRAM_WIDTH_8BIT_ACCESS;
+		end if;
+	end process;
+
 	-- Adapt SDRAM
 	process(sdram_request_reg, sdram_request, sdram_request_complete_reg, ram_do_reg, seq_reg, ram_do, ram_rd_active, ram_wr_active, SDRAM_WIDTH_8BIT_ACCESS, SDRAM_WRITE_ENABLE, SDRAM_READ_ENABLE, SDRAM_DI, SDRAM_ADDR)
 	begin
-		sdram_request_next <= sdram_request_reg or sdram_request;
+		sdram_request_next <= (sdram_request_reg or sdram_request) and not(sdram_request_complete_reg);
 		sdram_request_complete_next <= sdram_request_complete_reg;
 		ram_bena_next <= "00";
 		ram_di_next <= (others=>'0');
@@ -699,9 +688,9 @@
 		when "000000001000" =>
 			-- nop
 		when "000000010000" =>
-			sdram_request_complete_next <= '0';
 			-- nop
 		when "000000100000" =>
+			sdram_request_complete_next <= '0';
 			-- nop
 		when "000001000000" =>
 			if (SDRAM_READ_ENABLE = '1') then
@@ -732,9 +721,9 @@
 		when "001000000000" =>
 			-- nop
 		when "010000000000" =>
-			sdram_request_complete_next <= '0';
 			-- nop
 		when "100000000000" =>
+			sdram_request_complete_next <= '0';
 			-- nop
 		when others =>
 			-- never