# file: pll_ntsc_exdes.xdc
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# Input clock periods. These duplicate the values entered for the
#  input clocks. You can use these to time your system
#----------------------------------------------------------------
create_clock -name CLK_IN1 -period 31.250 [get_ports CLK_IN1]
set_propagated_clock CLK_IN1
set_input_jitter CLK_IN1 0.3125

# FALSE PATH constraint added on COUNTER_RESET 
set_false_path -from [get_ports "COUNTER_RESET"]
set_false_path -from [get_ports "RESET"]

# Derived clock periods. These are commented out because they are 
#   automatically propogated by the tools
# However, if you'd like to use them for module level testing, you 
#   can copy them into your module level timing checks
#-----------------------------------------------------------------

#-----------------------------------------------------------------

#-----------------------------------------------------------------