TimeQuest Timing Analyzer report for atari800core
Sat Apr  4 18:07:53 2015
Quartus II 32-bit Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition


---------------------
; Table of Contents ;
---------------------
  1. Legal Notice
  2. TimeQuest Timing Analyzer Summary
  3. Parallel Compilation
  4. SDC File List
  5. Clocks
  6. Slow 1200mV 85C Model Fmax Summary
  7. Timing Closure Recommendations
  8. Slow 1200mV 85C Model Setup Summary
  9. Slow 1200mV 85C Model Hold Summary
 10. Slow 1200mV 85C Model Recovery Summary
 11. Slow 1200mV 85C Model Removal Summary
 12. Slow 1200mV 85C Model Minimum Pulse Width Summary
 13. Slow 1200mV 85C Model Setup: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1]'
 14. Slow 1200mV 85C Model Setup: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0]'
 15. Slow 1200mV 85C Model Setup: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3]'
 16. Slow 1200mV 85C Model Hold: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1]'
 17. Slow 1200mV 85C Model Hold: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0]'
 18. Slow 1200mV 85C Model Hold: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3]'
 19. Slow 1200mV 85C Model Recovery: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1]'
 20. Slow 1200mV 85C Model Removal: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1]'
 21. Slow 1200mV 85C Model Minimum Pulse Width: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0]'
 22. Slow 1200mV 85C Model Minimum Pulse Width: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1]'
 23. Slow 1200mV 85C Model Minimum Pulse Width: 'CLOCK_27[0]'
 24. Slow 1200mV 85C Model Minimum Pulse Width: '\gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0]'
 25. Slow 1200mV 85C Model Minimum Pulse Width: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3]'
 26. Setup Times
 27. Hold Times
 28. Clock to Output Times
 29. Minimum Clock to Output Times
 30. Propagation Delay
 31. Minimum Propagation Delay
 32. Output Enable Times
 33. Minimum Output Enable Times
 34. Output Disable Times
 35. Minimum Output Disable Times
 36. Slow 1200mV 85C Model Metastability Report
 37. Slow 1200mV 0C Model Fmax Summary
 38. Slow 1200mV 0C Model Setup Summary
 39. Slow 1200mV 0C Model Hold Summary
 40. Slow 1200mV 0C Model Recovery Summary
 41. Slow 1200mV 0C Model Removal Summary
 42. Slow 1200mV 0C Model Minimum Pulse Width Summary
 43. Slow 1200mV 0C Model Setup: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1]'
 44. Slow 1200mV 0C Model Setup: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0]'
 45. Slow 1200mV 0C Model Setup: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3]'
 46. Slow 1200mV 0C Model Hold: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1]'
 47. Slow 1200mV 0C Model Hold: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0]'
 48. Slow 1200mV 0C Model Hold: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3]'
 49. Slow 1200mV 0C Model Recovery: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1]'
 50. Slow 1200mV 0C Model Removal: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1]'
 51. Slow 1200mV 0C Model Minimum Pulse Width: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0]'
 52. Slow 1200mV 0C Model Minimum Pulse Width: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1]'
 53. Slow 1200mV 0C Model Minimum Pulse Width: 'CLOCK_27[0]'
 54. Slow 1200mV 0C Model Minimum Pulse Width: '\gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0]'
 55. Slow 1200mV 0C Model Minimum Pulse Width: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3]'
 56. Setup Times
 57. Hold Times
 58. Clock to Output Times
 59. Minimum Clock to Output Times
 60. Propagation Delay
 61. Minimum Propagation Delay
 62. Output Enable Times
 63. Minimum Output Enable Times
 64. Output Disable Times
 65. Minimum Output Disable Times
 66. Slow 1200mV 0C Model Metastability Report
 67. Fast 1200mV 0C Model Setup Summary
 68. Fast 1200mV 0C Model Hold Summary
 69. Fast 1200mV 0C Model Recovery Summary
 70. Fast 1200mV 0C Model Removal Summary
 71. Fast 1200mV 0C Model Minimum Pulse Width Summary
 72. Fast 1200mV 0C Model Setup: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1]'
 73. Fast 1200mV 0C Model Setup: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0]'
 74. Fast 1200mV 0C Model Setup: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3]'
 75. Fast 1200mV 0C Model Hold: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1]'
 76. Fast 1200mV 0C Model Hold: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0]'
 77. Fast 1200mV 0C Model Hold: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3]'
 78. Fast 1200mV 0C Model Recovery: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1]'
 79. Fast 1200mV 0C Model Removal: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1]'
 80. Fast 1200mV 0C Model Minimum Pulse Width: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0]'
 81. Fast 1200mV 0C Model Minimum Pulse Width: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1]'
 82. Fast 1200mV 0C Model Minimum Pulse Width: 'CLOCK_27[0]'
 83. Fast 1200mV 0C Model Minimum Pulse Width: '\gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0]'
 84. Fast 1200mV 0C Model Minimum Pulse Width: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3]'
 85. Setup Times
 86. Hold Times
 87. Clock to Output Times
 88. Minimum Clock to Output Times
 89. Propagation Delay
 90. Minimum Propagation Delay
 91. Output Enable Times
 92. Minimum Output Enable Times
 93. Output Disable Times
 94. Minimum Output Disable Times
 95. Fast 1200mV 0C Model Metastability Report
 96. Multicorner Timing Analysis Summary
 97. Setup Times
 98. Hold Times
 99. Clock to Output Times
100. Minimum Clock to Output Times
101. Progagation Delay
102. Minimum Progagation Delay
103. Board Trace Model Assignments
104. Input Transition Times
105. Slow Corner Signal Integrity Metrics
106. Fast Corner Signal Integrity Metrics
107. Setup Transfers
108. Hold Transfers
109. Recovery Transfers
110. Removal Transfers
111. Report TCCS
112. Report RSKM
113. Unconstrained Paths
114. TimeQuest Timing Analyzer Messages



----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2013 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files from any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.



+----------------------------------------------------------------------------------------+
; TimeQuest Timing Analyzer Summary                                                      ;
+--------------------+-------------------------------------------------------------------+
; Quartus II Version ; Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition ;
; Revision Name      ; atari800core                                                      ;
; Device Family      ; Cyclone III                                                       ;
; Device Name        ; EP3C25E144C8                                                      ;
; Timing Models      ; Final                                                             ;
; Delay Model        ; Combined                                                          ;
; Rise/Fall Delays   ; Enabled                                                           ;
+--------------------+-------------------------------------------------------------------+


+------------------------------------------+
; Parallel Compilation                     ;
+----------------------------+-------------+
; Processors                 ; Number      ;
+----------------------------+-------------+
; Number detected on machine ; 4           ;
; Maximum allowed            ; 2           ;
;                            ;             ;
; Average used               ; 1.24        ;
; Maximum used               ; 2           ;
;                            ;             ;
; Usage by Processor         ; % Time Used ;
;     Processor 1            ; 100.0%      ;
;     Processor 2            ;  24.0%      ;
;     Processors 3-4         ;   0.0%      ;
+----------------------------+-------------+


+------------------------------------------------------+
; SDC File List                                        ;
+------------------+--------+--------------------------+
; SDC File Path    ; Status ; Read at                  ;
+------------------+--------+--------------------------+
; atari800core.sdc ; OK     ; Sat Apr  4 18:07:28 2015 ;
+------------------+--------+--------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clocks                                                                                                                                                                                                                                                                                                                                                                                                                                       ;
+--------------------------------------------------------------------+-----------+-----------+------------+--------+-----------+------------+-----------+-------------+-------+--------+-----------+------------+----------+-------------------------------------------------------------------+----------------------------------------------------------------------+------------------------------------------------------------------------+
; Clock Name                                                         ; Type      ; Period    ; Frequency  ; Rise   ; Fall      ; Duty Cycle ; Divide by ; Multiply by ; Phase ; Offset ; Edge List ; Edge Shift ; Inverted ; Master                                                            ; Source                                                               ; Targets                                                                ;
+--------------------------------------------------------------------+-----------+-----------+------------+--------+-----------+------------+-----------+-------------+-------+--------+-----------+------------+----------+-------------------------------------------------------------------+----------------------------------------------------------------------+------------------------------------------------------------------------+
; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Generated ; 8.810     ; 113.51 MHz ; 0.000  ; 4.405     ; 50.00      ; 40        ; 227         ;       ;        ;           ;            ; false    ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|inclk[0] ; { \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] } ;
; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Generated ; 17.621    ; 56.75 MHz  ; 0.000  ; 8.810     ; 50.00      ; 80        ; 227         ;       ;        ;           ;            ; false    ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|inclk[0] ; { \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] } ;
; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[2] ; Generated ; 8.810     ; 113.51 MHz ; -2.422 ; 1.983     ; 50.00      ; 40        ; 227         ; -99.0 ;        ;           ;            ; false    ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|inclk[0] ; { \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[2] } ;
; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Generated ; 63999.936 ; 0.02 MHz   ; -2.422 ; 31997.546 ; 50.00      ; 1280      ; 1           ; -0.0  ;        ;           ;            ; false    ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|inclk[0] ; { \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] } ;
; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0]  ; Generated ; 49.999    ; 20.0 MHz   ; 0.000  ; 24.999    ; 50.00      ; 27        ; 20          ;       ;        ;           ;            ; false    ; CLOCK_27[0]                                                       ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|inclk[0]  ; { \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0] }  ;
; CLOCK_27[0]                                                        ; Base      ; 37.037    ; 27.0 MHz   ; 0.000  ; 18.518    ;            ;           ;             ;       ;        ;           ;            ;          ;                                                                   ;                                                                      ; { CLOCK_27[0] }                                                        ;
+--------------------------------------------------------------------+-----------+-----------+------------+--------+-----------+------------+-----------+-------------+-------+--------+-----------+------------+----------+-------------------------------------------------------------------+----------------------------------------------------------------------+------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Fmax Summary                                                                       ;
+------------+-----------------+--------------------------------------------------------------------+------+
; Fmax       ; Restricted Fmax ; Clock Name                                                         ; Note ;
+------------+-----------------+--------------------------------------------------------------------+------+
; 58.76 MHz  ; 58.76 MHz       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;      ;
; 139.78 MHz ; 139.78 MHz      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;      ;
; 152.51 MHz ; 152.51 MHz      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ;      ;
+------------+-----------------+--------------------------------------------------------------------+------+
This panel reports FMAX for every clock in the design, regardless of the user-specified clock periods.  FMAX is only computed for paths where the source and destination registers or ports are driven by the same clock.  Paths of different clocks, including generated clocks, are ignored.  For paths between a clock and its inversion, FMAX is computed as if the rising and falling edges are scaled along with FMAX, such that the duty cycle (in terms of a percentage) is maintained. Altera recommends that you always use clock constraints and other slack reports for sign-off analysis.


----------------------------------
; Timing Closure Recommendations ;
----------------------------------
HTML report is unavailable in plain text report export.


+------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Setup Summary                                                            ;
+--------------------------------------------------------------------+-----------+---------------+
; Clock                                                              ; Slack     ; End Point TNS ;
+--------------------------------------------------------------------+-----------+---------------+
; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.603     ; 0.000         ;
; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 1.656     ; 0.000         ;
; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63993.379 ; 0.000         ;
+--------------------------------------------------------------------+-----------+---------------+


+--------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Hold Summary                                                         ;
+--------------------------------------------------------------------+-------+---------------+
; Clock                                                              ; Slack ; End Point TNS ;
+--------------------------------------------------------------------+-------+---------------+
; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.398 ; 0.000         ;
; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.454 ; 0.000         ;
; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.455 ; 0.000         ;
+--------------------------------------------------------------------+-------+---------------+


+---------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Recovery Summary                                                      ;
+--------------------------------------------------------------------+--------+---------------+
; Clock                                                              ; Slack  ; End Point TNS ;
+--------------------------------------------------------------------+--------+---------------+
; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 10.081 ; 0.000         ;
+--------------------------------------------------------------------+--------+---------------+


+--------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Removal Summary                                                      ;
+--------------------------------------------------------------------+-------+---------------+
; Clock                                                              ; Slack ; End Point TNS ;
+--------------------------------------------------------------------+-------+---------------+
; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 1.801 ; 0.000         ;
+--------------------------------------------------------------------+-------+---------------+


+------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Minimum Pulse Width Summary                                              ;
+--------------------------------------------------------------------+-----------+---------------+
; Clock                                                              ; Slack     ; End Point TNS ;
+--------------------------------------------------------------------+-----------+---------------+
; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 4.098     ; 0.000         ;
; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 8.377     ; 0.000         ;
; CLOCK_27[0]                                                        ; 18.366    ; 0.000         ;
; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0]  ; 24.963    ; 0.000         ;
; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 31999.661 ; 0.000         ;
+--------------------------------------------------------------------+-----------+---------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Setup: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                        ;
+-------+---------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                         ; To Node                                                                                                                   ; Launch Clock                                                       ; Latch Clock                                                        ; Relationship ; Clock Skew ; Data Delay ;
+-------+---------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+
; 0.603 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[4]_NEW192_OTERM1403  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.080     ; 16.939     ;
; 0.603 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.080     ; 16.939     ;
; 0.606 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[12]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.080     ; 16.936     ;
; 0.635 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]_NEW204_OTERM1405 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.080     ; 16.907     ;
; 0.656 ; user_io:my_user_io|ps2_kbd_data                                                                                                                   ; ps2_to_atari800:keyboard_map1|ps2_keyboard:\gen_ps2_on:keyboard1|ps2_dat_reg                                              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 1.958        ; -0.195     ; 1.108      ;
; 0.725 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[4]_NEW192_OTERM1403  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.097     ; 16.800     ;
; 0.725 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.097     ; 16.800     ;
; 0.728 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[12]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.097     ; 16.797     ;
; 0.757 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]_NEW204_OTERM1405 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.097     ; 16.768     ;
; 0.819 ; user_io:my_user_io|Equal5~0_OTERM1                                                                                                                ; ps2_to_atari800:keyboard_map1|ps2_keyboard:\gen_ps2_on:keyboard1|ps2_clk_reg                                              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 1.958        ; -0.195     ; 0.945      ;
; 0.867 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[4]_NEW192_OTERM1403  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.080     ; 16.675     ;
; 0.867 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.080     ; 16.675     ;
; 0.870 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[12]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.080     ; 16.672     ;
; 0.891 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[1]                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.121     ; 16.610     ;
; 0.892 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[11]_NEW200_OTERM1391 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.121     ; 16.609     ;
; 0.894 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[5]_NEW194_OTERM1399  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.121     ; 16.607     ;
; 0.895 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[3]_NEW212_OTERM1401  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.121     ; 16.606     ;
; 0.896 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[2]                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.121     ; 16.605     ;
; 0.899 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]_NEW204_OTERM1405 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.080     ; 16.643     ;
; 0.905 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[4]_NEW192_OTERM1403  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.080     ; 16.637     ;
; 0.905 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.080     ; 16.637     ;
; 0.908 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[12]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.080     ; 16.634     ;
; 0.920 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[4]_NEW192_OTERM1403  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.080     ; 16.622     ;
; 0.920 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.080     ; 16.622     ;
; 0.923 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[12]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.080     ; 16.619     ;
; 0.937 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]_NEW204_OTERM1405 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.080     ; 16.605     ;
; 0.950 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_out_OTERM3                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[4]_NEW192_OTERM1403  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.080     ; 16.592     ;
; 0.950 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_out_OTERM3                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.080     ; 16.592     ;
; 0.952 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]_NEW204_OTERM1405 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.080     ; 16.590     ;
; 0.953 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_out_OTERM3                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[12]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.080     ; 16.589     ;
; 0.982 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_out_OTERM3                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]_NEW204_OTERM1405 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.080     ; 16.560     ;
; 1.030 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[4]_NEW192_OTERM1403  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.080     ; 16.512     ;
; 1.030 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.080     ; 16.512     ;
; 1.032 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[1]                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.119     ; 16.471     ;
; 1.033 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[12]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.080     ; 16.509     ;
; 1.033 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[11]_NEW200_OTERM1391 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.119     ; 16.470     ;
; 1.035 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[5]_NEW194_OTERM1399  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.119     ; 16.468     ;
; 1.036 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[3]_NEW212_OTERM1401  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.119     ; 16.467     ;
; 1.037 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[2]                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.119     ; 16.466     ;
; 1.062 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]_NEW204_OTERM1405 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.080     ; 16.480     ;
; 1.064 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[32]                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|X[7]          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.589     ; 15.969     ;
; 1.083 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[4]_NEW192_OTERM1403  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.080     ; 16.459     ;
; 1.083 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.080     ; 16.459     ;
; 1.086 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[12]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.080     ; 16.456     ;
; 1.115 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]_NEW204_OTERM1405 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.080     ; 16.427     ;
; 1.118 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[4]_NEW192_OTERM1403  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.062     ; 16.442     ;
; 1.118 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.062     ; 16.442     ;
; 1.121 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[12]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.062     ; 16.439     ;
; 1.137 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|cpu_extra_enable_reg                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[4]_NEW192_OTERM1403  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.062     ; 16.423     ;
; 1.137 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|cpu_extra_enable_reg                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.062     ; 16.423     ;
; 1.140 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|cpu_extra_enable_reg                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[12]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.062     ; 16.420     ;
; 1.142 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[14]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[4]_NEW192_OTERM1403  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.097     ; 16.383     ;
; 1.142 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[14]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.097     ; 16.383     ;
; 1.145 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[14]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[12]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.097     ; 16.380     ;
; 1.150 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]_NEW204_OTERM1405 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.062     ; 16.410     ;
; 1.155 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[1]                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.121     ; 16.346     ;
; 1.156 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[11]_NEW200_OTERM1391 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.121     ; 16.345     ;
; 1.158 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[5]_NEW194_OTERM1399  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.121     ; 16.343     ;
; 1.159 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[3]_NEW212_OTERM1401  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.121     ; 16.342     ;
; 1.160 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[2]                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.121     ; 16.341     ;
; 1.169 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|cpu_extra_enable_reg                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]_NEW204_OTERM1405 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.062     ; 16.391     ;
; 1.174 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[14]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]_NEW204_OTERM1405 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.097     ; 16.351     ;
; 1.193 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[1]                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.121     ; 16.308     ;
; 1.194 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[11]_NEW200_OTERM1391 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.121     ; 16.307     ;
; 1.196 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[5]_NEW194_OTERM1399  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.121     ; 16.305     ;
; 1.197 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[3]_NEW212_OTERM1401  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.121     ; 16.304     ;
; 1.198 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[2]                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.121     ; 16.303     ;
; 1.202 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[6]_NEW190_OTERM1393  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; 0.391      ; 16.811     ;
; 1.205 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[14]_NEW198_OTERM1397 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; 0.391      ; 16.808     ;
; 1.208 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[1]                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.121     ; 16.293     ;
; 1.209 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[11]_NEW200_OTERM1391 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.121     ; 16.292     ;
; 1.211 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[5]_NEW194_OTERM1399  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.121     ; 16.290     ;
; 1.212 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[3]_NEW212_OTERM1401  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.121     ; 16.289     ;
; 1.213 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[2]                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.121     ; 16.288     ;
; 1.223 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[32]                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|S[6]          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.577     ; 15.822     ;
; 1.229 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[12]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[4]_NEW192_OTERM1403  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.097     ; 16.296     ;
; 1.229 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[12]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.097     ; 16.296     ;
; 1.232 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[12]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[12]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.097     ; 16.293     ;
; 1.238 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_out_OTERM3                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[1]                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.121     ; 16.263     ;
; 1.239 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_out_OTERM3                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[11]_NEW200_OTERM1391 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.121     ; 16.262     ;
; 1.241 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_out_OTERM3                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[5]_NEW194_OTERM1399  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.121     ; 16.260     ;
; 1.242 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_out_OTERM3                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[3]_NEW212_OTERM1401  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.121     ; 16.259     ;
; 1.243 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_out_OTERM3                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[2]                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.121     ; 16.258     ;
; 1.248 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|enable_divider:enable_179_clock_div|enabled_out_reg ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[4]_NEW192_OTERM1403  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.062     ; 16.312     ;
; 1.248 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|enable_divider:enable_179_clock_div|enabled_out_reg ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.062     ; 16.312     ;
; 1.251 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|enable_divider:enable_179_clock_div|enabled_out_reg ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[12]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.062     ; 16.309     ;
; 1.261 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[12]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]_NEW204_OTERM1405 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.097     ; 16.264     ;
; 1.268 ; zpucore:zpu|zpu_glue:zpu_and_glue|memory_access_OTERM465                                                                                          ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[31]_OTERM19_OTERM349                                            ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.597     ; 15.757     ;
; 1.280 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|enable_divider:enable_179_clock_div|enabled_out_reg ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]_NEW204_OTERM1405 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.062     ; 16.280     ;
; 1.287 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[13]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[4]_NEW192_OTERM1403  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.097     ; 16.238     ;
; 1.287 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[13]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.097     ; 16.238     ;
; 1.290 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[13]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[12]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.097     ; 16.235     ;
; 1.298 ; zpucore:zpu|zpu_glue:zpu_and_glue|memory_access_OTERM465                                                                                          ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[30]_OTERM27_OTERM357                                            ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.597     ; 15.727     ;
; 1.314 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[14]_NEW198_OTERM1397                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[4]_NEW192_OTERM1403  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.571     ; 15.737     ;
; 1.314 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[14]_NEW198_OTERM1397                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.571     ; 15.737     ;
; 1.317 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[14]_NEW198_OTERM1397                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[12]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.571     ; 15.734     ;
; 1.318 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[1]                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.121     ; 16.183     ;
; 1.319 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[11]_NEW200_OTERM1391 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.121     ; 16.182     ;
; 1.319 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[13]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]_NEW204_OTERM1405 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.097     ; 16.206     ;
; 1.321 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[5]_NEW194_OTERM1399  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.121     ; 16.180     ;
+-------+---------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Setup: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                        ;
+-------+---------------------------------------------------------+-----------------------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                               ; To Node                                             ; Launch Clock                                                       ; Latch Clock                                                        ; Relationship ; Clock Skew ; Data Delay ;
+-------+---------------------------------------------------------+-----------------------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+
; 1.656 ; sdram_statemachine:sdram_adaptor|delay_reg[3]           ; sdram_statemachine:sdram_adaptor|dq_out_reg[7]      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.085     ; 6.940      ;
; 1.860 ; sdram_statemachine:sdram_adaptor|delay_reg[3]           ; sdram_statemachine:sdram_adaptor|dq_out_reg[14]     ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.159     ; 6.662      ;
; 1.905 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]     ; sdram_statemachine:sdram_adaptor|dq_out_reg[7]      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.083     ; 6.693      ;
; 1.909 ; sdram_statemachine:sdram_adaptor|delay_reg[3]           ; sdram_statemachine:sdram_adaptor|dq_out_reg[12]     ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.157     ; 6.615      ;
; 1.929 ; sdram_statemachine:sdram_adaptor|delay_reg[3]           ; sdram_statemachine:sdram_adaptor|dq_out_reg[11]     ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.156     ; 6.596      ;
; 2.029 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]     ; sdram_statemachine:sdram_adaptor|dq_out_reg[7]      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.083     ; 6.569      ;
; 2.056 ; sdram_statemachine:sdram_adaptor|delay_reg[3]           ; sdram_statemachine:sdram_adaptor|dq_out_reg[15]     ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.159     ; 6.466      ;
; 2.069 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]     ; sdram_statemachine:sdram_adaptor|addr_reg[5]        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.148     ; 6.464      ;
; 2.075 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]     ; sdram_statemachine:sdram_adaptor|addr_reg[4]        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.145     ; 6.461      ;
; 2.075 ; sdram_statemachine:sdram_adaptor|delay_reg[3]           ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.085     ; 6.521      ;
; 2.110 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]     ; sdram_statemachine:sdram_adaptor|dq_out_reg[14]     ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.157     ; 6.414      ;
; 2.122 ; sdram_statemachine:sdram_adaptor|delay_reg[3]           ; sdram_statemachine:sdram_adaptor|addr_reg[9]        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.153     ; 6.406      ;
; 2.124 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]     ; sdram_statemachine:sdram_adaptor|dq_out_reg[12]     ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.155     ; 6.402      ;
; 2.156 ; sdram_statemachine:sdram_adaptor|delay_reg[3]           ; sdram_statemachine:sdram_adaptor|addr_reg[11]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.157     ; 6.368      ;
; 2.179 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]     ; sdram_statemachine:sdram_adaptor|dq_out_reg[11]     ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.154     ; 6.348      ;
; 2.188 ; sdram_statemachine:sdram_adaptor|delay_reg[1]           ; sdram_statemachine:sdram_adaptor|addr_reg[9]        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.153     ; 6.340      ;
; 2.212 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]     ; sdram_statemachine:sdram_adaptor|dq_out_reg[7]      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.083     ; 6.386      ;
; 2.215 ; sdram_statemachine:sdram_adaptor|delay_reg[3]           ; sdram_statemachine:sdram_adaptor|addr_reg[8]        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.151     ; 6.315      ;
; 2.222 ; sdram_statemachine:sdram_adaptor|delay_reg[1]           ; sdram_statemachine:sdram_adaptor|addr_reg[11]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.157     ; 6.302      ;
; 2.233 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]     ; sdram_statemachine:sdram_adaptor|addr_reg[6]        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.153     ; 6.295      ;
; 2.248 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]     ; sdram_statemachine:sdram_adaptor|dq_out_reg[12]     ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.155     ; 6.278      ;
; 2.260 ; sdram_statemachine:sdram_adaptor|delay_reg[3]           ; sdram_statemachine:sdram_adaptor|dq_out_reg[8]      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.145     ; 6.276      ;
; 2.270 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]     ; sdram_statemachine:sdram_adaptor|dq_out_reg[14]     ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.157     ; 6.254      ;
; 2.281 ; sdram_statemachine:sdram_adaptor|delay_reg[1]           ; sdram_statemachine:sdram_adaptor|addr_reg[8]        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.151     ; 6.249      ;
; 2.305 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]     ; sdram_statemachine:sdram_adaptor|dq_out_reg[11]     ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.154     ; 6.222      ;
; 2.306 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]     ; sdram_statemachine:sdram_adaptor|dq_out_reg[15]     ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.157     ; 6.218      ;
; 2.317 ; sdram_statemachine:sdram_adaptor|delay_reg[1]           ; sdram_statemachine:sdram_adaptor|addr_reg[5]        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.150     ; 6.214      ;
; 2.317 ; sdram_statemachine:sdram_adaptor|delay_reg[3]           ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.144     ; 6.220      ;
; 2.323 ; sdram_statemachine:sdram_adaptor|delay_reg[1]           ; sdram_statemachine:sdram_adaptor|addr_reg[4]        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.147     ; 6.211      ;
; 2.325 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]     ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.083     ; 6.273      ;
; 2.370 ; sdram_statemachine:sdram_adaptor|delay_reg[0]           ; sdram_statemachine:sdram_adaptor|addr_reg[9]        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.153     ; 6.158      ;
; 2.378 ; sdram_statemachine:sdram_adaptor|delay_reg[3]           ; sdram_statemachine:sdram_adaptor|addr_reg[10]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.106     ; 6.197      ;
; 2.404 ; sdram_statemachine:sdram_adaptor|delay_reg[0]           ; sdram_statemachine:sdram_adaptor|addr_reg[11]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.157     ; 6.120      ;
; 2.431 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]     ; sdram_statemachine:sdram_adaptor|dq_out_reg[12]     ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.155     ; 6.095      ;
; 2.435 ; sdram_statemachine:sdram_adaptor|delay_reg[3]           ; sdram_statemachine:sdram_adaptor|addr_reg[6]        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.155     ; 6.091      ;
; 2.441 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]     ; sdram_statemachine:sdram_adaptor|addr_reg[5]        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.148     ; 6.092      ;
; 2.444 ; sdram_statemachine:sdram_adaptor|delay_reg[1]           ; sdram_statemachine:sdram_adaptor|addr_reg[10]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.106     ; 6.131      ;
; 2.447 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]     ; sdram_statemachine:sdram_adaptor|addr_reg[4]        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.145     ; 6.089      ;
; 2.463 ; sdram_statemachine:sdram_adaptor|delay_reg[0]           ; sdram_statemachine:sdram_adaptor|addr_reg[8]        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.151     ; 6.067      ;
; 2.466 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]     ; sdram_statemachine:sdram_adaptor|dq_out_reg[15]     ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.157     ; 6.058      ;
; 2.485 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]     ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.083     ; 6.113      ;
; 2.486 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]     ; sdram_statemachine:sdram_adaptor|dq_out_reg[14]     ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.157     ; 6.038      ;
; 2.488 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]     ; sdram_statemachine:sdram_adaptor|dq_out_reg[11]     ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.154     ; 6.039      ;
; 2.490 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]     ; sdram_statemachine:sdram_adaptor|addr_reg[7]        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.149     ; 6.042      ;
; 2.492 ; sdram_statemachine:sdram_adaptor|delay_reg[0]           ; sdram_statemachine:sdram_adaptor|addr_reg[5]        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.150     ; 6.039      ;
; 2.498 ; sdram_statemachine:sdram_adaptor|delay_reg[0]           ; sdram_statemachine:sdram_adaptor|addr_reg[4]        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.147     ; 6.036      ;
; 2.505 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]     ; sdram_statemachine:sdram_adaptor|dq_out_reg[8]      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.143     ; 6.033      ;
; 2.521 ; sdram_statemachine:sdram_adaptor|delay_reg[3]           ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]     ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.157     ; 6.003      ;
; 2.530 ; sdram_statemachine:sdram_adaptor|delay_reg[2]           ; sdram_statemachine:sdram_adaptor|addr_reg[9]        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.153     ; 5.998      ;
; 2.564 ; sdram_statemachine:sdram_adaptor|delay_reg[2]           ; sdram_statemachine:sdram_adaptor|addr_reg[11]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.157     ; 5.960      ;
; 2.567 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]     ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.142     ; 5.972      ;
; 2.572 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]     ; sdram_statemachine:sdram_adaptor|addr_reg[9]        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.151     ; 5.958      ;
; 2.572 ; sdram_statemachine:sdram_adaptor|delay_reg[3]           ; sdram_statemachine:sdram_adaptor|dq_out_reg[2]      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.144     ; 5.965      ;
; 2.600 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]     ; sdram_statemachine:sdram_adaptor|addr_reg[3]        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.102     ; 5.979      ;
; 2.606 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]     ; sdram_statemachine:sdram_adaptor|addr_reg[11]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.155     ; 5.920      ;
; 2.622 ; sdram_statemachine:sdram_adaptor|delay_reg[0]           ; sdram_statemachine:sdram_adaptor|addr_reg[6]        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.155     ; 5.904      ;
; 2.623 ; sdram_statemachine:sdram_adaptor|delay_reg[2]           ; sdram_statemachine:sdram_adaptor|addr_reg[8]        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.151     ; 5.907      ;
; 2.624 ; sdram_statemachine:sdram_adaptor|delay_reg[2]           ; sdram_statemachine:sdram_adaptor|dq_out_reg[7]      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.085     ; 5.972      ;
; 2.626 ; sdram_statemachine:sdram_adaptor|delay_reg[0]           ; sdram_statemachine:sdram_adaptor|addr_reg[10]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.106     ; 5.949      ;
; 2.629 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]     ; sdram_statemachine:sdram_adaptor|dq_out_reg[8]      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.143     ; 5.909      ;
; 2.665 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]     ; sdram_statemachine:sdram_adaptor|addr_reg[8]        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.149     ; 5.867      ;
; 2.682 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]     ; sdram_statemachine:sdram_adaptor|dq_out_reg[15]     ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.157     ; 5.842      ;
; 2.701 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]     ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.083     ; 5.897      ;
; 2.705 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]     ; sdram_statemachine:sdram_adaptor|addr_reg[6]        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.153     ; 5.823      ;
; 2.727 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]     ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.142     ; 5.812      ;
; 2.730 ; sdram_statemachine:sdram_adaptor|delay_reg[3]           ; sdram_statemachine:sdram_adaptor|addr_reg[7]        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.151     ; 5.800      ;
; 2.736 ; sdram_statemachine:sdram_adaptor|delay_reg[5]           ; sdram_statemachine:sdram_adaptor|addr_reg[6]        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.155     ; 5.790      ;
; 2.771 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]     ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]     ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.155     ; 5.755      ;
; 2.786 ; sdram_statemachine:sdram_adaptor|delay_reg[2]           ; sdram_statemachine:sdram_adaptor|addr_reg[10]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.106     ; 5.789      ;
; 2.812 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]     ; sdram_statemachine:sdram_adaptor|dq_out_reg[8]      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.143     ; 5.726      ;
; 2.813 ; sdram_statemachine:sdram_adaptor|delay_reg[1]           ; sdram_statemachine:sdram_adaptor|dq_out_reg[7]      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.085     ; 5.783      ;
; 2.818 ; sdram_statemachine:sdram_adaptor|delay_reg[3]           ; sdram_statemachine:sdram_adaptor|dq_out_reg[0]      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.148     ; 5.715      ;
; 2.822 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]     ; sdram_statemachine:sdram_adaptor|dq_out_reg[2]      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.142     ; 5.717      ;
; 2.828 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]     ; sdram_statemachine:sdram_adaptor|addr_reg[10]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.104     ; 5.749      ;
; 2.829 ; sdram_statemachine:sdram_adaptor|delay_reg[3]           ; sdram_statemachine:sdram_adaptor|addr_reg[3]        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.104     ; 5.748      ;
; 2.839 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]     ; sdram_statemachine:sdram_adaptor|addr_reg[9]        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.151     ; 5.691      ;
; 2.843 ; sdram_statemachine:sdram_adaptor|delay_reg[2]           ; sdram_statemachine:sdram_adaptor|dq_out_reg[12]     ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.157     ; 5.681      ;
; 2.848 ; sdram_statemachine:sdram_adaptor|delay_reg[0]           ; sdram_statemachine:sdram_adaptor|addr_reg[7]        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.151     ; 5.682      ;
; 2.863 ; sdram_statemachine:sdram_adaptor|delay_reg[3]           ; sdram_statemachine:sdram_adaptor|dq_out_reg[1]      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.152     ; 5.666      ;
; 2.866 ; sdram_statemachine:sdram_adaptor|delay_reg[2]           ; sdram_statemachine:sdram_adaptor|addr_reg[6]        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.155     ; 5.660      ;
; 2.868 ; sdram_statemachine:sdram_adaptor|delay_reg[2]           ; sdram_statemachine:sdram_adaptor|addr_reg[5]        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.150     ; 5.663      ;
; 2.873 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]     ; sdram_statemachine:sdram_adaptor|addr_reg[11]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.155     ; 5.653      ;
; 2.874 ; sdram_statemachine:sdram_adaptor|delay_reg[2]           ; sdram_statemachine:sdram_adaptor|addr_reg[4]        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.147     ; 5.660      ;
; 2.890 ; sdram_statemachine:sdram_adaptor|delay_reg[2]           ; sdram_statemachine:sdram_adaptor|dq_out_reg[14]     ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.159     ; 5.632      ;
; 2.896 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]     ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]     ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.155     ; 5.630      ;
; 2.899 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]     ; sdram_statemachine:sdram_adaptor|addr_reg[1]        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.103     ; 5.679      ;
; 2.900 ; sdram_statemachine:sdram_adaptor|delay_reg[2]           ; sdram_statemachine:sdram_adaptor|dq_out_reg[11]     ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.156     ; 5.625      ;
; 2.903 ; sdram_statemachine:sdram_adaptor|delay_reg[3]           ; sdram_statemachine:sdram_adaptor|dq_out_reg[4]      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.084     ; 5.694      ;
; 2.917 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]     ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.142     ; 5.622      ;
; 2.932 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]     ; sdram_statemachine:sdram_adaptor|addr_reg[8]        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.149     ; 5.600      ;
; 2.938 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]     ; sdram_statemachine:sdram_adaptor|addr_reg[0]        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.105     ; 5.638      ;
; 2.938 ; sdram_statemachine:sdram_adaptor|delay_reg[4]           ; sdram_statemachine:sdram_adaptor|addr_reg[6]        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.155     ; 5.588      ;
; 2.947 ; sdram_statemachine:sdram_adaptor|delay_reg[3]           ; sdram_statemachine:sdram_adaptor|dq_out_reg[10]     ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.156     ; 5.578      ;
; 2.953 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[8] ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.075     ; 5.783      ;
; 2.958 ; sdram_statemachine:sdram_adaptor|delay_reg[0]           ; sdram_statemachine:sdram_adaptor|addr_reg[3]        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.104     ; 5.619      ;
; 2.958 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]     ; sdram_statemachine:sdram_adaptor|dq_out_reg[2]      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.142     ; 5.581      ;
; 2.962 ; sdram_statemachine:sdram_adaptor|delay_reg[5]           ; sdram_statemachine:sdram_adaptor|addr_reg[7]        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.151     ; 5.568      ;
; 2.967 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]     ; sdram_statemachine:sdram_adaptor|ba_reg[1]          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.104     ; 5.610      ;
; 2.979 ; sdram_statemachine:sdram_adaptor|delay_reg[0]           ; sdram_statemachine:sdram_adaptor|dq_out_reg[7]      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.085     ; 5.617      ;
; 2.989 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]     ; sdram_statemachine:sdram_adaptor|addr_reg[9]        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.151     ; 5.541      ;
+-------+---------------------------------------------------------+-----------------------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Setup: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3]'                                                                                                                                                                      ;
+-----------+------------------------------------+------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+
; Slack     ; From Node                          ; To Node                            ; Launch Clock                                                       ; Latch Clock                                                        ; Relationship ; Clock Skew ; Data Delay ;
+-----------+------------------------------------+------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+
; 63993.379 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|Equal5~0_OTERM1 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.078     ; 6.480      ;
; 63993.745 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_tx_state[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.078     ; 6.114      ;
; 63993.836 ; user_io:my_user_io|ps2_rptr[1]     ; user_io:my_user_io|Equal5~0_OTERM1 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.078     ; 6.023      ;
; 63994.138 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_tx_byte[7]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.079     ; 5.720      ;
; 63994.202 ; user_io:my_user_io|ps2_rptr[1]     ; user_io:my_user_io|ps2_tx_state[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.078     ; 5.657      ;
; 63994.595 ; user_io:my_user_io|ps2_rptr[1]     ; user_io:my_user_io|ps2_tx_byte[7]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.079     ; 5.263      ;
; 63994.689 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_tx_byte[0]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.079     ; 5.169      ;
; 63994.764 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_tx_byte[6]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.079     ; 5.094      ;
; 63994.764 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_tx_byte[5]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.079     ; 5.094      ;
; 63994.764 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_tx_byte[4]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.079     ; 5.094      ;
; 63994.764 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_tx_byte[3]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.079     ; 5.094      ;
; 63994.764 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_tx_byte[2]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.079     ; 5.094      ;
; 63994.764 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_tx_byte[1]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.079     ; 5.094      ;
; 63994.764 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_parity      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.079     ; 5.094      ;
; 63994.806 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_kbd_data    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.078     ; 5.053      ;
; 63994.862 ; user_io:my_user_io|ps2_rptr[1]     ; user_io:my_user_io|ps2_tx_byte[1]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.079     ; 4.996      ;
; 63994.959 ; user_io:my_user_io|ps2_rptr[1]     ; user_io:my_user_io|ps2_tx_byte[2]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.079     ; 4.899      ;
; 63995.221 ; user_io:my_user_io|ps2_rptr[1]     ; user_io:my_user_io|ps2_tx_byte[6]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.079     ; 4.637      ;
; 63995.221 ; user_io:my_user_io|ps2_rptr[1]     ; user_io:my_user_io|ps2_tx_byte[5]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.079     ; 4.637      ;
; 63995.221 ; user_io:my_user_io|ps2_rptr[1]     ; user_io:my_user_io|ps2_tx_byte[4]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.079     ; 4.637      ;
; 63995.221 ; user_io:my_user_io|ps2_rptr[1]     ; user_io:my_user_io|ps2_tx_byte[3]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.079     ; 4.637      ;
; 63995.221 ; user_io:my_user_io|ps2_rptr[1]     ; user_io:my_user_io|ps2_tx_byte[0]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.079     ; 4.637      ;
; 63995.221 ; user_io:my_user_io|ps2_rptr[1]     ; user_io:my_user_io|ps2_parity      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.079     ; 4.637      ;
; 63995.263 ; user_io:my_user_io|ps2_rptr[1]     ; user_io:my_user_io|ps2_kbd_data    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.078     ; 4.596      ;
; 63995.437 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_r_inc       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.079     ; 4.421      ;
; 63995.894 ; user_io:my_user_io|ps2_rptr[1]     ; user_io:my_user_io|ps2_r_inc       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.079     ; 3.964      ;
; 63996.431 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|Equal5~0_OTERM1 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.079     ; 3.427      ;
; 63996.606 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|ps2_tx_byte[6]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.080     ; 3.251      ;
; 63996.606 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|ps2_tx_byte[5]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.080     ; 3.251      ;
; 63996.606 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|ps2_tx_byte[4]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.080     ; 3.251      ;
; 63996.606 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|ps2_tx_byte[3]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.080     ; 3.251      ;
; 63996.606 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|ps2_tx_byte[2]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.080     ; 3.251      ;
; 63996.606 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|ps2_tx_byte[1]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.080     ; 3.251      ;
; 63996.606 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|ps2_tx_byte[0]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.080     ; 3.251      ;
; 63996.606 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|ps2_parity      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.080     ; 3.251      ;
; 63996.612 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|ps2_tx_byte[6]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.080     ; 3.245      ;
; 63996.612 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|ps2_tx_byte[5]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.080     ; 3.245      ;
; 63996.612 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|ps2_tx_byte[4]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.080     ; 3.245      ;
; 63996.612 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|ps2_tx_byte[3]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.080     ; 3.245      ;
; 63996.612 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|ps2_tx_byte[2]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.080     ; 3.245      ;
; 63996.612 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|ps2_tx_byte[1]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.080     ; 3.245      ;
; 63996.612 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|ps2_tx_byte[0]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.080     ; 3.245      ;
; 63996.612 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|ps2_parity      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.080     ; 3.245      ;
; 63996.721 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|Equal5~0_OTERM1 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.078     ; 3.138      ;
; 63996.767 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_tx_state[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.079     ; 3.091      ;
; 63996.861 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_tx_byte[6]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.080     ; 2.996      ;
; 63996.861 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_tx_byte[5]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.080     ; 2.996      ;
; 63996.861 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_tx_byte[4]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.080     ; 2.996      ;
; 63996.861 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_tx_byte[3]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.080     ; 2.996      ;
; 63996.861 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_tx_byte[2]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.080     ; 2.996      ;
; 63996.861 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_tx_byte[1]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.080     ; 2.996      ;
; 63996.861 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_tx_byte[0]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.080     ; 2.996      ;
; 63996.861 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_parity      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.080     ; 2.996      ;
; 63996.983 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_tx_byte[6]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.080     ; 2.874      ;
; 63996.983 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_tx_byte[5]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.080     ; 2.874      ;
; 63996.983 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_tx_byte[4]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.080     ; 2.874      ;
; 63996.983 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_tx_byte[3]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.080     ; 2.874      ;
; 63996.983 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_tx_byte[2]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.080     ; 2.874      ;
; 63996.983 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_tx_byte[1]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.080     ; 2.874      ;
; 63996.983 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_tx_byte[0]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.080     ; 2.874      ;
; 63996.983 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_parity      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.080     ; 2.874      ;
; 63997.057 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_tx_state[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.078     ; 2.802      ;
; 63997.092 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_kbd_data    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.078     ; 2.767      ;
; 63997.126 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_tx_byte[7]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.080     ; 2.731      ;
; 63997.245 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|Equal5~0_OTERM1 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.079     ; 2.613      ;
; 63997.279 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|Equal5~0_OTERM1 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.079     ; 2.579      ;
; 63997.416 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_tx_byte[7]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.079     ; 2.442      ;
; 63997.420 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_tx_byte[6]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.080     ; 2.437      ;
; 63997.420 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_tx_byte[5]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.080     ; 2.437      ;
; 63997.420 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_tx_byte[4]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.080     ; 2.437      ;
; 63997.420 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_tx_byte[3]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.080     ; 2.437      ;
; 63997.420 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_tx_byte[2]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.080     ; 2.437      ;
; 63997.420 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_tx_byte[1]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.080     ; 2.437      ;
; 63997.420 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_tx_byte[0]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.080     ; 2.437      ;
; 63997.420 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_parity      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.080     ; 2.437      ;
; 63997.428 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|Equal5~0_OTERM1 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.079     ; 2.430      ;
; 63997.470 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_tx_byte[6]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.079     ; 2.388      ;
; 63997.470 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_tx_byte[5]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.079     ; 2.388      ;
; 63997.470 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_tx_byte[4]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.079     ; 2.388      ;
; 63997.470 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_tx_byte[3]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.079     ; 2.388      ;
; 63997.470 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_tx_byte[2]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.079     ; 2.388      ;
; 63997.470 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_tx_byte[1]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.079     ; 2.388      ;
; 63997.470 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_tx_byte[0]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.079     ; 2.388      ;
; 63997.470 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_parity      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.079     ; 2.388      ;
; 63997.581 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|ps2_tx_state[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.079     ; 2.277      ;
; 63997.583 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|ps2_kbd_data    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.079     ; 2.275      ;
; 63997.592 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|Equal5~0_OTERM1 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.079     ; 2.266      ;
; 63997.615 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|ps2_tx_state[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.079     ; 2.243      ;
; 63997.617 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|ps2_kbd_data    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.079     ; 2.241      ;
; 63997.764 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_tx_state[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.079     ; 2.094      ;
; 63997.766 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_kbd_data    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.079     ; 2.092      ;
; 63997.928 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_tx_state[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.079     ; 1.930      ;
; 63997.930 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_kbd_data    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.079     ; 1.928      ;
; 63998.053 ; user_io:my_user_io|ps2_tx_byte[0]  ; user_io:my_user_io|ps2_kbd_data    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.078     ; 1.806      ;
; 63998.078 ; user_io:my_user_io|ps2_kbd_data    ; user_io:my_user_io|ps2_kbd_data    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.079     ; 1.780      ;
; 63998.103 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|ps2_tx_state[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.079     ; 1.755      ;
; 63998.106 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|ps2_tx_state[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.079     ; 1.752      ;
; 63998.114 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|ps2_tx_state[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.079     ; 1.744      ;
; 63998.157 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|ps2_tx_state[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.079     ; 1.701      ;
; 63998.226 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_kbd_data    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.079     ; 1.632      ;
+-----------+------------------------------------+------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Hold: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                   ;
+-------+--------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                    ; To Node                                                                                                                                                                                                                                  ; Launch Clock                                                       ; Latch Clock                                                        ; Relationship ; Clock Skew ; Data Delay ;
+-------+--------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+
; 0.398 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm0_raw_reg[5]                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a0~porta_datain_reg0   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.481      ; 1.133      ;
; 0.399 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm0_raw_reg[6]                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a0~porta_datain_reg0   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.481      ; 1.134      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm0_raw_reg[3]                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a0~porta_datain_reg0   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.481      ; 1.137      ;
; 0.409 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[7]                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_amm:auto_generated|altsyncram_74b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.482      ; 1.145      ;
; 0.410 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[6]                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a0~porta_datain_reg0   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.482      ; 1.146      ;
; 0.411 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[0]                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a0~porta_datain_reg0   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.482      ; 1.147      ;
; 0.416 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm0_raw_reg[0]                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a0~porta_datain_reg0   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.481      ; 1.151      ;
; 0.420 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm0_raw_reg[7]                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a0~porta_datain_reg0   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.481      ; 1.155      ;
; 0.433 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|FreezerLogic:freezer|state[0]                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|FreezerLogic:freezer|state[0]                                                                                                               ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.101      ; 0.746      ;
; 0.434 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[6]_NEW190_OTERM1393                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[6]_NEW190_OTERM1393                                                                                                                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.100      ; 0.746      ;
; 0.434 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[14]_NEW198_OTERM1397                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[14]_NEW198_OTERM1397                                                                                                                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.100      ; 0.746      ;
; 0.434 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|idim_r                                                                                                 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|idim_r                                                                                                                                                                             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.100      ; 0.746      ;
; 0.435 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|vscrol_raw_reg[0]                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4mm:auto_generated|altsyncram_p3b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.482      ; 1.171      ;
; 0.437 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm2_raw_reg[2]                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a0~porta_datain_reg0   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.482      ; 1.173      ;
; 0.440 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm0_raw_reg[2]                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a0~porta_datain_reg0   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.481      ; 1.175      ;
; 0.451 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[5]                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a0~porta_datain_reg0   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.482      ; 1.187      ;
; 0.453 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[6]                                                                                                            ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[6]                                                                                                                                                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.081      ; 0.746      ;
; 0.453 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[2]                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[2]                                                                                                                                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.081      ; 0.746      ;
; 0.453 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[4]                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[4]                                                                                                                                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.081      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[1]                                                                                                              ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[1]                                                                                                                                                                                          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[11]                                                                                                           ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[11]                                                                                                                                                                                       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|assert_data                                                                                   ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|assert_data                                                                                                                                                               ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[2]                                                                                                              ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[2]                                                                                                                                                                                          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[12]                                                                                                           ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[12]                                                                                                                                                                                       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[10]                                                                                                           ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[10]                                                                                                                                                                                       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[8]                                                                                                            ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[8]                                                                                                                                                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; paddle_mode_reg                                                                                                                                              ; paddle_mode_reg                                                                                                                                                                                                                          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|subtimer_reg[0]                                                                                                      ; zpucore:zpu|zpu_config_regs:config_regs|subtimer_reg[0]                                                                                                                                                                                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|subtimer_reg[1]                                                                                                      ; zpucore:zpu|zpu_config_regs:config_regs|subtimer_reg[1]                                                                                                                                                                                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|subtimer_reg[3]                                                                                                      ; zpucore:zpu|zpu_config_regs:config_regs|subtimer_reg[3]                                                                                                                                                                                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|subtimer_reg[4]                                                                                                      ; zpucore:zpu|zpu_config_regs:config_regs|subtimer_reg[4]                                                                                                                                                                                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|subtimer_reg[5]                                                                                                      ; zpucore:zpu|zpu_config_regs:config_regs|subtimer_reg[5]                                                                                                                                                                                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|subtimer_reg[6]                                                                                                      ; zpucore:zpu|zpu_config_regs:config_regs|subtimer_reg[6]                                                                                                                                                                                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|subtimer_reg[10]                                                                                                     ; zpucore:zpu|zpu_config_regs:config_regs|subtimer_reg[10]                                                                                                                                                                                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|timer_reg[0]                                                                                                         ; zpucore:zpu|zpu_config_regs:config_regs|timer_reg[0]                                                                                                                                                                                     ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[27]                                                                                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[27]                                                                                                                                                                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[28]                                                                                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[28]                                                                                                                                                                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[30]                                                                                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[30]                                                                                                                                                                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[4]                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[4]                                                                                                                           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[2]                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[2]                                                                                                                           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[3]                                                                                                              ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[3]                                                                                                                                                                                          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[4]_NEW192_OTERM1403                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[4]_NEW192_OTERM1403                                                                                                                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[6]                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[6]                                                                                                                           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:\gen_stereo:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:\gen_stereo:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[0]                                                                             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|state_reg[0]                                                                                       ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|state_reg[0]                                                                                                                                                                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|state_reg[3]                                                                                       ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|state_reg[3]                                                                                                                                                                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|state_reg[1]                                                                                       ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|state_reg[1]                                                                                                                                                                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|skctl_reg[0]                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|skctl_reg[0]                                                                                                                                                      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|skctl_reg[1]                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|skctl_reg[1]                                                                                                                                                      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf0_reg[2]                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf0_reg[2]                                                                                                                                                      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf0_reg[0]                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf0_reg[0]                                                                                                                                                      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf0_reg[1]                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf0_reg[1]                                                                                                                                                      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf0_reg[3]                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf0_reg[3]                                                                                                                                                      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf0_reg[4]                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf0_reg[4]                                                                                                                                                      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf0_reg[5]                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf0_reg[5]                                                                                                                                                      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf0_reg[6]                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf0_reg[6]                                                                                                                                                      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf0_reg[7]                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf0_reg[7]                                                                                                                                                      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[5]                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[5]                                                                                                                                                      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[0]                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[0]                                                                                                                                                      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[1]                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[1]                                                                                                                                                      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[2]                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[2]                                                                                                                                                      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[3]                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[3]                                                                                                                                                      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[4]                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[4]                                                                                                                                                      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[6]                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[6]                                                                                                                                                      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[7]                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[7]                                                                                                                                                      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_countdown_timer:timer1|count_reg[0]                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_countdown_timer:timer1|count_reg[0]                                                                                                           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serin_bitcount_reg[0]                                                                 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serin_bitcount_reg[0]                                                                                                                                             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serin_bitcount_reg[1]                                                                 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serin_bitcount_reg[1]                                                                                                                                             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serin_bitcount_reg[2]                                                                 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serin_bitcount_reg[2]                                                                                                                                             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serin_bitcount_reg[3]                                                                 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serin_bitcount_reg[3]                                                                                                                                             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf2_reg[1]                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf2_reg[1]                                                                                                                                                      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf2_reg[0]                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf2_reg[0]                                                                                                                                                      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf2_reg[3]                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf2_reg[3]                                                                                                                                                      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf2_reg[2]                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf2_reg[2]                                                                                                                                                      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf2_reg[6]                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf2_reg[6]                                                                                                                                                      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf2_reg[4]                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf2_reg[4]                                                                                                                                                      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf2_reg[5]                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf2_reg[5]                                                                                                                                                      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf2_reg[7]                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf2_reg[7]                                                                                                                                                      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf3_reg[0]                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf3_reg[0]                                                                                                                                                      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf3_reg[2]                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf3_reg[2]                                                                                                                                                      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf3_reg[1]                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf3_reg[1]                                                                                                                                                      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf3_reg[3]                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf3_reg[3]                                                                                                                                                      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf3_reg[5]                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf3_reg[5]                                                                                                                                                      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf3_reg[4]                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf3_reg[4]                                                                                                                                                      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf3_reg[7]                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf3_reg[7]                                                                                                                                                      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf3_reg[6]                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf3_reg[6]                                                                                                                                                      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serout_shift_reg[9]                                                                   ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serout_shift_reg[9]                                                                                                                                               ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serial_out_reg                                                                        ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serial_out_reg                                                                                                                                                    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[12]                                                                                                               ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[12]                                                                                                                                                                                           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[50]                                                                                                               ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[50]                                                                                                                                                                                           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[58]                                                                                                               ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[58]                                                                                                                                                                                           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[90]                                                                                                               ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[90]                                                                                                                                                                                           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[6]                                                                                                                ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[6]                                                                                                                                                                                            ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[66]                                                                                                               ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[66]                                                                                                                                                                                           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[102]                                                                                                              ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[102]                                                                                                                                                                                          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[62]                                                                                                               ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[62]                                                                                                                                                                                           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[52]                                                                                                               ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[52]                                                                                                                                                                                           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[88]                                                                                                               ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[88]                                                                                                                                                                                           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[3]                                                                                                                ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[3]                                                                                                                                                                                            ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[59]                                                                                                               ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[59]                                                                                                                                                                                           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.080      ; 0.746      ;
+-------+--------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Hold: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                                         ;
+-------+---------------------------------------------------------------+---------------------------------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                     ; To Node                                                       ; Launch Clock                                                       ; Latch Clock                                                        ; Relationship ; Clock Skew ; Data Delay ;
+-------+---------------------------------------------------------------+---------------------------------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+
; 0.454 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]           ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]           ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.454 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]           ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 0.746      ;
; 0.455 ; sdram_statemachine:sdram_adaptor|reply_reg                    ; sdram_statemachine:sdram_adaptor|reply_reg                    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.746      ;
; 0.511 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10] ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.802      ;
; 0.688 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[11]      ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[11]      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 0.979      ;
; 0.737 ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.029      ;
; 0.737 ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.029      ;
; 0.740 ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.032      ;
; 0.741 ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.033      ;
; 0.741 ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.033      ;
; 0.741 ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.033      ;
; 0.742 ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.034      ;
; 0.746 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.037      ;
; 0.747 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.038      ;
; 0.747 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.038      ;
; 0.750 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.041      ;
; 0.750 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.041      ;
; 0.750 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.041      ;
; 0.750 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[9]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[9]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.041      ;
; 0.751 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.042      ;
; 0.752 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.043      ;
; 0.756 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[2]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[2]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.047      ;
; 0.756 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[6]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[6]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.047      ;
; 0.757 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[1]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[1]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.048      ;
; 0.757 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[3]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[3]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.048      ;
; 0.757 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[4]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[4]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.048      ;
; 0.758 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[5]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[5]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.049      ;
; 0.760 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[7]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[7]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.051      ;
; 0.761 ; sdram_statemachine:sdram_adaptor|delay_reg[1]                 ; sdram_statemachine:sdram_adaptor|delay_reg[1]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.053      ;
; 0.763 ; sdram_statemachine:sdram_adaptor|delay_reg[13]                ; sdram_statemachine:sdram_adaptor|delay_reg[13]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.055      ;
; 0.765 ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.057      ;
; 0.765 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[10]      ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[10]      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.056      ;
; 0.766 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[8]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[8]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.057      ;
; 0.768 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[9]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[9]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.059      ;
; 0.770 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.062      ;
; 0.772 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[0]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[0]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.063      ;
; 0.773 ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.065      ;
; 0.773 ; sdram_statemachine:sdram_adaptor|delay_reg[5]                 ; sdram_statemachine:sdram_adaptor|delay_reg[5]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.065      ;
; 0.781 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[0]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[0]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.072      ;
; 0.795 ; sdram_statemachine:sdram_adaptor|delay_reg[0]                 ; sdram_statemachine:sdram_adaptor|delay_reg[0]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.087      ;
; 0.810 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]           ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.102      ;
; 0.827 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]           ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.119      ;
; 0.827 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]           ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.119      ;
; 1.092 ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.384      ;
; 1.092 ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.384      ;
; 1.094 ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.386      ;
; 1.101 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.392      ;
; 1.101 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.392      ;
; 1.102 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.393      ;
; 1.102 ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.394      ;
; 1.102 ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.394      ;
; 1.102 ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ; sdram_statemachine:sdram_adaptor|delay_reg[13]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.394      ;
; 1.103 ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.395      ;
; 1.104 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[9]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.395      ;
; 1.104 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.395      ;
; 1.109 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[1]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[2]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.400      ;
; 1.110 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[3]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[4]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.401      ;
; 1.110 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[0]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.401      ;
; 1.111 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[5]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[6]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.402      ;
; 1.111 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.402      ;
; 1.111 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.402      ;
; 1.111 ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.403      ;
; 1.111 ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.403      ;
; 1.112 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.403      ;
; 1.112 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[7]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[8]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.403      ;
; 1.112 ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.404      ;
; 1.113 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[9]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.404      ;
; 1.116 ; sdram_statemachine:sdram_adaptor|delay_reg[1]                 ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.408      ;
; 1.119 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[2]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[3]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.410      ;
; 1.119 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[0]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[1]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.410      ;
; 1.119 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[6]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[7]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.410      ;
; 1.119 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[0]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.410      ;
; 1.120 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[9]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[10]      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.411      ;
; 1.120 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[4]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[5]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.411      ;
; 1.120 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.411      ;
; 1.120 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.411      ;
; 1.121 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.412      ;
; 1.122 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.413      ;
; 1.125 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                 ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.417      ;
; 1.126 ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.418      ;
; 1.127 ; sdram_statemachine:sdram_adaptor|delay_reg[5]                 ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.419      ;
; 1.128 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[10]      ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[11]      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.419      ;
; 1.128 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[0]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[2]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.419      ;
; 1.128 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[2]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[4]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.419      ;
; 1.128 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[6]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[8]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.419      ;
; 1.129 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[8]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[9]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.420      ;
; 1.129 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[4]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[6]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.420      ;
; 1.133 ; sdram_statemachine:sdram_adaptor|delay_reg[0]                 ; sdram_statemachine:sdram_adaptor|delay_reg[1]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.425      ;
; 1.134 ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ; sdram_statemachine:sdram_adaptor|delay_reg[5]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.426      ;
; 1.135 ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.427      ;
; 1.138 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[8]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[10]      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.429      ;
; 1.142 ; sdram_statemachine:sdram_adaptor|delay_reg[0]                 ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.434      ;
; 1.143 ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.435      ;
; 1.163 ; sdram_statemachine:sdram_adaptor|request_sreg                 ; sdram_statemachine:sdram_adaptor|reply_reg                    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.193      ; 1.587      ;
; 1.209 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]           ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.501      ;
; 1.223 ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.515      ;
; 1.223 ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ; sdram_statemachine:sdram_adaptor|delay_reg[13]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.515      ;
; 1.225 ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.080      ; 1.517      ;
; 1.232 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.079      ; 1.523      ;
+-------+---------------------------------------------------------------+---------------------------------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Hold: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3]'                                                                                                                                                                   ;
+-------+------------------------------------+------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                          ; To Node                            ; Launch Clock                                                       ; Latch Clock                                                        ; Relationship ; Clock Skew ; Data Delay ;
+-------+------------------------------------+------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+
; 0.455 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_tx_state[2] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_rptr[0]     ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; user_io:my_user_io|ps2_rptr[1]     ; user_io:my_user_io|ps2_rptr[1]     ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_rptr[2]     ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; user_io:my_user_io|ps2_tx_byte[7]  ; user_io:my_user_io|ps2_tx_byte[7]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 0.746      ;
; 0.455 ; user_io:my_user_io|ps2_parity      ; user_io:my_user_io|ps2_parity      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 0.746      ;
; 0.502 ; user_io:my_user_io|ps2_r_inc       ; user_io:my_user_io|ps2_rptr[1]     ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 0.793      ;
; 0.505 ; user_io:my_user_io|ps2_r_inc       ; user_io:my_user_io|ps2_rptr[0]     ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 0.796      ;
; 0.518 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_rptr[2]     ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 0.809      ;
; 0.534 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_tx_state[2] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 0.825      ;
; 0.556 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_tx_byte[6]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 0.847      ;
; 0.559 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_tx_byte[4]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 0.850      ;
; 0.561 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_tx_byte[0]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 0.852      ;
; 0.562 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_tx_byte[5]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 0.853      ;
; 0.564 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_r_inc       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 0.855      ;
; 0.566 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_tx_byte[2]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 0.857      ;
; 0.568 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_tx_byte[3]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 0.859      ;
; 0.699 ; user_io:my_user_io|ps2_tx_byte[3]  ; user_io:my_user_io|ps2_tx_byte[2]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 0.990      ;
; 0.700 ; user_io:my_user_io|ps2_tx_byte[5]  ; user_io:my_user_io|ps2_tx_byte[4]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 0.991      ;
; 0.700 ; user_io:my_user_io|ps2_tx_byte[2]  ; user_io:my_user_io|ps2_tx_byte[1]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 0.991      ;
; 0.701 ; user_io:my_user_io|ps2_tx_byte[1]  ; user_io:my_user_io|ps2_tx_byte[0]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 0.992      ;
; 0.703 ; user_io:my_user_io|ps2_tx_byte[4]  ; user_io:my_user_io|ps2_tx_byte[3]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 0.994      ;
; 0.764 ; user_io:my_user_io|ps2_r_inc       ; user_io:my_user_io|ps2_rptr[2]     ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 1.055      ;
; 0.766 ; user_io:my_user_io|ps2_rptr[1]     ; user_io:my_user_io|ps2_rptr[2]     ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 1.057      ;
; 0.766 ; user_io:my_user_io|ps2_tx_byte[0]  ; user_io:my_user_io|ps2_parity      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 1.057      ;
; 0.777 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_rptr[1]     ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 1.068      ;
; 0.802 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|ps2_tx_state[2] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 1.093      ;
; 0.804 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|ps2_tx_state[2] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 1.095      ;
; 0.848 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_tx_byte[1]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 1.139      ;
; 0.905 ; user_io:my_user_io|ps2_tx_byte[7]  ; user_io:my_user_io|ps2_tx_byte[6]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 1.196      ;
; 0.931 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_tx_state[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 1.222      ;
; 0.931 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|Equal5~0_OTERM1 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 1.222      ;
; 0.934 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_r_inc       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.078      ; 1.224      ;
; 0.935 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_tx_state[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 1.226      ;
; 0.937 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_tx_byte[7]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 1.228      ;
; 0.941 ; user_io:my_user_io|ps2_tx_byte[6]  ; user_io:my_user_io|ps2_tx_byte[5]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 1.232      ;
; 0.950 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_tx_state[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 1.241      ;
; 0.996 ; user_io:my_user_io|ps2_parity      ; user_io:my_user_io|ps2_kbd_data    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.080      ; 1.288      ;
; 1.053 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_tx_state[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 1.344      ;
; 1.053 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|Equal5~0_OTERM1 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 1.344      ;
; 1.057 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_tx_state[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 1.348      ;
; 1.081 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_parity      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.078      ; 1.371      ;
; 1.093 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_kbd_data    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 1.384      ;
; 1.156 ; user_io:my_user_io|ps2_kbd_data    ; user_io:my_user_io|ps2_kbd_data    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 1.447      ;
; 1.183 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_kbd_data    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 1.474      ;
; 1.197 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|ps2_tx_state[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 1.488      ;
; 1.197 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|Equal5~0_OTERM1 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 1.488      ;
; 1.203 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|ps2_tx_state[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 1.494      ;
; 1.203 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|Equal5~0_OTERM1 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 1.494      ;
; 1.213 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|ps2_tx_state[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 1.504      ;
; 1.213 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_kbd_data    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 1.504      ;
; 1.215 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|ps2_tx_state[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 1.506      ;
; 1.217 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_tx_state[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 1.508      ;
; 1.273 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|Equal5~0_OTERM1 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 1.564      ;
; 1.281 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_tx_byte[6]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.078      ; 1.571      ;
; 1.281 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_tx_byte[5]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.078      ; 1.571      ;
; 1.281 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_tx_byte[4]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.078      ; 1.571      ;
; 1.281 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_tx_byte[3]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.078      ; 1.571      ;
; 1.281 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_tx_byte[2]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.078      ; 1.571      ;
; 1.281 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_tx_byte[1]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.078      ; 1.571      ;
; 1.281 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_tx_byte[0]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.078      ; 1.571      ;
; 1.325 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|ps2_kbd_data    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 1.616      ;
; 1.367 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|ps2_kbd_data    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 1.658      ;
; 1.398 ; user_io:my_user_io|ps2_tx_byte[0]  ; user_io:my_user_io|ps2_kbd_data    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.080      ; 1.690      ;
; 1.603 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_tx_state[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 1.894      ;
; 1.708 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|ps2_tx_state[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 1.999      ;
; 1.712 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|ps2_tx_state[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 2.003      ;
; 2.001 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_parity      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 2.292      ;
; 2.100 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_tx_state[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.080      ; 2.392      ;
; 2.109 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_tx_byte[7]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.078      ; 2.399      ;
; 2.149 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_kbd_data    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.080      ; 2.441      ;
; 2.185 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_tx_byte[1]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 2.476      ;
; 2.437 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_tx_byte[6]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.078      ; 2.727      ;
; 2.437 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_tx_byte[5]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.078      ; 2.727      ;
; 2.437 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_tx_byte[4]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.078      ; 2.727      ;
; 2.437 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_tx_byte[3]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.078      ; 2.727      ;
; 2.437 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_tx_byte[2]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.078      ; 2.727      ;
; 2.437 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_tx_byte[1]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.078      ; 2.727      ;
; 2.437 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_tx_byte[0]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.078      ; 2.727      ;
; 2.437 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_parity      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.078      ; 2.727      ;
; 2.449 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_tx_byte[0]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 2.740      ;
; 2.450 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_tx_byte[2]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 2.741      ;
; 2.452 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|Equal5~0_OTERM1 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.080      ; 2.744      ;
; 2.486 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_tx_byte[6]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 2.777      ;
; 2.521 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_tx_byte[4]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 2.812      ;
; 2.523 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_tx_byte[5]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 2.814      ;
; 2.537 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_tx_byte[3]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.079      ; 2.828      ;
; 2.558 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_tx_byte[6]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.078      ; 2.848      ;
; 2.558 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_tx_byte[5]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.078      ; 2.848      ;
; 2.558 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_tx_byte[4]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.078      ; 2.848      ;
; 2.558 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_tx_byte[3]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.078      ; 2.848      ;
; 2.558 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_tx_byte[2]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.078      ; 2.848      ;
; 2.558 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_tx_byte[1]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.078      ; 2.848      ;
; 2.558 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_tx_byte[0]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.078      ; 2.848      ;
; 2.558 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_parity      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.078      ; 2.848      ;
; 2.709 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|ps2_tx_byte[6]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.078      ; 2.999      ;
; 2.709 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|ps2_tx_byte[5]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.078      ; 2.999      ;
; 2.709 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|ps2_tx_byte[4]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.078      ; 2.999      ;
; 2.709 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|ps2_tx_byte[3]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.078      ; 2.999      ;
; 2.709 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|ps2_tx_byte[2]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.078      ; 2.999      ;
+-------+------------------------------------+------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Recovery: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                           ;
+--------+-----------------------------------------------------+----------------------------------------------------------------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                                           ; To Node                                                                                      ; Launch Clock                                                       ; Latch Clock                                                        ; Relationship ; Clock Skew ; Data Delay ;
+--------+-----------------------------------------------------+----------------------------------------------------------------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+
; 10.081 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[2]                                              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.082     ; 7.459      ;
; 10.086 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[9]                                          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.077     ; 7.459      ;
; 10.086 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[10]                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.077     ; 7.459      ;
; 10.086 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[8]                                          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.077     ; 7.459      ;
; 10.127 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[5]                                              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.072     ; 7.423      ;
; 10.509 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[0]                                            ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; 0.327      ; 7.440      ;
; 10.509 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[1]                                            ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; 0.327      ; 7.440      ;
; 10.550 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_READ_reg                                               ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; 0.394      ; 7.466      ;
; 10.557 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[0]                                              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.083     ; 6.982      ;
; 10.558 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[31]                                             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.089     ; 6.975      ;
; 10.558 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[11]                                             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.089     ; 6.975      ;
; 10.558 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[1]                    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.088     ; 6.976      ;
; 10.558 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[2]                    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.088     ; 6.976      ;
; 10.558 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[3]                    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.088     ; 6.976      ;
; 10.558 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[4]                    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.088     ; 6.976      ;
; 10.558 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[5]                    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.088     ; 6.976      ;
; 10.558 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[6]                    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.088     ; 6.976      ;
; 10.558 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[7]                    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.088     ; 6.976      ;
; 10.558 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[8]                    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.088     ; 6.976      ;
; 10.558 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[9]                    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.088     ; 6.976      ;
; 10.558 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[10]                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.088     ; 6.976      ;
; 10.558 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[11]                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.088     ; 6.976      ;
; 10.558 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[12]                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.088     ; 6.976      ;
; 10.558 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[13]                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.088     ; 6.976      ;
; 10.558 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[14]                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.088     ; 6.976      ;
; 10.558 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[3]                                              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.082     ; 6.982      ;
; 10.563 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[20]                                           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.105     ; 6.954      ;
; 10.563 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[18]                                           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.105     ; 6.954      ;
; 10.563 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[21]                                           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.105     ; 6.954      ;
; 10.568 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audctl_reg[4]         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.080     ; 6.974      ;
; 10.568 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audctl_reg[6]         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.080     ; 6.974      ;
; 10.568 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audctl_reg[0]         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.080     ; 6.974      ;
; 10.568 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf0_reg[2]          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.080     ; 6.974      ;
; 10.568 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf0_reg[0]          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.080     ; 6.974      ;
; 10.568 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf0_reg[3]          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.080     ; 6.974      ;
; 10.568 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf0_reg[4]          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.080     ; 6.974      ;
; 10.568 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[5]          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.080     ; 6.974      ;
; 10.568 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[0]          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.080     ; 6.974      ;
; 10.568 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[2]          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.080     ; 6.974      ;
; 10.568 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[3]          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.080     ; 6.974      ;
; 10.568 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[4]          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.080     ; 6.974      ;
; 10.568 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|sio_in_reg            ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.081     ; 6.973      ;
; 10.568 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serin_clock_last_reg  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.081     ; 6.973      ;
; 10.568 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serin_bitcount_reg[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.081     ; 6.973      ;
; 10.568 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serin_bitcount_reg[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.081     ; 6.973      ;
; 10.568 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serin_bitcount_reg[2] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.081     ; 6.973      ;
; 10.568 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serin_bitcount_reg[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.081     ; 6.973      ;
; 10.568 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audctl_reg[3]         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.080     ; 6.974      ;
; 10.568 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audctl_reg[5]         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.080     ; 6.974      ;
; 10.568 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf2_reg[0]          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.080     ; 6.974      ;
; 10.568 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf2_reg[3]          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.080     ; 6.974      ;
; 10.568 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf2_reg[2]          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.080     ; 6.974      ;
; 10.568 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf2_reg[4]          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.080     ; 6.974      ;
; 10.568 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf2_reg[5]          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.080     ; 6.974      ;
; 10.568 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf3_reg[2]          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.080     ; 6.974      ;
; 10.568 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf3_reg[3]          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.080     ; 6.974      ;
; 10.568 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf3_reg[4]          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.080     ; 6.974      ;
; 10.568 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[25]                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; 0.397      ; 7.451      ;
; 10.568 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serin_shift_reg[9]    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.081     ; 6.973      ;
; 10.568 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serin_shift_reg[8]    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.081     ; 6.973      ;
; 10.568 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[6]                                          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.085     ; 6.969      ;
; 10.568 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[6]                                          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.085     ; 6.969      ;
; 10.568 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serin_shift_reg[7]    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.081     ; 6.973      ;
; 10.568 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|irqen_reg[5]          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.080     ; 6.974      ;
; 10.568 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[5]                                          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.085     ; 6.969      ;
; 10.568 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[5]                                          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.085     ; 6.969      ;
; 10.568 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serin_shift_reg[6]    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.081     ; 6.973      ;
; 10.568 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|irqen_reg[4]          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.080     ; 6.974      ;
; 10.568 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[7]                                          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.085     ; 6.969      ;
; 10.568 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[7]                                          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.085     ; 6.969      ;
; 10.568 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[23]                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.085     ; 6.969      ;
; 10.568 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serin_shift_reg[5]    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.081     ; 6.973      ;
; 10.568 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serin_shift_reg[4]    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.081     ; 6.973      ;
; 10.568 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|irqen_reg[2]          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.080     ; 6.974      ;
; 10.568 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|irqst_reg[2]          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.080     ; 6.974      ;
; 10.568 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serin_shift_reg[3]    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.081     ; 6.973      ;
; 10.568 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serin_shift_reg[2]    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.081     ; 6.973      ;
; 10.568 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|irqen_reg[0]          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.080     ; 6.974      ;
; 10.568 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|irqst_reg[0]          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.080     ; 6.974      ;
; 10.568 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[18]                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.085     ; 6.969      ;
; 10.568 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[18]                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.085     ; 6.969      ;
; 10.568 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[3]                                          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.085     ; 6.969      ;
; 10.568 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[3]                                          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.085     ; 6.969      ;
; 10.568 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|irqen_reg[1]          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.080     ; 6.974      ;
; 10.568 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|irqst_reg[1]          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.080     ; 6.974      ;
; 10.568 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[1]                                          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.085     ; 6.969      ;
; 10.568 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[1]                                          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.085     ; 6.969      ;
; 10.569 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[19]                                             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.082     ; 6.971      ;
; 10.569 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|timer_reg[1]                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.083     ; 6.970      ;
; 10.569 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|timer_reg[2]                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.083     ; 6.970      ;
; 10.569 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|timer_reg[3]                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.083     ; 6.970      ;
; 10.569 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|timer_reg[4]                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.083     ; 6.970      ;
; 10.569 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|timer_reg[5]                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.083     ; 6.970      ;
; 10.569 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|timer_reg[6]                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.083     ; 6.970      ;
; 10.569 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|timer_reg[7]                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.083     ; 6.970      ;
; 10.569 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|timer_reg[8]                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.083     ; 6.970      ;
; 10.569 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|timer_reg[9]                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.083     ; 6.970      ;
; 10.569 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[31]                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.085     ; 6.968      ;
; 10.569 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[31]                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.085     ; 6.968      ;
; 10.569 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|timer_reg[10]                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.083     ; 6.970      ;
+--------+-----------------------------------------------------+----------------------------------------------------------------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Removal: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                     ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                                           ; To Node                                                                                                                                                                                                                ; Launch Clock                                                       ; Latch Clock                                                        ; Relationship ; Clock Skew ; Data Delay ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+
; 1.801 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|altsyncram_h3b1:altsyncram2|ram_block5a15   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 2.444      ;
; 1.801 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|altsyncram_h3b1:altsyncram2|ram_block5a14   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 2.444      ;
; 1.801 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|altsyncram_h3b1:altsyncram2|ram_block5a13   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 2.444      ;
; 1.801 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|altsyncram_h3b1:altsyncram2|ram_block5a12   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 2.444      ;
; 1.801 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|altsyncram_h3b1:altsyncram2|ram_block5a11   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 2.444      ;
; 1.801 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|altsyncram_h3b1:altsyncram2|ram_block5a10   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 2.444      ;
; 1.801 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|altsyncram_h3b1:altsyncram2|ram_block5a9    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 2.444      ;
; 1.801 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|altsyncram_h3b1:altsyncram2|ram_block5a8    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 2.444      ;
; 1.801 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|altsyncram_h3b1:altsyncram2|ram_block5a7    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 2.444      ;
; 1.801 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|altsyncram_h3b1:altsyncram2|ram_block5a6    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 2.444      ;
; 1.801 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|altsyncram_h3b1:altsyncram2|ram_block5a5    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 2.444      ;
; 1.801 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|altsyncram_h3b1:altsyncram2|ram_block5a4    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 2.444      ;
; 1.801 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|altsyncram_h3b1:altsyncram2|ram_block5a3    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 2.444      ;
; 1.801 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|altsyncram_h3b1:altsyncram2|ram_block5a2    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 2.444      ;
; 1.801 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|altsyncram_h3b1:altsyncram2|ram_block5a1    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 2.444      ;
; 1.801 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|altsyncram_h3b1:altsyncram2|ram_block5a0    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.432      ; 2.444      ;
; 1.934 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a63  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.430      ; 2.575      ;
; 1.934 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a62  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.430      ; 2.575      ;
; 1.934 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a61  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.430      ; 2.575      ;
; 1.934 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a60  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.430      ; 2.575      ;
; 1.934 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a59  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.430      ; 2.575      ;
; 1.934 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a58  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.430      ; 2.575      ;
; 1.934 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a57  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.430      ; 2.575      ;
; 1.934 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a56  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.430      ; 2.575      ;
; 1.934 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a39  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.430      ; 2.575      ;
; 1.934 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a38  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.430      ; 2.575      ;
; 1.934 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a37  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.430      ; 2.575      ;
; 1.934 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a36  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.430      ; 2.575      ;
; 1.934 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a35  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.430      ; 2.575      ;
; 1.934 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a34  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.430      ; 2.575      ;
; 1.934 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a33  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.430      ; 2.575      ;
; 1.934 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a32  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.430      ; 2.575      ;
; 1.934 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a31  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.430      ; 2.575      ;
; 1.934 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a30  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.430      ; 2.575      ;
; 1.934 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a29  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.430      ; 2.575      ;
; 1.934 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a28  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.430      ; 2.575      ;
; 1.934 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a27  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.430      ; 2.575      ;
; 1.934 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a26  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.430      ; 2.575      ;
; 1.934 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a25  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.430      ; 2.575      ;
; 1.934 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a24  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.430      ; 2.575      ;
; 1.934 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a23  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.430      ; 2.575      ;
; 1.934 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a22  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.430      ; 2.575      ;
; 1.934 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a21  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.430      ; 2.575      ;
; 1.934 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a20  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.430      ; 2.575      ;
; 1.934 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a7   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.430      ; 2.575      ;
; 1.934 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a6   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.430      ; 2.575      ;
; 1.934 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a5   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.430      ; 2.575      ;
; 1.934 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a4   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.430      ; 2.575      ;
; 1.934 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a3   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.430      ; 2.575      ;
; 1.934 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a2   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.430      ; 2.575      ;
; 1.934 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a1   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.430      ; 2.575      ;
; 1.934 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a0   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.430      ; 2.575      ;
; 1.980 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a55  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.428      ; 2.619      ;
; 1.980 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a54  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.428      ; 2.619      ;
; 1.980 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a53  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.428      ; 2.619      ;
; 1.980 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a52  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.428      ; 2.619      ;
; 1.980 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a51  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.428      ; 2.619      ;
; 1.980 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a50  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.428      ; 2.619      ;
; 1.980 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a49  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.428      ; 2.619      ;
; 1.980 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a48  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.428      ; 2.619      ;
; 1.980 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a47  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.428      ; 2.619      ;
; 1.980 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a46  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.428      ; 2.619      ;
; 1.980 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a45  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.428      ; 2.619      ;
; 1.980 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a44  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.428      ; 2.619      ;
; 1.980 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a43  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.428      ; 2.619      ;
; 1.980 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a42  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.428      ; 2.619      ;
; 1.980 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a41  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.428      ; 2.619      ;
; 1.980 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a40  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.428      ; 2.619      ;
; 1.980 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a19  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.428      ; 2.619      ;
; 1.980 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a18  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.428      ; 2.619      ;
; 1.980 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a17  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.428      ; 2.619      ;
; 1.980 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a16  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.428      ; 2.619      ;
; 1.980 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a15  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.428      ; 2.619      ;
; 1.980 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a14  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.428      ; 2.619      ;
; 1.980 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a13  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.428      ; 2.619      ;
; 1.980 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a12  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.428      ; 2.619      ;
; 1.980 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a11  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.428      ; 2.619      ;
; 1.980 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a10  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.428      ; 2.619      ;
; 1.980 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a9   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.428      ; 2.619      ;
; 1.980 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a8   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.428      ; 2.619      ;
; 2.226 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_amm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_amm:auto_generated|altsyncram_74b1:altsyncram2|ram_block5a6 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.436      ; 2.873      ;
; 2.226 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_amm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_amm:auto_generated|altsyncram_74b1:altsyncram2|ram_block5a5 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.436      ; 2.873      ;
; 2.226 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_amm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_amm:auto_generated|altsyncram_74b1:altsyncram2|ram_block5a4 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.436      ; 2.873      ;
; 2.226 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_amm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_amm:auto_generated|altsyncram_74b1:altsyncram2|ram_block5a3 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.436      ; 2.873      ;
; 2.226 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_amm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_amm:auto_generated|altsyncram_74b1:altsyncram2|ram_block5a2 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.436      ; 2.873      ;
; 2.226 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_amm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_amm:auto_generated|altsyncram_74b1:altsyncram2|ram_block5a1 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.436      ; 2.873      ;
; 2.226 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_amm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_amm:auto_generated|altsyncram_74b1:altsyncram2|ram_block5a0 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.436      ; 2.873      ;
; 2.565 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4mm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4mm:auto_generated|altsyncram_p3b1:altsyncram2|ram_block5a5 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.428      ; 3.204      ;
; 2.565 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4mm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4mm:auto_generated|altsyncram_p3b1:altsyncram2|ram_block5a4 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.428      ; 3.204      ;
; 2.565 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4mm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4mm:auto_generated|altsyncram_p3b1:altsyncram2|ram_block5a3 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.428      ; 3.204      ;
; 2.565 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4mm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4mm:auto_generated|altsyncram_p3b1:altsyncram2|ram_block5a2 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.428      ; 3.204      ;
; 2.565 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4mm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4mm:auto_generated|altsyncram_p3b1:altsyncram2|ram_block5a1 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.428      ; 3.204      ;
; 2.565 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4mm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4mm:auto_generated|altsyncram_p3b1:altsyncram2|ram_block5a0 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.428      ; 3.204      ;
; 4.534 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[1]                                                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[6]_NEW190_OTERM1393                                                                                               ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.589      ; 5.335      ;
; 4.534 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[1]                                                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[14]_NEW198_OTERM1397                                                                                              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.589      ; 5.335      ;
; 4.535 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg                                                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[6]_NEW190_OTERM1393                                                                                               ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.590      ; 5.337      ;
; 4.535 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg                                                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[14]_NEW198_OTERM1397                                                                                              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.590      ; 5.337      ;
; 4.585 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[1]                                                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmi_shiftreg_reg[8]                                                                                                               ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.539      ; 5.336      ;
; 4.586 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg                                                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmi_shiftreg_reg[8]                                                                                                               ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.540      ; 5.338      ;
; 4.936 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[1]                                                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_pending_reg_OTERM953                                                                                                      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.590      ; 5.738      ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Minimum Pulse Width: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                            ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------+------------+---------------------------------------------------------------+
; Slack ; Actual Width ; Required Width ; Type             ; Clock                                                              ; Clock Edge ; Target                                                        ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------+------------+---------------------------------------------------------------+
; 4.098 ; 4.318        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cke_reg                      ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[0]              ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[10]             ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[11]             ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[12]             ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[13]             ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[14]             ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[15]             ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[1]              ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[2]              ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[3]              ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[4]              ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[5]              ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[6]              ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[7]              ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[8]              ;
; 4.099 ; 4.319        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[9]              ;
; 4.104 ; 4.324        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[0]  ;
; 4.104 ; 4.324        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10] ;
; 4.104 ; 4.324        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]  ;
; 4.104 ; 4.324        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ;
; 4.104 ; 4.324        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ;
; 4.104 ; 4.324        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ;
; 4.104 ; 4.324        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ;
; 4.104 ; 4.324        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ;
; 4.104 ; 4.324        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ;
; 4.104 ; 4.324        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ;
; 4.104 ; 4.324        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[9]  ;
; 4.104 ; 4.324        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[0]                 ;
; 4.104 ; 4.324        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ;
; 4.104 ; 4.324        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ;
; 4.104 ; 4.324        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ;
; 4.104 ; 4.324        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[13]                ;
; 4.104 ; 4.324        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[1]                 ;
; 4.104 ; 4.324        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ;
; 4.104 ; 4.324        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[3]                 ;
; 4.104 ; 4.324        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ;
; 4.104 ; 4.324        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[5]                 ;
; 4.104 ; 4.324        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ;
; 4.104 ; 4.324        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ;
; 4.104 ; 4.324        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ;
; 4.104 ; 4.324        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ;
; 4.104 ; 4.324        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[0]       ;
; 4.104 ; 4.324        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[10]      ;
; 4.104 ; 4.324        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[11]      ;
; 4.104 ; 4.324        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[1]       ;
; 4.104 ; 4.324        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[2]       ;
; 4.104 ; 4.324        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[3]       ;
; 4.104 ; 4.324        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[4]       ;
; 4.104 ; 4.324        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[5]       ;
; 4.104 ; 4.324        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[6]       ;
; 4.104 ; 4.324        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[7]       ;
; 4.104 ; 4.324        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[8]       ;
; 4.104 ; 4.324        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[9]       ;
; 4.104 ; 4.324        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|reply_reg                    ;
; 4.104 ; 4.324        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]           ;
; 4.104 ; 4.324        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]           ;
; 4.104 ; 4.324        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]           ;
; 4.199 ; 4.357        ; 0.158          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[17]             ;
; 4.199 ; 4.357        ; 0.158          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_output_reg~_Duplicate_1   ;
; 4.200 ; 4.358        ; 0.158          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[18]             ;
; 4.200 ; 4.358        ; 0.158          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[19]             ;
; 4.200 ; 4.358        ; 0.158          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[24]             ;
; 4.200 ; 4.358        ; 0.158          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[25]             ;
; 4.200 ; 4.358        ; 0.158          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[26]             ;
; 4.200 ; 4.358        ; 0.158          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[27]             ;
; 4.200 ; 4.358        ; 0.158          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[28]             ;
; 4.200 ; 4.358        ; 0.158          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[29]             ;
; 4.200 ; 4.358        ; 0.158          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_output_reg~_Duplicate_10  ;
; 4.200 ; 4.358        ; 0.158          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_output_reg~_Duplicate_11  ;
; 4.200 ; 4.358        ; 0.158          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_output_reg~_Duplicate_12  ;
; 4.200 ; 4.358        ; 0.158          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_output_reg~_Duplicate_13  ;
; 4.200 ; 4.358        ; 0.158          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_output_reg~_Duplicate_2   ;
; 4.200 ; 4.358        ; 0.158          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_output_reg~_Duplicate_3   ;
; 4.200 ; 4.358        ; 0.158          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_output_reg~_Duplicate_8   ;
; 4.200 ; 4.358        ; 0.158          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_output_reg~_Duplicate_9   ;
; 4.202 ; 4.360        ; 0.158          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[16]             ;
; 4.202 ; 4.360        ; 0.158          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[20]             ;
; 4.202 ; 4.360        ; 0.158          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[21]             ;
; 4.202 ; 4.360        ; 0.158          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[22]             ;
; 4.202 ; 4.360        ; 0.158          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[23]             ;
; 4.202 ; 4.360        ; 0.158          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[30]             ;
; 4.202 ; 4.360        ; 0.158          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[31]             ;
; 4.202 ; 4.360        ; 0.158          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_output_reg                ;
; 4.202 ; 4.360        ; 0.158          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_output_reg~_Duplicate_14  ;
; 4.202 ; 4.360        ; 0.158          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_output_reg~_Duplicate_15  ;
; 4.202 ; 4.360        ; 0.158          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_output_reg~_Duplicate_4   ;
; 4.202 ; 4.360        ; 0.158          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_output_reg~_Duplicate_5   ;
; 4.202 ; 4.360        ; 0.158          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_output_reg~_Duplicate_6   ;
; 4.202 ; 4.360        ; 0.158          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_output_reg~_Duplicate_7   ;
; 4.210 ; 4.363        ; 0.153          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|addr_reg[11]                 ;
; 4.210 ; 4.363        ; 0.153          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|addr_reg[5]                  ;
; 4.211 ; 4.364        ; 0.153          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|addr_reg[0]                  ;
; 4.211 ; 4.364        ; 0.153          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|addr_reg[10]                 ;
; 4.211 ; 4.364        ; 0.153          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|addr_reg[1]                  ;
; 4.211 ; 4.364        ; 0.153          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|addr_reg[2]                  ;
; 4.211 ; 4.364        ; 0.153          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|addr_reg[6]                  ;
; 4.211 ; 4.364        ; 0.153          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|addr_reg[7]                  ;
; 4.211 ; 4.364        ; 0.153          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|addr_reg[8]                  ;
; 4.211 ; 4.364        ; 0.153          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|addr_reg[9]                  ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------+------------+---------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Minimum Pulse Width: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                        ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slack ; Actual Width ; Required Width ; Type             ; Clock                                                              ; Clock Edge ; Target                                                                                                                                                    ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; 8.377 ; 8.778        ; 0.401          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|volume_sum_reg[0] ;
; 8.377 ; 8.778        ; 0.401          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|volume_sum_reg[1] ;
; 8.377 ; 8.778        ; 0.401          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|volume_sum_reg[2] ;
; 8.377 ; 8.778        ; 0.401          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|volume_sum_reg[3] ;
; 8.377 ; 8.778        ; 0.401          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|volume_sum_reg[4] ;
; 8.377 ; 8.778        ; 0.401          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[10]      ;
; 8.377 ; 8.778        ; 0.401          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[11]      ;
; 8.377 ; 8.778        ; 0.401          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[12]      ;
; 8.377 ; 8.778        ; 0.401          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[13]      ;
; 8.377 ; 8.778        ; 0.401          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[14]      ;
; 8.377 ; 8.778        ; 0.401          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[15]      ;
; 8.377 ; 8.778        ; 0.401          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[16]      ;
; 8.377 ; 8.778        ; 0.401          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[17]      ;
; 8.377 ; 8.778        ; 0.401          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[18]      ;
; 8.377 ; 8.778        ; 0.401          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[19]      ;
; 8.377 ; 8.778        ; 0.401          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[20]      ;
; 8.377 ; 8.778        ; 0.401          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[5]       ;
; 8.377 ; 8.778        ; 0.401          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[6]       ;
; 8.377 ; 8.778        ; 0.401          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[7]       ;
; 8.377 ; 8.778        ; 0.401          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[8]       ;
; 8.377 ; 8.778        ; 0.401          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[9]       ;
; 8.421 ; 8.822        ; 0.401          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|volume_sum_reg[0] ;
; 8.421 ; 8.822        ; 0.401          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|volume_sum_reg[1] ;
; 8.421 ; 8.822        ; 0.401          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|volume_sum_reg[2] ;
; 8.421 ; 8.822        ; 0.401          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|volume_sum_reg[3] ;
; 8.421 ; 8.822        ; 0.401          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|volume_sum_reg[4] ;
; 8.421 ; 8.822        ; 0.401          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[10]      ;
; 8.421 ; 8.822        ; 0.401          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[11]      ;
; 8.421 ; 8.822        ; 0.401          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[12]      ;
; 8.421 ; 8.822        ; 0.401          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[13]      ;
; 8.421 ; 8.822        ; 0.401          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[14]      ;
; 8.421 ; 8.822        ; 0.401          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[15]      ;
; 8.421 ; 8.822        ; 0.401          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[16]      ;
; 8.421 ; 8.822        ; 0.401          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[17]      ;
; 8.421 ; 8.822        ; 0.401          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[18]      ;
; 8.421 ; 8.822        ; 0.401          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[19]      ;
; 8.421 ; 8.822        ; 0.401          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[20]      ;
; 8.421 ; 8.822        ; 0.401          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[5]       ;
; 8.421 ; 8.822        ; 0.401          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[6]       ;
; 8.421 ; 8.822        ; 0.401          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[7]       ;
; 8.421 ; 8.822        ; 0.401          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[8]       ;
; 8.421 ; 8.822        ; 0.401          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[9]       ;
; 8.475 ; 8.695        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Y[1]                                          ;
; 8.475 ; 8.695        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Y[5]                                          ;
; 8.475 ; 8.695        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Y[6]                                          ;
; 8.479 ; 8.699        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[0]                                                                                                         ;
; 8.479 ; 8.699        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[1]                                                                                                         ;
; 8.482 ; 8.702        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pot0_reg[1]                                                                        ;
; 8.482 ; 8.702        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pot0_reg[3]                                                                        ;
; 8.484 ; 8.704        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|A[3]                                          ;
; 8.486 ; 8.706        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|T[7]                                          ;
; 8.487 ; 8.707        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|A[0]                                          ;
; 8.487 ; 8.707        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]_OTERM1047                          ;
; 8.488 ; 8.708        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmi_shiftreg_reg[8]                                                  ;
; 8.488 ; 8.708        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|theCpuCycle.cycleBranchPage_OTERM1263         ;
; 8.488 ; 8.708        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[4]                                                                                                         ;
; 8.488 ; 8.708        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[2]_OTERM499                                                                                     ;
; 8.488 ; 8.708        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[3]_OTERM493                                                                                     ;
; 8.489 ; 8.709        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|FreezerLogic:freezer|state[0]                                ;
; 8.489 ; 8.709        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|addr_r[13]                                                                                          ;
; 8.489 ; 8.709        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|addr_r[5]                                                                                           ;
; 8.489 ; 8.709        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|config_mem~0_OTERM11                                                                                                    ;
; 8.490 ; 8.710        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|A[6]                                          ;
; 8.492 ; 8.712        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|addr_r[10]                                                                                          ;
; 8.492 ; 8.712        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|addrl_r[0]                                                                                          ;
; 8.492 ; 8.712        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|addrl_r[1]                                                                                          ;
; 8.492 ; 8.712        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_READ_reg                                                                                                            ;
; 8.494 ; 8.714        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[35]                                   ;
; 8.498 ; 8.718        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Y[7]                                          ;
; 8.499 ; 8.719        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[21]                                   ;
; 8.499 ; 8.719        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[32]                                   ;
; 8.499 ; 8.719        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[33]                                   ;
; 8.500 ; 8.720        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|T[6]                                          ;
; 8.501 ; 8.721        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|delay_line:wsync_delay|shift_reg[34]                                 ;
; 8.501 ; 8.721        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|delay_line:wsync_delay|shift_reg[35]                                 ;
; 8.501 ; 8.721        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|delay_line:wsync_delay|shift_reg[36]                                 ;
; 8.501 ; 8.721        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|delay_line:wsync_delay|shift_reg[37]                                 ;
; 8.501 ; 8.721        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|delay_line:wsync_delay|shift_reg[38]                                 ;
; 8.501 ; 8.721        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|delay_line:wsync_delay|shift_reg[39]                                 ;
; 8.501 ; 8.721        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|delay_line:wsync_delay|shift_reg[40]                                 ;
; 8.501 ; 8.721        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|delay_line:wsync_delay|shift_reg[41]                                 ;
; 8.501 ; 8.721        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|delay_line:wsync_delay|shift_reg[42]                                 ;
; 8.501 ; 8.721        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|delay_line:wsync_delay|shift_reg[43]                                 ;
; 8.501 ; 8.721        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|delay_line:wsync_delay|shift_reg[44]                                 ;
; 8.501 ; 8.721        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|delay_line:wsync_delay|shift_reg[45]                                 ;
; 8.501 ; 8.721        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|delay_line:wsync_delay|shift_reg[46]                                 ;
; 8.501 ; 8.721        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|delay_line:wsync_delay|shift_reg[47]                                 ;
; 8.501 ; 8.721        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Y[0]                                          ;
; 8.501 ; 8.721        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Y[2]                                          ;
; 8.501 ; 8.721        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Y[3]                                          ;
; 8.501 ; 8.721        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[11]                                   ;
; 8.501 ; 8.721        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[14]                                   ;
; 8.501 ; 8.721        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[24]                                   ;
; 8.501 ; 8.721        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[25]                                   ;
; 8.501 ; 8.721        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[5]                                    ;
; 8.501 ; 8.721        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_player:missile3|shift_reg[7]                                      ;
; 8.501 ; 8.721        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm2_raw_reg[1]                                                      ;
; 8.501 ; 8.721        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm2_raw_reg[3]                                                      ;
; 8.501 ; 8.721        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm2_raw_reg[5]                                                      ;
; 8.501 ; 8.721        ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm2_raw_reg[6]                                                      ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Minimum Pulse Width: 'CLOCK_27[0]'                                                                                                           ;
+--------+--------------+----------------+------------------+-------------+------------+-----------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock       ; Clock Edge ; Target                                                                      ;
+--------+--------------+----------------+------------------+-------------+------------+-----------------------------------------------------------------------------+
; 18.366 ; 18.366       ; 0.000          ; Low Pulse Width  ; CLOCK_27[0] ; Rise       ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0]           ;
; 18.366 ; 18.366       ; 0.000          ; Low Pulse Width  ; CLOCK_27[0] ; Rise       ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|observablevcoout ;
; 18.400 ; 18.400       ; 0.000          ; Low Pulse Width  ; CLOCK_27[0] ; Rise       ; CLOCK_27[0]~input|o                                                         ;
; 18.438 ; 18.438       ; 0.000          ; Low Pulse Width  ; CLOCK_27[0] ; Rise       ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|inclk[0]         ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27[0] ; Rise       ; CLOCK_27[0]~input|i                                                         ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27[0] ; Rise       ; CLOCK_27[0]~input|i                                                         ;
; 18.598 ; 18.598       ; 0.000          ; High Pulse Width ; CLOCK_27[0] ; Rise       ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|inclk[0]         ;
; 18.637 ; 18.637       ; 0.000          ; High Pulse Width ; CLOCK_27[0] ; Rise       ; CLOCK_27[0]~input|o                                                         ;
; 18.668 ; 18.668       ; 0.000          ; High Pulse Width ; CLOCK_27[0] ; Rise       ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0]           ;
; 18.668 ; 18.668       ; 0.000          ; High Pulse Width ; CLOCK_27[0] ; Rise       ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|observablevcoout ;
; 33.037 ; 37.037       ; 4.000          ; Port Rate        ; CLOCK_27[0] ; Rise       ; CLOCK_27[0]                                                                 ;
+--------+--------------+----------------+------------------+-------------+------------+-----------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Minimum Pulse Width: '\gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                       ;
+--------+--------------+----------------+------------------+-------------------------------------------------------------------+------------+-----------------------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock                                                             ; Clock Edge ; Target                                                                                  ;
+--------+--------------+----------------+------------------+-------------------------------------------------------------------+------------+-----------------------------------------------------------------------------------------+
; 24.963 ; 24.963       ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl|inclk[0] ;
; 24.963 ; 24.963       ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl|outclk   ;
; 24.965 ; 24.965       ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|inclk[0]                    ;
; 24.976 ; 24.976       ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0]                      ;
; 24.976 ; 24.976       ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1]                      ;
; 24.976 ; 24.976       ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[2]                      ;
; 24.976 ; 24.976       ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3]                      ;
; 24.976 ; 24.976       ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|observablevcoout            ;
; 25.021 ; 25.021       ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0]                      ;
; 25.021 ; 25.021       ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1]                      ;
; 25.021 ; 25.021       ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[2]                      ;
; 25.021 ; 25.021       ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3]                      ;
; 25.021 ; 25.021       ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|observablevcoout            ;
; 25.033 ; 25.033       ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|inclk[0]                    ;
; 25.034 ; 25.034       ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl|inclk[0] ;
; 25.034 ; 25.034       ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl|outclk   ;
+--------+--------------+----------------+------------------+-------------------------------------------------------------------+------------+-----------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 85C Model Minimum Pulse Width: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3]'                                                                                                                           ;
+-----------+--------------+----------------+------------------+--------------------------------------------------------------------+------------+------------------------------------------------------------------------------------------+
; Slack     ; Actual Width ; Required Width ; Type             ; Clock                                                              ; Clock Edge ; Target                                                                                   ;
+-----------+--------------+----------------+------------------+--------------------------------------------------------------------+------------+------------------------------------------------------------------------------------------+
; 31999.661 ; 31999.881    ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|Equal5~0_OTERM1                                                       ;
; 31999.661 ; 31999.881    ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_kbd_data                                                          ;
; 31999.661 ; 31999.881    ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_state[0]                                                       ;
; 31999.661 ; 31999.881    ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_state[1]                                                       ;
; 31999.661 ; 31999.881    ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_state[2]                                                       ;
; 31999.661 ; 31999.881    ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_state[3]                                                       ;
; 31999.662 ; 31999.882    ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_parity                                                            ;
; 31999.662 ; 31999.882    ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_r_inc                                                             ;
; 31999.662 ; 31999.882    ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_rptr[0]                                                           ;
; 31999.662 ; 31999.882    ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_rptr[1]                                                           ;
; 31999.662 ; 31999.882    ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_rptr[2]                                                           ;
; 31999.662 ; 31999.882    ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[0]                                                        ;
; 31999.662 ; 31999.882    ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[1]                                                        ;
; 31999.662 ; 31999.882    ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[2]                                                        ;
; 31999.662 ; 31999.882    ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[3]                                                        ;
; 31999.662 ; 31999.882    ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[4]                                                        ;
; 31999.662 ; 31999.882    ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[5]                                                        ;
; 31999.662 ; 31999.882    ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[6]                                                        ;
; 31999.662 ; 31999.882    ; 0.220          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[7]                                                        ;
; 31999.863 ; 32000.051    ; 0.188          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_parity                                                            ;
; 31999.863 ; 32000.051    ; 0.188          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_r_inc                                                             ;
; 31999.863 ; 32000.051    ; 0.188          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_rptr[0]                                                           ;
; 31999.863 ; 32000.051    ; 0.188          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_rptr[1]                                                           ;
; 31999.863 ; 32000.051    ; 0.188          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_rptr[2]                                                           ;
; 31999.863 ; 32000.051    ; 0.188          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[0]                                                        ;
; 31999.863 ; 32000.051    ; 0.188          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[1]                                                        ;
; 31999.863 ; 32000.051    ; 0.188          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[2]                                                        ;
; 31999.863 ; 32000.051    ; 0.188          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[3]                                                        ;
; 31999.863 ; 32000.051    ; 0.188          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[4]                                                        ;
; 31999.863 ; 32000.051    ; 0.188          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[5]                                                        ;
; 31999.863 ; 32000.051    ; 0.188          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[6]                                                        ;
; 31999.863 ; 32000.051    ; 0.188          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[7]                                                        ;
; 31999.864 ; 32000.052    ; 0.188          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|Equal5~0_OTERM1                                                       ;
; 31999.864 ; 32000.052    ; 0.188          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_kbd_data                                                          ;
; 31999.864 ; 32000.052    ; 0.188          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_state[0]                                                       ;
; 31999.864 ; 32000.052    ; 0.188          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_state[1]                                                       ;
; 31999.864 ; 32000.052    ; 0.188          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_state[2]                                                       ;
; 31999.864 ; 32000.052    ; 0.188          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_state[3]                                                       ;
; 31999.930 ; 31999.930    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|Equal5~0_NEW_REG0|clk                                                         ;
; 31999.930 ; 31999.930    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_kbd_data|clk                                                              ;
; 31999.930 ; 31999.930    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_state[0]|clk                                                           ;
; 31999.930 ; 31999.930    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_state[1]|clk                                                           ;
; 31999.930 ; 31999.930    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_state[2]|clk                                                           ;
; 31999.930 ; 31999.930    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_state[3]|clk                                                           ;
; 31999.931 ; 31999.931    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_parity|clk                                                                ;
; 31999.931 ; 31999.931    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_r_inc|clk                                                                 ;
; 31999.931 ; 31999.931    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_rptr[0]|clk                                                               ;
; 31999.931 ; 31999.931    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_rptr[1]|clk                                                               ;
; 31999.931 ; 31999.931    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_rptr[2]|clk                                                               ;
; 31999.931 ; 31999.931    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_byte[0]|clk                                                            ;
; 31999.931 ; 31999.931    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_byte[1]|clk                                                            ;
; 31999.931 ; 31999.931    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_byte[2]|clk                                                            ;
; 31999.931 ; 31999.931    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_byte[3]|clk                                                            ;
; 31999.931 ; 31999.931    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_byte[4]|clk                                                            ;
; 31999.931 ; 31999.931    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_byte[5]|clk                                                            ;
; 31999.931 ; 31999.931    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_byte[6]|clk                                                            ;
; 31999.931 ; 31999.931    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_byte[7]|clk                                                            ;
; 31999.934 ; 31999.934    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|wire_pll1_clk[3]~clkctrl|inclk[0] ;
; 31999.934 ; 31999.934    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|wire_pll1_clk[3]~clkctrl|outclk   ;
; 32000.000 ; 32000.000    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|wire_pll1_clk[3]~clkctrl|inclk[0] ;
; 32000.000 ; 32000.000    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|wire_pll1_clk[3]~clkctrl|outclk   ;
; 32000.003 ; 32000.003    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_parity|clk                                                                ;
; 32000.003 ; 32000.003    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_r_inc|clk                                                                 ;
; 32000.003 ; 32000.003    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_rptr[0]|clk                                                               ;
; 32000.003 ; 32000.003    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_rptr[1]|clk                                                               ;
; 32000.003 ; 32000.003    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_rptr[2]|clk                                                               ;
; 32000.003 ; 32000.003    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_byte[0]|clk                                                            ;
; 32000.003 ; 32000.003    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_byte[1]|clk                                                            ;
; 32000.003 ; 32000.003    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_byte[2]|clk                                                            ;
; 32000.003 ; 32000.003    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_byte[3]|clk                                                            ;
; 32000.003 ; 32000.003    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_byte[4]|clk                                                            ;
; 32000.003 ; 32000.003    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_byte[5]|clk                                                            ;
; 32000.003 ; 32000.003    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_byte[6]|clk                                                            ;
; 32000.003 ; 32000.003    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_byte[7]|clk                                                            ;
; 32000.004 ; 32000.004    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|Equal5~0_NEW_REG0|clk                                                         ;
; 32000.004 ; 32000.004    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_kbd_data|clk                                                              ;
; 32000.004 ; 32000.004    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_state[0]|clk                                                           ;
; 32000.004 ; 32000.004    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_state[1]|clk                                                           ;
; 32000.004 ; 32000.004    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_state[2]|clk                                                           ;
; 32000.004 ; 32000.004    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_state[3]|clk                                                           ;
; 63997.449 ; 63999.936    ; 2.487          ; Min Period       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|Equal5~0_OTERM1                                                       ;
; 63997.449 ; 63999.936    ; 2.487          ; Min Period       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_kbd_data                                                          ;
; 63997.449 ; 63999.936    ; 2.487          ; Min Period       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_parity                                                            ;
; 63997.449 ; 63999.936    ; 2.487          ; Min Period       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_r_inc                                                             ;
; 63997.449 ; 63999.936    ; 2.487          ; Min Period       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_rptr[0]                                                           ;
; 63997.449 ; 63999.936    ; 2.487          ; Min Period       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_rptr[1]                                                           ;
; 63997.449 ; 63999.936    ; 2.487          ; Min Period       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_rptr[2]                                                           ;
; 63997.449 ; 63999.936    ; 2.487          ; Min Period       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[0]                                                        ;
; 63997.449 ; 63999.936    ; 2.487          ; Min Period       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[1]                                                        ;
; 63997.449 ; 63999.936    ; 2.487          ; Min Period       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[2]                                                        ;
; 63997.449 ; 63999.936    ; 2.487          ; Min Period       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[3]                                                        ;
; 63997.449 ; 63999.936    ; 2.487          ; Min Period       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[4]                                                        ;
; 63997.449 ; 63999.936    ; 2.487          ; Min Period       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[5]                                                        ;
; 63997.449 ; 63999.936    ; 2.487          ; Min Period       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[6]                                                        ;
; 63997.449 ; 63999.936    ; 2.487          ; Min Period       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[7]                                                        ;
; 63997.449 ; 63999.936    ; 2.487          ; Min Period       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_state[0]                                                       ;
; 63997.449 ; 63999.936    ; 2.487          ; Min Period       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_state[1]                                                       ;
; 63997.449 ; 63999.936    ; 2.487          ; Min Period       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_state[2]                                                       ;
; 63997.449 ; 63999.936    ; 2.487          ; Min Period       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_state[3]                                                       ;
+-----------+--------------+----------------+------------------+--------------------------------------------------------------------+------------+------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------+
; Setup Times                                                                                                                   ;
+---------------+-------------+-------+-------+------------+--------------------------------------------------------------------+
; Data Port     ; Clock Port  ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                                    ;
+---------------+-------------+-------+-------+------------+--------------------------------------------------------------------+
; SDRAM_DQ[*]   ; CLOCK_27[0] ; 4.916 ; 4.927 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; CLOCK_27[0] ; 4.267 ; 4.278 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; CLOCK_27[0] ; 4.765 ; 4.770 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; CLOCK_27[0] ; 4.745 ; 4.743 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; CLOCK_27[0] ; 4.675 ; 4.688 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; CLOCK_27[0] ; 4.492 ; 4.514 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; CLOCK_27[0] ; 4.572 ; 4.631 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; CLOCK_27[0] ; 4.306 ; 4.373 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; CLOCK_27[0] ; 4.346 ; 4.400 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; CLOCK_27[0] ; 3.801 ; 3.756 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; CLOCK_27[0] ; 3.898 ; 3.809 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; CLOCK_27[0] ; 4.824 ; 4.792 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; CLOCK_27[0] ; 4.827 ; 4.871 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; CLOCK_27[0] ; 4.727 ; 4.687 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; CLOCK_27[0] ; 4.916 ; 4.927 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; CLOCK_27[0] ; 4.793 ; 4.799 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; CLOCK_27[0] ; 4.814 ; 4.851 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
+---------------+-------------+-------+-------+------------+--------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------+
; Hold Times                                                                                                                      ;
+---------------+-------------+--------+--------+------------+--------------------------------------------------------------------+
; Data Port     ; Clock Port  ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                                    ;
+---------------+-------------+--------+--------+------------+--------------------------------------------------------------------+
; SDRAM_DQ[*]   ; CLOCK_27[0] ; -1.826 ; -1.943 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; CLOCK_27[0] ; -1.887 ; -2.000 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; CLOCK_27[0] ; -1.890 ; -2.003 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; CLOCK_27[0] ; -1.892 ; -2.005 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; CLOCK_27[0] ; -1.892 ; -2.005 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; CLOCK_27[0] ; -1.826 ; -1.943 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; CLOCK_27[0] ; -1.836 ; -1.953 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; CLOCK_27[0] ; -1.827 ; -1.944 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; CLOCK_27[0] ; -1.827 ; -1.944 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; CLOCK_27[0] ; -1.873 ; -1.986 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; CLOCK_27[0] ; -1.873 ; -1.986 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; CLOCK_27[0] ; -1.875 ; -1.988 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; CLOCK_27[0] ; -1.875 ; -1.988 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; CLOCK_27[0] ; -1.876 ; -1.989 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; CLOCK_27[0] ; -1.876 ; -1.989 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; CLOCK_27[0] ; -1.888 ; -2.001 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; CLOCK_27[0] ; -1.888 ; -2.001 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
+---------------+-------------+--------+--------+------------+--------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------+
; Clock to Output Times                                                                                                           ;
+---------------+-------------+--------+--------+------------+--------------------------------------------------------------------+
; Data Port     ; Clock Port  ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                                    ;
+---------------+-------------+--------+--------+------------+--------------------------------------------------------------------+
; SDRAM_A[*]    ; CLOCK_27[0] ; 2.674  ; 2.329  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[0]   ; CLOCK_27[0] ; 2.455  ; 2.161  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[1]   ; CLOCK_27[0] ; 2.457  ; 2.163  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[2]   ; CLOCK_27[0] ; 2.458  ; 2.164  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[3]   ; CLOCK_27[0] ; 2.468  ; 2.174  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[4]   ; CLOCK_27[0] ; 2.373  ; 2.105  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[5]   ; CLOCK_27[0] ; 2.674  ; 2.329  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[6]   ; CLOCK_27[0] ; 2.658  ; 2.313  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[7]   ; CLOCK_27[0] ; 2.662  ; 2.317  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[8]   ; CLOCK_27[0] ; 2.662  ; 2.317  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[9]   ; CLOCK_27[0] ; 2.660  ; 2.315  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[10]  ; CLOCK_27[0] ; 2.456  ; 2.162  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[11]  ; CLOCK_27[0] ; 2.666  ; 2.321  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_BA[*]   ; CLOCK_27[0] ; 2.455  ; 2.161  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[0]  ; CLOCK_27[0] ; 2.455  ; 2.161  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[1]  ; CLOCK_27[0] ; 2.446  ; 2.152  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CKE     ; CLOCK_27[0] ; 2.710  ; 2.478  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQ[*]   ; CLOCK_27[0] ; 2.664  ; 2.319  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; CLOCK_27[0] ; 2.645  ; 2.300  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; CLOCK_27[0] ; 2.642  ; 2.297  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; CLOCK_27[0] ; 2.357  ; 2.089  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; CLOCK_27[0] ; 2.357  ; 2.089  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; CLOCK_27[0] ; 2.469  ; 2.175  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; CLOCK_27[0] ; 2.479  ; 2.185  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; CLOCK_27[0] ; 2.468  ; 2.174  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; CLOCK_27[0] ; 2.468  ; 2.174  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; CLOCK_27[0] ; 2.639  ; 2.294  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; CLOCK_27[0] ; 2.639  ; 2.294  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; CLOCK_27[0] ; 2.657  ; 2.312  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; CLOCK_27[0] ; 2.657  ; 2.312  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; CLOCK_27[0] ; 2.353  ; 2.085  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; CLOCK_27[0] ; 2.656  ; 2.311  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; CLOCK_27[0] ; 2.664  ; 2.319  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; CLOCK_27[0] ; 2.361  ; 2.093  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQMH    ; CLOCK_27[0] ; 2.638  ; 2.293  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQML    ; CLOCK_27[0] ; 2.467  ; 2.173  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_nCAS    ; CLOCK_27[0] ; 2.456  ; 2.162  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_nRAS    ; CLOCK_27[0] ; 2.455  ; 2.161  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_nWE     ; CLOCK_27[0] ; 2.467  ; 2.173  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; AUDIO_L       ; CLOCK_27[0] ; 6.768  ; 6.135  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; AUDIO_R       ; CLOCK_27[0] ; 5.293  ; 4.749  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; LED           ; CLOCK_27[0] ; 6.534  ; 7.256  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; VGA_B[*]      ; CLOCK_27[0] ; 4.803  ; 4.372  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_B[0]     ; CLOCK_27[0] ; 4.803  ; 4.372  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_B[1]     ; CLOCK_27[0] ; 4.473  ; 4.066  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_B[2]     ; CLOCK_27[0] ; 4.346  ; 3.850  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_B[3]     ; CLOCK_27[0] ; 3.884  ; 3.582  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_B[4]     ; CLOCK_27[0] ; 3.587  ; 3.200  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_B[5]     ; CLOCK_27[0] ; 3.057  ; 2.753  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; VGA_G[*]      ; CLOCK_27[0] ; 5.400  ; 4.792  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_G[0]     ; CLOCK_27[0] ; 5.363  ; 4.767  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_G[1]     ; CLOCK_27[0] ; 5.231  ; 4.640  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_G[2]     ; CLOCK_27[0] ; 5.400  ; 4.792  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_G[3]     ; CLOCK_27[0] ; 4.342  ; 4.005  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_G[4]     ; CLOCK_27[0] ; 4.896  ; 4.388  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_G[5]     ; CLOCK_27[0] ; 4.733  ; 4.255  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; VGA_HS        ; CLOCK_27[0] ; 5.974  ; 5.398  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; VGA_R[*]      ; CLOCK_27[0] ; 4.011  ; 3.606  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_R[0]     ; CLOCK_27[0] ; 3.323  ; 2.982  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_R[1]     ; CLOCK_27[0] ; 3.299  ; 2.956  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_R[2]     ; CLOCK_27[0] ; 3.741  ; 3.344  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_R[3]     ; CLOCK_27[0] ; 4.005  ; 3.606  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_R[4]     ; CLOCK_27[0] ; 4.011  ; 3.600  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_R[5]     ; CLOCK_27[0] ; 3.796  ; 3.482  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; VGA_VS        ; CLOCK_27[0] ; 5.566  ; 4.968  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SDRAM_CLK     ; CLOCK_27[0] ; -0.695 ;        ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; SDRAM_CLK     ; CLOCK_27[0] ;        ; -1.053 ; Fall       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[2] ;
+---------------+-------------+--------+--------+------------+--------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------+
; Minimum Clock to Output Times                                                                                                   ;
+---------------+-------------+--------+--------+------------+--------------------------------------------------------------------+
; Data Port     ; Clock Port  ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                                    ;
+---------------+-------------+--------+--------+------------+--------------------------------------------------------------------+
; SDRAM_A[*]    ; CLOCK_27[0] ; 1.537  ; 1.270  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[0]   ; CLOCK_27[0] ; 1.617  ; 1.324  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[1]   ; CLOCK_27[0] ; 1.619  ; 1.326  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[2]   ; CLOCK_27[0] ; 1.620  ; 1.327  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[3]   ; CLOCK_27[0] ; 1.630  ; 1.337  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[4]   ; CLOCK_27[0] ; 1.537  ; 1.270  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[5]   ; CLOCK_27[0] ; 1.837  ; 1.493  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[6]   ; CLOCK_27[0] ; 1.822  ; 1.478  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[7]   ; CLOCK_27[0] ; 1.826  ; 1.482  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[8]   ; CLOCK_27[0] ; 1.826  ; 1.482  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[9]   ; CLOCK_27[0] ; 1.824  ; 1.480  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[10]  ; CLOCK_27[0] ; 1.618  ; 1.325  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[11]  ; CLOCK_27[0] ; 1.830  ; 1.486  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_BA[*]   ; CLOCK_27[0] ; 1.608  ; 1.315  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[0]  ; CLOCK_27[0] ; 1.617  ; 1.324  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[1]  ; CLOCK_27[0] ; 1.608  ; 1.315  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CKE     ; CLOCK_27[0] ; 1.866  ; 1.633  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQ[*]   ; CLOCK_27[0] ; 1.517  ; 1.250  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; CLOCK_27[0] ; 1.810  ; 1.466  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; CLOCK_27[0] ; 1.806  ; 1.462  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; CLOCK_27[0] ; 1.521  ; 1.254  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; CLOCK_27[0] ; 1.521  ; 1.254  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; CLOCK_27[0] ; 1.631  ; 1.338  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; CLOCK_27[0] ; 1.641  ; 1.348  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; CLOCK_27[0] ; 1.630  ; 1.337  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; CLOCK_27[0] ; 1.630  ; 1.337  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; CLOCK_27[0] ; 1.803  ; 1.459  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; CLOCK_27[0] ; 1.803  ; 1.459  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; CLOCK_27[0] ; 1.821  ; 1.477  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; CLOCK_27[0] ; 1.821  ; 1.477  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; CLOCK_27[0] ; 1.517  ; 1.250  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; CLOCK_27[0] ; 1.820  ; 1.476  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; CLOCK_27[0] ; 1.828  ; 1.484  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; CLOCK_27[0] ; 1.525  ; 1.258  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQMH    ; CLOCK_27[0] ; 1.802  ; 1.458  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQML    ; CLOCK_27[0] ; 1.629  ; 1.336  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_nCAS    ; CLOCK_27[0] ; 1.618  ; 1.325  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_nRAS    ; CLOCK_27[0] ; 1.617  ; 1.324  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_nWE     ; CLOCK_27[0] ; 1.629  ; 1.336  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; AUDIO_L       ; CLOCK_27[0] ; 5.839  ; 5.212  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; AUDIO_R       ; CLOCK_27[0] ; 4.420  ; 3.880  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; LED           ; CLOCK_27[0] ; 5.594  ; 6.305  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; VGA_B[*]      ; CLOCK_27[0] ; 2.201  ; 1.898  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_B[0]     ; CLOCK_27[0] ; 3.877  ; 3.453  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_B[1]     ; CLOCK_27[0] ; 3.560  ; 3.159  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_B[2]     ; CLOCK_27[0] ; 3.439  ; 2.951  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_B[3]     ; CLOCK_27[0] ; 2.995  ; 2.694  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_B[4]     ; CLOCK_27[0] ; 2.710  ; 2.327  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_B[5]     ; CLOCK_27[0] ; 2.201  ; 1.898  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; VGA_G[*]      ; CLOCK_27[0] ; 3.435  ; 3.100  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_G[0]     ; CLOCK_27[0] ; 4.426  ; 3.840  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_G[1]     ; CLOCK_27[0] ; 4.290  ; 3.711  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_G[2]     ; CLOCK_27[0] ; 4.450  ; 3.856  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_G[3]     ; CLOCK_27[0] ; 3.435  ; 3.100  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_G[4]     ; CLOCK_27[0] ; 3.966  ; 3.468  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_G[5]     ; CLOCK_27[0] ; 3.810  ; 3.340  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; VGA_HS        ; CLOCK_27[0] ; 5.076  ; 4.504  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; VGA_R[*]      ; CLOCK_27[0] ; 2.433  ; 2.093  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_R[0]     ; CLOCK_27[0] ; 2.458  ; 2.119  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_R[1]     ; CLOCK_27[0] ; 2.433  ; 2.093  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_R[2]     ; CLOCK_27[0] ; 2.858  ; 2.466  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_R[3]     ; CLOCK_27[0] ; 3.112  ; 2.718  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_R[4]     ; CLOCK_27[0] ; 3.117  ; 2.712  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_R[5]     ; CLOCK_27[0] ; 2.911  ; 2.598  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; VGA_VS        ; CLOCK_27[0] ; 4.685  ; 4.091  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SDRAM_CLK     ; CLOCK_27[0] ; -1.486 ;        ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; SDRAM_CLK     ; CLOCK_27[0] ;        ; -1.840 ; Fall       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[2] ;
+---------------+-------------+--------+--------+------------+--------------------------------------------------------------------+


+--------------------------------------------------------------+
; Propagation Delay                                            ;
+------------+-------------+--------+--------+--------+--------+
; Input Port ; Output Port ; RR     ; RF     ; FR     ; FF     ;
+------------+-------------+--------+--------+--------+--------+
; CONF_DATA0 ; SPI_DO      ; 12.121 ; 11.881 ; 12.694 ; 12.694 ;
+------------+-------------+--------+--------+--------+--------+


+--------------------------------------------------------------+
; Minimum Propagation Delay                                    ;
+------------+-------------+--------+--------+--------+--------+
; Input Port ; Output Port ; RR     ; RF     ; FR     ; FF     ;
+------------+-------------+--------+--------+--------+--------+
; CONF_DATA0 ; SPI_DO      ; 11.261 ; 11.261 ; 11.810 ; 11.839 ;
+------------+-------------+--------+--------+--------+--------+


+-------------------------------------------------------------------------------------------------------------------------------+
; Output Enable Times                                                                                                           ;
+---------------+-------------+-------+-------+------------+--------------------------------------------------------------------+
; Data Port     ; Clock Port  ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                                    ;
+---------------+-------------+-------+-------+------------+--------------------------------------------------------------------+
; SDRAM_DQ[*]   ; CLOCK_27[0] ; 2.971 ; 2.971 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; CLOCK_27[0] ; 2.977 ; 2.977 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; CLOCK_27[0] ; 2.974 ; 2.974 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; CLOCK_27[0] ; 2.992 ; 2.992 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; CLOCK_27[0] ; 2.992 ; 2.992 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; CLOCK_27[0] ; 3.082 ; 3.082 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; CLOCK_27[0] ; 3.092 ; 3.092 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; CLOCK_27[0] ; 3.081 ; 3.081 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; CLOCK_27[0] ; 3.081 ; 3.081 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; CLOCK_27[0] ; 2.971 ; 2.971 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; CLOCK_27[0] ; 2.971 ; 2.971 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; CLOCK_27[0] ; 2.989 ; 2.989 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; CLOCK_27[0] ; 2.989 ; 2.989 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; CLOCK_27[0] ; 2.988 ; 2.988 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; CLOCK_27[0] ; 2.988 ; 2.988 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; CLOCK_27[0] ; 2.996 ; 2.996 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; CLOCK_27[0] ; 2.996 ; 2.996 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
+---------------+-------------+-------+-------+------------+--------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------+
; Minimum Output Enable Times                                                                                                   ;
+---------------+-------------+-------+-------+------------+--------------------------------------------------------------------+
; Data Port     ; Clock Port  ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                                    ;
+---------------+-------------+-------+-------+------------+--------------------------------------------------------------------+
; SDRAM_DQ[*]   ; CLOCK_27[0] ; 1.128 ; 1.155 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; CLOCK_27[0] ; 1.135 ; 1.162 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; CLOCK_27[0] ; 1.131 ; 1.158 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; CLOCK_27[0] ; 1.149 ; 1.176 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; CLOCK_27[0] ; 1.149 ; 1.176 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; CLOCK_27[0] ; 1.206 ; 1.233 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; CLOCK_27[0] ; 1.216 ; 1.243 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; CLOCK_27[0] ; 1.205 ; 1.232 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; CLOCK_27[0] ; 1.205 ; 1.232 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; CLOCK_27[0] ; 1.128 ; 1.155 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; CLOCK_27[0] ; 1.128 ; 1.155 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; CLOCK_27[0] ; 1.146 ; 1.173 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; CLOCK_27[0] ; 1.146 ; 1.173 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; CLOCK_27[0] ; 1.145 ; 1.172 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; CLOCK_27[0] ; 1.145 ; 1.172 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; CLOCK_27[0] ; 1.153 ; 1.180 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; CLOCK_27[0] ; 1.153 ; 1.180 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
+---------------+-------------+-------+-------+------------+--------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------+
; Output Disable Times                                                                                                                  ;
+---------------+-------------+-----------+-----------+------------+--------------------------------------------------------------------+
; Data Port     ; Clock Port  ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                                    ;
+---------------+-------------+-----------+-----------+------------+--------------------------------------------------------------------+
; SDRAM_DQ[*]   ; CLOCK_27[0] ; 2.564     ; 3.050     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; CLOCK_27[0] ; 2.570     ; 3.056     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; CLOCK_27[0] ; 2.567     ; 3.053     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; CLOCK_27[0] ; 2.585     ; 3.071     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; CLOCK_27[0] ; 2.585     ; 3.071     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; CLOCK_27[0] ; 2.657     ; 3.161     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; CLOCK_27[0] ; 2.667     ; 3.171     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; CLOCK_27[0] ; 2.656     ; 3.160     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; CLOCK_27[0] ; 2.656     ; 3.160     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; CLOCK_27[0] ; 2.564     ; 3.050     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; CLOCK_27[0] ; 2.564     ; 3.050     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; CLOCK_27[0] ; 2.582     ; 3.068     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; CLOCK_27[0] ; 2.582     ; 3.068     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; CLOCK_27[0] ; 2.581     ; 3.067     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; CLOCK_27[0] ; 2.581     ; 3.067     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; CLOCK_27[0] ; 2.589     ; 3.075     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; CLOCK_27[0] ; 2.589     ; 3.075     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
+---------------+-------------+-----------+-----------+------------+--------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------+
; Minimum Output Disable Times                                                                                                          ;
+---------------+-------------+-----------+-----------+------------+--------------------------------------------------------------------+
; Data Port     ; Clock Port  ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                                    ;
+---------------+-------------+-----------+-----------+------------+--------------------------------------------------------------------+
; SDRAM_DQ[*]   ; CLOCK_27[0] ; 1.204     ; 1.204     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; CLOCK_27[0] ; 1.211     ; 1.211     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; CLOCK_27[0] ; 1.207     ; 1.207     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; CLOCK_27[0] ; 1.225     ; 1.225     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; CLOCK_27[0] ; 1.225     ; 1.225     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; CLOCK_27[0] ; 1.282     ; 1.282     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; CLOCK_27[0] ; 1.292     ; 1.292     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; CLOCK_27[0] ; 1.281     ; 1.281     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; CLOCK_27[0] ; 1.281     ; 1.281     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; CLOCK_27[0] ; 1.204     ; 1.204     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; CLOCK_27[0] ; 1.204     ; 1.204     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; CLOCK_27[0] ; 1.222     ; 1.222     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; CLOCK_27[0] ; 1.222     ; 1.222     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; CLOCK_27[0] ; 1.221     ; 1.221     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; CLOCK_27[0] ; 1.221     ; 1.221     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; CLOCK_27[0] ; 1.229     ; 1.229     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; CLOCK_27[0] ; 1.229     ; 1.229     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
+---------------+-------------+-----------+-----------+------------+--------------------------------------------------------------------+


----------------------------------------------
; Slow 1200mV 85C Model Metastability Report ;
----------------------------------------------
No synchronizer chains to report.


+----------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Fmax Summary                                                                        ;
+------------+-----------------+--------------------------------------------------------------------+------+
; Fmax       ; Restricted Fmax ; Clock Name                                                         ; Note ;
+------------+-----------------+--------------------------------------------------------------------+------+
; 62.04 MHz  ; 62.04 MHz       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;      ;
; 149.1 MHz  ; 149.1 MHz       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;      ;
; 162.21 MHz ; 162.21 MHz      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ;      ;
+------------+-----------------+--------------------------------------------------------------------+------+
This panel reports FMAX for every clock in the design, regardless of the user-specified clock periods.  FMAX is only computed for paths where the source and destination registers or ports are driven by the same clock.  Paths of different clocks, including generated clocks, are ignored.  For paths between a clock and its inversion, FMAX is computed as if the rising and falling edges are scaled along with FMAX, such that the duty cycle (in terms of a percentage) is maintained. Altera recommends that you always use clock constraints and other slack reports for sign-off analysis.


+------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Setup Summary                                                             ;
+--------------------------------------------------------------------+-----------+---------------+
; Clock                                                              ; Slack     ; End Point TNS ;
+--------------------------------------------------------------------+-----------+---------------+
; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.773     ; 0.000         ;
; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 2.103     ; 0.000         ;
; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63993.771 ; 0.000         ;
+--------------------------------------------------------------------+-----------+---------------+


+--------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Hold Summary                                                          ;
+--------------------------------------------------------------------+-------+---------------+
; Clock                                                              ; Slack ; End Point TNS ;
+--------------------------------------------------------------------+-------+---------------+
; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.383 ; 0.000         ;
; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.402 ; 0.000         ;
; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.403 ; 0.000         ;
+--------------------------------------------------------------------+-------+---------------+


+---------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Recovery Summary                                                       ;
+--------------------------------------------------------------------+--------+---------------+
; Clock                                                              ; Slack  ; End Point TNS ;
+--------------------------------------------------------------------+--------+---------------+
; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 10.640 ; 0.000         ;
+--------------------------------------------------------------------+--------+---------------+


+--------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Removal Summary                                                       ;
+--------------------------------------------------------------------+-------+---------------+
; Clock                                                              ; Slack ; End Point TNS ;
+--------------------------------------------------------------------+-------+---------------+
; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 1.647 ; 0.000         ;
+--------------------------------------------------------------------+-------+---------------+


+------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Minimum Pulse Width Summary                                               ;
+--------------------------------------------------------------------+-----------+---------------+
; Clock                                                              ; Slack     ; End Point TNS ;
+--------------------------------------------------------------------+-----------+---------------+
; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 4.101     ; 0.000         ;
; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 8.409     ; 0.000         ;
; CLOCK_27[0]                                                        ; 18.351    ; 0.000         ;
; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0]  ; 24.963    ; 0.000         ;
; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 31999.665 ; 0.000         ;
+--------------------------------------------------------------------+-----------+---------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Setup: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                         ;
+-------+---------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                         ; To Node                                                                                                                   ; Launch Clock                                                       ; Latch Clock                                                        ; Relationship ; Clock Skew ; Data Delay ;
+-------+---------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+
; 0.773 ; user_io:my_user_io|ps2_kbd_data                                                                                                                   ; ps2_to_atari800:keyboard_map1|ps2_keyboard:\gen_ps2_on:keyboard1|ps2_dat_reg                                              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 1.958        ; -0.171     ; 1.016      ;
; 0.931 ; user_io:my_user_io|Equal5~0_OTERM1                                                                                                                ; ps2_to_atari800:keyboard_map1|ps2_keyboard:\gen_ps2_on:keyboard1|ps2_clk_reg                                              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 1.958        ; -0.171     ; 0.858      ;
; 1.503 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[4]_NEW192_OTERM1403  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.072     ; 16.048     ;
; 1.503 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.072     ; 16.048     ;
; 1.511 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[12]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.072     ; 16.040     ;
; 1.525 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]_NEW204_OTERM1405 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.072     ; 16.026     ;
; 1.541 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3]                                                                                ; ps2_to_atari800:keyboard_map1|ps2_keyboard:\gen_ps2_on:keyboard1|ps2_clk_reg                                              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 1.958        ; 3.605      ; 4.024      ;
; 1.606 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[4]_NEW192_OTERM1403  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.081     ; 15.936     ;
; 1.606 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.081     ; 15.936     ;
; 1.614 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[12]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.081     ; 15.928     ;
; 1.628 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]_NEW204_OTERM1405 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.081     ; 15.914     ;
; 1.772 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[4]_NEW192_OTERM1403  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.072     ; 15.779     ;
; 1.772 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.072     ; 15.779     ;
; 1.777 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[1]                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.114     ; 15.732     ;
; 1.778 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[11]_NEW200_OTERM1391 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.114     ; 15.731     ;
; 1.780 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[12]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.072     ; 15.771     ;
; 1.784 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[5]_NEW194_OTERM1399  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.114     ; 15.725     ;
; 1.784 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[3]_NEW212_OTERM1401  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.114     ; 15.725     ;
; 1.787 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[2]                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.114     ; 15.722     ;
; 1.794 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]_NEW204_OTERM1405 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.072     ; 15.757     ;
; 1.846 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[4]_NEW192_OTERM1403  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.072     ; 15.705     ;
; 1.846 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.072     ; 15.705     ;
; 1.854 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[12]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.072     ; 15.697     ;
; 1.868 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]_NEW204_OTERM1405 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.072     ; 15.683     ;
; 1.870 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_out_OTERM3                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[4]_NEW192_OTERM1403  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.072     ; 15.681     ;
; 1.870 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_out_OTERM3                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.072     ; 15.681     ;
; 1.871 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[4]_NEW192_OTERM1403  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.072     ; 15.680     ;
; 1.871 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.072     ; 15.680     ;
; 1.877 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3]                                                                                ; ps2_to_atari800:keyboard_map1|ps2_keyboard:\gen_ps2_on:keyboard1|ps2_clk_reg                                              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 2.190        ; 3.605      ; 3.920      ;
; 1.878 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_out_OTERM3                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[12]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.072     ; 15.673     ;
; 1.879 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[12]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.072     ; 15.672     ;
; 1.892 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_out_OTERM3                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]_NEW204_OTERM1405 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.072     ; 15.659     ;
; 1.893 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]_NEW204_OTERM1405 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.072     ; 15.658     ;
; 1.896 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[1]                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.107     ; 15.620     ;
; 1.897 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[11]_NEW200_OTERM1391 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.107     ; 15.619     ;
; 1.903 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[5]_NEW194_OTERM1399  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.107     ; 15.613     ;
; 1.903 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[3]_NEW212_OTERM1401  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.107     ; 15.613     ;
; 1.906 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[2]                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.107     ; 15.610     ;
; 1.929 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[4]_NEW192_OTERM1403  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.072     ; 15.622     ;
; 1.929 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.072     ; 15.622     ;
; 1.937 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[12]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.072     ; 15.614     ;
; 1.951 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]_NEW204_OTERM1405 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.072     ; 15.600     ;
; 1.968 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[4]_NEW192_OTERM1403  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.072     ; 15.583     ;
; 1.968 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.072     ; 15.583     ;
; 1.976 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[12]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.072     ; 15.575     ;
; 1.990 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]_NEW204_OTERM1405 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.072     ; 15.561     ;
; 2.028 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[4]_NEW192_OTERM1403  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.050     ; 15.545     ;
; 2.028 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.050     ; 15.545     ;
; 2.036 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[12]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.050     ; 15.537     ;
; 2.041 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[14]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[4]_NEW192_OTERM1403  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.081     ; 15.501     ;
; 2.041 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[14]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.081     ; 15.501     ;
; 2.044 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|cpu_extra_enable_reg                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[4]_NEW192_OTERM1403  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.050     ; 15.529     ;
; 2.044 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|cpu_extra_enable_reg                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.050     ; 15.529     ;
; 2.046 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[1]                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.114     ; 15.463     ;
; 2.047 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[11]_NEW200_OTERM1391 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.114     ; 15.462     ;
; 2.049 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[14]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[12]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.081     ; 15.493     ;
; 2.050 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]_NEW204_OTERM1405 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.050     ; 15.523     ;
; 2.052 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|cpu_extra_enable_reg                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[12]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.050     ; 15.521     ;
; 2.053 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[5]_NEW194_OTERM1399  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.114     ; 15.456     ;
; 2.053 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[3]_NEW212_OTERM1401  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.114     ; 15.456     ;
; 2.056 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[2]                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.114     ; 15.453     ;
; 2.063 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[14]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]_NEW204_OTERM1405 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.081     ; 15.479     ;
; 2.064 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[6]_NEW190_OTERM1393  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; 0.380      ; 15.939     ;
; 2.066 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[14]_NEW198_OTERM1397 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; 0.380      ; 15.937     ;
; 2.066 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|cpu_extra_enable_reg                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]_NEW204_OTERM1405 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.050     ; 15.507     ;
; 2.108 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[12]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[4]_NEW192_OTERM1403  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.081     ; 15.434     ;
; 2.108 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[12]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.081     ; 15.434     ;
; 2.116 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[12]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[12]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.081     ; 15.426     ;
; 2.120 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[1]                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.114     ; 15.389     ;
; 2.121 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[11]_NEW200_OTERM1391 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.114     ; 15.388     ;
; 2.127 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[5]_NEW194_OTERM1399  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.114     ; 15.382     ;
; 2.127 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[3]_NEW212_OTERM1401  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.114     ; 15.382     ;
; 2.130 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[2]                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.114     ; 15.379     ;
; 2.130 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[12]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]_NEW204_OTERM1405 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.081     ; 15.412     ;
; 2.144 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|enable_divider:enable_179_clock_div|enabled_out_reg ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[4]_NEW192_OTERM1403  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.050     ; 15.429     ;
; 2.144 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|enable_divider:enable_179_clock_div|enabled_out_reg ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.050     ; 15.429     ;
; 2.144 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_out_OTERM3                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[1]                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.114     ; 15.365     ;
; 2.145 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[1]                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.114     ; 15.364     ;
; 2.145 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_out_OTERM3                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[11]_NEW200_OTERM1391 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.114     ; 15.364     ;
; 2.146 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[11]_NEW200_OTERM1391 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.114     ; 15.363     ;
; 2.151 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_out_OTERM3                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[5]_NEW194_OTERM1399  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.114     ; 15.358     ;
; 2.151 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_out_OTERM3                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[3]_NEW212_OTERM1401  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.114     ; 15.358     ;
; 2.152 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|enable_divider:enable_179_clock_div|enabled_out_reg ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[12]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.050     ; 15.421     ;
; 2.152 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[5]_NEW194_OTERM1399  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.114     ; 15.357     ;
; 2.152 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[3]_NEW212_OTERM1401  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.114     ; 15.357     ;
; 2.154 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_out_OTERM3                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[2]                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.114     ; 15.355     ;
; 2.155 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[2]                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.114     ; 15.354     ;
; 2.158 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[14]_NEW198_OTERM1397                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[4]_NEW192_OTERM1403  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.543     ; 14.922     ;
; 2.158 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[14]_NEW198_OTERM1397                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.543     ; 14.922     ;
; 2.166 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[14]_NEW198_OTERM1397                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[12]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.543     ; 14.914     ;
; 2.166 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|enable_divider:enable_179_clock_div|enabled_out_reg ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]_NEW204_OTERM1405 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.050     ; 15.407     ;
; 2.167 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[6]_NEW190_OTERM1393  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; 0.371      ; 15.827     ;
; 2.169 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15]                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[14]_NEW198_OTERM1397 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; 0.371      ; 15.825     ;
; 2.180 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[14]_NEW198_OTERM1397                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]_NEW204_OTERM1405 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.543     ; 14.900     ;
; 2.201 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[32]                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|X[7]          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.556     ; 14.866     ;
; 2.203 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[1]                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.114     ; 15.306     ;
; 2.204 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[11]_NEW200_OTERM1391 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.114     ; 15.305     ;
; 2.210 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[5]_NEW194_OTERM1399  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.114     ; 15.299     ;
; 2.210 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[3]_NEW212_OTERM1401  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.114     ; 15.299     ;
; 2.213 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[2]                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.114     ; 15.296     ;
+-------+---------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Setup: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                                 ;
+-------+---------------------------------------------------------+-------------------------------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                               ; To Node                                                     ; Launch Clock                                                       ; Latch Clock                                                        ; Relationship ; Clock Skew ; Data Delay ;
+-------+---------------------------------------------------------+-------------------------------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+
; 2.103 ; sdram_statemachine:sdram_adaptor|delay_reg[3]           ; sdram_statemachine:sdram_adaptor|dq_out_reg[7]              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.077     ; 6.506      ;
; 2.322 ; sdram_statemachine:sdram_adaptor|delay_reg[3]           ; sdram_statemachine:sdram_adaptor|dq_out_reg[14]             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.141     ; 6.223      ;
; 2.348 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]     ; sdram_statemachine:sdram_adaptor|dq_out_reg[7]              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.075     ; 6.263      ;
; 2.358 ; sdram_statemachine:sdram_adaptor|delay_reg[3]           ; sdram_statemachine:sdram_adaptor|dq_out_reg[11]             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.139     ; 6.189      ;
; 2.445 ; sdram_statemachine:sdram_adaptor|delay_reg[3]           ; sdram_statemachine:sdram_adaptor|dq_out_reg[12]             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.140     ; 6.101      ;
; 2.503 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]     ; sdram_statemachine:sdram_adaptor|dq_out_reg[7]              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.075     ; 6.108      ;
; 2.504 ; sdram_statemachine:sdram_adaptor|delay_reg[3]           ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.077     ; 6.105      ;
; 2.509 ; sdram_statemachine:sdram_adaptor|delay_reg[3]           ; sdram_statemachine:sdram_adaptor|dq_out_reg[15]             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.141     ; 6.036      ;
; 2.567 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]     ; sdram_statemachine:sdram_adaptor|dq_out_reg[14]             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.139     ; 5.980      ;
; 2.603 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]     ; sdram_statemachine:sdram_adaptor|dq_out_reg[11]             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.137     ; 5.946      ;
; 2.618 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]     ; sdram_statemachine:sdram_adaptor|addr_reg[4]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.128     ; 5.940      ;
; 2.621 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]     ; sdram_statemachine:sdram_adaptor|addr_reg[5]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.131     ; 5.934      ;
; 2.630 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]     ; sdram_statemachine:sdram_adaptor|dq_out_reg[12]             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.138     ; 5.918      ;
; 2.636 ; sdram_statemachine:sdram_adaptor|delay_reg[3]           ; sdram_statemachine:sdram_adaptor|addr_reg[9]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.138     ; 5.912      ;
; 2.658 ; sdram_statemachine:sdram_adaptor|delay_reg[3]           ; sdram_statemachine:sdram_adaptor|addr_reg[11]               ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.141     ; 5.887      ;
; 2.677 ; sdram_statemachine:sdram_adaptor|delay_reg[3]           ; sdram_statemachine:sdram_adaptor|dq_out_reg[8]              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.130     ; 5.879      ;
; 2.680 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]     ; sdram_statemachine:sdram_adaptor|dq_out_reg[7]              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.075     ; 5.931      ;
; 2.689 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]     ; sdram_statemachine:sdram_adaptor|addr_reg[6]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.137     ; 5.860      ;
; 2.693 ; sdram_statemachine:sdram_adaptor|delay_reg[1]           ; sdram_statemachine:sdram_adaptor|addr_reg[9]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.138     ; 5.855      ;
; 2.715 ; sdram_statemachine:sdram_adaptor|delay_reg[1]           ; sdram_statemachine:sdram_adaptor|addr_reg[11]               ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.141     ; 5.830      ;
; 2.721 ; sdram_statemachine:sdram_adaptor|delay_reg[3]           ; sdram_statemachine:sdram_adaptor|addr_reg[8]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.134     ; 5.831      ;
; 2.722 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]     ; sdram_statemachine:sdram_adaptor|dq_out_reg[14]             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.139     ; 5.825      ;
; 2.726 ; sdram_statemachine:sdram_adaptor|delay_reg[3]           ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.129     ; 5.831      ;
; 2.738 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]     ; sdram_statemachine:sdram_adaptor|dq_out_reg[12]             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.138     ; 5.810      ;
; 2.749 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]     ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.075     ; 5.862      ;
; 2.754 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]     ; sdram_statemachine:sdram_adaptor|dq_out_reg[15]             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.139     ; 5.793      ;
; 2.758 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]     ; sdram_statemachine:sdram_adaptor|dq_out_reg[11]             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.137     ; 5.791      ;
; 2.778 ; sdram_statemachine:sdram_adaptor|delay_reg[1]           ; sdram_statemachine:sdram_adaptor|addr_reg[8]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.134     ; 5.774      ;
; 2.828 ; sdram_statemachine:sdram_adaptor|delay_reg[1]           ; sdram_statemachine:sdram_adaptor|addr_reg[4]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.130     ; 5.728      ;
; 2.831 ; sdram_statemachine:sdram_adaptor|delay_reg[1]           ; sdram_statemachine:sdram_adaptor|addr_reg[5]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.133     ; 5.722      ;
; 2.840 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]     ; sdram_statemachine:sdram_adaptor|dq_out_reg[12]             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.138     ; 5.708      ;
; 2.841 ; sdram_statemachine:sdram_adaptor|delay_reg[3]           ; sdram_statemachine:sdram_adaptor|addr_reg[10]               ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.095     ; 5.750      ;
; 2.847 ; sdram_statemachine:sdram_adaptor|delay_reg[0]           ; sdram_statemachine:sdram_adaptor|addr_reg[9]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.138     ; 5.701      ;
; 2.867 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]     ; sdram_statemachine:sdram_adaptor|addr_reg[7]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.132     ; 5.687      ;
; 2.869 ; sdram_statemachine:sdram_adaptor|delay_reg[0]           ; sdram_statemachine:sdram_adaptor|addr_reg[11]               ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.141     ; 5.676      ;
; 2.886 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]     ; sdram_statemachine:sdram_adaptor|addr_reg[4]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.128     ; 5.672      ;
; 2.889 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]     ; sdram_statemachine:sdram_adaptor|addr_reg[5]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.131     ; 5.666      ;
; 2.898 ; sdram_statemachine:sdram_adaptor|delay_reg[1]           ; sdram_statemachine:sdram_adaptor|addr_reg[10]               ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.095     ; 5.693      ;
; 2.904 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]     ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.075     ; 5.707      ;
; 2.908 ; sdram_statemachine:sdram_adaptor|delay_reg[3]           ; sdram_statemachine:sdram_adaptor|addr_reg[6]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.139     ; 5.639      ;
; 2.909 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]     ; sdram_statemachine:sdram_adaptor|dq_out_reg[15]             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.139     ; 5.638      ;
; 2.922 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]     ; sdram_statemachine:sdram_adaptor|dq_out_reg[8]              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.128     ; 5.636      ;
; 2.932 ; sdram_statemachine:sdram_adaptor|delay_reg[0]           ; sdram_statemachine:sdram_adaptor|addr_reg[8]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.134     ; 5.620      ;
; 2.940 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]     ; sdram_statemachine:sdram_adaptor|dq_out_reg[11]             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.137     ; 5.609      ;
; 2.948 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]     ; sdram_statemachine:sdram_adaptor|dq_out_reg[14]             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.139     ; 5.599      ;
; 2.949 ; sdram_statemachine:sdram_adaptor|delay_reg[0]           ; sdram_statemachine:sdram_adaptor|addr_reg[6]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.139     ; 5.598      ;
; 2.952 ; sdram_statemachine:sdram_adaptor|delay_reg[3]           ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.140     ; 5.594      ;
; 2.971 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]     ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.127     ; 5.588      ;
; 2.980 ; sdram_statemachine:sdram_adaptor|delay_reg[3]           ; sdram_statemachine:sdram_adaptor|dq_out_reg[2]              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.129     ; 5.577      ;
; 2.988 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]     ; sdram_statemachine:sdram_adaptor|addr_reg[3]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.091     ; 5.607      ;
; 2.993 ; sdram_statemachine:sdram_adaptor|delay_reg[2]           ; sdram_statemachine:sdram_adaptor|addr_reg[9]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.138     ; 5.555      ;
; 3.015 ; sdram_statemachine:sdram_adaptor|delay_reg[2]           ; sdram_statemachine:sdram_adaptor|addr_reg[11]               ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.141     ; 5.530      ;
; 3.022 ; sdram_statemachine:sdram_adaptor|delay_reg[0]           ; sdram_statemachine:sdram_adaptor|addr_reg[4]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.130     ; 5.534      ;
; 3.025 ; sdram_statemachine:sdram_adaptor|delay_reg[0]           ; sdram_statemachine:sdram_adaptor|addr_reg[5]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.133     ; 5.528      ;
; 3.033 ; sdram_statemachine:sdram_adaptor|delay_reg[2]           ; sdram_statemachine:sdram_adaptor|dq_out_reg[7]              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.077     ; 5.576      ;
; 3.050 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]     ; sdram_statemachine:sdram_adaptor|addr_reg[9]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.136     ; 5.500      ;
; 3.052 ; sdram_statemachine:sdram_adaptor|delay_reg[0]           ; sdram_statemachine:sdram_adaptor|addr_reg[10]               ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.095     ; 5.539      ;
; 3.072 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]     ; sdram_statemachine:sdram_adaptor|addr_reg[11]               ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.139     ; 5.475      ;
; 3.077 ; sdram_statemachine:sdram_adaptor|delay_reg[5]           ; sdram_statemachine:sdram_adaptor|addr_reg[6]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.139     ; 5.470      ;
; 3.077 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]     ; sdram_statemachine:sdram_adaptor|dq_out_reg[8]              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.128     ; 5.481      ;
; 3.078 ; sdram_statemachine:sdram_adaptor|delay_reg[2]           ; sdram_statemachine:sdram_adaptor|addr_reg[8]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.134     ; 5.474      ;
; 3.086 ; sdram_statemachine:sdram_adaptor|delay_reg[3]           ; sdram_statemachine:sdram_adaptor|addr_reg[7]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.134     ; 5.466      ;
; 3.126 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]     ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.127     ; 5.433      ;
; 3.127 ; sdram_statemachine:sdram_adaptor|delay_reg[0]           ; sdram_statemachine:sdram_adaptor|addr_reg[7]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.134     ; 5.425      ;
; 3.130 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]     ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.075     ; 5.481      ;
; 3.131 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]     ; sdram_statemachine:sdram_adaptor|dq_out_reg[15]             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.139     ; 5.416      ;
; 3.135 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]     ; sdram_statemachine:sdram_adaptor|addr_reg[8]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.132     ; 5.419      ;
; 3.166 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]     ; sdram_statemachine:sdram_adaptor|addr_reg[6]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.137     ; 5.383      ;
; 3.181 ; sdram_statemachine:sdram_adaptor|delay_reg[3]           ; sdram_statemachine:sdram_adaptor|dq_out_reg[0]              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.134     ; 5.371      ;
; 3.193 ; sdram_statemachine:sdram_adaptor|delay_reg[2]           ; sdram_statemachine:sdram_adaptor|dq_out_reg[12]             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.140     ; 5.353      ;
; 3.197 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]     ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.138     ; 5.351      ;
; 3.197 ; sdram_statemachine:sdram_adaptor|delay_reg[1]           ; sdram_statemachine:sdram_adaptor|dq_out_reg[7]              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.077     ; 5.412      ;
; 3.198 ; sdram_statemachine:sdram_adaptor|delay_reg[2]           ; sdram_statemachine:sdram_adaptor|addr_reg[10]               ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.095     ; 5.393      ;
; 3.207 ; sdram_statemachine:sdram_adaptor|delay_reg[3]           ; sdram_statemachine:sdram_adaptor|addr_reg[3]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.093     ; 5.386      ;
; 3.225 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]     ; sdram_statemachine:sdram_adaptor|dq_out_reg[2]              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.127     ; 5.334      ;
; 3.228 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]     ; sdram_statemachine:sdram_adaptor|dq_out_reg[8]              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.128     ; 5.330      ;
; 3.245 ; sdram_statemachine:sdram_adaptor|delay_reg[4]           ; sdram_statemachine:sdram_adaptor|addr_reg[6]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.139     ; 5.302      ;
; 3.248 ; sdram_statemachine:sdram_adaptor|delay_reg[0]           ; sdram_statemachine:sdram_adaptor|addr_reg[3]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.093     ; 5.345      ;
; 3.248 ; sdram_statemachine:sdram_adaptor|delay_reg[3]           ; sdram_statemachine:sdram_adaptor|dq_out_reg[1]              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.137     ; 5.301      ;
; 3.255 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]     ; sdram_statemachine:sdram_adaptor|addr_reg[10]               ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.093     ; 5.338      ;
; 3.255 ; sdram_statemachine:sdram_adaptor|delay_reg[5]           ; sdram_statemachine:sdram_adaptor|addr_reg[7]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.134     ; 5.297      ;
; 3.261 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[8] ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.068     ; 5.483      ;
; 3.278 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]     ; sdram_statemachine:sdram_adaptor|addr_reg[9]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.136     ; 5.272      ;
; 3.293 ; sdram_statemachine:sdram_adaptor|delay_reg[2]           ; sdram_statemachine:sdram_adaptor|dq_out_reg[11]             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.139     ; 5.254      ;
; 3.297 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]     ; sdram_statemachine:sdram_adaptor|ba_reg[1]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.093     ; 5.296      ;
; 3.297 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]     ; sdram_statemachine:sdram_adaptor|addr_reg[1]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.092     ; 5.297      ;
; 3.300 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]     ; sdram_statemachine:sdram_adaptor|addr_reg[11]               ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.139     ; 5.247      ;
; 3.301 ; sdram_statemachine:sdram_adaptor|delay_reg[2]           ; sdram_statemachine:sdram_adaptor|dq_out_reg[14]             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.141     ; 5.244      ;
; 3.302 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[7] ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.068     ; 5.442      ;
; 3.303 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[6] ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.068     ; 5.441      ;
; 3.310 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]     ; sdram_statemachine:sdram_adaptor|addr_reg[6]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.137     ; 5.239      ;
; 3.338 ; sdram_statemachine:sdram_adaptor|delay_reg[1]           ; sdram_statemachine:sdram_adaptor|dq_output_reg~_Duplicate_1 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.150     ; 5.162      ;
; 3.342 ; sdram_statemachine:sdram_adaptor|delay_reg[2]           ; sdram_statemachine:sdram_adaptor|addr_reg[6]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.139     ; 5.205      ;
; 3.342 ; sdram_statemachine:sdram_adaptor|delay_reg[3]           ; sdram_statemachine:sdram_adaptor|dq_out_reg[4]              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.076     ; 5.268      ;
; 3.344 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]     ; sdram_statemachine:sdram_adaptor|addr_reg[7]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.132     ; 5.210      ;
; 3.348 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]     ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.127     ; 5.211      ;
; 3.350 ; sdram_statemachine:sdram_adaptor|delay_reg[0]           ; sdram_statemachine:sdram_adaptor|dq_out_reg[7]              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.077     ; 5.259      ;
; 3.351 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]     ; sdram_statemachine:sdram_adaptor|addr_reg[0]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.094     ; 5.241      ;
; 3.352 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]     ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.138     ; 5.196      ;
; 3.354 ; sdram_statemachine:sdram_adaptor|delay_reg[1]           ; sdram_statemachine:sdram_adaptor|dq_output_reg              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.147     ; 5.149      ;
+-------+---------------------------------------------------------+-------------------------------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Setup: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3]'                                                                                                                                                                       ;
+-----------+------------------------------------+------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+
; Slack     ; From Node                          ; To Node                            ; Launch Clock                                                       ; Latch Clock                                                        ; Relationship ; Clock Skew ; Data Delay ;
+-----------+------------------------------------+------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+
; 63993.771 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|Equal5~0_OTERM1 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 6.096      ;
; 63994.101 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_tx_state[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 5.766      ;
; 63994.219 ; user_io:my_user_io|ps2_rptr[1]     ; user_io:my_user_io|Equal5~0_OTERM1 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 5.648      ;
; 63994.451 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_tx_byte[7]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 5.416      ;
; 63994.549 ; user_io:my_user_io|ps2_rptr[1]     ; user_io:my_user_io|ps2_tx_state[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 5.318      ;
; 63994.877 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_tx_byte[0]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 4.990      ;
; 63994.899 ; user_io:my_user_io|ps2_rptr[1]     ; user_io:my_user_io|ps2_tx_byte[7]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 4.968      ;
; 63994.990 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_tx_byte[6]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 4.877      ;
; 63994.990 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_tx_byte[5]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 4.877      ;
; 63994.990 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_tx_byte[4]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 4.877      ;
; 63994.990 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_tx_byte[3]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 4.877      ;
; 63994.990 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_tx_byte[2]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 4.877      ;
; 63994.990 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_tx_byte[1]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 4.877      ;
; 63994.990 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_parity      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 4.877      ;
; 63995.012 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_kbd_data    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 4.855      ;
; 63995.151 ; user_io:my_user_io|ps2_rptr[1]     ; user_io:my_user_io|ps2_tx_byte[1]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 4.716      ;
; 63995.245 ; user_io:my_user_io|ps2_rptr[1]     ; user_io:my_user_io|ps2_tx_byte[2]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 4.622      ;
; 63995.438 ; user_io:my_user_io|ps2_rptr[1]     ; user_io:my_user_io|ps2_tx_byte[6]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 4.429      ;
; 63995.438 ; user_io:my_user_io|ps2_rptr[1]     ; user_io:my_user_io|ps2_tx_byte[5]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 4.429      ;
; 63995.438 ; user_io:my_user_io|ps2_rptr[1]     ; user_io:my_user_io|ps2_tx_byte[4]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 4.429      ;
; 63995.438 ; user_io:my_user_io|ps2_rptr[1]     ; user_io:my_user_io|ps2_tx_byte[3]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 4.429      ;
; 63995.438 ; user_io:my_user_io|ps2_rptr[1]     ; user_io:my_user_io|ps2_tx_byte[0]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 4.429      ;
; 63995.438 ; user_io:my_user_io|ps2_rptr[1]     ; user_io:my_user_io|ps2_parity      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 4.429      ;
; 63995.460 ; user_io:my_user_io|ps2_rptr[1]     ; user_io:my_user_io|ps2_kbd_data    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 4.407      ;
; 63995.610 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_r_inc       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 4.257      ;
; 63996.058 ; user_io:my_user_io|ps2_rptr[1]     ; user_io:my_user_io|ps2_r_inc       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 3.809      ;
; 63996.668 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|Equal5~0_OTERM1 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 3.199      ;
; 63996.865 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|ps2_tx_byte[6]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 3.002      ;
; 63996.865 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|ps2_tx_byte[5]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 3.002      ;
; 63996.865 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|ps2_tx_byte[4]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 3.002      ;
; 63996.865 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|ps2_tx_byte[3]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 3.002      ;
; 63996.865 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|ps2_tx_byte[2]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 3.002      ;
; 63996.865 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|ps2_tx_byte[1]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 3.002      ;
; 63996.865 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|ps2_tx_byte[0]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 3.002      ;
; 63996.865 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|ps2_parity      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 3.002      ;
; 63996.868 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|ps2_tx_byte[6]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 2.999      ;
; 63996.868 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|ps2_tx_byte[5]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 2.999      ;
; 63996.868 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|ps2_tx_byte[4]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 2.999      ;
; 63996.868 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|ps2_tx_byte[3]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 2.999      ;
; 63996.868 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|ps2_tx_byte[2]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 2.999      ;
; 63996.868 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|ps2_tx_byte[1]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 2.999      ;
; 63996.868 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|ps2_tx_byte[0]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 2.999      ;
; 63996.868 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|ps2_parity      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 2.999      ;
; 63996.931 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|Equal5~0_OTERM1 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 2.936      ;
; 63996.976 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_tx_state[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 2.891      ;
; 63997.088 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_tx_byte[6]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 2.779      ;
; 63997.088 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_tx_byte[5]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 2.779      ;
; 63997.088 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_tx_byte[4]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 2.779      ;
; 63997.088 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_tx_byte[3]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 2.779      ;
; 63997.088 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_tx_byte[2]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 2.779      ;
; 63997.088 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_tx_byte[1]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 2.779      ;
; 63997.088 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_tx_byte[0]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 2.779      ;
; 63997.088 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_parity      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 2.779      ;
; 63997.195 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_tx_byte[6]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 2.672      ;
; 63997.195 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_tx_byte[5]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 2.672      ;
; 63997.195 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_tx_byte[4]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 2.672      ;
; 63997.195 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_tx_byte[3]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 2.672      ;
; 63997.195 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_tx_byte[2]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 2.672      ;
; 63997.195 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_tx_byte[1]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 2.672      ;
; 63997.195 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_tx_byte[0]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 2.672      ;
; 63997.195 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_parity      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 2.672      ;
; 63997.239 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_tx_state[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 2.628      ;
; 63997.316 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_kbd_data    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 2.551      ;
; 63997.317 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_tx_byte[7]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 2.550      ;
; 63997.481 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|Equal5~0_OTERM1 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 2.386      ;
; 63997.507 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|Equal5~0_OTERM1 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 2.360      ;
; 63997.580 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_tx_byte[7]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 2.287      ;
; 63997.592 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_tx_byte[6]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 2.275      ;
; 63997.592 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_tx_byte[5]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 2.275      ;
; 63997.592 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_tx_byte[4]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 2.275      ;
; 63997.592 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_tx_byte[3]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 2.275      ;
; 63997.592 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_tx_byte[2]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 2.275      ;
; 63997.592 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_tx_byte[1]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 2.275      ;
; 63997.592 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_tx_byte[0]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 2.275      ;
; 63997.592 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_parity      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 2.275      ;
; 63997.638 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|Equal5~0_OTERM1 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 2.229      ;
; 63997.661 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_tx_byte[6]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 2.206      ;
; 63997.661 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_tx_byte[5]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 2.206      ;
; 63997.661 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_tx_byte[4]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 2.206      ;
; 63997.661 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_tx_byte[3]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 2.206      ;
; 63997.661 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_tx_byte[2]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 2.206      ;
; 63997.661 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_tx_byte[1]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 2.206      ;
; 63997.661 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_tx_byte[0]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 2.206      ;
; 63997.661 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_parity      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 2.206      ;
; 63997.789 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|ps2_tx_state[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 2.078      ;
; 63997.791 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|Equal5~0_OTERM1 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 2.076      ;
; 63997.793 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|ps2_kbd_data    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 2.074      ;
; 63997.815 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|ps2_tx_state[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 2.052      ;
; 63997.819 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|ps2_kbd_data    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 2.048      ;
; 63997.946 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_tx_state[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 1.921      ;
; 63997.950 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_kbd_data    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 1.917      ;
; 63998.099 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_tx_state[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 1.768      ;
; 63998.103 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_kbd_data    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 1.764      ;
; 63998.154 ; user_io:my_user_io|ps2_tx_byte[0]  ; user_io:my_user_io|ps2_kbd_data    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 1.713      ;
; 63998.264 ; user_io:my_user_io|ps2_kbd_data    ; user_io:my_user_io|ps2_kbd_data    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 1.603      ;
; 63998.278 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|ps2_tx_state[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 1.589      ;
; 63998.284 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|ps2_tx_state[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 1.583      ;
; 63998.296 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|ps2_tx_state[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 1.571      ;
; 63998.311 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|ps2_tx_state[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 1.556      ;
; 63998.401 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_kbd_data    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.071     ; 1.466      ;
+-----------+------------------------------------+------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Hold: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                      ;
+-------+------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                        ; To Node                                                                                                                                                                                                                                ; Launch Clock                                                       ; Latch Clock                                                        ; Relationship ; Clock Skew ; Data Delay ;
+-------+------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+
; 0.383 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[6]_NEW190_OTERM1393                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[6]_NEW190_OTERM1393                                                                                                               ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.091      ; 0.669      ;
; 0.383 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|FreezerLogic:freezer|state[0]                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|FreezerLogic:freezer|state[0]                                                                                                             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.091      ; 0.669      ;
; 0.383 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[14]_NEW198_OTERM1397                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[14]_NEW198_OTERM1397                                                                                                              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.091      ; 0.669      ;
; 0.383 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|idim_r                                                                                                     ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|idim_r                                                                                                                                                                           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.091      ; 0.669      ;
; 0.395 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[0]                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.426      ; 1.051      ;
; 0.401 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[8]                                                                                                                ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[8]                                                                                                                                                                                      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.073      ; 0.669      ;
; 0.401 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[9]                                                                                                                ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[9]                                                                                                                                                                                      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.073      ; 0.669      ;
; 0.401 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m1pl_reg[2]                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m1pl_reg[2]                                                                                                                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.073      ; 0.669      ;
; 0.401 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p1pl_reg[2]                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p1pl_reg[2]                                                                                                                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.073      ; 0.669      ;
; 0.401 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p2pl_reg[3]                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p2pl_reg[3]                                                                                                                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.073      ; 0.669      ;
; 0.401 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m3pl_reg[2]                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m3pl_reg[2]                                                                                                                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.073      ; 0.669      ;
; 0.401 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m0pl_reg[2]                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m0pl_reg[2]                                                                                                                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.073      ; 0.669      ;
; 0.401 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p0pl_reg[2]                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p0pl_reg[2]                                                                                                                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.073      ; 0.669      ;
; 0.401 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m0pf_reg[2]                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m0pf_reg[2]                                                                                                                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.073      ; 0.669      ;
; 0.401 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p2pf_reg[2]                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p2pf_reg[2]                                                                                                                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.073      ; 0.669      ;
; 0.401 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m2pl_reg[2]                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m2pl_reg[2]                                                                                                                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.073      ; 0.669      ;
; 0.401 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p1pl_reg[3]                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p1pl_reg[3]                                                                                                                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.073      ; 0.669      ;
; 0.401 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m2pl_reg[3]                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m2pl_reg[3]                                                                                                                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.073      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[1]                                                                                                                  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[1]                                                                                                                                                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[11]                                                                                                               ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[11]                                                                                                                                                                                     ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|state                                                                                             ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|state                                                                                                                                                                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|assert_data                                                                                       ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|assert_data                                                                                                                                                             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|sclk                                                                                              ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|sclk                                                                                                                                                                    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[2]                                                                                                                  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[2]                                                                                                                                                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[12]                                                                                                               ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[12]                                                                                                                                                                                     ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[10]                                                                                                               ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[10]                                                                                                                                                                                     ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[6]                                                                                                                ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[6]                                                                                                                                                                                      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|subtimer_reg[2]                                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|subtimer_reg[2]                                                                                                                                                                                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|subtimer_reg[7]                                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|subtimer_reg[7]                                                                                                                                                                                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|subtimer_reg[8]                                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|subtimer_reg[8]                                                                                                                                                                                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|subtimer_reg[9]                                                                                                          ; zpucore:zpu|zpu_config_regs:config_regs|subtimer_reg[9]                                                                                                                                                                                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[2]                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[2]                                                                                                                               ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[28]                                                                                                                 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[28]                                                                                                                                                                                       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[4]                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[4]                                                                                                                               ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[4]                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[4]                                                                                                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[2]                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[2]                                                                                                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[3]                                                                                                                  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[3]                                                                                                                                                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[4]_NEW192_OTERM1403                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[4]_NEW192_OTERM1403                                                                                                               ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[6]                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[6]                                                                                                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:\gen_stereo:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[0]     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:\gen_stereo:pokey2|pokey_keyboard_scanner:pokey_keyboard_scanner1|state_reg[0]                                                                           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_direction_reg[5]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_direction_reg[5]                                                                                                                                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_output_reg[5]                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_output_reg[5]                                                                                                                                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pokey_countdown_timer:timer0|delay_line:underflow0_delay|shift_reg[0]                     ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pokey_countdown_timer:timer0|delay_line:underflow0_delay|shift_reg[0]                                                                                           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pokey_countdown_timer:timer1|delay_line:underflow0_delay|shift_reg[0]                     ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pokey_countdown_timer:timer1|delay_line:underflow0_delay|shift_reg[0]                                                                                           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_countdown_timer:timer1|count_reg[0]                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_countdown_timer:timer1|count_reg[0]                                                                                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[0]                     ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[0]                                                                                           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pokey_countdown_timer:timer3|delay_line:underflow0_delay|shift_reg[0]                     ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pokey_countdown_timer:timer3|delay_line:underflow0_delay|shift_reg[0]                                                                                           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serout_shift_reg[9]                                                                       ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serout_shift_reg[9]                                                                                                                                             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serial_out_reg                                                                            ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|serial_out_reg                                                                                                                                                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[364]                                                                                                                  ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[364]                                                                                                                                                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|FreezerLogic:freezer|state[1]                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|FreezerLogic:freezer|state[1]                                                                                                             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|FreezerLogic:freezer|state[2]                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|FreezerLogic:freezer|state[2]                                                                                                             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|FreezerLogic:freezer|use_status_as_ram_address                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|FreezerLogic:freezer|use_status_as_ram_address                                                                                            ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|FreezerLogic:freezer|vector_a2                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|FreezerLogic:freezer|vector_a2                                                                                                            ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[20]                                                                                                                 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[20]                                                                                                                                                                                       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[5]                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[5]                                                                                                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[12]                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[12]                                                                                                                               ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[13]                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[13]                                                                                                                              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]_NEW204_OTERM1405                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]_NEW204_OTERM1405                                                                                                              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[276]                                                                                                                  ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[276]                                                                                                                                                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|break_irq_reg_OTERM799       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|break_irq_reg_OTERM799                                                                             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|shift_pressed_reg_OTERM1037  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|shift_pressed_reg_OTERM1037                                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[15]                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[15]                                                                                                                              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                                                                                                               ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_direction_reg[4]                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_direction_reg[4]                                                                                                                                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_output_reg[4]                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|portb_output_reg[4]                                                                                                                                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[14]                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[14]                                                                                                                              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|control_pressed_reg_OTERM907 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pokey_keyboard_scanner:pokey_keyboard_scanner1|control_pressed_reg_OTERM907                                                                       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|irqst_reg[4]                                                                              ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|irqst_reg[4]                                                                                                                                                    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_reg                                                                                                              ; zpucore:zpu|zpu_config_regs:config_regs|spi_dma_reg                                                                                                                                                                                    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[0]                                                                                                                  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[0]                                                                                                                                                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_pending_reg_OTERM949                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_pending_reg_OTERM949                                                                                                                      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]                                                                                                                              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                                   ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                                                                                                                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|cpu_fetch_real_reg                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|cpu_fetch_real_reg                                                                                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|Mux130~4_OTERM727                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|Mux130~4_OTERM727                                                                                                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[17]                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[17]                                                                                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[18]                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[18]                                                                                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[21]                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[21]                                                                                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[22]                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|DATA_WRITE_reg[22]                                                                                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serout_bitcount_reg[1]                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serout_bitcount_reg[1]                                                                                                                            ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serout_bitcount_reg[2]                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serout_bitcount_reg[2]                                                                                                                            ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serout_bitcount_reg[3]                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serout_bitcount_reg[3]                                                                                                                            ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|playfield_dma_start_shiftreg_reg[0]                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|playfield_dma_start_shiftreg_reg[0]                                                                                                               ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:\gen_stereo:pokey2|irqst_reg[5]                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:\gen_stereo:pokey2|irqst_reg[5]                                                                                                                          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:\gen_stereo:pokey2|serial_ip_overrun_reg                                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:\gen_stereo:pokey2|serial_ip_overrun_reg                                                                                                                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm0_raw_reg[5]                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.425      ; 1.057      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|irqst_reg[6]                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|irqst_reg[6]                                                                                                                                      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|keyboard_overrun_reg                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|keyboard_overrun_reg                                                                                                                              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:\gen_stereo:pokey2|irqst_reg[6]                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:\gen_stereo:pokey2|irqst_reg[6]                                                                                                                          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:\gen_stereo:pokey2|keyboard_overrun_reg                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:\gen_stereo:pokey2|keyboard_overrun_reg                                                                                                                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serial_ip_framing_reg                                                       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|serial_ip_framing_reg                                                                                                                             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:\gen_stereo:pokey2|serial_ip_framing_reg                                           ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:\gen_stereo:pokey2|serial_ip_framing_reg                                                                                                                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_store_sp2                                                                                         ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_store_sp2                                                                                                                                                               ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|theCpuCycle.cycleBranchPage_OTERM1265                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|theCpuCycle.cycleBranchPage_OTERM1265                                                                                      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[31]                                                                                                                 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[31]                                                                                                                                                                                       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[16]_OTERM97                                                                                            ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[16]_OTERM97                                                                                                                                                                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|theCpuCycle.cyclePreIndirect                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|theCpuCycle.cyclePreIndirect                                                                                               ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Dreg                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Dreg                                                                                                                       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Ireg                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Ireg                                                                                                                       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.072      ; 0.669      ;
+-------+------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Hold: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                                          ;
+-------+---------------------------------------------------------------+---------------------------------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                     ; To Node                                                       ; Launch Clock                                                       ; Latch Clock                                                        ; Relationship ; Clock Skew ; Data Delay ;
+-------+---------------------------------------------------------------+---------------------------------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+
; 0.402 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]           ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]           ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.402 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]           ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 0.669      ;
; 0.403 ; sdram_statemachine:sdram_adaptor|reply_reg                    ; sdram_statemachine:sdram_adaptor|reply_reg                    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.669      ;
; 0.471 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10] ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.737      ;
; 0.622 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[11]      ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[11]      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.888      ;
; 0.685 ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.951      ;
; 0.686 ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.952      ;
; 0.689 ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.955      ;
; 0.691 ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.957      ;
; 0.691 ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.957      ;
; 0.692 ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.958      ;
; 0.692 ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.958      ;
; 0.694 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.960      ;
; 0.694 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.960      ;
; 0.695 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.961      ;
; 0.698 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.964      ;
; 0.698 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.964      ;
; 0.699 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.965      ;
; 0.699 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[9]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[9]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.965      ;
; 0.700 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.966      ;
; 0.700 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.966      ;
; 0.704 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[2]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[2]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.970      ;
; 0.704 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[5]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[5]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.970      ;
; 0.705 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[3]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[3]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.971      ;
; 0.705 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[4]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[4]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.971      ;
; 0.706 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[1]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[1]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.972      ;
; 0.706 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[6]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[6]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.972      ;
; 0.707 ; sdram_statemachine:sdram_adaptor|delay_reg[1]                 ; sdram_statemachine:sdram_adaptor|delay_reg[1]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.973      ;
; 0.708 ; sdram_statemachine:sdram_adaptor|delay_reg[13]                ; sdram_statemachine:sdram_adaptor|delay_reg[13]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.974      ;
; 0.710 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[7]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[7]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.976      ;
; 0.711 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[8]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[8]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.977      ;
; 0.711 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[10]      ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[10]      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.977      ;
; 0.713 ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.979      ;
; 0.714 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[9]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[9]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.980      ;
; 0.717 ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.983      ;
; 0.718 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.984      ;
; 0.719 ; sdram_statemachine:sdram_adaptor|delay_reg[5]                 ; sdram_statemachine:sdram_adaptor|delay_reg[5]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.985      ;
; 0.720 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[0]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[0]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.986      ;
; 0.727 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[0]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[0]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 0.993      ;
; 0.745 ; sdram_statemachine:sdram_adaptor|delay_reg[0]                 ; sdram_statemachine:sdram_adaptor|delay_reg[0]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.011      ;
; 0.758 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]           ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 1.025      ;
; 0.773 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]           ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 1.040      ;
; 0.774 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]           ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.072      ; 1.041      ;
; 1.007 ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.273      ;
; 1.008 ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.274      ;
; 1.009 ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.275      ;
; 1.009 ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.275      ;
; 1.009 ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ; sdram_statemachine:sdram_adaptor|delay_reg[13]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.275      ;
; 1.010 ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.276      ;
; 1.013 ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.279      ;
; 1.015 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[0]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.281      ;
; 1.016 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.282      ;
; 1.016 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.282      ;
; 1.017 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.283      ;
; 1.018 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.284      ;
; 1.019 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.285      ;
; 1.019 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.285      ;
; 1.019 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[9]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.285      ;
; 1.022 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.288      ;
; 1.022 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[0]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[1]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.288      ;
; 1.023 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[9]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.289      ;
; 1.024 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[5]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[6]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.290      ;
; 1.025 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[3]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[4]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.291      ;
; 1.025 ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.291      ;
; 1.026 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[2]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[3]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.292      ;
; 1.026 ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.292      ;
; 1.026 ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.292      ;
; 1.027 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[1]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[2]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.293      ;
; 1.027 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[4]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[5]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.293      ;
; 1.027 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[6]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[7]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.293      ;
; 1.029 ; sdram_statemachine:sdram_adaptor|delay_reg[1]                 ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.295      ;
; 1.030 ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.296      ;
; 1.030 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[0]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.296      ;
; 1.031 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[7]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[8]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.297      ;
; 1.031 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[8]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[9]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.297      ;
; 1.032 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[10]      ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[11]      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.298      ;
; 1.032 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.298      ;
; 1.032 ; sdram_statemachine:sdram_adaptor|request_sreg                 ; sdram_statemachine:sdram_adaptor|reply_reg                    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.169      ; 1.415      ;
; 1.033 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.299      ;
; 1.034 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.300      ;
; 1.034 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.300      ;
; 1.035 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[9]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[10]      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.301      ;
; 1.036 ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ; sdram_statemachine:sdram_adaptor|delay_reg[5]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.302      ;
; 1.037 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[0]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[2]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.303      ;
; 1.040 ; sdram_statemachine:sdram_adaptor|delay_reg[0]                 ; sdram_statemachine:sdram_adaptor|delay_reg[1]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.306      ;
; 1.040 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                 ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.306      ;
; 1.041 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[2]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[4]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.307      ;
; 1.042 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[4]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[6]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.308      ;
; 1.042 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[6]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[8]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.308      ;
; 1.043 ; sdram_statemachine:sdram_adaptor|delay_reg[5]                 ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.309      ;
; 1.047 ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.313      ;
; 1.048 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[8]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[10]      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.314      ;
; 1.051 ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.317      ;
; 1.055 ; sdram_statemachine:sdram_adaptor|delay_reg[0]                 ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.321      ;
; 1.101 ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.367      ;
; 1.101 ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ; sdram_statemachine:sdram_adaptor|delay_reg[13]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.367      ;
; 1.108 ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.374      ;
; 1.112 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.378      ;
; 1.113 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.071      ; 1.379      ;
+-------+---------------------------------------------------------------+---------------------------------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Hold: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3]'                                                                                                                                                                    ;
+-------+------------------------------------+------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                          ; To Node                            ; Launch Clock                                                       ; Latch Clock                                                        ; Relationship ; Clock Skew ; Data Delay ;
+-------+------------------------------------+------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+
; 0.403 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_tx_state[2] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_rptr[0]     ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; user_io:my_user_io|ps2_rptr[1]     ; user_io:my_user_io|ps2_rptr[1]     ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_rptr[2]     ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; user_io:my_user_io|ps2_tx_byte[7]  ; user_io:my_user_io|ps2_tx_byte[7]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 0.669      ;
; 0.403 ; user_io:my_user_io|ps2_parity      ; user_io:my_user_io|ps2_parity      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 0.669      ;
; 0.467 ; user_io:my_user_io|ps2_r_inc       ; user_io:my_user_io|ps2_rptr[1]     ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 0.733      ;
; 0.468 ; user_io:my_user_io|ps2_r_inc       ; user_io:my_user_io|ps2_rptr[0]     ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 0.734      ;
; 0.479 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_rptr[2]     ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 0.745      ;
; 0.492 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_tx_state[2] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 0.758      ;
; 0.512 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_tx_byte[6]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 0.778      ;
; 0.515 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_tx_byte[4]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 0.781      ;
; 0.517 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_tx_byte[0]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 0.783      ;
; 0.518 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_tx_byte[5]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 0.784      ;
; 0.520 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_r_inc       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 0.786      ;
; 0.522 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_tx_byte[2]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 0.788      ;
; 0.524 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_tx_byte[3]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 0.790      ;
; 0.646 ; user_io:my_user_io|ps2_tx_byte[3]  ; user_io:my_user_io|ps2_tx_byte[2]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 0.912      ;
; 0.646 ; user_io:my_user_io|ps2_tx_byte[2]  ; user_io:my_user_io|ps2_tx_byte[1]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 0.912      ;
; 0.647 ; user_io:my_user_io|ps2_tx_byte[5]  ; user_io:my_user_io|ps2_tx_byte[4]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 0.913      ;
; 0.648 ; user_io:my_user_io|ps2_tx_byte[1]  ; user_io:my_user_io|ps2_tx_byte[0]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 0.914      ;
; 0.649 ; user_io:my_user_io|ps2_tx_byte[4]  ; user_io:my_user_io|ps2_tx_byte[3]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 0.915      ;
; 0.710 ; user_io:my_user_io|ps2_rptr[1]     ; user_io:my_user_io|ps2_rptr[2]     ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 0.976      ;
; 0.710 ; user_io:my_user_io|ps2_r_inc       ; user_io:my_user_io|ps2_rptr[2]     ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 0.976      ;
; 0.710 ; user_io:my_user_io|ps2_tx_byte[0]  ; user_io:my_user_io|ps2_parity      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 0.976      ;
; 0.721 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_rptr[1]     ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 0.987      ;
; 0.759 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|ps2_tx_state[2] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 1.025      ;
; 0.759 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|ps2_tx_state[2] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 1.025      ;
; 0.787 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_tx_byte[1]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 1.053      ;
; 0.840 ; user_io:my_user_io|ps2_tx_byte[7]  ; user_io:my_user_io|ps2_tx_byte[6]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 1.106      ;
; 0.849 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_tx_state[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 1.115      ;
; 0.849 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|Equal5~0_OTERM1 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 1.115      ;
; 0.852 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_tx_state[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 1.118      ;
; 0.854 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_tx_byte[7]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 1.120      ;
; 0.854 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_r_inc       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 1.120      ;
; 0.877 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_tx_state[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 1.143      ;
; 0.884 ; user_io:my_user_io|ps2_tx_byte[6]  ; user_io:my_user_io|ps2_tx_byte[5]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 1.150      ;
; 0.903 ; user_io:my_user_io|ps2_parity      ; user_io:my_user_io|ps2_kbd_data    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 1.169      ;
; 0.964 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_parity      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 1.230      ;
; 0.965 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_tx_state[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 1.231      ;
; 0.965 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|Equal5~0_OTERM1 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 1.231      ;
; 0.968 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_tx_state[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 1.234      ;
; 1.003 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_kbd_data    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 1.269      ;
; 1.084 ; user_io:my_user_io|ps2_kbd_data    ; user_io:my_user_io|ps2_kbd_data    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 1.350      ;
; 1.099 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_kbd_data    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 1.365      ;
; 1.113 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|ps2_tx_state[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 1.379      ;
; 1.113 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|Equal5~0_OTERM1 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 1.379      ;
; 1.116 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|ps2_tx_state[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 1.382      ;
; 1.116 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|Equal5~0_OTERM1 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 1.382      ;
; 1.119 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_tx_state[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 1.385      ;
; 1.122 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|ps2_tx_state[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 1.388      ;
; 1.136 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|ps2_tx_state[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 1.402      ;
; 1.137 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_kbd_data    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 1.403      ;
; 1.191 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|Equal5~0_OTERM1 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 1.457      ;
; 1.204 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_tx_byte[6]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 1.470      ;
; 1.204 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_tx_byte[5]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 1.470      ;
; 1.204 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_tx_byte[4]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 1.470      ;
; 1.204 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_tx_byte[3]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 1.470      ;
; 1.204 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_tx_byte[2]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 1.470      ;
; 1.204 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_tx_byte[1]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 1.470      ;
; 1.204 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_tx_byte[0]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 1.470      ;
; 1.244 ; user_io:my_user_io|ps2_tx_byte[0]  ; user_io:my_user_io|ps2_kbd_data    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 1.510      ;
; 1.246 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|ps2_kbd_data    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 1.512      ;
; 1.266 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|ps2_kbd_data    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 1.532      ;
; 1.482 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_tx_state[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 1.748      ;
; 1.585 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|ps2_tx_state[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 1.851      ;
; 1.585 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|ps2_tx_state[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 1.851      ;
; 1.841 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_parity      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 2.107      ;
; 1.887 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_tx_state[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 2.153      ;
; 1.925 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_tx_byte[7]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 2.191      ;
; 1.933 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_tx_byte[1]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 2.199      ;
; 1.961 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_kbd_data    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 2.227      ;
; 2.171 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_tx_byte[0]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 2.437      ;
; 2.185 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_tx_byte[2]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 2.451      ;
; 2.203 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|Equal5~0_OTERM1 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 2.469      ;
; 2.215 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_tx_byte[6]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 2.481      ;
; 2.226 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_tx_byte[6]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 2.492      ;
; 2.226 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_tx_byte[5]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 2.492      ;
; 2.226 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_tx_byte[4]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 2.492      ;
; 2.226 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_tx_byte[3]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 2.492      ;
; 2.226 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_tx_byte[2]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 2.492      ;
; 2.226 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_tx_byte[1]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 2.492      ;
; 2.226 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_tx_byte[0]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 2.492      ;
; 2.226 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_parity      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 2.492      ;
; 2.240 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_tx_byte[5]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 2.506      ;
; 2.248 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_tx_byte[4]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 2.514      ;
; 2.263 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_tx_byte[3]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 2.529      ;
; 2.344 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_tx_byte[6]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 2.610      ;
; 2.344 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_tx_byte[5]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 2.610      ;
; 2.344 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_tx_byte[4]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 2.610      ;
; 2.344 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_tx_byte[3]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 2.610      ;
; 2.344 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_tx_byte[2]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 2.610      ;
; 2.344 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_tx_byte[1]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 2.610      ;
; 2.344 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_tx_byte[0]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 2.610      ;
; 2.344 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_parity      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 2.610      ;
; 2.473 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_tx_byte[7]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 2.739      ;
; 2.494 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|ps2_tx_byte[6]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 2.760      ;
; 2.494 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|ps2_tx_byte[5]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 2.760      ;
; 2.494 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|ps2_tx_byte[4]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 2.760      ;
; 2.494 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|ps2_tx_byte[3]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.071      ; 2.760      ;
+-------+------------------------------------+------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Recovery: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                            ;
+--------+-----------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                                           ; To Node                                                                                                                                      ; Launch Clock                                                       ; Latch Clock                                                        ; Relationship ; Clock Skew ; Data Delay ;
+--------+-----------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+
; 10.640 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[2]                                                                                              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.073     ; 6.910      ;
; 10.652 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[9]                                                                                          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.069     ; 6.902      ;
; 10.652 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[10]                                                                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.069     ; 6.902      ;
; 10.652 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[8]                                                                                          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.069     ; 6.902      ;
; 10.692 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[5]                                                                                              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.065     ; 6.866      ;
; 11.050 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[0]                                                                                            ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; 0.309      ; 6.882      ;
; 11.050 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[1]                                                                                            ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; 0.309      ; 6.882      ;
; 11.091 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_READ_reg                                                                                               ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; 0.381      ; 6.913      ;
; 11.101 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[31]                                                                                             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.080     ; 6.442      ;
; 11.101 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[11]                                                                                             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.080     ; 6.442      ;
; 11.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[1]                                                                    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.079     ; 6.442      ;
; 11.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[2]                                                                    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.079     ; 6.442      ;
; 11.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[3]                                                                    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.079     ; 6.442      ;
; 11.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[4]                                                                    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.079     ; 6.442      ;
; 11.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[5]                                                                    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.079     ; 6.442      ;
; 11.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[6]                                                                    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.079     ; 6.442      ;
; 11.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[7]                                                                    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.079     ; 6.442      ;
; 11.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[8]                                                                    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.079     ; 6.442      ;
; 11.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[9]                                                                    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.079     ; 6.442      ;
; 11.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[10]                                                                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.079     ; 6.442      ;
; 11.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[11]                                                                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.079     ; 6.442      ;
; 11.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[12]                                                                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.079     ; 6.442      ;
; 11.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[13]                                                                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.079     ; 6.442      ;
; 11.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[14]                                                                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.079     ; 6.442      ;
; 11.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[0]                                                                                              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.073     ; 6.448      ;
; 11.102 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[3]                                                                                              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.073     ; 6.448      ;
; 11.105 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[20]                                                                                           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.093     ; 6.425      ;
; 11.105 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[18]                                                                                           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.093     ; 6.425      ;
; 11.105 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[21]                                                                                           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.093     ; 6.425      ;
; 11.110 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out5_reg[9]                                                                                          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.079     ; 6.434      ;
; 11.110 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[6]                                                                                              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.073     ; 6.440      ;
; 11.110 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|result_reg[2]                                                                                              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.077     ; 6.436      ;
; 11.110 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|result_reg[3]                                                                                              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.077     ; 6.436      ;
; 11.110 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[7]                                                                                              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.080     ; 6.433      ;
; 11.110 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|result_reg[0]                                                                                              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.077     ; 6.436      ;
; 11.110 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out5_reg[11]                                                                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.079     ; 6.434      ;
; 11.110 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out5_reg[8]                                                                                          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.079     ; 6.434      ;
; 11.110 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|result_reg[1]                                                                                              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.077     ; 6.436      ;
; 11.110 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[16]                                                                                           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.077     ; 6.436      ;
; 11.110 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[17]                                                                                           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.077     ; 6.436      ;
; 11.110 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[9]                                                                                              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.086     ; 6.427      ;
; 11.110 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[14]                                                                                             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.086     ; 6.427      ;
; 11.110 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[13]                                                                                             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.086     ; 6.427      ;
; 11.110 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[12]                                                                                             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.086     ; 6.427      ;
; 11.110 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[10]                                                                                             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.086     ; 6.427      ;
; 11.110 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[15]                                                                                             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.086     ; 6.427      ;
; 11.110 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[8]                                                                                              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.086     ; 6.427      ;
; 11.110 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[11]                                                                                             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.087     ; 6.426      ;
; 11.111 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[1]                                                                                              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.070     ; 6.442      ;
; 11.111 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[26]                                                                                             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.072     ; 6.440      ;
; 11.111 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|state                                                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.072     ; 6.440      ;
; 11.111 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|ss_n[0]                                                                       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.072     ; 6.440      ;
; 11.111 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[2]                                                                                              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.070     ; 6.442      ;
; 11.111 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[9]                                                                                              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.071     ; 6.441      ;
; 11.111 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[5]                                                                                              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.070     ; 6.442      ;
; 11.111 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[31]                                                                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.072     ; 6.440      ;
; 11.111 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[31]                                                                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.072     ; 6.440      ;
; 11.111 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out6_reg[31]                                                                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.072     ; 6.440      ;
; 11.111 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[29]                                                                                             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.073     ; 6.439      ;
; 11.111 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out5_reg[29]                                                                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.073     ; 6.439      ;
; 11.111 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[29]                                                                                             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.075     ; 6.437      ;
; 11.111 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[28]                                                                                             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.070     ; 6.442      ;
; 11.111 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out5_reg[28]                                                                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.077     ; 6.435      ;
; 11.111 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out5_reg[30]                                                                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.075     ; 6.437      ;
; 11.111 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[24]                                                                                             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.073     ; 6.439      ;
; 11.111 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[24]                                                                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.072     ; 6.440      ;
; 11.111 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out6_reg[24]                                                                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.072     ; 6.440      ;
; 11.111 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[24]                                                                                             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.075     ; 6.437      ;
; 11.111 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[27]                                                                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.072     ; 6.440      ;
; 11.111 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out6_reg[27]                                                                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.072     ; 6.440      ;
; 11.111 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[27]                                                                                             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.072     ; 6.440      ;
; 11.111 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[4]                                                                                              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.070     ; 6.442      ;
; 11.111 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[3]                                                                                              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.070     ; 6.442      ;
; 11.111 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[6]                                                                                              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.070     ; 6.442      ;
; 11.111 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[7]                                                                                              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.070     ; 6.442      ;
; 11.111 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|delay_line:stimer_delay|shift_reg[1]                                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.073     ; 6.439      ;
; 11.111 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|delay_line:stimer_delay|shift_reg[0]                                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.073     ; 6.439      ;
; 11.111 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|syncreset_enable_divider:enable_64_div|count_reg[0]                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.073     ; 6.439      ;
; 11.111 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|syncreset_enable_divider:enable_64_div|count_reg[2]                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.073     ; 6.439      ;
; 11.111 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|syncreset_enable_divider:enable_64_div|count_reg[3]                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.073     ; 6.439      ;
; 11.111 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|syncreset_enable_divider:enable_64_div|count_reg[4]                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.073     ; 6.439      ;
; 11.111 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|syncreset_enable_divider:enable_64_div|count_reg[1]                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.073     ; 6.439      ;
; 11.111 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|syncreset_enable_divider:enable_64_div|enabled_out_reg                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.073     ; 6.439      ;
; 11.111 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf0_reg[1]                                                          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.070     ; 6.442      ;
; 11.111 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf0_reg[5]                                                          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.070     ; 6.442      ;
; 11.111 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf0_reg[6]                                                          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.070     ; 6.442      ;
; 11.111 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf0_reg[7]                                                          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.070     ; 6.442      ;
; 11.111 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pokey_countdown_timer:timer0|delay_line:underflow0_delay|shift_reg[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.070     ; 6.442      ;
; 11.111 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[1]                                                          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.070     ; 6.442      ;
; 11.111 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[6]                                                          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.070     ; 6.442      ;
; 11.111 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf1_reg[7]                                                          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.070     ; 6.442      ;
; 11.111 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pokey_countdown_timer:timer1|delay_line:underflow0_delay|shift_reg[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.070     ; 6.442      ;
; 11.111 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pokey_countdown_timer:timer1|delay_line:underflow0_delay|shift_reg[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.070     ; 6.442      ;
; 11.111 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|skctl_reg[7]                                                          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.071     ; 6.441      ;
; 11.111 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf2_reg[1]                                                          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.070     ; 6.442      ;
; 11.111 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[0]                             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.071     ; 6.441      ;
; 11.111 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[1]                             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.071     ; 6.441      ;
; 11.111 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[2]                             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.071     ; 6.441      ;
; 11.111 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[3]                             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.071     ; 6.441      ;
; 11.111 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|audf2_reg[6]                                                          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.070     ; 6.442      ;
+--------+-----------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Removal: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                      ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                                           ; To Node                                                                                                                                                                                                                ; Launch Clock                                                       ; Latch Clock                                                        ; Relationship ; Clock Skew ; Data Delay ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+
; 1.647 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|altsyncram_h3b1:altsyncram2|ram_block5a15   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.384      ; 2.221      ;
; 1.647 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|altsyncram_h3b1:altsyncram2|ram_block5a14   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.384      ; 2.221      ;
; 1.647 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|altsyncram_h3b1:altsyncram2|ram_block5a13   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.384      ; 2.221      ;
; 1.647 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|altsyncram_h3b1:altsyncram2|ram_block5a12   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.384      ; 2.221      ;
; 1.647 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|altsyncram_h3b1:altsyncram2|ram_block5a11   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.384      ; 2.221      ;
; 1.647 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|altsyncram_h3b1:altsyncram2|ram_block5a10   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.384      ; 2.221      ;
; 1.647 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|altsyncram_h3b1:altsyncram2|ram_block5a9    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.384      ; 2.221      ;
; 1.647 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|altsyncram_h3b1:altsyncram2|ram_block5a8    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.384      ; 2.221      ;
; 1.647 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|altsyncram_h3b1:altsyncram2|ram_block5a7    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.384      ; 2.221      ;
; 1.647 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|altsyncram_h3b1:altsyncram2|ram_block5a6    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.384      ; 2.221      ;
; 1.647 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|altsyncram_h3b1:altsyncram2|ram_block5a5    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.384      ; 2.221      ;
; 1.647 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|altsyncram_h3b1:altsyncram2|ram_block5a4    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.384      ; 2.221      ;
; 1.647 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|altsyncram_h3b1:altsyncram2|ram_block5a3    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.384      ; 2.221      ;
; 1.647 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|altsyncram_h3b1:altsyncram2|ram_block5a2    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.384      ; 2.221      ;
; 1.647 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|altsyncram_h3b1:altsyncram2|ram_block5a1    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.384      ; 2.221      ;
; 1.647 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|altsyncram_h3b1:altsyncram2|ram_block5a0    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.384      ; 2.221      ;
; 1.746 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a63  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.381      ; 2.317      ;
; 1.746 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a62  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.381      ; 2.317      ;
; 1.746 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a61  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.381      ; 2.317      ;
; 1.746 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a60  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.381      ; 2.317      ;
; 1.746 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a59  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.381      ; 2.317      ;
; 1.746 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a58  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.381      ; 2.317      ;
; 1.746 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a57  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.381      ; 2.317      ;
; 1.746 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a56  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.381      ; 2.317      ;
; 1.746 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a39  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.381      ; 2.317      ;
; 1.746 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a38  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.381      ; 2.317      ;
; 1.746 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a37  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.381      ; 2.317      ;
; 1.746 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a36  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.381      ; 2.317      ;
; 1.746 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a35  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.381      ; 2.317      ;
; 1.746 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a34  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.381      ; 2.317      ;
; 1.746 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a33  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.381      ; 2.317      ;
; 1.746 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a32  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.381      ; 2.317      ;
; 1.746 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a31  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.381      ; 2.317      ;
; 1.746 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a30  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.381      ; 2.317      ;
; 1.746 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a29  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.381      ; 2.317      ;
; 1.746 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a28  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.381      ; 2.317      ;
; 1.746 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a27  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.381      ; 2.317      ;
; 1.746 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a26  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.381      ; 2.317      ;
; 1.746 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a25  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.381      ; 2.317      ;
; 1.746 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a24  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.381      ; 2.317      ;
; 1.746 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a23  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.381      ; 2.317      ;
; 1.746 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a22  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.381      ; 2.317      ;
; 1.746 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a21  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.381      ; 2.317      ;
; 1.746 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a20  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.381      ; 2.317      ;
; 1.746 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a7   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.381      ; 2.317      ;
; 1.746 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a6   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.381      ; 2.317      ;
; 1.746 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a5   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.381      ; 2.317      ;
; 1.746 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a4   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.381      ; 2.317      ;
; 1.746 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a3   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.381      ; 2.317      ;
; 1.746 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a2   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.381      ; 2.317      ;
; 1.746 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a1   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.381      ; 2.317      ;
; 1.746 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a0   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.381      ; 2.317      ;
; 1.785 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a55  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.379      ; 2.354      ;
; 1.785 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a54  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.379      ; 2.354      ;
; 1.785 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a53  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.379      ; 2.354      ;
; 1.785 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a52  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.379      ; 2.354      ;
; 1.785 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a51  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.379      ; 2.354      ;
; 1.785 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a50  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.379      ; 2.354      ;
; 1.785 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a49  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.379      ; 2.354      ;
; 1.785 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a48  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.379      ; 2.354      ;
; 1.785 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a47  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.379      ; 2.354      ;
; 1.785 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a46  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.379      ; 2.354      ;
; 1.785 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a45  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.379      ; 2.354      ;
; 1.785 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a44  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.379      ; 2.354      ;
; 1.785 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a43  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.379      ; 2.354      ;
; 1.785 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a42  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.379      ; 2.354      ;
; 1.785 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a41  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.379      ; 2.354      ;
; 1.785 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a40  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.379      ; 2.354      ;
; 1.785 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a19  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.379      ; 2.354      ;
; 1.785 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a18  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.379      ; 2.354      ;
; 1.785 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a17  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.379      ; 2.354      ;
; 1.785 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a16  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.379      ; 2.354      ;
; 1.785 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a15  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.379      ; 2.354      ;
; 1.785 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a14  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.379      ; 2.354      ;
; 1.785 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a13  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.379      ; 2.354      ;
; 1.785 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a12  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.379      ; 2.354      ;
; 1.785 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a11  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.379      ; 2.354      ;
; 1.785 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a10  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.379      ; 2.354      ;
; 1.785 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a9   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.379      ; 2.354      ;
; 1.785 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a8   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.379      ; 2.354      ;
; 2.040 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_amm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_amm:auto_generated|altsyncram_74b1:altsyncram2|ram_block5a6 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.385      ; 2.615      ;
; 2.040 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_amm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_amm:auto_generated|altsyncram_74b1:altsyncram2|ram_block5a5 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.385      ; 2.615      ;
; 2.040 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_amm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_amm:auto_generated|altsyncram_74b1:altsyncram2|ram_block5a4 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.385      ; 2.615      ;
; 2.040 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_amm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_amm:auto_generated|altsyncram_74b1:altsyncram2|ram_block5a3 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.385      ; 2.615      ;
; 2.040 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_amm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_amm:auto_generated|altsyncram_74b1:altsyncram2|ram_block5a2 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.385      ; 2.615      ;
; 2.040 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_amm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_amm:auto_generated|altsyncram_74b1:altsyncram2|ram_block5a1 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.385      ; 2.615      ;
; 2.040 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_amm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_amm:auto_generated|altsyncram_74b1:altsyncram2|ram_block5a0 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.385      ; 2.615      ;
; 2.344 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4mm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4mm:auto_generated|altsyncram_p3b1:altsyncram2|ram_block5a5 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.378      ; 2.912      ;
; 2.344 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4mm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4mm:auto_generated|altsyncram_p3b1:altsyncram2|ram_block5a4 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.378      ; 2.912      ;
; 2.344 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4mm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4mm:auto_generated|altsyncram_p3b1:altsyncram2|ram_block5a3 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.378      ; 2.912      ;
; 2.344 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4mm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4mm:auto_generated|altsyncram_p3b1:altsyncram2|ram_block5a2 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.378      ; 2.912      ;
; 2.344 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4mm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4mm:auto_generated|altsyncram_p3b1:altsyncram2|ram_block5a1 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.378      ; 2.912      ;
; 2.344 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4mm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4mm:auto_generated|altsyncram_p3b1:altsyncram2|ram_block5a0 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.378      ; 2.912      ;
; 4.033 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[1]                                                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[6]_NEW190_OTERM1393                                                                                               ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.564      ; 4.792      ;
; 4.033 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[1]                                                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[14]_NEW198_OTERM1397                                                                                              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.564      ; 4.792      ;
; 4.070 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg                                                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[6]_NEW190_OTERM1393                                                                                               ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.564      ; 4.829      ;
; 4.070 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg                                                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[14]_NEW198_OTERM1397                                                                                              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.564      ; 4.829      ;
; 4.092 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[1]                                                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmi_shiftreg_reg[8]                                                                                                               ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.506      ; 4.793      ;
; 4.129 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg                                                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmi_shiftreg_reg[8]                                                                                                               ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.506      ; 4.830      ;
; 4.385 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[1]                                                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_pending_reg_OTERM953                                                                                                      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.565      ; 5.145      ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Minimum Pulse Width: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                             ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------+------------+---------------------------------------------------------------+
; Slack ; Actual Width ; Required Width ; Type             ; Clock                                                              ; Clock Edge ; Target                                                        ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------+------------+---------------------------------------------------------------+
; 4.101 ; 4.317        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cke_reg                      ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[0]              ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[10]             ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[11]             ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[12]             ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[13]             ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[14]             ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[15]             ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[1]              ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[2]              ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[3]              ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[4]              ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[5]              ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[6]              ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[7]              ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[8]              ;
; 4.102 ; 4.318        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[9]              ;
; 4.105 ; 4.321        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[0]                 ;
; 4.105 ; 4.321        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ;
; 4.105 ; 4.321        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ;
; 4.105 ; 4.321        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ;
; 4.105 ; 4.321        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[13]                ;
; 4.105 ; 4.321        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[1]                 ;
; 4.105 ; 4.321        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ;
; 4.105 ; 4.321        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[3]                 ;
; 4.105 ; 4.321        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ;
; 4.105 ; 4.321        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[5]                 ;
; 4.105 ; 4.321        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ;
; 4.105 ; 4.321        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ;
; 4.105 ; 4.321        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ;
; 4.105 ; 4.321        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ;
; 4.105 ; 4.321        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[0]       ;
; 4.105 ; 4.321        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[10]      ;
; 4.105 ; 4.321        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[11]      ;
; 4.105 ; 4.321        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[1]       ;
; 4.105 ; 4.321        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[2]       ;
; 4.105 ; 4.321        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[3]       ;
; 4.105 ; 4.321        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[4]       ;
; 4.105 ; 4.321        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[5]       ;
; 4.105 ; 4.321        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[6]       ;
; 4.105 ; 4.321        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[7]       ;
; 4.105 ; 4.321        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[8]       ;
; 4.105 ; 4.321        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[9]       ;
; 4.105 ; 4.321        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|reply_reg                    ;
; 4.105 ; 4.321        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]           ;
; 4.105 ; 4.321        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]           ;
; 4.105 ; 4.321        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]           ;
; 4.106 ; 4.322        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[0]  ;
; 4.106 ; 4.322        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10] ;
; 4.106 ; 4.322        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]  ;
; 4.106 ; 4.322        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ;
; 4.106 ; 4.322        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ;
; 4.106 ; 4.322        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ;
; 4.106 ; 4.322        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ;
; 4.106 ; 4.322        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ;
; 4.106 ; 4.322        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ;
; 4.106 ; 4.322        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ;
; 4.106 ; 4.322        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[9]  ;
; 4.208 ; 4.363        ; 0.155          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[22]             ;
; 4.208 ; 4.363        ; 0.155          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[23]             ;
; 4.209 ; 4.364        ; 0.155          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[20]             ;
; 4.209 ; 4.364        ; 0.155          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[21]             ;
; 4.209 ; 4.359        ; 0.150          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_out_reg[14]               ;
; 4.209 ; 4.359        ; 0.150          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_out_reg[15]               ;
; 4.210 ; 4.360        ; 0.150          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|addr_reg[4]                  ;
; 4.210 ; 4.360        ; 0.150          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|addr_reg[5]                  ;
; 4.210 ; 4.360        ; 0.150          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|addr_reg[7]                  ;
; 4.210 ; 4.360        ; 0.150          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|addr_reg[8]                  ;
; 4.210 ; 4.360        ; 0.150          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_out_reg[0]                ;
; 4.210 ; 4.360        ; 0.150          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_out_reg[10]               ;
; 4.210 ; 4.360        ; 0.150          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_out_reg[11]               ;
; 4.210 ; 4.360        ; 0.150          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_out_reg[12]               ;
; 4.210 ; 4.360        ; 0.150          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]               ;
; 4.210 ; 4.360        ; 0.150          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_out_reg[2]                ;
; 4.210 ; 4.360        ; 0.150          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]                ;
; 4.211 ; 4.361        ; 0.150          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|addr_reg[11]                 ;
; 4.211 ; 4.361        ; 0.150          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|addr_reg[6]                  ;
; 4.211 ; 4.366        ; 0.155          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[16]             ;
; 4.211 ; 4.361        ; 0.150          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_out_reg[1]                ;
; 4.211 ; 4.361        ; 0.150          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_out_reg[8]                ;
; 4.211 ; 4.361        ; 0.150          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_out_reg[9]                ;
; 4.211 ; 4.361        ; 0.150          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|udqm_reg                     ;
; 4.212 ; 4.362        ; 0.150          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|addr_reg[9]                  ;
; 4.212 ; 4.367        ; 0.155          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[17]             ;
; 4.212 ; 4.367        ; 0.155          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[18]             ;
; 4.212 ; 4.367        ; 0.155          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[19]             ;
; 4.212 ; 4.367        ; 0.155          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[24]             ;
; 4.212 ; 4.367        ; 0.155          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[25]             ;
; 4.212 ; 4.367        ; 0.155          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_output_reg~_Duplicate_6   ;
; 4.212 ; 4.367        ; 0.155          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_output_reg~_Duplicate_7   ;
; 4.213 ; 4.368        ; 0.155          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[26]             ;
; 4.213 ; 4.368        ; 0.155          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[27]             ;
; 4.213 ; 4.368        ; 0.155          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[28]             ;
; 4.213 ; 4.368        ; 0.155          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[29]             ;
; 4.213 ; 4.368        ; 0.155          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[30]             ;
; 4.213 ; 4.368        ; 0.155          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[31]             ;
; 4.213 ; 4.368        ; 0.155          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_output_reg~_Duplicate_4   ;
; 4.213 ; 4.368        ; 0.155          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_output_reg~_Duplicate_5   ;
; 4.214 ; 4.364        ; 0.150          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|addr_reg[0]                  ;
; 4.214 ; 4.364        ; 0.150          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|addr_reg[10]                 ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------+------------+---------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Minimum Pulse Width: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                         ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slack ; Actual Width ; Required Width ; Type             ; Clock                                                              ; Clock Edge ; Target                                                                                                                                                    ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; 8.409 ; 8.791        ; 0.382          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|volume_sum_reg[0] ;
; 8.409 ; 8.791        ; 0.382          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|volume_sum_reg[1] ;
; 8.409 ; 8.791        ; 0.382          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|volume_sum_reg[2] ;
; 8.409 ; 8.791        ; 0.382          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|volume_sum_reg[3] ;
; 8.409 ; 8.791        ; 0.382          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|volume_sum_reg[4] ;
; 8.409 ; 8.791        ; 0.382          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[10]      ;
; 8.409 ; 8.791        ; 0.382          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[11]      ;
; 8.409 ; 8.791        ; 0.382          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[12]      ;
; 8.409 ; 8.791        ; 0.382          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[13]      ;
; 8.409 ; 8.791        ; 0.382          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[14]      ;
; 8.409 ; 8.791        ; 0.382          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[15]      ;
; 8.409 ; 8.791        ; 0.382          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[16]      ;
; 8.409 ; 8.791        ; 0.382          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[17]      ;
; 8.409 ; 8.791        ; 0.382          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[18]      ;
; 8.409 ; 8.791        ; 0.382          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[19]      ;
; 8.409 ; 8.791        ; 0.382          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[20]      ;
; 8.409 ; 8.791        ; 0.382          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[5]       ;
; 8.409 ; 8.791        ; 0.382          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[6]       ;
; 8.409 ; 8.791        ; 0.382          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[7]       ;
; 8.409 ; 8.791        ; 0.382          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[8]       ;
; 8.409 ; 8.791        ; 0.382          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[9]       ;
; 8.433 ; 8.815        ; 0.382          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|volume_sum_reg[0] ;
; 8.433 ; 8.815        ; 0.382          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|volume_sum_reg[1] ;
; 8.433 ; 8.815        ; 0.382          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|volume_sum_reg[2] ;
; 8.433 ; 8.815        ; 0.382          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|volume_sum_reg[3] ;
; 8.433 ; 8.815        ; 0.382          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|volume_sum_reg[4] ;
; 8.433 ; 8.815        ; 0.382          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[10]      ;
; 8.433 ; 8.815        ; 0.382          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[11]      ;
; 8.433 ; 8.815        ; 0.382          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[12]      ;
; 8.433 ; 8.815        ; 0.382          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[13]      ;
; 8.433 ; 8.815        ; 0.382          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[14]      ;
; 8.433 ; 8.815        ; 0.382          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[15]      ;
; 8.433 ; 8.815        ; 0.382          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[16]      ;
; 8.433 ; 8.815        ; 0.382          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[17]      ;
; 8.433 ; 8.815        ; 0.382          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[18]      ;
; 8.433 ; 8.815        ; 0.382          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[19]      ;
; 8.433 ; 8.815        ; 0.382          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[20]      ;
; 8.433 ; 8.815        ; 0.382          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[5]       ;
; 8.433 ; 8.815        ; 0.382          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[6]       ;
; 8.433 ; 8.815        ; 0.382          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[7]       ;
; 8.433 ; 8.815        ; 0.382          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[8]       ;
; 8.433 ; 8.815        ; 0.382          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey_mixer_mux:pokey_mixer_both|pokey_mixer:shared_pokey_mixer|yadj_reg[9]       ;
; 8.449 ; 8.665        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Y[1]                                          ;
; 8.449 ; 8.665        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Y[5]                                          ;
; 8.449 ; 8.665        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Y[6]                                          ;
; 8.449 ; 8.665        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[35]                                   ;
; 8.451 ; 8.667        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|FreezerLogic:freezer|state[0]                                ;
; 8.456 ; 8.672        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|A[0]                                          ;
; 8.457 ; 8.673        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|A[3]                                          ;
; 8.457 ; 8.673        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pot0_reg[1]                                                                        ;
; 8.457 ; 8.673        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|pot0_reg[3]                                                                        ;
; 8.457 ; 8.673        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|addr_r[13]                                                                                          ;
; 8.457 ; 8.673        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|addr_r[5]                                                                                           ;
; 8.457 ; 8.673        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_READ_reg                                                                                                            ;
; 8.457 ; 8.673        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|config_mem~0_OTERM11                                                                                                    ;
; 8.458 ; 8.674        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|T[7]                                          ;
; 8.459 ; 8.675        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|addr_r[10]                                                                                          ;
; 8.459 ; 8.675        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|addrl_r[0]                                                                                          ;
; 8.459 ; 8.675        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|addrl_r[1]                                                                                          ;
; 8.459 ; 8.675        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[0]                                                                                                         ;
; 8.459 ; 8.675        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[1]                                                                                                         ;
; 8.460 ; 8.676        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Y[0]                                          ;
; 8.460 ; 8.676        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Y[2]                                          ;
; 8.460 ; 8.676        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Y[3]                                          ;
; 8.460 ; 8.676        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[25]                                                                                                      ;
; 8.461 ; 8.677        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[14]_NEW198_OTERM1397                                 ;
; 8.461 ; 8.677        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[6]_NEW190_OTERM1393                                  ;
; 8.461 ; 8.677        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmi_shiftreg_reg[8]                                                  ;
; 8.461 ; 8.677        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Y[7]                                          ;
; 8.461 ; 8.677        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|theCpuCycle.cycleBranchPage_OTERM1263         ;
; 8.462 ; 8.678        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[8]                                                   ;
; 8.462 ; 8.678        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_pending_reg_OTERM953                                         ;
; 8.462 ; 8.678        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|T[6]                                          ;
; 8.462 ; 8.678        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[11]                                   ;
; 8.462 ; 8.678        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[14]                                   ;
; 8.462 ; 8.678        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[21]                                   ;
; 8.462 ; 8.678        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[24]                                   ;
; 8.462 ; 8.678        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[25]                                   ;
; 8.462 ; 8.678        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[32]                                   ;
; 8.462 ; 8.678        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[33]                                   ;
; 8.462 ; 8.678        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[4]_OTERM1047                          ;
; 8.462 ; 8.678        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|opcInfo[5]                                    ;
; 8.462 ; 8.678        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[4]                                                                                                         ;
; 8.462 ; 8.678        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|byte_write_r                                                                                        ;
; 8.462 ; 8.678        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|idim_r                                                                                              ;
; 8.462 ; 8.678        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|write_en_r                                                                                          ;
; 8.462 ; 8.678        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|memory_access_OTERM465                                                                                                  ;
; 8.462 ; 8.678        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[3]                                                                                                         ;
; 8.463 ; 8.679        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[2]_OTERM499                                                                                     ;
; 8.463 ; 8.679        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[3]_OTERM493                                                                                     ;
; 8.464 ; 8.680        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|A[6]                                          ;
; 8.504 ; 8.720        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|X[1]                                          ;
; 8.504 ; 8.720        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|X[5]                                          ;
; 8.504 ; 8.720        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|X[7]                                          ;
; 8.504 ; 8.720        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|colpf0_raw_reg[6]                                                      ;
; 8.504 ; 8.720        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|colpf0_raw_reg[7]                                                      ;
; 8.504 ; 8.720        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|colpm2_raw_reg[5]                                                      ;
; 8.504 ; 8.720        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_priority:priority_rules|SB_reg                                    ;
; 8.504 ; 8.720        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_priority:priority_rules|SP0_reg                                   ;
; 8.504 ; 8.720        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|gtia_priority:priority_rules|SP1_reg                                   ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Minimum Pulse Width: 'CLOCK_27[0]'                                                                                                            ;
+--------+--------------+----------------+------------------+-------------+------------+-----------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock       ; Clock Edge ; Target                                                                      ;
+--------+--------------+----------------+------------------+-------------+------------+-----------------------------------------------------------------------------+
; 18.351 ; 18.351       ; 0.000          ; Low Pulse Width  ; CLOCK_27[0] ; Rise       ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0]           ;
; 18.351 ; 18.351       ; 0.000          ; Low Pulse Width  ; CLOCK_27[0] ; Rise       ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|observablevcoout ;
; 18.400 ; 18.400       ; 0.000          ; Low Pulse Width  ; CLOCK_27[0] ; Rise       ; CLOCK_27[0]~input|o                                                         ;
; 18.430 ; 18.430       ; 0.000          ; Low Pulse Width  ; CLOCK_27[0] ; Rise       ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|inclk[0]         ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27[0] ; Rise       ; CLOCK_27[0]~input|i                                                         ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27[0] ; Rise       ; CLOCK_27[0]~input|i                                                         ;
; 18.606 ; 18.606       ; 0.000          ; High Pulse Width ; CLOCK_27[0] ; Rise       ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|inclk[0]         ;
; 18.637 ; 18.637       ; 0.000          ; High Pulse Width ; CLOCK_27[0] ; Rise       ; CLOCK_27[0]~input|o                                                         ;
; 18.684 ; 18.684       ; 0.000          ; High Pulse Width ; CLOCK_27[0] ; Rise       ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0]           ;
; 18.684 ; 18.684       ; 0.000          ; High Pulse Width ; CLOCK_27[0] ; Rise       ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|observablevcoout ;
; 33.037 ; 37.037       ; 4.000          ; Port Rate        ; CLOCK_27[0] ; Rise       ; CLOCK_27[0]                                                                 ;
+--------+--------------+----------------+------------------+-------------+------------+-----------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Minimum Pulse Width: '\gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                        ;
+--------+--------------+----------------+------------------+-------------------------------------------------------------------+------------+-----------------------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock                                                             ; Clock Edge ; Target                                                                                  ;
+--------+--------------+----------------+------------------+-------------------------------------------------------------------+------------+-----------------------------------------------------------------------------------------+
; 24.963 ; 24.963       ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl|inclk[0] ;
; 24.963 ; 24.963       ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl|outclk   ;
; 24.972 ; 24.972       ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|inclk[0]                    ;
; 24.973 ; 24.973       ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0]                      ;
; 24.973 ; 24.973       ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1]                      ;
; 24.973 ; 24.973       ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[2]                      ;
; 24.973 ; 24.973       ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3]                      ;
; 24.973 ; 24.973       ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|observablevcoout            ;
; 25.024 ; 25.024       ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|inclk[0]                    ;
; 25.026 ; 25.026       ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0]                      ;
; 25.026 ; 25.026       ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1]                      ;
; 25.026 ; 25.026       ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[2]                      ;
; 25.026 ; 25.026       ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3]                      ;
; 25.026 ; 25.026       ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|observablevcoout            ;
; 25.034 ; 25.034       ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl|inclk[0] ;
; 25.034 ; 25.034       ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl|outclk   ;
+--------+--------------+----------------+------------------+-------------------------------------------------------------------+------------+-----------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow 1200mV 0C Model Minimum Pulse Width: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3]'                                                                                                                            ;
+-----------+--------------+----------------+------------------+--------------------------------------------------------------------+------------+------------------------------------------------------------------------------------------+
; Slack     ; Actual Width ; Required Width ; Type             ; Clock                                                              ; Clock Edge ; Target                                                                                   ;
+-----------+--------------+----------------+------------------+--------------------------------------------------------------------+------------+------------------------------------------------------------------------------------------+
; 31999.665 ; 31999.881    ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_parity                                                            ;
; 31999.665 ; 31999.881    ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_r_inc                                                             ;
; 31999.665 ; 31999.881    ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_rptr[0]                                                           ;
; 31999.665 ; 31999.881    ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_rptr[1]                                                           ;
; 31999.665 ; 31999.881    ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_rptr[2]                                                           ;
; 31999.665 ; 31999.881    ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[0]                                                        ;
; 31999.665 ; 31999.881    ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[1]                                                        ;
; 31999.665 ; 31999.881    ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[2]                                                        ;
; 31999.665 ; 31999.881    ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[3]                                                        ;
; 31999.665 ; 31999.881    ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[4]                                                        ;
; 31999.665 ; 31999.881    ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[5]                                                        ;
; 31999.665 ; 31999.881    ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[6]                                                        ;
; 31999.665 ; 31999.881    ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[7]                                                        ;
; 31999.666 ; 31999.882    ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|Equal5~0_OTERM1                                                       ;
; 31999.666 ; 31999.882    ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_kbd_data                                                          ;
; 31999.666 ; 31999.882    ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_state[0]                                                       ;
; 31999.666 ; 31999.882    ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_state[1]                                                       ;
; 31999.666 ; 31999.882    ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_state[2]                                                       ;
; 31999.666 ; 31999.882    ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_state[3]                                                       ;
; 31999.865 ; 32000.049    ; 0.184          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|Equal5~0_OTERM1                                                       ;
; 31999.865 ; 32000.049    ; 0.184          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_kbd_data                                                          ;
; 31999.865 ; 32000.049    ; 0.184          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_state[0]                                                       ;
; 31999.865 ; 32000.049    ; 0.184          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_state[1]                                                       ;
; 31999.865 ; 32000.049    ; 0.184          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_state[2]                                                       ;
; 31999.865 ; 32000.049    ; 0.184          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_state[3]                                                       ;
; 31999.866 ; 32000.050    ; 0.184          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_parity                                                            ;
; 31999.866 ; 32000.050    ; 0.184          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_r_inc                                                             ;
; 31999.866 ; 32000.050    ; 0.184          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_rptr[0]                                                           ;
; 31999.866 ; 32000.050    ; 0.184          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_rptr[1]                                                           ;
; 31999.866 ; 32000.050    ; 0.184          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_rptr[2]                                                           ;
; 31999.866 ; 32000.050    ; 0.184          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[0]                                                        ;
; 31999.866 ; 32000.050    ; 0.184          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[1]                                                        ;
; 31999.866 ; 32000.050    ; 0.184          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[2]                                                        ;
; 31999.866 ; 32000.050    ; 0.184          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[3]                                                        ;
; 31999.866 ; 32000.050    ; 0.184          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[4]                                                        ;
; 31999.866 ; 32000.050    ; 0.184          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[5]                                                        ;
; 31999.866 ; 32000.050    ; 0.184          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[6]                                                        ;
; 31999.866 ; 32000.050    ; 0.184          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[7]                                                        ;
; 31999.933 ; 31999.933    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|wire_pll1_clk[3]~clkctrl|inclk[0] ;
; 31999.933 ; 31999.933    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|wire_pll1_clk[3]~clkctrl|outclk   ;
; 31999.935 ; 31999.935    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_parity|clk                                                                ;
; 31999.935 ; 31999.935    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_r_inc|clk                                                                 ;
; 31999.935 ; 31999.935    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_rptr[0]|clk                                                               ;
; 31999.935 ; 31999.935    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_rptr[1]|clk                                                               ;
; 31999.935 ; 31999.935    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_rptr[2]|clk                                                               ;
; 31999.935 ; 31999.935    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_byte[0]|clk                                                            ;
; 31999.935 ; 31999.935    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_byte[1]|clk                                                            ;
; 31999.935 ; 31999.935    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_byte[2]|clk                                                            ;
; 31999.935 ; 31999.935    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_byte[3]|clk                                                            ;
; 31999.935 ; 31999.935    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_byte[4]|clk                                                            ;
; 31999.935 ; 31999.935    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_byte[5]|clk                                                            ;
; 31999.935 ; 31999.935    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_byte[6]|clk                                                            ;
; 31999.935 ; 31999.935    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_byte[7]|clk                                                            ;
; 31999.936 ; 31999.936    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|Equal5~0_NEW_REG0|clk                                                         ;
; 31999.936 ; 31999.936    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_kbd_data|clk                                                              ;
; 31999.936 ; 31999.936    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_state[0]|clk                                                           ;
; 31999.936 ; 31999.936    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_state[1]|clk                                                           ;
; 31999.936 ; 31999.936    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_state[2]|clk                                                           ;
; 31999.936 ; 31999.936    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_state[3]|clk                                                           ;
; 31999.998 ; 31999.998    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|Equal5~0_NEW_REG0|clk                                                         ;
; 31999.998 ; 31999.998    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_kbd_data|clk                                                              ;
; 31999.998 ; 31999.998    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_state[0]|clk                                                           ;
; 31999.998 ; 31999.998    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_state[1]|clk                                                           ;
; 31999.998 ; 31999.998    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_state[2]|clk                                                           ;
; 31999.998 ; 31999.998    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_state[3]|clk                                                           ;
; 31999.999 ; 31999.999    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_parity|clk                                                                ;
; 31999.999 ; 31999.999    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_r_inc|clk                                                                 ;
; 31999.999 ; 31999.999    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_rptr[0]|clk                                                               ;
; 31999.999 ; 31999.999    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_rptr[1]|clk                                                               ;
; 31999.999 ; 31999.999    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_rptr[2]|clk                                                               ;
; 31999.999 ; 31999.999    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_byte[0]|clk                                                            ;
; 31999.999 ; 31999.999    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_byte[1]|clk                                                            ;
; 31999.999 ; 31999.999    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_byte[2]|clk                                                            ;
; 31999.999 ; 31999.999    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_byte[3]|clk                                                            ;
; 31999.999 ; 31999.999    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_byte[4]|clk                                                            ;
; 31999.999 ; 31999.999    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_byte[5]|clk                                                            ;
; 31999.999 ; 31999.999    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_byte[6]|clk                                                            ;
; 31999.999 ; 31999.999    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_byte[7]|clk                                                            ;
; 32000.001 ; 32000.001    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|wire_pll1_clk[3]~clkctrl|inclk[0] ;
; 32000.001 ; 32000.001    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|wire_pll1_clk[3]~clkctrl|outclk   ;
; 63997.449 ; 63999.936    ; 2.487          ; Min Period       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|Equal5~0_OTERM1                                                       ;
; 63997.449 ; 63999.936    ; 2.487          ; Min Period       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_kbd_data                                                          ;
; 63997.449 ; 63999.936    ; 2.487          ; Min Period       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_parity                                                            ;
; 63997.449 ; 63999.936    ; 2.487          ; Min Period       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_r_inc                                                             ;
; 63997.449 ; 63999.936    ; 2.487          ; Min Period       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_rptr[0]                                                           ;
; 63997.449 ; 63999.936    ; 2.487          ; Min Period       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_rptr[1]                                                           ;
; 63997.449 ; 63999.936    ; 2.487          ; Min Period       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_rptr[2]                                                           ;
; 63997.449 ; 63999.936    ; 2.487          ; Min Period       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[0]                                                        ;
; 63997.449 ; 63999.936    ; 2.487          ; Min Period       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[1]                                                        ;
; 63997.449 ; 63999.936    ; 2.487          ; Min Period       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[2]                                                        ;
; 63997.449 ; 63999.936    ; 2.487          ; Min Period       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[3]                                                        ;
; 63997.449 ; 63999.936    ; 2.487          ; Min Period       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[4]                                                        ;
; 63997.449 ; 63999.936    ; 2.487          ; Min Period       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[5]                                                        ;
; 63997.449 ; 63999.936    ; 2.487          ; Min Period       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[6]                                                        ;
; 63997.449 ; 63999.936    ; 2.487          ; Min Period       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[7]                                                        ;
; 63997.449 ; 63999.936    ; 2.487          ; Min Period       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_state[0]                                                       ;
; 63997.449 ; 63999.936    ; 2.487          ; Min Period       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_state[1]                                                       ;
; 63997.449 ; 63999.936    ; 2.487          ; Min Period       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_state[2]                                                       ;
; 63997.449 ; 63999.936    ; 2.487          ; Min Period       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_state[3]                                                       ;
+-----------+--------------+----------------+------------------+--------------------------------------------------------------------+------------+------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------+
; Setup Times                                                                                                                   ;
+---------------+-------------+-------+-------+------------+--------------------------------------------------------------------+
; Data Port     ; Clock Port  ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                                    ;
+---------------+-------------+-------+-------+------------+--------------------------------------------------------------------+
; SDRAM_DQ[*]   ; CLOCK_27[0] ; 4.450 ; 4.341 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; CLOCK_27[0] ; 3.832 ; 3.742 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; CLOCK_27[0] ; 4.326 ; 4.170 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; CLOCK_27[0] ; 4.289 ; 4.182 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; CLOCK_27[0] ; 4.245 ; 4.103 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; CLOCK_27[0] ; 4.064 ; 3.972 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; CLOCK_27[0] ; 4.149 ; 4.050 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; CLOCK_27[0] ; 3.882 ; 3.833 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; CLOCK_27[0] ; 3.913 ; 3.848 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; CLOCK_27[0] ; 3.433 ; 3.261 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; CLOCK_27[0] ; 3.520 ; 3.311 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; CLOCK_27[0] ; 4.361 ; 4.227 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; CLOCK_27[0] ; 4.376 ; 4.274 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; CLOCK_27[0] ; 4.280 ; 4.132 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; CLOCK_27[0] ; 4.450 ; 4.341 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; CLOCK_27[0] ; 4.350 ; 4.208 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; CLOCK_27[0] ; 4.382 ; 4.250 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
+---------------+-------------+-------+-------+------------+--------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------+
; Hold Times                                                                                                                      ;
+---------------+-------------+--------+--------+------------+--------------------------------------------------------------------+
; Data Port     ; Clock Port  ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                                    ;
+---------------+-------------+--------+--------+------------+--------------------------------------------------------------------+
; SDRAM_DQ[*]   ; CLOCK_27[0] ; -1.577 ; -1.695 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; CLOCK_27[0] ; -1.630 ; -1.744 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; CLOCK_27[0] ; -1.634 ; -1.748 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; CLOCK_27[0] ; -1.635 ; -1.749 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; CLOCK_27[0] ; -1.635 ; -1.749 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; CLOCK_27[0] ; -1.577 ; -1.695 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; CLOCK_27[0] ; -1.587 ; -1.705 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; CLOCK_27[0] ; -1.577 ; -1.695 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; CLOCK_27[0] ; -1.577 ; -1.695 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; CLOCK_27[0] ; -1.617 ; -1.731 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; CLOCK_27[0] ; -1.617 ; -1.731 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; CLOCK_27[0] ; -1.619 ; -1.733 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; CLOCK_27[0] ; -1.619 ; -1.733 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; CLOCK_27[0] ; -1.620 ; -1.734 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; CLOCK_27[0] ; -1.620 ; -1.734 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; CLOCK_27[0] ; -1.631 ; -1.745 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; CLOCK_27[0] ; -1.631 ; -1.745 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
+---------------+-------------+--------+--------+------------+--------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------+
; Clock to Output Times                                                                                                           ;
+---------------+-------------+--------+--------+------------+--------------------------------------------------------------------+
; Data Port     ; Clock Port  ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                                    ;
+---------------+-------------+--------+--------+------------+--------------------------------------------------------------------+
; SDRAM_A[*]    ; CLOCK_27[0] ; 2.860  ; 2.522  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[0]   ; CLOCK_27[0] ; 2.635  ; 2.348  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[1]   ; CLOCK_27[0] ; 2.636  ; 2.349  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[2]   ; CLOCK_27[0] ; 2.637  ; 2.350  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[3]   ; CLOCK_27[0] ; 2.647  ; 2.360  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[4]   ; CLOCK_27[0] ; 2.559  ; 2.298  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[5]   ; CLOCK_27[0] ; 2.860  ; 2.522  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[6]   ; CLOCK_27[0] ; 2.843  ; 2.505  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[7]   ; CLOCK_27[0] ; 2.848  ; 2.510  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[8]   ; CLOCK_27[0] ; 2.848  ; 2.510  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[9]   ; CLOCK_27[0] ; 2.844  ; 2.506  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[10]  ; CLOCK_27[0] ; 2.636  ; 2.349  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[11]  ; CLOCK_27[0] ; 2.851  ; 2.513  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_BA[*]   ; CLOCK_27[0] ; 2.634  ; 2.347  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[0]  ; CLOCK_27[0] ; 2.634  ; 2.347  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[1]  ; CLOCK_27[0] ; 2.626  ; 2.339  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CKE     ; CLOCK_27[0] ; 2.895  ; 2.628  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQ[*]   ; CLOCK_27[0] ; 2.851  ; 2.513  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; CLOCK_27[0] ; 2.832  ; 2.494  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; CLOCK_27[0] ; 2.828  ; 2.490  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; CLOCK_27[0] ; 2.544  ; 2.283  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; CLOCK_27[0] ; 2.544  ; 2.283  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; CLOCK_27[0] ; 2.648  ; 2.361  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; CLOCK_27[0] ; 2.658  ; 2.371  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; CLOCK_27[0] ; 2.648  ; 2.361  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; CLOCK_27[0] ; 2.648  ; 2.361  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; CLOCK_27[0] ; 2.825  ; 2.487  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; CLOCK_27[0] ; 2.825  ; 2.487  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; CLOCK_27[0] ; 2.843  ; 2.505  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; CLOCK_27[0] ; 2.843  ; 2.505  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; CLOCK_27[0] ; 2.539  ; 2.278  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; CLOCK_27[0] ; 2.842  ; 2.504  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; CLOCK_27[0] ; 2.851  ; 2.513  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; CLOCK_27[0] ; 2.548  ; 2.287  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQMH    ; CLOCK_27[0] ; 2.824  ; 2.486  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQML    ; CLOCK_27[0] ; 2.647  ; 2.360  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_nCAS    ; CLOCK_27[0] ; 2.635  ; 2.348  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_nRAS    ; CLOCK_27[0] ; 2.634  ; 2.347  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_nWE     ; CLOCK_27[0] ; 2.647  ; 2.360  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; AUDIO_L       ; CLOCK_27[0] ; 6.862  ; 6.102  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; AUDIO_R       ; CLOCK_27[0] ; 5.447  ; 4.845  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; LED           ; CLOCK_27[0] ; 6.436  ; 7.377  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; VGA_B[*]      ; CLOCK_27[0] ; 4.917  ; 4.332  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_B[0]     ; CLOCK_27[0] ; 4.917  ; 4.332  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_B[1]     ; CLOCK_27[0] ; 4.603  ; 4.059  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_B[2]     ; CLOCK_27[0] ; 4.485  ; 3.859  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_B[3]     ; CLOCK_27[0] ; 4.015  ; 3.624  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_B[4]     ; CLOCK_27[0] ; 3.751  ; 3.286  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_B[5]     ; CLOCK_27[0] ; 3.228  ; 2.876  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; VGA_G[*]      ; CLOCK_27[0] ; 5.508  ; 4.712  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_G[0]     ; CLOCK_27[0] ; 5.484  ; 4.699  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_G[1]     ; CLOCK_27[0] ; 5.364  ; 4.555  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_G[2]     ; CLOCK_27[0] ; 5.508  ; 4.712  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_G[3]     ; CLOCK_27[0] ; 4.455  ; 4.024  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_G[4]     ; CLOCK_27[0] ; 5.012  ; 4.329  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_G[5]     ; CLOCK_27[0] ; 4.867  ; 4.232  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; VGA_HS        ; CLOCK_27[0] ; 6.122  ; 5.413  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; VGA_R[*]      ; CLOCK_27[0] ; 4.162  ; 3.650  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_R[0]     ; CLOCK_27[0] ; 3.492  ; 3.071  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_R[1]     ; CLOCK_27[0] ; 3.476  ; 3.070  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_R[2]     ; CLOCK_27[0] ; 3.903  ; 3.403  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_R[3]     ; CLOCK_27[0] ; 4.146  ; 3.650  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_R[4]     ; CLOCK_27[0] ; 4.162  ; 3.642  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_R[5]     ; CLOCK_27[0] ; 3.942  ; 3.537  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; VGA_VS        ; CLOCK_27[0] ; 5.735  ; 5.029  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SDRAM_CLK     ; CLOCK_27[0] ; -0.422 ;        ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; SDRAM_CLK     ; CLOCK_27[0] ;        ; -0.808 ; Fall       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[2] ;
+---------------+-------------+--------+--------+------------+--------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------+
; Minimum Clock to Output Times                                                                                                   ;
+---------------+-------------+--------+--------+------------+--------------------------------------------------------------------+
; Data Port     ; Clock Port  ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                                    ;
+---------------+-------------+--------+--------+------------+--------------------------------------------------------------------+
; SDRAM_A[*]    ; CLOCK_27[0] ; 1.827  ; 1.567  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[0]   ; CLOCK_27[0] ; 1.901  ; 1.615  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[1]   ; CLOCK_27[0] ; 1.903  ; 1.617  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[2]   ; CLOCK_27[0] ; 1.903  ; 1.617  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[3]   ; CLOCK_27[0] ; 1.914  ; 1.628  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[4]   ; CLOCK_27[0] ; 1.827  ; 1.567  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[5]   ; CLOCK_27[0] ; 2.127  ; 1.790  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[6]   ; CLOCK_27[0] ; 2.111  ; 1.774  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[7]   ; CLOCK_27[0] ; 2.116  ; 1.779  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[8]   ; CLOCK_27[0] ; 2.116  ; 1.779  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[9]   ; CLOCK_27[0] ; 2.112  ; 1.775  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[10]  ; CLOCK_27[0] ; 1.902  ; 1.616  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[11]  ; CLOCK_27[0] ; 2.119  ; 1.782  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_BA[*]   ; CLOCK_27[0] ; 1.892  ; 1.606  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[0]  ; CLOCK_27[0] ; 1.901  ; 1.615  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[1]  ; CLOCK_27[0] ; 1.892  ; 1.606  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CKE     ; CLOCK_27[0] ; 2.157  ; 1.890  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQ[*]   ; CLOCK_27[0] ; 1.807  ; 1.547  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; CLOCK_27[0] ; 2.100  ; 1.763  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; CLOCK_27[0] ; 2.097  ; 1.760  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; CLOCK_27[0] ; 1.812  ; 1.552  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; CLOCK_27[0] ; 1.812  ; 1.552  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; CLOCK_27[0] ; 1.915  ; 1.629  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; CLOCK_27[0] ; 1.925  ; 1.639  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; CLOCK_27[0] ; 1.914  ; 1.628  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; CLOCK_27[0] ; 1.914  ; 1.628  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; CLOCK_27[0] ; 2.094  ; 1.757  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; CLOCK_27[0] ; 2.094  ; 1.757  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; CLOCK_27[0] ; 2.111  ; 1.774  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; CLOCK_27[0] ; 2.111  ; 1.774  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; CLOCK_27[0] ; 1.807  ; 1.547  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; CLOCK_27[0] ; 2.110  ; 1.773  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; CLOCK_27[0] ; 2.119  ; 1.782  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; CLOCK_27[0] ; 1.816  ; 1.556  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQMH    ; CLOCK_27[0] ; 2.093  ; 1.756  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQML    ; CLOCK_27[0] ; 1.914  ; 1.628  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_nCAS    ; CLOCK_27[0] ; 1.901  ; 1.615  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_nRAS    ; CLOCK_27[0] ; 1.901  ; 1.615  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_nWE     ; CLOCK_27[0] ; 1.914  ; 1.628  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; AUDIO_L       ; CLOCK_27[0] ; 6.041  ; 5.292  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; AUDIO_R       ; CLOCK_27[0] ; 4.681  ; 4.084  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; LED           ; CLOCK_27[0] ; 5.612  ; 6.534  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; VGA_B[*]      ; CLOCK_27[0] ; 2.477  ; 2.128  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_B[0]     ; CLOCK_27[0] ; 4.099  ; 3.526  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_B[1]     ; CLOCK_27[0] ; 3.797  ; 3.264  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_B[2]     ; CLOCK_27[0] ; 3.684  ; 3.072  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_B[3]     ; CLOCK_27[0] ; 3.233  ; 2.847  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_B[4]     ; CLOCK_27[0] ; 2.980  ; 2.523  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_B[5]     ; CLOCK_27[0] ; 2.477  ; 2.128  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; VGA_G[*]      ; CLOCK_27[0] ; 3.655  ; 3.231  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_G[0]     ; CLOCK_27[0] ; 4.654  ; 3.887  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_G[1]     ; CLOCK_27[0] ; 4.528  ; 3.741  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_G[2]     ; CLOCK_27[0] ; 4.666  ; 3.892  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_G[3]     ; CLOCK_27[0] ; 3.655  ; 3.231  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_G[4]     ; CLOCK_27[0] ; 4.190  ; 3.524  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_G[5]     ; CLOCK_27[0] ; 4.050  ; 3.430  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; VGA_HS        ; CLOCK_27[0] ; 5.331  ; 4.631  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; VGA_R[*]      ; CLOCK_27[0] ; 2.715  ; 2.314  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_R[0]     ; CLOCK_27[0] ; 2.730  ; 2.315  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_R[1]     ; CLOCK_27[0] ; 2.715  ; 2.314  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_R[2]     ; CLOCK_27[0] ; 3.126  ; 2.636  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_R[3]     ; CLOCK_27[0] ; 3.359  ; 2.872  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_R[4]     ; CLOCK_27[0] ; 3.375  ; 2.865  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_R[5]     ; CLOCK_27[0] ; 3.164  ; 2.764  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; VGA_VS        ; CLOCK_27[0] ; 4.959  ; 4.263  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SDRAM_CLK     ; CLOCK_27[0] ; -1.113 ;        ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; SDRAM_CLK     ; CLOCK_27[0] ;        ; -1.494 ; Fall       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[2] ;
+---------------+-------------+--------+--------+------------+--------------------------------------------------------------------+


+--------------------------------------------------------------+
; Propagation Delay                                            ;
+------------+-------------+--------+--------+--------+--------+
; Input Port ; Output Port ; RR     ; RF     ; FR     ; FF     ;
+------------+-------------+--------+--------+--------+--------+
; CONF_DATA0 ; SPI_DO      ; 10.904 ; 10.833 ; 11.488 ; 11.488 ;
+------------+-------------+--------+--------+--------+--------+


+--------------------------------------------------------------+
; Minimum Propagation Delay                                    ;
+------------+-------------+--------+--------+--------+--------+
; Input Port ; Output Port ; RR     ; RF     ; FR     ; FF     ;
+------------+-------------+--------+--------+--------+--------+
; CONF_DATA0 ; SPI_DO      ; 10.422 ; 10.286 ; 10.847 ; 10.847 ;
+------------+-------------+--------+--------+--------+--------+


+-------------------------------------------------------------------------------------------------------------------------------+
; Output Enable Times                                                                                                           ;
+---------------+-------------+-------+-------+------------+--------------------------------------------------------------------+
; Data Port     ; Clock Port  ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                                    ;
+---------------+-------------+-------+-------+------------+--------------------------------------------------------------------+
; SDRAM_DQ[*]   ; CLOCK_27[0] ; 2.636 ; 2.636 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; CLOCK_27[0] ; 2.643 ; 2.643 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; CLOCK_27[0] ; 2.639 ; 2.639 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; CLOCK_27[0] ; 2.658 ; 2.658 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; CLOCK_27[0] ; 2.658 ; 2.658 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; CLOCK_27[0] ; 2.744 ; 2.744 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; CLOCK_27[0] ; 2.754 ; 2.754 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; CLOCK_27[0] ; 2.744 ; 2.744 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; CLOCK_27[0] ; 2.744 ; 2.744 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; CLOCK_27[0] ; 2.636 ; 2.636 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; CLOCK_27[0] ; 2.636 ; 2.636 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; CLOCK_27[0] ; 2.654 ; 2.654 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; CLOCK_27[0] ; 2.654 ; 2.654 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; CLOCK_27[0] ; 2.653 ; 2.653 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; CLOCK_27[0] ; 2.653 ; 2.653 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; CLOCK_27[0] ; 2.662 ; 2.662 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; CLOCK_27[0] ; 2.662 ; 2.662 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
+---------------+-------------+-------+-------+------------+--------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------+
; Minimum Output Enable Times                                                                                                   ;
+---------------+-------------+-------+-------+------------+--------------------------------------------------------------------+
; Data Port     ; Clock Port  ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                                    ;
+---------------+-------------+-------+-------+------------+--------------------------------------------------------------------+
; SDRAM_DQ[*]   ; CLOCK_27[0] ; 1.383 ; 1.417 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; CLOCK_27[0] ; 1.389 ; 1.423 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; CLOCK_27[0] ; 1.386 ; 1.420 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; CLOCK_27[0] ; 1.404 ; 1.438 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; CLOCK_27[0] ; 1.404 ; 1.438 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; CLOCK_27[0] ; 1.456 ; 1.489 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; CLOCK_27[0] ; 1.466 ; 1.499 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; CLOCK_27[0] ; 1.455 ; 1.488 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; CLOCK_27[0] ; 1.455 ; 1.488 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; CLOCK_27[0] ; 1.383 ; 1.417 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; CLOCK_27[0] ; 1.383 ; 1.417 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; CLOCK_27[0] ; 1.400 ; 1.434 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; CLOCK_27[0] ; 1.400 ; 1.434 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; CLOCK_27[0] ; 1.399 ; 1.433 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; CLOCK_27[0] ; 1.399 ; 1.433 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; CLOCK_27[0] ; 1.408 ; 1.442 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; CLOCK_27[0] ; 1.408 ; 1.442 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
+---------------+-------------+-------+-------+------------+--------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------+
; Output Disable Times                                                                                                                  ;
+---------------+-------------+-----------+-----------+------------+--------------------------------------------------------------------+
; Data Port     ; Clock Port  ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                                    ;
+---------------+-------------+-----------+-----------+------------+--------------------------------------------------------------------+
; SDRAM_DQ[*]   ; CLOCK_27[0] ; 2.315     ; 2.712     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; CLOCK_27[0] ; 2.322     ; 2.719     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; CLOCK_27[0] ; 2.318     ; 2.715     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; CLOCK_27[0] ; 2.337     ; 2.734     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; CLOCK_27[0] ; 2.337     ; 2.734     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; CLOCK_27[0] ; 2.399     ; 2.820     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; CLOCK_27[0] ; 2.409     ; 2.830     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; CLOCK_27[0] ; 2.399     ; 2.820     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; CLOCK_27[0] ; 2.399     ; 2.820     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; CLOCK_27[0] ; 2.315     ; 2.712     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; CLOCK_27[0] ; 2.315     ; 2.712     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; CLOCK_27[0] ; 2.333     ; 2.730     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; CLOCK_27[0] ; 2.333     ; 2.730     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; CLOCK_27[0] ; 2.332     ; 2.729     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; CLOCK_27[0] ; 2.332     ; 2.729     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; CLOCK_27[0] ; 2.341     ; 2.738     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; CLOCK_27[0] ; 2.341     ; 2.738     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
+---------------+-------------+-----------+-----------+------------+--------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------+
; Minimum Output Disable Times                                                                                                          ;
+---------------+-------------+-----------+-----------+------------+--------------------------------------------------------------------+
; Data Port     ; Clock Port  ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                                    ;
+---------------+-------------+-----------+-----------+------------+--------------------------------------------------------------------+
; SDRAM_DQ[*]   ; CLOCK_27[0] ; 1.456     ; 1.456     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; CLOCK_27[0] ; 1.462     ; 1.462     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; CLOCK_27[0] ; 1.459     ; 1.459     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; CLOCK_27[0] ; 1.477     ; 1.477     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; CLOCK_27[0] ; 1.477     ; 1.477     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; CLOCK_27[0] ; 1.529     ; 1.529     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; CLOCK_27[0] ; 1.539     ; 1.539     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; CLOCK_27[0] ; 1.528     ; 1.528     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; CLOCK_27[0] ; 1.528     ; 1.528     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; CLOCK_27[0] ; 1.456     ; 1.456     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; CLOCK_27[0] ; 1.456     ; 1.456     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; CLOCK_27[0] ; 1.473     ; 1.473     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; CLOCK_27[0] ; 1.473     ; 1.473     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; CLOCK_27[0] ; 1.472     ; 1.472     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; CLOCK_27[0] ; 1.472     ; 1.472     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; CLOCK_27[0] ; 1.481     ; 1.481     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; CLOCK_27[0] ; 1.481     ; 1.481     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
+---------------+-------------+-----------+-----------+------------+--------------------------------------------------------------------+


---------------------------------------------
; Slow 1200mV 0C Model Metastability Report ;
---------------------------------------------
No synchronizer chains to report.


+------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Setup Summary                                                             ;
+--------------------------------------------------------------------+-----------+---------------+
; Clock                                                              ; Slack     ; End Point TNS ;
+--------------------------------------------------------------------+-----------+---------------+
; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 1.405     ; 0.000         ;
; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 5.635     ; 0.000         ;
; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63997.115 ; 0.000         ;
+--------------------------------------------------------------------+-----------+---------------+


+--------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Hold Summary                                                          ;
+--------------------------------------------------------------------+-------+---------------+
; Clock                                                              ; Slack ; End Point TNS ;
+--------------------------------------------------------------------+-------+---------------+
; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.137 ; 0.000         ;
; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.187 ; 0.000         ;
; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.187 ; 0.000         ;
+--------------------------------------------------------------------+-------+---------------+


+---------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Recovery Summary                                                       ;
+--------------------------------------------------------------------+--------+---------------+
; Clock                                                              ; Slack  ; End Point TNS ;
+--------------------------------------------------------------------+--------+---------------+
; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 14.199 ; 0.000         ;
+--------------------------------------------------------------------+--------+---------------+


+--------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Removal Summary                                                       ;
+--------------------------------------------------------------------+-------+---------------+
; Clock                                                              ; Slack ; End Point TNS ;
+--------------------------------------------------------------------+-------+---------------+
; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.781 ; 0.000         ;
+--------------------------------------------------------------------+-------+---------------+


+------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Minimum Pulse Width Summary                                               ;
+--------------------------------------------------------------------+-----------+---------------+
; Clock                                                              ; Slack     ; End Point TNS ;
+--------------------------------------------------------------------+-----------+---------------+
; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 4.187     ; 0.000         ;
; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 8.557     ; 0.000         ;
; CLOCK_27[0]                                                        ; 17.928    ; 0.000         ;
; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0]  ; 24.978    ; 0.000         ;
; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 31999.751 ; 0.000         ;
+--------------------------------------------------------------------+-----------+---------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Setup: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                               ;
+--------+------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                                                                                                              ; To Node                                                                                                                   ; Launch Clock                                                       ; Latch Clock                                                        ; Relationship ; Clock Skew ; Data Delay ;
+--------+------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+
; 1.405  ; user_io:my_user_io|ps2_kbd_data                                                                                        ; ps2_to_atari800:keyboard_map1|ps2_keyboard:\gen_ps2_on:keyboard1|ps2_dat_reg                                              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 1.958        ; -0.093     ; 0.447      ;
; 1.458  ; user_io:my_user_io|Equal5~0_OTERM1                                                                                     ; ps2_to_atari800:keyboard_map1|ps2_keyboard:\gen_ps2_on:keyboard1|ps2_clk_reg                                              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 1.958        ; -0.093     ; 0.394      ;
; 1.791  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3]                                                     ; ps2_to_atari800:keyboard_map1|ps2_keyboard:\gen_ps2_on:keyboard1|ps2_clk_reg                                              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 1.958        ; 1.963      ; 2.117      ;
; 1.976  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3]                                                     ; ps2_to_atari800:keyboard_map1|ps2_keyboard:\gen_ps2_on:keyboard1|ps2_clk_reg                                              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 2.190        ; 1.963      ; 2.164      ;
; 7.099  ; sdram_statemachine:sdram_adaptor|data_out_reg[13]                                                                      ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[13]                                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 8.811        ; -0.085     ; 1.614      ;
; 7.101  ; sdram_statemachine:sdram_adaptor|data_out_reg[14]                                                                      ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[14]                                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 8.811        ; -0.085     ; 1.612      ;
; 7.217  ; sdram_statemachine:sdram_adaptor|data_out_reg[5]                                                                       ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[5]                                                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 8.811        ; -0.078     ; 1.503      ;
; 7.314  ; sdram_statemachine:sdram_adaptor|data_out_reg[8]                                                                       ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[8]                                                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 8.811        ; -0.085     ; 1.399      ;
; 7.315  ; sdram_statemachine:sdram_adaptor|data_out_reg[4]                                                                       ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[4]                                                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 8.811        ; 0.098      ; 1.581      ;
; 7.320  ; sdram_statemachine:sdram_adaptor|data_out_reg[12]                                                                      ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[12]                                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 8.811        ; -0.085     ; 1.393      ;
; 7.330  ; sdram_statemachine:sdram_adaptor|data_out_reg[9]                                                                       ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[9]                                                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 8.811        ; -0.085     ; 1.383      ;
; 7.364  ; sdram_statemachine:sdram_adaptor|data_out_reg[20]                                                                      ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[20]                                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 8.811        ; -0.036     ; 1.398      ;
; 7.398  ; sdram_statemachine:sdram_adaptor|data_out_reg[6]                                                                       ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[6]                                                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 8.811        ; -0.077     ; 1.323      ;
; 7.411  ; sdram_statemachine:sdram_adaptor|data_out_reg[11]                                                                      ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[11]                                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 8.811        ; -0.085     ; 1.302      ;
; 7.418  ; sdram_statemachine:sdram_adaptor|data_out_reg[22]                                                                      ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[22]                                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 8.811        ; -0.035     ; 1.345      ;
; 7.461  ; sdram_statemachine:sdram_adaptor|data_out_reg[15]                                                                      ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[15]                                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 8.811        ; -0.085     ; 1.252      ;
; 7.541  ; sdram_statemachine:sdram_adaptor|data_out_reg[27]                                                                      ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[27]                                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 8.811        ; -0.006     ; 1.251      ;
; 7.542  ; sdram_statemachine:sdram_adaptor|data_out_reg[10]                                                                      ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[10]                                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 8.811        ; -0.085     ; 1.171      ;
; 7.546  ; sdram_statemachine:sdram_adaptor|data_out_reg[30]                                                                      ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[30]                                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 8.811        ; -0.008     ; 1.244      ;
; 7.578  ; sdram_statemachine:sdram_adaptor|data_out_reg[21]                                                                      ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[21]                                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 8.811        ; -0.033     ; 1.187      ;
; 7.593  ; sdram_statemachine:sdram_adaptor|data_out_reg[28]                                                                      ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[28]                                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 8.811        ; -0.009     ; 1.196      ;
; 7.602  ; sdram_statemachine:sdram_adaptor|data_out_reg[26]                                                                      ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[26]                                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 8.811        ; -0.006     ; 1.190      ;
; 7.622  ; sdram_statemachine:sdram_adaptor|data_out_reg[23]                                                                      ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[23]                                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 8.811        ; -0.032     ; 1.144      ;
; 7.624  ; sdram_statemachine:sdram_adaptor|data_out_reg[0]                                                                       ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[0]                                                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 8.811        ; -0.084     ; 1.090      ;
; 7.646  ; sdram_statemachine:sdram_adaptor|reply_reg                                                                             ; sdram_statemachine:sdram_adaptor|reply_sreg                                                                               ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 8.811        ; -0.086     ; 1.066      ;
; 7.651  ; sdram_statemachine:sdram_adaptor|data_out_reg[2]                                                                       ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[2]                                                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 8.811        ; -0.084     ; 1.063      ;
; 7.689  ; sdram_statemachine:sdram_adaptor|data_out_reg[1]                                                                       ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[1]                                                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 8.811        ; -0.084     ; 1.025      ;
; 7.782  ; sdram_statemachine:sdram_adaptor|data_out_reg[3]                                                                       ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[3]                                                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 8.811        ; -0.084     ; 0.932      ;
; 7.788  ; sdram_statemachine:sdram_adaptor|data_out_reg[7]                                                                       ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[7]                                                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 8.811        ; -0.084     ; 0.926      ;
; 7.824  ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]                                                                    ; sdram_statemachine:sdram_adaptor|reset_client_n_reg                                                                       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 8.811        ; -0.091     ; 0.883      ;
; 7.853  ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]                                                                    ; sdram_statemachine:sdram_adaptor|reset_client_n_reg                                                                       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 8.811        ; -0.091     ; 0.854      ;
; 7.873  ; sdram_statemachine:sdram_adaptor|data_out_reg[24]                                                                      ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[24]                                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 8.811        ; -0.002     ; 0.923      ;
; 7.916  ; sdram_statemachine:sdram_adaptor|data_out_reg[29]                                                                      ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[29]                                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 8.811        ; 0.004      ; 0.886      ;
; 8.026  ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]                                                                    ; sdram_statemachine:sdram_adaptor|reset_client_n_reg                                                                       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 8.811        ; -0.091     ; 0.681      ;
; 8.207  ; sdram_statemachine:sdram_adaptor|data_out_reg[25]                                                                      ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[25]                                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 8.811        ; 0.002      ; 0.593      ;
; 8.207  ; sdram_statemachine:sdram_adaptor|data_out_reg[16]                                                                      ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[16]                                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 8.811        ; 0.002      ; 0.593      ;
; 8.211  ; sdram_statemachine:sdram_adaptor|data_out_reg[19]                                                                      ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[19]                                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 8.811        ; 0.002      ; 0.589      ;
; 8.215  ; sdram_statemachine:sdram_adaptor|data_out_reg[17]                                                                      ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[17]                                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 8.811        ; 0.003      ; 0.586      ;
; 8.216  ; sdram_statemachine:sdram_adaptor|data_out_reg[31]                                                                      ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[31]                                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 8.811        ; 0.009      ; 0.591      ;
; 8.218  ; sdram_statemachine:sdram_adaptor|data_out_reg[18]                                                                      ; sdram_statemachine:sdram_adaptor|DATA_OUT_sreg[18]                                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 8.811        ; 0.002      ; 0.582      ;
; 10.176 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]_NEW204_OTERM1405 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.038     ; 7.394      ;
; 10.188 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[4]_NEW192_OTERM1403  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.038     ; 7.382      ;
; 10.188 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.038     ; 7.382      ;
; 10.196 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[12]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.038     ; 7.374      ;
; 10.273 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]_NEW204_OTERM1405 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.045     ; 7.290      ;
; 10.284 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]_NEW204_OTERM1405 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.038     ; 7.286      ;
; 10.285 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[4]_NEW192_OTERM1403  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.045     ; 7.278      ;
; 10.285 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.045     ; 7.278      ;
; 10.293 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[12]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.045     ; 7.270      ;
; 10.296 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[4]_NEW192_OTERM1403  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.038     ; 7.274      ;
; 10.296 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.038     ; 7.274      ;
; 10.302 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[11]_NEW200_OTERM1391 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.061     ; 7.245      ;
; 10.302 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[1]                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.061     ; 7.245      ;
; 10.304 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[12]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.038     ; 7.266      ;
; 10.306 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[5]_NEW194_OTERM1399  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.061     ; 7.241      ;
; 10.309 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[3]_NEW212_OTERM1401  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.061     ; 7.238      ;
; 10.309 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[2]                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.061     ; 7.238      ;
; 10.366 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|addr_r[12]                                                       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[31]_OTERM19_OTERM349                                            ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.051     ; 7.191      ;
; 10.370 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|addr_r[12]                                                       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[30]_OTERM27_OTERM357                                            ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.051     ; 7.187      ;
; 10.389 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]_NEW204_OTERM1405 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.037     ; 7.182      ;
; 10.401 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[4]_NEW192_OTERM1403  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.037     ; 7.170      ;
; 10.401 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.037     ; 7.170      ;
; 10.404 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]              ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]_NEW204_OTERM1405 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.037     ; 7.167      ;
; 10.404 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]_NEW204_OTERM1405 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.038     ; 7.166      ;
; 10.406 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]              ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]_NEW204_OTERM1405 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.037     ; 7.165      ;
; 10.409 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_memory_fetch_pending_reg                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[12]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.037     ; 7.162      ;
; 10.409 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[11]_NEW200_OTERM1391 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.058     ; 7.141      ;
; 10.409 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[1]                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.058     ; 7.141      ;
; 10.410 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[11]_NEW200_OTERM1391 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.061     ; 7.137      ;
; 10.410 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[1]                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.061     ; 7.137      ;
; 10.413 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[5]_NEW194_OTERM1399  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.058     ; 7.137      ;
; 10.414 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[5]_NEW194_OTERM1399  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.061     ; 7.133      ;
; 10.416 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]              ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[4]_NEW192_OTERM1403  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.037     ; 7.155      ;
; 10.416 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[4]_NEW192_OTERM1403  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.038     ; 7.154      ;
; 10.416 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]              ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.037     ; 7.155      ;
; 10.416 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.038     ; 7.154      ;
; 10.416 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[3]_NEW212_OTERM1401  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.058     ; 7.134      ;
; 10.416 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[15] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[2]                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.058     ; 7.134      ;
; 10.417 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[3]_NEW212_OTERM1401  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.061     ; 7.130      ;
; 10.417 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[2]                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.061     ; 7.130      ;
; 10.418 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]              ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[4]_NEW192_OTERM1403  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.037     ; 7.153      ;
; 10.418 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]              ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.037     ; 7.153      ;
; 10.424 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[1]              ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[12]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.037     ; 7.147      ;
; 10.424 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|allow_real_dma_reg                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[12]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.038     ; 7.146      ;
; 10.426 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|state_reg[0]              ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[12]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.037     ; 7.145      ;
; 10.429 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]_NEW204_OTERM1405 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.023     ; 7.156      ;
; 10.434 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|addr_r[12]                                                       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[29]_OTERM33_OTERM361                                            ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.051     ; 7.123      ;
; 10.436 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[6]_NEW190_OTERM1393  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; 0.150      ; 7.322      ;
; 10.437 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pot1_reg[1]                          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.050     ; 7.121      ;
; 10.438 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|addr_r[12]                                                       ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|a_r[28]_OTERM39_OTERM365                                            ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.051     ; 7.119      ;
; 10.439 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_reg                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[14]_NEW198_OTERM1397 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; 0.150      ; 7.319      ;
; 10.441 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[4]_NEW192_OTERM1403  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.023     ; 7.144      ;
; 10.441 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.023     ; 7.144      ;
; 10.443 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_out_OTERM3              ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]_NEW204_OTERM1405 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.037     ; 7.128      ;
; 10.446 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|cpu_extra_enable_reg     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]_NEW204_OTERM1405 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.023     ; 7.139      ;
; 10.449 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|speed_shift_reg[0]       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[12]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.023     ; 7.136      ;
; 10.455 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_out_OTERM3              ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[4]_NEW192_OTERM1403  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.037     ; 7.116      ;
; 10.455 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_fetch_out_OTERM3              ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.037     ; 7.116      ;
; 10.456 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|myAddr[12] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]_NEW204_OTERM1405 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.045     ; 7.107      ;
; 10.458 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|shared_enable:enables|cpu_extra_enable_reg     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[4]_NEW192_OTERM1403  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.023     ; 7.127      ;
+--------+------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Setup: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                             ;
+-------+-----------------------------------------------------+-------------------------------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                           ; To Node                                                     ; Launch Clock                                                       ; Latch Clock                                                        ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------------------+-------------------------------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+
; 5.635 ; sdram_statemachine:sdram_adaptor|delay_reg[3]       ; sdram_statemachine:sdram_adaptor|dq_out_reg[7]              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.044     ; 3.071      ;
; 5.732 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1] ; sdram_statemachine:sdram_adaptor|dq_out_reg[7]              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.043     ; 2.975      ;
; 5.751 ; sdram_statemachine:sdram_adaptor|delay_reg[3]       ; sdram_statemachine:sdram_adaptor|dq_out_reg[14]             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.080     ; 2.919      ;
; 5.758 ; sdram_statemachine:sdram_adaptor|delay_reg[3]       ; sdram_statemachine:sdram_adaptor|dq_out_reg[11]             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.078     ; 2.914      ;
; 5.793 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1] ; sdram_statemachine:sdram_adaptor|addr_reg[4]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.073     ; 2.884      ;
; 5.793 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1] ; sdram_statemachine:sdram_adaptor|addr_reg[5]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.075     ; 2.882      ;
; 5.795 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0] ; sdram_statemachine:sdram_adaptor|dq_out_reg[7]              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.043     ; 2.912      ;
; 5.817 ; sdram_statemachine:sdram_adaptor|delay_reg[3]       ; sdram_statemachine:sdram_adaptor|dq_out_reg[12]             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.079     ; 2.854      ;
; 5.833 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; sdram_statemachine:sdram_adaptor|addr_reg[6]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.080     ; 2.837      ;
; 5.848 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1] ; sdram_statemachine:sdram_adaptor|dq_out_reg[14]             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.079     ; 2.823      ;
; 5.850 ; sdram_statemachine:sdram_adaptor|delay_reg[3]       ; sdram_statemachine:sdram_adaptor|dq_out_reg[15]             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.080     ; 2.820      ;
; 5.855 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1] ; sdram_statemachine:sdram_adaptor|dq_out_reg[11]             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.077     ; 2.818      ;
; 5.859 ; sdram_statemachine:sdram_adaptor|delay_reg[3]       ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.044     ; 2.847      ;
; 5.883 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; sdram_statemachine:sdram_adaptor|dq_out_reg[7]              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.043     ; 2.824      ;
; 5.898 ; sdram_statemachine:sdram_adaptor|delay_reg[1]       ; sdram_statemachine:sdram_adaptor|addr_reg[4]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.074     ; 2.778      ;
; 5.898 ; sdram_statemachine:sdram_adaptor|delay_reg[1]       ; sdram_statemachine:sdram_adaptor|addr_reg[5]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.076     ; 2.776      ;
; 5.911 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0] ; sdram_statemachine:sdram_adaptor|dq_out_reg[14]             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.079     ; 2.760      ;
; 5.912 ; sdram_statemachine:sdram_adaptor|delay_reg[3]       ; sdram_statemachine:sdram_adaptor|addr_reg[9]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.078     ; 2.760      ;
; 5.914 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1] ; sdram_statemachine:sdram_adaptor|dq_out_reg[12]             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.078     ; 2.758      ;
; 5.916 ; sdram_statemachine:sdram_adaptor|delay_reg[3]       ; sdram_statemachine:sdram_adaptor|addr_reg[11]               ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.080     ; 2.754      ;
; 5.918 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0] ; sdram_statemachine:sdram_adaptor|dq_out_reg[11]             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.077     ; 2.755      ;
; 5.925 ; sdram_statemachine:sdram_adaptor|delay_reg[3]       ; sdram_statemachine:sdram_adaptor|addr_reg[6]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.081     ; 2.744      ;
; 5.933 ; sdram_statemachine:sdram_adaptor|delay_reg[3]       ; sdram_statemachine:sdram_adaptor|dq_out_reg[8]              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.072     ; 2.745      ;
; 5.945 ; sdram_statemachine:sdram_adaptor|delay_reg[3]       ; sdram_statemachine:sdram_adaptor|addr_reg[8]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.077     ; 2.728      ;
; 5.947 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1] ; sdram_statemachine:sdram_adaptor|dq_out_reg[15]             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.079     ; 2.724      ;
; 5.949 ; sdram_statemachine:sdram_adaptor|delay_reg[1]       ; sdram_statemachine:sdram_adaptor|addr_reg[9]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.078     ; 2.723      ;
; 5.951 ; sdram_statemachine:sdram_adaptor|delay_reg[3]       ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.071     ; 2.728      ;
; 5.953 ; sdram_statemachine:sdram_adaptor|delay_reg[1]       ; sdram_statemachine:sdram_adaptor|addr_reg[11]               ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.080     ; 2.717      ;
; 5.956 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1] ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.043     ; 2.751      ;
; 5.977 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0] ; sdram_statemachine:sdram_adaptor|dq_out_reg[12]             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.078     ; 2.695      ;
; 5.978 ; sdram_statemachine:sdram_adaptor|delay_reg[0]       ; sdram_statemachine:sdram_adaptor|addr_reg[4]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.074     ; 2.698      ;
; 5.978 ; sdram_statemachine:sdram_adaptor|delay_reg[0]       ; sdram_statemachine:sdram_adaptor|addr_reg[5]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.076     ; 2.696      ;
; 5.979 ; sdram_statemachine:sdram_adaptor|delay_reg[0]       ; sdram_statemachine:sdram_adaptor|addr_reg[6]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.081     ; 2.690      ;
; 5.982 ; sdram_statemachine:sdram_adaptor|delay_reg[1]       ; sdram_statemachine:sdram_adaptor|addr_reg[8]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.077     ; 2.691      ;
; 5.986 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; sdram_statemachine:sdram_adaptor|addr_reg[7]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.076     ; 2.688      ;
; 5.999 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; sdram_statemachine:sdram_adaptor|dq_out_reg[14]             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.079     ; 2.672      ;
; 6.010 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0] ; sdram_statemachine:sdram_adaptor|dq_out_reg[15]             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.079     ; 2.661      ;
; 6.011 ; sdram_statemachine:sdram_adaptor|delay_reg[3]       ; sdram_statemachine:sdram_adaptor|addr_reg[10]               ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.055     ; 2.684      ;
; 6.014 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; sdram_statemachine:sdram_adaptor|dq_out_reg[11]             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.077     ; 2.659      ;
; 6.019 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0] ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.043     ; 2.688      ;
; 6.022 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; sdram_statemachine:sdram_adaptor|addr_reg[4]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.073     ; 2.655      ;
; 6.022 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; sdram_statemachine:sdram_adaptor|addr_reg[5]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.075     ; 2.653      ;
; 6.030 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1] ; sdram_statemachine:sdram_adaptor|dq_out_reg[8]              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.071     ; 2.649      ;
; 6.031 ; sdram_statemachine:sdram_adaptor|delay_reg[0]       ; sdram_statemachine:sdram_adaptor|addr_reg[9]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.078     ; 2.641      ;
; 6.034 ; sdram_statemachine:sdram_adaptor|delay_reg[2]       ; sdram_statemachine:sdram_adaptor|dq_out_reg[7]              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.044     ; 2.672      ;
; 6.035 ; sdram_statemachine:sdram_adaptor|delay_reg[0]       ; sdram_statemachine:sdram_adaptor|addr_reg[11]               ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.080     ; 2.635      ;
; 6.036 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; sdram_statemachine:sdram_adaptor|dq_out_reg[12]             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.078     ; 2.636      ;
; 6.040 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; sdram_statemachine:sdram_adaptor|addr_reg[3]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.053     ; 2.657      ;
; 6.048 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1] ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.070     ; 2.632      ;
; 6.048 ; sdram_statemachine:sdram_adaptor|delay_reg[1]       ; sdram_statemachine:sdram_adaptor|addr_reg[10]               ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.055     ; 2.647      ;
; 6.051 ; sdram_statemachine:sdram_adaptor|delay_reg[3]       ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.079     ; 2.620      ;
; 6.055 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0] ; sdram_statemachine:sdram_adaptor|addr_reg[6]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.080     ; 2.615      ;
; 6.064 ; sdram_statemachine:sdram_adaptor|delay_reg[0]       ; sdram_statemachine:sdram_adaptor|addr_reg[8]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.077     ; 2.609      ;
; 6.078 ; sdram_statemachine:sdram_adaptor|delay_reg[3]       ; sdram_statemachine:sdram_adaptor|addr_reg[7]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.077     ; 2.595      ;
; 6.086 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; sdram_statemachine:sdram_adaptor|addr_reg[9]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.077     ; 2.587      ;
; 6.090 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; sdram_statemachine:sdram_adaptor|addr_reg[11]               ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.079     ; 2.581      ;
; 6.093 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0] ; sdram_statemachine:sdram_adaptor|dq_out_reg[8]              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.071     ; 2.586      ;
; 6.094 ; sdram_statemachine:sdram_adaptor|delay_reg[3]       ; sdram_statemachine:sdram_adaptor|dq_out_reg[2]              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.071     ; 2.585      ;
; 6.094 ; sdram_statemachine:sdram_adaptor|delay_reg[5]       ; sdram_statemachine:sdram_adaptor|addr_reg[6]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.081     ; 2.575      ;
; 6.098 ; sdram_statemachine:sdram_adaptor|delay_reg[2]       ; sdram_statemachine:sdram_adaptor|addr_reg[9]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.078     ; 2.574      ;
; 6.102 ; sdram_statemachine:sdram_adaptor|delay_reg[2]       ; sdram_statemachine:sdram_adaptor|addr_reg[11]               ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.080     ; 2.568      ;
; 6.104 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; sdram_statemachine:sdram_adaptor|dq_out_reg[15]             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.079     ; 2.567      ;
; 6.111 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0] ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.070     ; 2.569      ;
; 6.115 ; sdram_statemachine:sdram_adaptor|delay_reg[4]       ; sdram_statemachine:sdram_adaptor|addr_reg[6]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.081     ; 2.554      ;
; 6.116 ; sdram_statemachine:sdram_adaptor|delay_reg[1]       ; sdram_statemachine:sdram_adaptor|dq_out_reg[7]              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.044     ; 2.590      ;
; 6.119 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; sdram_statemachine:sdram_adaptor|addr_reg[8]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.076     ; 2.555      ;
; 6.123 ; sdram_statemachine:sdram_adaptor|delay_reg[2]       ; sdram_statemachine:sdram_adaptor|addr_reg[4]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.074     ; 2.553      ;
; 6.123 ; sdram_statemachine:sdram_adaptor|delay_reg[2]       ; sdram_statemachine:sdram_adaptor|addr_reg[5]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.076     ; 2.551      ;
; 6.125 ; sdram_statemachine:sdram_adaptor|delay_reg[1]       ; sdram_statemachine:sdram_adaptor|addr_reg[6]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.081     ; 2.544      ;
; 6.125 ; sdram_statemachine:sdram_adaptor|delay_reg[2]       ; sdram_statemachine:sdram_adaptor|addr_reg[6]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.081     ; 2.544      ;
; 6.130 ; sdram_statemachine:sdram_adaptor|delay_reg[0]       ; sdram_statemachine:sdram_adaptor|addr_reg[10]               ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.055     ; 2.565      ;
; 6.131 ; sdram_statemachine:sdram_adaptor|delay_reg[2]       ; sdram_statemachine:sdram_adaptor|addr_reg[8]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.077     ; 2.542      ;
; 6.132 ; sdram_statemachine:sdram_adaptor|delay_reg[3]       ; sdram_statemachine:sdram_adaptor|addr_reg[3]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.054     ; 2.564      ;
; 6.132 ; sdram_statemachine:sdram_adaptor|delay_reg[0]       ; sdram_statemachine:sdram_adaptor|addr_reg[7]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.077     ; 2.541      ;
; 6.139 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1] ; sdram_statemachine:sdram_adaptor|addr_reg[6]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.080     ; 2.531      ;
; 6.142 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; sdram_statemachine:sdram_adaptor|dq_out_reg[6]              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.043     ; 2.565      ;
; 6.148 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1] ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.078     ; 2.524      ;
; 6.150 ; sdram_statemachine:sdram_adaptor|delay_reg[2]       ; sdram_statemachine:sdram_adaptor|dq_out_reg[14]             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.080     ; 2.520      ;
; 6.165 ; sdram_statemachine:sdram_adaptor|delay_reg[2]       ; sdram_statemachine:sdram_adaptor|dq_out_reg[11]             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.078     ; 2.507      ;
; 6.173 ; sdram_statemachine:sdram_adaptor|delay_reg[0]       ; sdram_statemachine:sdram_adaptor|dq_out_reg[7]              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.044     ; 2.533      ;
; 6.178 ; sdram_statemachine:sdram_adaptor|delay_reg[3]       ; sdram_statemachine:sdram_adaptor|dq_out_reg[0]              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.075     ; 2.497      ;
; 6.179 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; sdram_statemachine:sdram_adaptor|addr_reg[1]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.054     ; 2.517      ;
; 6.185 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; sdram_statemachine:sdram_adaptor|addr_reg[10]               ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.054     ; 2.511      ;
; 6.186 ; sdram_statemachine:sdram_adaptor|delay_reg[0]       ; sdram_statemachine:sdram_adaptor|addr_reg[3]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.054     ; 2.510      ;
; 6.187 ; sdram_statemachine:sdram_adaptor|delay_reg[1]       ; sdram_statemachine:sdram_adaptor|dq_output_reg~_Duplicate_1 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.088     ; 2.463      ;
; 6.187 ; sdram_statemachine:sdram_adaptor|delay_reg[2]       ; sdram_statemachine:sdram_adaptor|dq_out_reg[12]             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.079     ; 2.484      ;
; 6.191 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1] ; sdram_statemachine:sdram_adaptor|dq_out_reg[2]              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.070     ; 2.489      ;
; 6.197 ; sdram_statemachine:sdram_adaptor|delay_reg[2]       ; sdram_statemachine:sdram_adaptor|addr_reg[10]               ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.055     ; 2.498      ;
; 6.207 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1] ; sdram_statemachine:sdram_adaptor|addr_reg[0]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.055     ; 2.488      ;
; 6.208 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0] ; sdram_statemachine:sdram_adaptor|addr_reg[7]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.076     ; 2.466      ;
; 6.209 ; sdram_statemachine:sdram_adaptor|delay_reg[1]       ; sdram_statemachine:sdram_adaptor|dq_output_reg              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.084     ; 2.445      ;
; 6.211 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0] ; sdram_statemachine:sdram_adaptor|dq_out_reg[13]             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.078     ; 2.461      ;
; 6.216 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0] ; sdram_statemachine:sdram_adaptor|addr_reg[9]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.077     ; 2.457      ;
; 6.217 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1] ; sdram_statemachine:sdram_adaptor|addr_reg[9]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.077     ; 2.456      ;
; 6.218 ; sdram_statemachine:sdram_adaptor|delay_reg[3]       ; sdram_statemachine:sdram_adaptor|dq_out_reg[1]              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.079     ; 2.453      ;
; 6.220 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0] ; sdram_statemachine:sdram_adaptor|addr_reg[11]               ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.079     ; 2.451      ;
; 6.221 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1] ; sdram_statemachine:sdram_adaptor|addr_reg[11]               ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.079     ; 2.450      ;
; 6.222 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; sdram_statemachine:sdram_adaptor|dq_out_reg[3]              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.070     ; 2.458      ;
; 6.222 ; sdram_statemachine:sdram_adaptor|ADDRESS_IN_sreg[3] ; sdram_statemachine:sdram_adaptor|addr_reg[3]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.107     ; 2.421      ;
; 6.232 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2] ; sdram_statemachine:sdram_adaptor|dq_out_reg[8]              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 8.810        ; -0.071     ; 2.447      ;
+-------+-----------------------------------------------------+-------------------------------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Setup: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3]'                                                                                                                                                                       ;
+-----------+------------------------------------+------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+
; Slack     ; From Node                          ; To Node                            ; Launch Clock                                                       ; Latch Clock                                                        ; Relationship ; Clock Skew ; Data Delay ;
+-----------+------------------------------------+------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+
; 63997.115 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|Equal5~0_OTERM1 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.035     ; 2.773      ;
; 63997.270 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_tx_state[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.035     ; 2.618      ;
; 63997.275 ; user_io:my_user_io|ps2_rptr[1]     ; user_io:my_user_io|Equal5~0_OTERM1 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.035     ; 2.613      ;
; 63997.408 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_tx_byte[7]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.036     ; 2.479      ;
; 63997.428 ; user_io:my_user_io|ps2_rptr[1]     ; user_io:my_user_io|ps2_tx_state[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.035     ; 2.460      ;
; 63997.566 ; user_io:my_user_io|ps2_rptr[1]     ; user_io:my_user_io|ps2_tx_byte[7]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.036     ; 2.321      ;
; 63997.609 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_tx_byte[0]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.036     ; 2.278      ;
; 63997.669 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_kbd_data    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.035     ; 2.219      ;
; 63997.677 ; user_io:my_user_io|ps2_rptr[1]     ; user_io:my_user_io|ps2_tx_byte[1]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.036     ; 2.210      ;
; 63997.680 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_tx_byte[6]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.036     ; 2.207      ;
; 63997.680 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_tx_byte[5]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.036     ; 2.207      ;
; 63997.680 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_tx_byte[4]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.036     ; 2.207      ;
; 63997.680 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_tx_byte[3]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.036     ; 2.207      ;
; 63997.680 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_tx_byte[2]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.036     ; 2.207      ;
; 63997.680 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_tx_byte[1]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.036     ; 2.207      ;
; 63997.680 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_parity      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.036     ; 2.207      ;
; 63997.691 ; user_io:my_user_io|ps2_rptr[1]     ; user_io:my_user_io|ps2_tx_byte[2]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.036     ; 2.196      ;
; 63997.812 ; user_io:my_user_io|ps2_rptr[1]     ; user_io:my_user_io|ps2_tx_byte[5]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.036     ; 2.075      ;
; 63997.827 ; user_io:my_user_io|ps2_rptr[1]     ; user_io:my_user_io|ps2_kbd_data    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.035     ; 2.061      ;
; 63997.838 ; user_io:my_user_io|ps2_rptr[1]     ; user_io:my_user_io|ps2_tx_byte[6]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.036     ; 2.049      ;
; 63997.838 ; user_io:my_user_io|ps2_rptr[1]     ; user_io:my_user_io|ps2_tx_byte[4]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.036     ; 2.049      ;
; 63997.838 ; user_io:my_user_io|ps2_rptr[1]     ; user_io:my_user_io|ps2_tx_byte[3]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.036     ; 2.049      ;
; 63997.838 ; user_io:my_user_io|ps2_rptr[1]     ; user_io:my_user_io|ps2_tx_byte[0]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.036     ; 2.049      ;
; 63997.838 ; user_io:my_user_io|ps2_rptr[1]     ; user_io:my_user_io|ps2_parity      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.036     ; 2.049      ;
; 63997.968 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_r_inc       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.036     ; 1.919      ;
; 63998.126 ; user_io:my_user_io|ps2_rptr[1]     ; user_io:my_user_io|ps2_r_inc       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.036     ; 1.761      ;
; 63998.450 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|Equal5~0_OTERM1 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.036     ; 1.437      ;
; 63998.507 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|ps2_tx_byte[6]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.037     ; 1.379      ;
; 63998.507 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|ps2_tx_byte[5]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.037     ; 1.379      ;
; 63998.507 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|ps2_tx_byte[4]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.037     ; 1.379      ;
; 63998.507 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|ps2_tx_byte[3]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.037     ; 1.379      ;
; 63998.507 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|ps2_tx_byte[2]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.037     ; 1.379      ;
; 63998.507 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|ps2_tx_byte[1]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.037     ; 1.379      ;
; 63998.507 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|ps2_tx_byte[0]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.037     ; 1.379      ;
; 63998.507 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|ps2_parity      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.037     ; 1.379      ;
; 63998.511 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|ps2_tx_byte[6]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.037     ; 1.375      ;
; 63998.511 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|ps2_tx_byte[5]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.037     ; 1.375      ;
; 63998.511 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|ps2_tx_byte[4]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.037     ; 1.375      ;
; 63998.511 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|ps2_tx_byte[3]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.037     ; 1.375      ;
; 63998.511 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|ps2_tx_byte[2]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.037     ; 1.375      ;
; 63998.511 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|ps2_tx_byte[1]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.037     ; 1.375      ;
; 63998.511 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|ps2_tx_byte[0]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.037     ; 1.375      ;
; 63998.511 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|ps2_parity      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.037     ; 1.375      ;
; 63998.533 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|Equal5~0_OTERM1 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.035     ; 1.355      ;
; 63998.596 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_tx_byte[6]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.037     ; 1.290      ;
; 63998.596 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_tx_byte[5]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.037     ; 1.290      ;
; 63998.596 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_tx_byte[4]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.037     ; 1.290      ;
; 63998.596 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_tx_byte[3]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.037     ; 1.290      ;
; 63998.596 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_tx_byte[2]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.037     ; 1.290      ;
; 63998.596 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_tx_byte[1]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.037     ; 1.290      ;
; 63998.596 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_tx_byte[0]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.037     ; 1.290      ;
; 63998.596 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_parity      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.037     ; 1.290      ;
; 63998.605 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_tx_state[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.036     ; 1.282      ;
; 63998.664 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_tx_byte[6]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.037     ; 1.222      ;
; 63998.664 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_tx_byte[5]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.037     ; 1.222      ;
; 63998.664 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_tx_byte[4]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.037     ; 1.222      ;
; 63998.664 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_tx_byte[3]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.037     ; 1.222      ;
; 63998.664 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_tx_byte[2]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.037     ; 1.222      ;
; 63998.664 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_tx_byte[1]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.037     ; 1.222      ;
; 63998.664 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_tx_byte[0]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.037     ; 1.222      ;
; 63998.664 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_parity      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.037     ; 1.222      ;
; 63998.688 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_tx_state[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.035     ; 1.200      ;
; 63998.736 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_kbd_data    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.035     ; 1.152      ;
; 63998.771 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_tx_byte[7]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.037     ; 1.115      ;
; 63998.797 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|Equal5~0_OTERM1 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.036     ; 1.090      ;
; 63998.813 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|Equal5~0_OTERM1 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.036     ; 1.074      ;
; 63998.844 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_tx_byte[6]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.037     ; 1.042      ;
; 63998.844 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_tx_byte[5]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.037     ; 1.042      ;
; 63998.844 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_tx_byte[4]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.037     ; 1.042      ;
; 63998.844 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_tx_byte[3]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.037     ; 1.042      ;
; 63998.844 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_tx_byte[2]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.037     ; 1.042      ;
; 63998.844 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_tx_byte[1]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.037     ; 1.042      ;
; 63998.844 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_tx_byte[0]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.037     ; 1.042      ;
; 63998.844 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_parity      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.037     ; 1.042      ;
; 63998.861 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_tx_byte[7]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.036     ; 1.026      ;
; 63998.883 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|Equal5~0_OTERM1 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.036     ; 1.004      ;
; 63998.893 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_tx_byte[6]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.036     ; 0.994      ;
; 63998.893 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_tx_byte[5]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.036     ; 0.994      ;
; 63998.893 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_tx_byte[4]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.036     ; 0.994      ;
; 63998.893 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_tx_byte[3]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.036     ; 0.994      ;
; 63998.893 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_tx_byte[2]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.036     ; 0.994      ;
; 63998.893 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_tx_byte[1]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.036     ; 0.994      ;
; 63998.893 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_tx_byte[0]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.036     ; 0.994      ;
; 63998.893 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_parity      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.036     ; 0.994      ;
; 63998.935 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|ps2_kbd_data    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.036     ; 0.952      ;
; 63998.937 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|ps2_tx_state[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.036     ; 0.950      ;
; 63998.951 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|Equal5~0_OTERM1 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.036     ; 0.936      ;
; 63998.951 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|ps2_kbd_data    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.036     ; 0.936      ;
; 63998.953 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|ps2_tx_state[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.036     ; 0.934      ;
; 63999.021 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_kbd_data    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.036     ; 0.866      ;
; 63999.023 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_tx_state[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.036     ; 0.864      ;
; 63999.089 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_kbd_data    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.036     ; 0.798      ;
; 63999.091 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_tx_state[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.036     ; 0.796      ;
; 63999.103 ; user_io:my_user_io|ps2_tx_byte[0]  ; user_io:my_user_io|ps2_kbd_data    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.035     ; 0.785      ;
; 63999.124 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|ps2_tx_state[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.036     ; 0.763      ;
; 63999.124 ; user_io:my_user_io|ps2_kbd_data    ; user_io:my_user_io|ps2_kbd_data    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.036     ; 0.763      ;
; 63999.130 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|ps2_tx_state[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.036     ; 0.757      ;
; 63999.160 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|ps2_tx_state[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.036     ; 0.727      ;
; 63999.175 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|ps2_tx_state[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.036     ; 0.712      ;
; 63999.180 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_kbd_data    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63999.936    ; -0.036     ; 0.707      ;
+-----------+------------------------------------+------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Hold: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                     ;
+-------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                                                                     ; To Node                                                                                                                                                                                                                                  ; Launch Clock                                                       ; Latch Clock                                                        ; Relationship ; Clock Skew ; Data Delay ;
+-------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+
; 0.137 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm0_raw_reg[5]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a0~porta_datain_reg0   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.223      ; 0.464      ;
; 0.139 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|chbase_raw_reg[7]                                                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_amm:auto_generated|altsyncram_74b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.224      ; 0.467      ;
; 0.141 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[6]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a0~porta_datain_reg0   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.224      ; 0.469      ;
; 0.145 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm0_raw_reg[6]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a0~porta_datain_reg0   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.223      ; 0.472      ;
; 0.145 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm0_raw_reg[3]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a0~porta_datain_reg0   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.223      ; 0.472      ;
; 0.147 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[0]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a0~porta_datain_reg0   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.224      ; 0.475      ;
; 0.148 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm0_raw_reg[7]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a0~porta_datain_reg0   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.223      ; 0.475      ;
; 0.150 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm2_raw_reg[2]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a0~porta_datain_reg0   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.224      ; 0.478      ;
; 0.152 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm0_raw_reg[0]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a0~porta_datain_reg0   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.223      ; 0.479      ;
; 0.154 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|vscrol_raw_reg[0]                                                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4mm:auto_generated|altsyncram_p3b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.224      ; 0.482      ;
; 0.158 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[5]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a0~porta_datain_reg0   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.224      ; 0.486      ;
; 0.158 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp3_raw_reg[6]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a0~porta_datain_reg0   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.219      ; 0.481      ;
; 0.158 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp3_raw_reg[3]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a0~porta_datain_reg0   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.223      ; 0.485      ;
; 0.159 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|vscrol_raw_reg[1]                                                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4mm:auto_generated|altsyncram_p3b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.224      ; 0.487      ;
; 0.159 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm0_raw_reg[2]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a0~porta_datain_reg0   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.223      ; 0.486      ;
; 0.160 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[1]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a0~porta_datain_reg0   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.224      ; 0.488      ;
; 0.161 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|cntr_tnf:cntr1|counter_reg_bit[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a8~portb_address_reg0  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.225      ; 0.490      ;
; 0.161 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm0_raw_reg[1]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a0~porta_datain_reg0   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.223      ; 0.488      ;
; 0.161 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[7]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a0~porta_datain_reg0   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.224      ; 0.489      ;
; 0.161 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[2]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a0~porta_datain_reg0   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.224      ; 0.489      ;
; 0.162 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|cntr_tnf:cntr1|counter_reg_bit[0] ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a8~porta_address_reg0  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.223      ; 0.489      ;
; 0.164 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmien_raw_reg[7]                                                                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4mm:auto_generated|altsyncram_p3b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.222      ; 0.490      ;
; 0.166 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm1_raw_reg[0]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a8~porta_datain_reg0   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.491      ;
; 0.166 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm3_raw_reg[4]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a0~porta_datain_reg0   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.224      ; 0.494      ;
; 0.167 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm1_raw_reg[5]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a8~porta_datain_reg0   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.492      ;
; 0.167 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm1_raw_reg[3]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a8~porta_datain_reg0   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.492      ;
; 0.168 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|vscrol_raw_reg[3]                                                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4mm:auto_generated|altsyncram_p3b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.224      ; 0.496      ;
; 0.169 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm0_raw_reg[4]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a0~porta_datain_reg0   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.223      ; 0.496      ;
; 0.173 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|cntr_rnf:cntr1|counter_reg_bit[0]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|altsyncram_h3b1:altsyncram2|ram_block5a0~portb_address_reg0   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.223      ; 0.500      ;
; 0.174 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|cntr_rnf:cntr1|counter_reg_bit[0]  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|altsyncram_h3b1:altsyncram2|ram_block5a0~porta_address_reg0   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.499      ;
; 0.178 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[6]_NEW190_OTERM1393                                                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[6]_NEW190_OTERM1393                                                                                                                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.045      ; 0.307      ;
; 0.178 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|FreezerLogic:freezer|state[0]                                                                                    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|FreezerLogic:freezer|state[0]                                                                                                               ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.045      ; 0.307      ;
; 0.178 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[14]_NEW198_OTERM1397                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[14]_NEW198_OTERM1397                                                                                                                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.045      ; 0.307      ;
; 0.178 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|idim_r                                                                                                                                                  ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|idim_r                                                                                                                                                                             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.045      ; 0.307      ;
; 0.178 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposp0_raw_reg[4]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a0~porta_datain_reg0   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.213      ; 0.495      ;
; 0.180 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|hposm1_raw_reg[4]                                                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a8~porta_datain_reg0   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.221      ; 0.505      ;
; 0.181 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmien_raw_reg[6]                                                                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4mm:auto_generated|altsyncram_p3b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.222      ; 0.507      ;
; 0.185 ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[6]                                                                                                                                                             ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[6]                                                                                                                                                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[9]                                                                                                                                                               ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[9]                                                                                                                                                                                          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; ps2_to_atari800:keyboard_map1|ps2_keyboard:\gen_ps2_on:keyboard1|pending_extended_reg                                                                                                                         ; ps2_to_atari800:keyboard_map1|ps2_keyboard:\gen_ps2_on:keyboard1|pending_extended_reg                                                                                                                                                    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; ps2_to_atari800:keyboard_map1|ps2_keyboard:\gen_ps2_on:keyboard1|pending_keyup_reg                                                                                                                            ; ps2_to_atari800:keyboard_map1|ps2_keyboard:\gen_ps2_on:keyboard1|pending_keyup_reg                                                                                                                                                       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[2]                                                                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[2]                                                                                                                                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[27]                                                                                                                                                              ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[27]                                                                                                                                                                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[4]                                                                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|ADDR_reg[4]                                                                                                                                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[4]_NEW192_OTERM1403                                                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[4]_NEW192_OTERM1403                                                                                                                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[46]                                                                                                                                                                ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[46]                                                                                                                                                                                           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[118]                                                                                                                                                               ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[118]                                                                                                                                                                                          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[43]                                                                                                                                                                ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[43]                                                                                                                                                                                           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[68]                                                                                                                                                                ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[68]                                                                                                                                                                                           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[45]                                                                                                                                                                ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[45]                                                                                                                                                                                           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[37]                                                                                                                                                                ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[37]                                                                                                                                                                                           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[51]                                                                                                                                                                ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[51]                                                                                                                                                                                           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[38]                                                                                                                                                                ; ps2_to_atari800:keyboard_map1|ps2_keys_reg[38]                                                                                                                                                                                           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[22]                                                                                                                                                              ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[22]                                                                                                                                                                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[12]                                                                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[12]                                                                                                                                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]_NEW204_OTERM1405                                                                                     ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[13]_NEW204_OTERM1405                                                                                                                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|nmiReg                                                                                            ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|nmiReg                                                                                                                       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|irqa_reg[1]                                                                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|irqa_reg[1]                                                                                                                                             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|porta_control_reg[4]                                                                                                         ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|porta_control_reg[4]                                                                                                                                    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|CA2_output_reg                                                                                                               ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|CA2_output_reg                                                                                                                                          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|irqb_reg[1]                                                                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pia:pia1|irqb_reg[1]                                                                                                                                             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                                                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[15]                                                                                                                                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[23]                                                                                                                                                              ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[23]                                                                                                                                                                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_pending_reg_OTERM949                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_pending_reg_OTERM949                                                                                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:\gen_stereo:pokey2|audf2_reg[4]                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:\gen_stereo:pokey2|audf2_reg[4]                                                                                                                            ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:\gen_stereo:pokey2|audf2_reg[1]                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:\gen_stereo:pokey2|audf2_reg[1]                                                                                                                            ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:\gen_stereo:pokey2|audf2_reg[5]                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:\gen_stereo:pokey2|audf2_reg[5]                                                                                                                            ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:\gen_stereo:pokey2|audf2_reg[7]                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:\gen_stereo:pokey2|audf2_reg[7]                                                                                                                            ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|vscrol_raw_reg[2]                                                                                                        ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4mm:auto_generated|altsyncram_p3b1:altsyncram2|ram_block5a0~porta_datain_reg0 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.224      ; 0.513      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|playfield_dma_start_shiftreg_reg[0]                                                                                      ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|playfield_dma_start_shiftreg_reg[0]                                                                                                                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:\gen_stereo:pokey2|audf0_reg[1]                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:\gen_stereo:pokey2|audf0_reg[1]                                                                                                                            ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:\gen_stereo:pokey2|audf0_reg[0]                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:\gen_stereo:pokey2|audf0_reg[0]                                                                                                                            ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:\gen_stereo:pokey2|audf0_reg[3]                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:\gen_stereo:pokey2|audf0_reg[3]                                                                                                                            ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:\gen_stereo:pokey2|audf0_reg[2]                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:\gen_stereo:pokey2|audf0_reg[2]                                                                                                                            ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:\gen_stereo:pokey2|audf0_reg[7]                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:\gen_stereo:pokey2|audf0_reg[7]                                                                                                                            ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:\gen_stereo:pokey2|audf0_reg[4]                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:\gen_stereo:pokey2|audf0_reg[4]                                                                                                                            ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:\gen_stereo:pokey2|audf0_reg[5]                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:\gen_stereo:pokey2|audf0_reg[5]                                                                                                                            ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:\gen_stereo:pokey2|audf0_reg[6]                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:\gen_stereo:pokey2|audf0_reg[6]                                                                                                                            ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|simple_counter:antic_counter_refresh_count|value_reg[1]                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|simple_counter:antic_counter_refresh_count|value_reg[1]                                                                                             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|simple_counter:antic_counter_refresh_count|value_reg[2]                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|simple_counter:antic_counter_refresh_count|value_reg[2]                                                                                             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|simple_counter:antic_counter_refresh_count|value_reg[3]                                                                  ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|simple_counter:antic_counter_refresh_count|value_reg[3]                                                                                             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:\gen_stereo:pokey2|chan1_output_reg                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:\gen_stereo:pokey2|chan1_output_reg                                                                                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pot_reset_reg_OTERM867                                                                                                   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|pot_reset_reg_OTERM867                                                                                                                              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|irqst_reg[7]                                                                                                             ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|pokey:pokey1|irqst_reg[7]                                                                                                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_popped                                                                                                                                         ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|state.st_popped                                                                                                                                                                    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[31]                                                                                                                                                              ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[31]                                                                                                                                                                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|b_r[31]                                                                                                                                                 ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPUMediumCore:myzpu|b_r[31]                                                                                                                                                                            ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Dreg                                                                                              ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Dreg                                                                                                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Ireg                                                                                              ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Ireg                                                                                                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Vreg                                                                                              ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Vreg                                                                                                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Creg                                                                                              ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|Creg                                                                                                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|theCpuCycle.cyclePreRead                                                                          ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|cpu:cpu6502|cpu_65xx:cpu_6502_peter|theCpuCycle.cyclePreRead                                                                                                     ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m1pl_reg[2]                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m1pl_reg[2]                                                                                                                                           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p1pl_reg[2]                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p1pl_reg[2]                                                                                                                                           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p2pl_reg[3]                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p2pl_reg[3]                                                                                                                                           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m3pl_reg[2]                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m3pl_reg[2]                                                                                                                                           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m0pl_reg[2]                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m0pl_reg[2]                                                                                                                                           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p0pl_reg[2]                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p0pl_reg[2]                                                                                                                                           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m0pf_reg[2]                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|m0pf_reg[2]                                                                                                                                           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
; 0.185 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p2pf_reg[2]                                                                                                                ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|p2pf_reg[2]                                                                                                                                           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.038      ; 0.307      ;
+-------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Hold: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                                                                                                                          ;
+-------+---------------------------------------------------------------+---------------------------------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                     ; To Node                                                       ; Launch Clock                                                       ; Latch Clock                                                        ; Relationship ; Clock Skew ; Data Delay ;
+-------+---------------------------------------------------------------+---------------------------------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+
; 0.187 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]           ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; sdram_statemachine:sdram_adaptor|reply_reg                    ; sdram_statemachine:sdram_adaptor|reply_reg                    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]           ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]           ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.307      ;
; 0.206 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10] ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.325      ;
; 0.264 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[11]      ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[11]      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.384      ;
; 0.293 ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.413      ;
; 0.294 ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.414      ;
; 0.295 ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.415      ;
; 0.295 ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.415      ;
; 0.296 ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.416      ;
; 0.296 ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.416      ;
; 0.296 ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.416      ;
; 0.299 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.418      ;
; 0.299 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.418      ;
; 0.299 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.418      ;
; 0.300 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.419      ;
; 0.300 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.419      ;
; 0.301 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.420      ;
; 0.301 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.420      ;
; 0.301 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.420      ;
; 0.301 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[9]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[9]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.420      ;
; 0.302 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[5]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[5]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.422      ;
; 0.303 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[1]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[1]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.423      ;
; 0.303 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[2]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[2]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.423      ;
; 0.303 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[6]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[6]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.423      ;
; 0.304 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[3]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[3]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.424      ;
; 0.304 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[4]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[4]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.424      ;
; 0.304 ; sdram_statemachine:sdram_adaptor|delay_reg[13]                ; sdram_statemachine:sdram_adaptor|delay_reg[13]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.424      ;
; 0.305 ; sdram_statemachine:sdram_adaptor|delay_reg[1]                 ; sdram_statemachine:sdram_adaptor|delay_reg[1]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.425      ;
; 0.305 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[7]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[7]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.425      ;
; 0.306 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[8]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[8]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.426      ;
; 0.307 ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.427      ;
; 0.307 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[10]      ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[10]      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.427      ;
; 0.308 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[9]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[9]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.428      ;
; 0.310 ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.430      ;
; 0.310 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[0]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[0]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.429      ;
; 0.310 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.430      ;
; 0.311 ; sdram_statemachine:sdram_adaptor|delay_reg[5]                 ; sdram_statemachine:sdram_adaptor|delay_reg[5]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.431      ;
; 0.313 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[0]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[0]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.433      ;
; 0.322 ; sdram_statemachine:sdram_adaptor|delay_reg[0]                 ; sdram_statemachine:sdram_adaptor|delay_reg[0]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.442      ;
; 0.333 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]           ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.453      ;
; 0.340 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]           ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.460      ;
; 0.340 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]           ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.460      ;
; 0.435 ; sdram_statemachine:sdram_adaptor|request_sreg                 ; sdram_statemachine:sdram_adaptor|reply_reg                    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; -0.001       ; 0.091      ; 0.629      ;
; 0.442 ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.562      ;
; 0.443 ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.563      ;
; 0.444 ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.564      ;
; 0.448 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.567      ;
; 0.448 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.567      ;
; 0.448 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.567      ;
; 0.449 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.568      ;
; 0.450 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[9]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.569      ;
; 0.450 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[5]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[6]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.570      ;
; 0.451 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[1]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[2]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.571      ;
; 0.452 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[3]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[4]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.572      ;
; 0.453 ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ; sdram_statemachine:sdram_adaptor|delay_reg[13]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.573      ;
; 0.453 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[7]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[8]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.573      ;
; 0.454 ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.574      ;
; 0.454 ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.574      ;
; 0.454 ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.574      ;
; 0.454 ; sdram_statemachine:sdram_adaptor|delay_reg[1]                 ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.574      ;
; 0.456 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[9]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[10]      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.576      ;
; 0.457 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[0]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.576      ;
; 0.457 ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.577      ;
; 0.457 ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.577      ;
; 0.457 ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.577      ;
; 0.458 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.577      ;
; 0.459 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.578      ;
; 0.459 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.578      ;
; 0.459 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[9]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.578      ;
; 0.459 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                 ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.579      ;
; 0.460 ; sdram_statemachine:sdram_adaptor|delay_reg[5]                 ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.580      ;
; 0.460 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[0]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[1]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.580      ;
; 0.460 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[0]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.579      ;
; 0.461 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.580      ;
; 0.462 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[2]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[3]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.582      ;
; 0.462 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[6]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[7]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.582      ;
; 0.462 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.581      ;
; 0.462 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.581      ;
; 0.462 ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.035      ; 0.581      ;
; 0.463 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[4]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[5]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.583      ;
; 0.463 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[0]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[2]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.583      ;
; 0.465 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[8]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[9]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.585      ;
; 0.465 ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ; sdram_statemachine:sdram_adaptor|delay_reg[3]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.585      ;
; 0.465 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[2]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[4]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.585      ;
; 0.465 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[6]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[8]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.585      ;
; 0.466 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[10]      ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[11]      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.586      ;
; 0.466 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[4]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[6]       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.586      ;
; 0.468 ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ; sdram_statemachine:sdram_adaptor|delay_reg[5]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.588      ;
; 0.468 ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[8]       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[10]      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.588      ;
; 0.468 ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.588      ;
; 0.469 ; sdram_statemachine:sdram_adaptor|delay_reg[0]                 ; sdram_statemachine:sdram_adaptor|delay_reg[1]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.589      ;
; 0.471 ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.591      ;
; 0.472 ; sdram_statemachine:sdram_adaptor|delay_reg[0]                 ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.592      ;
; 0.493 ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]           ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.613      ;
; 0.505 ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ; sdram_statemachine:sdram_adaptor|delay_reg[13]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.625      ;
; 0.506 ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.626      ;
; 0.507 ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.627      ;
; 0.509 ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000        ; 0.036      ; 0.629      ;
+-------+---------------------------------------------------------------+---------------------------------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Hold: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3]'                                                                                                                                                                    ;
+-------+------------------------------------+------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                          ; To Node                            ; Launch Clock                                                       ; Latch Clock                                                        ; Relationship ; Clock Skew ; Data Delay ;
+-------+------------------------------------+------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+
; 0.187 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_tx_state[2] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_rptr[0]     ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; user_io:my_user_io|ps2_rptr[1]     ; user_io:my_user_io|ps2_rptr[1]     ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_rptr[2]     ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; user_io:my_user_io|ps2_tx_byte[7]  ; user_io:my_user_io|ps2_tx_byte[7]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.307      ;
; 0.187 ; user_io:my_user_io|ps2_parity      ; user_io:my_user_io|ps2_parity      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.307      ;
; 0.202 ; user_io:my_user_io|ps2_r_inc       ; user_io:my_user_io|ps2_rptr[1]     ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.322      ;
; 0.206 ; user_io:my_user_io|ps2_r_inc       ; user_io:my_user_io|ps2_rptr[0]     ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.326      ;
; 0.209 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_rptr[2]     ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.329      ;
; 0.216 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_tx_state[2] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.336      ;
; 0.224 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_tx_byte[6]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.344      ;
; 0.227 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_tx_byte[4]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.347      ;
; 0.229 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_tx_byte[0]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.349      ;
; 0.230 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_tx_byte[5]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.350      ;
; 0.233 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_tx_byte[2]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.353      ;
; 0.234 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_r_inc       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.354      ;
; 0.236 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_tx_byte[3]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.356      ;
; 0.267 ; user_io:my_user_io|ps2_tx_byte[5]  ; user_io:my_user_io|ps2_tx_byte[4]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.387      ;
; 0.267 ; user_io:my_user_io|ps2_tx_byte[3]  ; user_io:my_user_io|ps2_tx_byte[2]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.387      ;
; 0.267 ; user_io:my_user_io|ps2_tx_byte[2]  ; user_io:my_user_io|ps2_tx_byte[1]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.387      ;
; 0.268 ; user_io:my_user_io|ps2_tx_byte[1]  ; user_io:my_user_io|ps2_tx_byte[0]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.388      ;
; 0.269 ; user_io:my_user_io|ps2_tx_byte[4]  ; user_io:my_user_io|ps2_tx_byte[3]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.389      ;
; 0.305 ; user_io:my_user_io|ps2_tx_byte[0]  ; user_io:my_user_io|ps2_parity      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.425      ;
; 0.306 ; user_io:my_user_io|ps2_rptr[1]     ; user_io:my_user_io|ps2_rptr[2]     ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.426      ;
; 0.307 ; user_io:my_user_io|ps2_r_inc       ; user_io:my_user_io|ps2_rptr[2]     ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.427      ;
; 0.311 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_rptr[1]     ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.431      ;
; 0.329 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|ps2_tx_state[2] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.449      ;
; 0.330 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|ps2_tx_state[2] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.450      ;
; 0.334 ; user_io:my_user_io|ps2_tx_byte[7]  ; user_io:my_user_io|ps2_tx_byte[6]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.454      ;
; 0.344 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_tx_byte[1]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.464      ;
; 0.357 ; user_io:my_user_io|ps2_tx_byte[6]  ; user_io:my_user_io|ps2_tx_byte[5]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.477      ;
; 0.366 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_r_inc       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.485      ;
; 0.370 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_tx_state[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.490      ;
; 0.373 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_tx_state[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.493      ;
; 0.375 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|Equal5~0_OTERM1 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.495      ;
; 0.376 ; user_io:my_user_io|ps2_parity      ; user_io:my_user_io|ps2_kbd_data    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.037      ; 0.497      ;
; 0.377 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_tx_byte[7]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.497      ;
; 0.380 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_tx_state[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.500      ;
; 0.424 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_parity      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.543      ;
; 0.433 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_tx_state[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.553      ;
; 0.441 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_tx_state[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.561      ;
; 0.442 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|Equal5~0_OTERM1 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.562      ;
; 0.458 ; user_io:my_user_io|ps2_kbd_data    ; user_io:my_user_io|ps2_kbd_data    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.578      ;
; 0.459 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_kbd_data    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.579      ;
; 0.469 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_kbd_data    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.589      ;
; 0.483 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_kbd_data    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.603      ;
; 0.485 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|ps2_tx_state[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.605      ;
; 0.487 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|ps2_tx_state[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.607      ;
; 0.499 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|ps2_tx_state[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.619      ;
; 0.500 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|Equal5~0_OTERM1 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.620      ;
; 0.502 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|ps2_tx_state[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.622      ;
; 0.502 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_tx_state[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.622      ;
; 0.503 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|Equal5~0_OTERM1 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.623      ;
; 0.506 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|Equal5~0_OTERM1 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.626      ;
; 0.511 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_tx_byte[6]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.630      ;
; 0.511 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_tx_byte[5]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.630      ;
; 0.511 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_tx_byte[4]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.630      ;
; 0.511 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_tx_byte[3]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.630      ;
; 0.511 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_tx_byte[2]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.630      ;
; 0.511 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_tx_byte[1]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.630      ;
; 0.511 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_tx_byte[0]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 0.630      ;
; 0.533 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|ps2_kbd_data    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.653      ;
; 0.541 ; user_io:my_user_io|ps2_tx_byte[0]  ; user_io:my_user_io|ps2_kbd_data    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.037      ; 0.662      ;
; 0.565 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|ps2_kbd_data    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.685      ;
; 0.660 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_tx_state[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.780      ;
; 0.703 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|ps2_tx_state[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.823      ;
; 0.708 ; user_io:my_user_io|ps2_tx_state[3] ; user_io:my_user_io|ps2_tx_state[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.828      ;
; 0.837 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_parity      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 0.957      ;
; 0.876 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_tx_state[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.037      ; 0.997      ;
; 0.895 ; user_io:my_user_io|Equal5~0_OTERM1 ; user_io:my_user_io|ps2_tx_byte[7]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 1.014      ;
; 0.899 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_tx_byte[1]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 1.019      ;
; 0.901 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|ps2_kbd_data    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.037      ; 1.022      ;
; 0.991 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_tx_byte[6]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 1.110      ;
; 0.991 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_tx_byte[5]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 1.110      ;
; 0.991 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_tx_byte[4]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 1.110      ;
; 0.991 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_tx_byte[3]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 1.110      ;
; 0.991 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_tx_byte[2]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 1.110      ;
; 0.991 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_tx_byte[1]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 1.110      ;
; 0.991 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_tx_byte[0]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 1.110      ;
; 0.991 ; user_io:my_user_io|ps2_tx_state[0] ; user_io:my_user_io|ps2_parity      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 1.110      ;
; 1.006 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_tx_byte[0]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 1.126      ;
; 1.008 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_tx_byte[2]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 1.128      ;
; 1.012 ; user_io:my_user_io|ps2_rptr[2]     ; user_io:my_user_io|Equal5~0_OTERM1 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.037      ; 1.133      ;
; 1.015 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_tx_byte[6]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 1.135      ;
; 1.034 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_tx_byte[5]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 1.154      ;
; 1.035 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_tx_byte[4]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 1.155      ;
; 1.047 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_tx_byte[6]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 1.166      ;
; 1.047 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_tx_byte[5]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 1.166      ;
; 1.047 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_tx_byte[4]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 1.166      ;
; 1.047 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_tx_byte[3]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 1.166      ;
; 1.047 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_tx_byte[2]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 1.166      ;
; 1.047 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_tx_byte[1]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 1.166      ;
; 1.047 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_tx_byte[0]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 1.166      ;
; 1.047 ; user_io:my_user_io|ps2_tx_state[2] ; user_io:my_user_io|ps2_parity      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 1.166      ;
; 1.052 ; user_io:my_user_io|ps2_rptr[0]     ; user_io:my_user_io|ps2_tx_byte[3]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.036      ; 1.172      ;
; 1.128 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|ps2_tx_byte[6]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 1.247      ;
; 1.128 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|ps2_tx_byte[5]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 1.247      ;
; 1.128 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|ps2_tx_byte[4]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 1.247      ;
; 1.128 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|ps2_tx_byte[3]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 1.247      ;
; 1.128 ; user_io:my_user_io|ps2_tx_state[1] ; user_io:my_user_io|ps2_tx_byte[2]  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000        ; 0.035      ; 1.247      ;
+-------+------------------------------------+------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Recovery: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                           ;
+--------+-----------------------------------------------------+-------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                                           ; To Node                                                                                                     ; Launch Clock                                                       ; Latch Clock                                                        ; Relationship ; Clock Skew ; Data Delay ;
+--------+-----------------------------------------------------+-------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+
; 14.199 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[2]                                                             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.035     ; 3.374      ;
; 14.207 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[9]                                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.034     ; 3.367      ;
; 14.207 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[10]                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.034     ; 3.367      ;
; 14.207 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[8]                                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.034     ; 3.367      ;
; 14.225 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[5]                                                             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.031     ; 3.352      ;
; 14.378 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[0]                                                           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; 0.127      ; 3.357      ;
; 14.378 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[1]                                                           ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; 0.127      ; 3.357      ;
; 14.384 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_READ_reg                                                              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; 0.156      ; 3.380      ;
; 14.398 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[25]                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; 0.157      ; 3.367      ;
; 14.415 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[0]                                                             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.036     ; 3.157      ;
; 14.416 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[31]                                                            ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.040     ; 3.152      ;
; 14.416 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[11]                                                            ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.040     ; 3.152      ;
; 14.416 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[1]                                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.040     ; 3.152      ;
; 14.416 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[2]                                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.040     ; 3.152      ;
; 14.416 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[3]                                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.040     ; 3.152      ;
; 14.416 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[4]                                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.040     ; 3.152      ;
; 14.416 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[5]                                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.040     ; 3.152      ;
; 14.416 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[6]                                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.040     ; 3.152      ;
; 14.416 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[7]                                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.040     ; 3.152      ;
; 14.416 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[8]                                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.040     ; 3.152      ;
; 14.416 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[9]                                   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.040     ; 3.152      ;
; 14.416 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[10]                                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.040     ; 3.152      ;
; 14.416 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[11]                                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.040     ; 3.152      ;
; 14.416 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[12]                                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.040     ; 3.152      ;
; 14.416 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[13]                                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.040     ; 3.152      ;
; 14.416 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[14]                                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.040     ; 3.152      ;
; 14.416 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[3]                                                             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.035     ; 3.157      ;
; 14.418 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[9]                                                             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.035     ; 3.155      ;
; 14.418 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[27]                                                            ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.036     ; 3.154      ;
; 14.418 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out5_reg[31]                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.036     ; 3.154      ;
; 14.418 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[30]                                                            ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.035     ; 3.155      ;
; 14.418 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out5_reg[24]                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.036     ; 3.154      ;
; 14.418 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[22]                                                            ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.036     ; 3.154      ;
; 14.418 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[21]                                                            ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.035     ; 3.155      ;
; 14.418 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[13]                                                            ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.035     ; 3.155      ;
; 14.418 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[15]                                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.036     ; 3.154      ;
; 14.418 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[16]                                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.036     ; 3.154      ;
; 14.418 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[17]                                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.036     ; 3.154      ;
; 14.418 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[18]                                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.036     ; 3.154      ;
; 14.418 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[19]                                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.036     ; 3.154      ;
; 14.418 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[20]                                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.036     ; 3.154      ;
; 14.418 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[21]                                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.036     ; 3.154      ;
; 14.418 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[22]                                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.036     ; 3.154      ;
; 14.418 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[23]                                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.036     ; 3.154      ;
; 14.418 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[24]                                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.036     ; 3.154      ;
; 14.418 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[25]                                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.036     ; 3.154      ;
; 14.418 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[26]                                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.036     ; 3.154      ;
; 14.418 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[27]                                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.036     ; 3.154      ;
; 14.418 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[29]                                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.036     ; 3.154      ;
; 14.418 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|en_delay_reg[30]                                  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.036     ; 3.154      ;
; 14.418 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[4]                                                             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.032     ; 3.158      ;
; 14.418 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[23]                                                            ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.035     ; 3.155      ;
; 14.418 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out5_reg[20]                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.036     ; 3.154      ;
; 14.418 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[20]                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.037     ; 3.153      ;
; 14.418 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[20]                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.037     ; 3.153      ;
; 14.418 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[21]                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.037     ; 3.153      ;
; 14.418 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[21]                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.037     ; 3.153      ;
; 14.418 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out5_reg[21]                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.036     ; 3.154      ;
; 14.418 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out5_reg[0]                                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.036     ; 3.154      ;
; 14.418 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[0]                                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.037     ; 3.153      ;
; 14.418 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[0]                                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.036     ; 3.154      ;
; 14.418 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[0]                                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.037     ; 3.153      ;
; 14.418 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[19]                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.037     ; 3.153      ;
; 14.418 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[19]                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.037     ; 3.153      ;
; 14.418 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out2_reg[22]                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.037     ; 3.153      ;
; 14.418 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out4_reg[22]                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.037     ; 3.153      ;
; 14.418 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[1]                                                             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.032     ; 3.158      ;
; 14.418 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[20]                                                          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.048     ; 3.142      ;
; 14.418 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[18]                                                          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.048     ; 3.142      ;
; 14.418 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_addr_reg[21]                                                          ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.048     ; 3.142      ;
; 14.419 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[1]                                                             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.035     ; 3.154      ;
; 14.419 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[19]                                                            ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.037     ; 3.152      ;
; 14.419 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[26]                                                            ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.035     ; 3.154      ;
; 14.419 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[2]                                                             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.035     ; 3.154      ;
; 14.419 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out6_reg[9]                                                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.037     ; 3.152      ;
; 14.419 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[5]                                                             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.035     ; 3.154      ;
; 14.419 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[31]                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.036     ; 3.153      ;
; 14.419 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out6_reg[31]                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.036     ; 3.153      ;
; 14.419 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[31]                                                            ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.037     ; 3.152      ;
; 14.419 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[29]                                                            ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.037     ; 3.152      ;
; 14.419 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[28]                                                            ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.035     ; 3.154      ;
; 14.419 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out5_reg[28]                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.040     ; 3.149      ;
; 14.419 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[28]                                                            ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.040     ; 3.149      ;
; 14.419 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out6_reg[30]                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.041     ; 3.148      ;
; 14.419 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out5_reg[30]                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.037     ; 3.152      ;
; 14.419 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[30]                                                            ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.040     ; 3.149      ;
; 14.419 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[24]                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.036     ; 3.153      ;
; 14.419 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out6_reg[24]                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.036     ; 3.153      ;
; 14.419 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[24]                                                            ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.037     ; 3.152      ;
; 14.419 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out3_reg[27]                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.036     ; 3.153      ;
; 14.419 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|out6_reg[27]                                                        ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.036     ; 3.153      ;
; 14.419 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|zpu_di_reg[27]                                                            ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.036     ; 3.153      ;
; 14.419 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[4]                                                             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.035     ; 3.154      ;
; 14.419 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[3]                                                             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.035     ; 3.154      ;
; 14.419 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[6]                                                             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.035     ; 3.154      ;
; 14.419 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_glue:zpu_and_glue|ZPU_DO_reg[7]                                                             ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.035     ; 3.154      ;
; 14.419 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|skctl_reg[3]                         ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.036     ; 3.153      ;
; 14.419 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|Mux9~0_OTERM79                                    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.042     ; 3.147      ;
; 14.419 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|delay_line:stimer_delay|shift_reg[2] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.038     ; 3.151      ;
; 14.419 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg ; zpucore:zpu|zpu_config_regs:config_regs|sio_device:pokey1|pokey:pokey1|delay_line:stimer_delay|shift_reg[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 17.621       ; -0.036     ; 3.153      ;
+--------+-----------------------------------------------------+-------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Removal: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                      ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                                                                                                                           ; To Node                                                                                                                                                                                                                ; Launch Clock                                                       ; Latch Clock                                                        ; Relationship ; Clock Skew ; Data Delay ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+
; 0.781 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|altsyncram_h3b1:altsyncram2|ram_block5a15   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.207      ; 1.078      ;
; 0.781 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|altsyncram_h3b1:altsyncram2|ram_block5a14   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.207      ; 1.078      ;
; 0.781 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|altsyncram_h3b1:altsyncram2|ram_block5a13   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.207      ; 1.078      ;
; 0.781 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|altsyncram_h3b1:altsyncram2|ram_block5a12   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.207      ; 1.078      ;
; 0.781 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|altsyncram_h3b1:altsyncram2|ram_block5a11   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.207      ; 1.078      ;
; 0.781 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|altsyncram_h3b1:altsyncram2|ram_block5a10   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.207      ; 1.078      ;
; 0.781 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|altsyncram_h3b1:altsyncram2|ram_block5a9    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.207      ; 1.078      ;
; 0.781 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|altsyncram_h3b1:altsyncram2|ram_block5a8    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.207      ; 1.078      ;
; 0.781 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|altsyncram_h3b1:altsyncram2|ram_block5a7    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.207      ; 1.078      ;
; 0.781 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|altsyncram_h3b1:altsyncram2|ram_block5a6    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.207      ; 1.078      ;
; 0.781 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|altsyncram_h3b1:altsyncram2|ram_block5a5    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.207      ; 1.078      ;
; 0.781 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|altsyncram_h3b1:altsyncram2|ram_block5a4    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.207      ; 1.078      ;
; 0.781 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|altsyncram_h3b1:altsyncram2|ram_block5a3    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.207      ; 1.078      ;
; 0.781 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|altsyncram_h3b1:altsyncram2|ram_block5a2    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.207      ; 1.078      ;
; 0.781 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|altsyncram_h3b1:altsyncram2|ram_block5a1    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.207      ; 1.078      ;
; 0.781 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|dffe4    ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|altsyncram_h3b1:altsyncram2|ram_block5a0    ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.207      ; 1.078      ;
; 0.845 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a63  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.204      ; 1.139      ;
; 0.845 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a62  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.204      ; 1.139      ;
; 0.845 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a61  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.204      ; 1.139      ;
; 0.845 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a60  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.204      ; 1.139      ;
; 0.845 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a59  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.204      ; 1.139      ;
; 0.845 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a58  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.204      ; 1.139      ;
; 0.845 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a57  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.204      ; 1.139      ;
; 0.845 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a56  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.204      ; 1.139      ;
; 0.845 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a39  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.204      ; 1.139      ;
; 0.845 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a38  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.204      ; 1.139      ;
; 0.845 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a37  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.204      ; 1.139      ;
; 0.845 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a36  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.204      ; 1.139      ;
; 0.845 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a35  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.204      ; 1.139      ;
; 0.845 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a34  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.204      ; 1.139      ;
; 0.845 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a33  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.204      ; 1.139      ;
; 0.845 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a32  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.204      ; 1.139      ;
; 0.845 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a31  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.204      ; 1.139      ;
; 0.845 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a30  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.204      ; 1.139      ;
; 0.845 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a29  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.204      ; 1.139      ;
; 0.845 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a28  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.204      ; 1.139      ;
; 0.845 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a27  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.204      ; 1.139      ;
; 0.845 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a26  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.204      ; 1.139      ;
; 0.845 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a25  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.204      ; 1.139      ;
; 0.845 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a24  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.204      ; 1.139      ;
; 0.845 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a23  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.204      ; 1.139      ;
; 0.845 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a22  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.204      ; 1.139      ;
; 0.845 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a21  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.204      ; 1.139      ;
; 0.845 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a20  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.204      ; 1.139      ;
; 0.845 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a7   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.204      ; 1.139      ;
; 0.845 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a6   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.204      ; 1.139      ;
; 0.845 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a5   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.204      ; 1.139      ;
; 0.845 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a4   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.204      ; 1.139      ;
; 0.845 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a3   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.204      ; 1.139      ;
; 0.845 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a2   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.204      ; 1.139      ;
; 0.845 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a1   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.204      ; 1.139      ;
; 0.845 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a0   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.204      ; 1.139      ;
; 0.862 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a55  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.155      ;
; 0.862 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a54  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.155      ;
; 0.862 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a53  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.155      ;
; 0.862 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a52  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.155      ;
; 0.862 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a51  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.155      ;
; 0.862 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a50  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.155      ;
; 0.862 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a49  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.155      ;
; 0.862 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a48  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.155      ;
; 0.862 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a47  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.155      ;
; 0.862 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a46  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.155      ;
; 0.862 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a45  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.155      ;
; 0.862 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a44  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.155      ;
; 0.862 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a43  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.155      ;
; 0.862 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a42  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.155      ;
; 0.862 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a41  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.155      ;
; 0.862 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a40  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.155      ;
; 0.862 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a19  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.155      ;
; 0.862 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a18  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.155      ;
; 0.862 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a17  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.155      ;
; 0.862 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a16  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.155      ;
; 0.862 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a15  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.155      ;
; 0.862 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a14  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.155      ;
; 0.862 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a13  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.155      ;
; 0.862 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a12  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.155      ;
; 0.862 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a11  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.155      ;
; 0.862 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a10  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.155      ;
; 0.862 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a9   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.155      ;
; 0.862 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|dffe4   ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a8   ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.155      ;
; 0.984 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_amm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_amm:auto_generated|altsyncram_74b1:altsyncram2|ram_block5a6 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.208      ; 1.282      ;
; 0.984 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_amm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_amm:auto_generated|altsyncram_74b1:altsyncram2|ram_block5a5 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.208      ; 1.282      ;
; 0.984 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_amm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_amm:auto_generated|altsyncram_74b1:altsyncram2|ram_block5a4 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.208      ; 1.282      ;
; 0.984 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_amm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_amm:auto_generated|altsyncram_74b1:altsyncram2|ram_block5a3 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.208      ; 1.282      ;
; 0.984 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_amm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_amm:auto_generated|altsyncram_74b1:altsyncram2|ram_block5a2 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.208      ; 1.282      ;
; 0.984 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_amm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_amm:auto_generated|altsyncram_74b1:altsyncram2|ram_block5a1 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.208      ; 1.282      ;
; 0.984 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_amm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_amm:auto_generated|altsyncram_74b1:altsyncram2|ram_block5a0 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.208      ; 1.282      ;
; 1.146 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4mm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4mm:auto_generated|altsyncram_p3b1:altsyncram2|ram_block5a5 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.439      ;
; 1.146 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4mm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4mm:auto_generated|altsyncram_p3b1:altsyncram2|ram_block5a4 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.439      ;
; 1.146 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4mm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4mm:auto_generated|altsyncram_p3b1:altsyncram2|ram_block5a3 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.439      ;
; 1.146 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4mm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4mm:auto_generated|altsyncram_p3b1:altsyncram2|ram_block5a2 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.439      ;
; 1.146 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4mm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4mm:auto_generated|altsyncram_p3b1:altsyncram2|ram_block5a1 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.439      ;
; 1.146 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4mm:auto_generated|dffe4 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4mm:auto_generated|altsyncram_p3b1:altsyncram2|ram_block5a0 ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.203      ; 1.439      ;
; 2.018 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[1]                                                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[6]_NEW190_OTERM1393                                                                                               ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.247      ; 2.349      ;
; 2.018 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[1]                                                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[14]_NEW198_OTERM1397                                                                                              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.247      ; 2.349      ;
; 2.038 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[1]                                                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmi_shiftreg_reg[8]                                                                                                               ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.227      ; 2.349      ;
; 2.089 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg                                                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[6]_NEW190_OTERM1393                                                                                               ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.247      ; 2.420      ;
; 2.089 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg                                                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|dma_address_reg[14]_NEW198_OTERM1397                                                                                              ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.247      ; 2.420      ;
; 2.109 ; sdram_statemachine:sdram_adaptor|reset_client_n_reg                                                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|nmi_shiftreg_reg[8]                                                                                                               ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.227      ; 2.420      ;
; 2.190 ; zpucore:zpu|zpu_config_regs:config_regs|out1_reg[1]                                                                                                                                 ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|refresh_pending_reg_OTERM953                                                                                                      ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000        ; 0.249      ; 2.523      ;
+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------+--------------------------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Minimum Pulse Width: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0]'                                                                                             ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------+------------+---------------------------------------------------------------+
; Slack ; Actual Width ; Required Width ; Type             ; Clock                                                              ; Clock Edge ; Target                                                        ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------+------------+---------------------------------------------------------------+
; 4.187 ; 4.342        ; 0.155          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_output_reg~_Duplicate_6   ;
; 4.187 ; 4.342        ; 0.155          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_output_reg~_Duplicate_7   ;
; 4.188 ; 4.404        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cke_reg                      ;
; 4.188 ; 4.343        ; 0.155          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_output_reg~_Duplicate_4   ;
; 4.188 ; 4.343        ; 0.155          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_output_reg~_Duplicate_5   ;
; 4.189 ; 4.405        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[0]              ;
; 4.189 ; 4.405        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[10]             ;
; 4.189 ; 4.405        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[11]             ;
; 4.189 ; 4.405        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[12]             ;
; 4.189 ; 4.405        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[13]             ;
; 4.189 ; 4.405        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[14]             ;
; 4.189 ; 4.405        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[15]             ;
; 4.189 ; 4.405        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[1]              ;
; 4.189 ; 4.405        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[2]              ;
; 4.189 ; 4.405        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[3]              ;
; 4.189 ; 4.405        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[4]              ;
; 4.189 ; 4.405        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[5]              ;
; 4.189 ; 4.405        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[6]              ;
; 4.189 ; 4.405        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[7]              ;
; 4.189 ; 4.405        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[8]              ;
; 4.189 ; 4.405        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[9]              ;
; 4.190 ; 4.345        ; 0.155          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_output_reg                ;
; 4.190 ; 4.345        ; 0.155          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_output_reg~_Duplicate_1   ;
; 4.190 ; 4.345        ; 0.155          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_output_reg~_Duplicate_10  ;
; 4.190 ; 4.345        ; 0.155          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_output_reg~_Duplicate_11  ;
; 4.190 ; 4.345        ; 0.155          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_output_reg~_Duplicate_12  ;
; 4.190 ; 4.345        ; 0.155          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_output_reg~_Duplicate_13  ;
; 4.190 ; 4.345        ; 0.155          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_output_reg~_Duplicate_8   ;
; 4.190 ; 4.345        ; 0.155          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_output_reg~_Duplicate_9   ;
; 4.191 ; 4.407        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[0]  ;
; 4.191 ; 4.407        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10] ;
; 4.191 ; 4.407        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]  ;
; 4.191 ; 4.407        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ;
; 4.191 ; 4.407        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ;
; 4.191 ; 4.407        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ;
; 4.191 ; 4.407        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ;
; 4.191 ; 4.407        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ;
; 4.191 ; 4.407        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ;
; 4.191 ; 4.407        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ;
; 4.191 ; 4.407        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[9]  ;
; 4.191 ; 4.407        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[0]                 ;
; 4.191 ; 4.407        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[10]                ;
; 4.191 ; 4.407        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[11]                ;
; 4.191 ; 4.407        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[12]                ;
; 4.191 ; 4.407        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[13]                ;
; 4.191 ; 4.407        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[1]                 ;
; 4.191 ; 4.407        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[2]                 ;
; 4.191 ; 4.407        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[3]                 ;
; 4.191 ; 4.407        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[4]                 ;
; 4.191 ; 4.407        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[5]                 ;
; 4.191 ; 4.407        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[6]                 ;
; 4.191 ; 4.407        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[7]                 ;
; 4.191 ; 4.407        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[8]                 ;
; 4.191 ; 4.407        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|delay_reg[9]                 ;
; 4.191 ; 4.346        ; 0.155          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_output_reg~_Duplicate_14  ;
; 4.191 ; 4.346        ; 0.155          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_output_reg~_Duplicate_15  ;
; 4.191 ; 4.346        ; 0.155          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_output_reg~_Duplicate_2   ;
; 4.191 ; 4.346        ; 0.155          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|dq_output_reg~_Duplicate_3   ;
; 4.191 ; 4.407        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[0]       ;
; 4.191 ; 4.407        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[10]      ;
; 4.191 ; 4.407        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[11]      ;
; 4.191 ; 4.407        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[1]       ;
; 4.191 ; 4.407        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[2]       ;
; 4.191 ; 4.407        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[3]       ;
; 4.191 ; 4.407        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[4]       ;
; 4.191 ; 4.407        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[5]       ;
; 4.191 ; 4.407        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[6]       ;
; 4.191 ; 4.407        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[7]       ;
; 4.191 ; 4.407        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[8]       ;
; 4.191 ; 4.407        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|refresh_pending_reg[9]       ;
; 4.191 ; 4.407        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|sdram_state_reg[0]           ;
; 4.191 ; 4.407        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|sdram_state_reg[1]           ;
; 4.191 ; 4.407        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|sdram_state_reg[2]           ;
; 4.192 ; 4.347        ; 0.155          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[22]             ;
; 4.192 ; 4.347        ; 0.155          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[23]             ;
; 4.192 ; 4.408        ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|reply_reg                    ;
; 4.193 ; 4.348        ; 0.155          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[20]             ;
; 4.193 ; 4.348        ; 0.155          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[21]             ;
; 4.195 ; 4.350        ; 0.155          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[16]             ;
; 4.195 ; 4.350        ; 0.155          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[17]             ;
; 4.195 ; 4.350        ; 0.155          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[24]             ;
; 4.195 ; 4.350        ; 0.155          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[25]             ;
; 4.195 ; 4.350        ; 0.155          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[26]             ;
; 4.195 ; 4.350        ; 0.155          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[27]             ;
; 4.195 ; 4.350        ; 0.155          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[28]             ;
; 4.195 ; 4.350        ; 0.155          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[29]             ;
; 4.196 ; 4.351        ; 0.155          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[18]             ;
; 4.196 ; 4.351        ; 0.155          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[19]             ;
; 4.196 ; 4.351        ; 0.155          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[30]             ;
; 4.196 ; 4.351        ; 0.155          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|data_out_reg[31]             ;
; 4.216 ; 4.400        ; 0.184          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[0]  ;
; 4.216 ; 4.400        ; 0.184          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[10] ;
; 4.216 ; 4.400        ; 0.184          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[1]  ;
; 4.216 ; 4.400        ; 0.184          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[2]  ;
; 4.216 ; 4.400        ; 0.184          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[3]  ;
; 4.216 ; 4.400        ; 0.184          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[4]  ;
; 4.216 ; 4.400        ; 0.184          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[5]  ;
; 4.216 ; 4.400        ; 0.184          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[6]  ;
; 4.216 ; 4.400        ; 0.184          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[7]  ;
; 4.216 ; 4.400        ; 0.184          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; sdram_statemachine:sdram_adaptor|cycles_since_refresh_reg[8]  ;
+-------+--------------+----------------+------------------+--------------------------------------------------------------------+------------+---------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Minimum Pulse Width: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1]'                                                                                                                                                                                                                                                                         ;
+-------+--------------+----------------+-----------------+--------------------------------------------------------------------+------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slack ; Actual Width ; Required Width ; Type            ; Clock                                                              ; Clock Edge ; Target                                                                                                                                                                                                                                     ;
+-------+--------------+----------------+-----------------+--------------------------------------------------------------------+------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; 8.557 ; 8.787        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_31_24|altsyncram:ram_block_rtl_0|altsyncram_7i41:auto_generated|ram_block1a0~porta_address_reg0                                                                                                          ;
; 8.557 ; 8.787        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_31_24|altsyncram:ram_block_rtl_0|altsyncram_7i41:auto_generated|ram_block1a0~porta_we_reg                                                                                                                ;
; 8.558 ; 8.788        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|FreezerLogic:freezer|generic_ram_infer:freezer_bram|altsyncram:ram_block_rtl_0|altsyncram_hf41:auto_generated|ram_block1a0~porta_address_reg0 ;
; 8.558 ; 8.788        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|FreezerLogic:freezer|generic_ram_infer:freezer_bram|altsyncram:ram_block_rtl_0|altsyncram_hf41:auto_generated|ram_block1a0~porta_we_reg       ;
; 8.558 ; 8.788        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_amm:auto_generated|altsyncram_74b1:altsyncram2|ram_block5a0~porta_address_reg0  ;
; 8.558 ; 8.788        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4mm:auto_generated|altsyncram_p3b1:altsyncram2|ram_block5a0~porta_address_reg0  ;
; 8.558 ; 8.788        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_af71:auto_generated|ram_block1a10~porta_address_reg0                                                                                                                                      ;
; 8.558 ; 8.788        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_af71:auto_generated|ram_block1a12~porta_address_reg0                                                                                                                                      ;
; 8.558 ; 8.788        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_af71:auto_generated|ram_block1a13~porta_address_reg0                                                                                                                                      ;
; 8.558 ; 8.788        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_af71:auto_generated|ram_block1a14~porta_address_reg0                                                                                                                                      ;
; 8.558 ; 8.788        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_af71:auto_generated|ram_block1a1~porta_address_reg0                                                                                                                                       ;
; 8.558 ; 8.788        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_af71:auto_generated|ram_block1a2~porta_address_reg0                                                                                                                                       ;
; 8.558 ; 8.788        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_af71:auto_generated|ram_block1a3~porta_address_reg0                                                                                                                                       ;
; 8.558 ; 8.788        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_af71:auto_generated|ram_block1a4~porta_address_reg0                                                                                                                                       ;
; 8.558 ; 8.788        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_af71:auto_generated|ram_block1a5~porta_address_reg0                                                                                                                                       ;
; 8.558 ; 8.788        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_af71:auto_generated|ram_block1a6~porta_address_reg0                                                                                                                                       ;
; 8.558 ; 8.788        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_af71:auto_generated|ram_block1a7~porta_address_reg0                                                                                                                                       ;
; 8.558 ; 8.788        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_af71:auto_generated|ram_block1a9~porta_address_reg0                                                                                                                                       ;
; 8.558 ; 8.788        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_7_0|altsyncram:ram_block_rtl_0|altsyncram_7i41:auto_generated|ram_block1a0~porta_address_reg0                                                                                                            ;
; 8.558 ; 8.788        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_7_0|altsyncram:ram_block_rtl_0|altsyncram_7i41:auto_generated|ram_block1a0~porta_we_reg                                                                                                                  ;
; 8.559 ; 8.789        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_amm:auto_generated|altsyncram_74b1:altsyncram2|ram_block5a0                     ;
; 8.559 ; 8.789        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_amm:auto_generated|altsyncram_74b1:altsyncram2|ram_block5a0~portb_address_reg0  ;
; 8.559 ; 8.789        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_amm:auto_generated|altsyncram_74b1:altsyncram2|ram_block5a1                     ;
; 8.559 ; 8.789        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_amm:auto_generated|altsyncram_74b1:altsyncram2|ram_block5a2                     ;
; 8.559 ; 8.789        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_amm:auto_generated|altsyncram_74b1:altsyncram2|ram_block5a3                     ;
; 8.559 ; 8.789        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_amm:auto_generated|altsyncram_74b1:altsyncram2|ram_block5a4                     ;
; 8.559 ; 8.789        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_amm:auto_generated|altsyncram_74b1:altsyncram2|ram_block5a5                     ;
; 8.559 ; 8.789        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_amm:auto_generated|altsyncram_74b1:altsyncram2|ram_block5a6                     ;
; 8.559 ; 8.789        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4mm:auto_generated|altsyncram_p3b1:altsyncram2|ram_block5a0                     ;
; 8.559 ; 8.789        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4mm:auto_generated|altsyncram_p3b1:altsyncram2|ram_block5a0~portb_address_reg0  ;
; 8.559 ; 8.789        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4mm:auto_generated|altsyncram_p3b1:altsyncram2|ram_block5a1                     ;
; 8.559 ; 8.789        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4mm:auto_generated|altsyncram_p3b1:altsyncram2|ram_block5a2                     ;
; 8.559 ; 8.789        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4mm:auto_generated|altsyncram_p3b1:altsyncram2|ram_block5a3                     ;
; 8.559 ; 8.789        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4mm:auto_generated|altsyncram_p3b1:altsyncram2|ram_block5a4                     ;
; 8.559 ; 8.789        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4mm:auto_generated|altsyncram_p3b1:altsyncram2|ram_block5a5                     ;
; 8.559 ; 8.789        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_af71:auto_generated|ram_block1a0~porta_address_reg0                                                                                                                                       ;
; 8.559 ; 8.789        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_af71:auto_generated|ram_block1a11~porta_address_reg0                                                                                                                                      ;
; 8.559 ; 8.789        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_af71:auto_generated|ram_block1a15~porta_address_reg0                                                                                                                                      ;
; 8.559 ; 8.789        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpu_rom:zpu_rom1|altsyncram:ROM_rtl_0|altsyncram_af71:auto_generated|ram_block1a8~porta_address_reg0                                                                                                                                       ;
; 8.559 ; 8.789        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram23_16|altsyncram:ram_block_rtl_0|altsyncram_7i41:auto_generated|ram_block1a0~porta_address_reg0                                                                                                           ;
; 8.559 ; 8.789        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram23_16|altsyncram:ram_block_rtl_0|altsyncram_7i41:auto_generated|ram_block1a0~porta_we_reg                                                                                                                 ;
; 8.559 ; 8.789        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_15_8|altsyncram:ram_block_rtl_0|altsyncram_7i41:auto_generated|ram_block1a0~porta_address_reg0                                                                                                           ;
; 8.559 ; 8.789        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_15_8|altsyncram:ram_block_rtl_0|altsyncram_7i41:auto_generated|ram_block1a0~porta_we_reg                                                                                                                 ;
; 8.559 ; 8.789        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_31_24|altsyncram:ram_block_rtl_0|altsyncram_7i41:auto_generated|ram_block1a0~porta_datain_reg0                                                                                                           ;
; 8.560 ; 8.790        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|address_decoder:mmu1|FreezerLogic:freezer|generic_ram_infer:freezer_bram|altsyncram:ram_block_rtl_0|altsyncram_hf41:auto_generated|ram_block1a0~porta_datain_reg0  ;
; 8.560 ; 8.790        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:chbase_delay|altshift_taps:shift_reg_rtl_0|shift_taps_amm:auto_generated|altsyncram_74b1:altsyncram2|ram_block5a0~porta_datain_reg0   ;
; 8.560 ; 8.790        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|antic:antic1|wide_delay_line:vscrol_delay|altshift_taps:shift_reg_rtl_0|shift_taps_4mm:auto_generated|altsyncram_p3b1:altsyncram2|ram_block5a0~porta_datain_reg0   ;
; 8.560 ; 8.790        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a8~porta_address_reg0    ;
; 8.560 ; 8.790        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_7_0|altsyncram:ram_block_rtl_0|altsyncram_7i41:auto_generated|ram_block1a0~porta_datain_reg0                                                                                                             ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a0~porta_address_reg0    ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a10                      ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a11                      ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a12                      ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a13                      ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a14                      ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a15                      ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a16                      ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a17                      ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a18                      ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a19                      ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a40                      ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a41                      ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a42                      ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a43                      ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a44                      ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a45                      ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a46                      ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a47                      ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a48                      ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a49                      ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a50                      ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a51                      ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a52                      ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a53                      ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a54                      ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a55                      ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a8                       ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a8~portb_address_reg0    ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a9                       ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:sizem_delay|altshift_taps:shift_reg_rtl_0|shift_taps_h7n:auto_generated|altsyncram_h3b1:altsyncram2|ram_block5a0~porta_address_reg0     ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram23_16|altsyncram:ram_block_rtl_0|altsyncram_7i41:auto_generated|ram_block1a0~porta_datain_reg0                                                                                                            ;
; 8.561 ; 8.791        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; zpucore:zpu|generic_ram_infer:ram_15_8|altsyncram:ram_block_rtl_0|altsyncram_7i41:auto_generated|ram_block1a0~porta_datain_reg0                                                                                                            ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a0                       ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a0~portb_address_reg0    ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a1                       ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a2                       ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a20                      ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a21                      ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a22                      ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a23                      ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a24                      ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a25                      ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a26                      ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a27                      ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a28                      ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a29                      ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a3                       ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a30                      ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a31                      ;
; 8.562 ; 8.792        ; 0.230          ; Low Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; Rise       ; atari800core_simple_sdram:atarixl_simple_sdram1|atari800core:atari800xl|gtia:gtia1|wide_delay_line:hposm0_delay|altshift_taps:shift_reg_rtl_0|shift_taps_l7n:auto_generated|altsyncram_r3b1:altsyncram2|ram_block5a32                      ;
+-------+--------------+----------------+-----------------+--------------------------------------------------------------------+------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Minimum Pulse Width: 'CLOCK_27[0]'                                                                                                            ;
+--------+--------------+----------------+------------------+-------------+------------+-----------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock       ; Clock Edge ; Target                                                                      ;
+--------+--------------+----------------+------------------+-------------+------------+-----------------------------------------------------------------------------+
; 17.928 ; 17.928       ; 0.000          ; Low Pulse Width  ; CLOCK_27[0] ; Rise       ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0]           ;
; 17.928 ; 17.928       ; 0.000          ; Low Pulse Width  ; CLOCK_27[0] ; Rise       ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|observablevcoout ;
; 17.960 ; 17.960       ; 0.000          ; Low Pulse Width  ; CLOCK_27[0] ; Rise       ; CLOCK_27[0]~input|o                                                         ;
; 17.970 ; 17.970       ; 0.000          ; Low Pulse Width  ; CLOCK_27[0] ; Rise       ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|inclk[0]         ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27[0] ; Rise       ; CLOCK_27[0]~input|i                                                         ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27[0] ; Rise       ; CLOCK_27[0]~input|i                                                         ;
; 19.067 ; 19.067       ; 0.000          ; High Pulse Width ; CLOCK_27[0] ; Rise       ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|inclk[0]         ;
; 19.077 ; 19.077       ; 0.000          ; High Pulse Width ; CLOCK_27[0] ; Rise       ; CLOCK_27[0]~input|o                                                         ;
; 19.108 ; 19.108       ; 0.000          ; High Pulse Width ; CLOCK_27[0] ; Rise       ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0]           ;
; 19.108 ; 19.108       ; 0.000          ; High Pulse Width ; CLOCK_27[0] ; Rise       ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|observablevcoout ;
; 33.037 ; 37.037       ; 4.000          ; Port Rate        ; CLOCK_27[0] ; Rise       ; CLOCK_27[0]                                                                 ;
+--------+--------------+----------------+------------------+-------------+------------+-----------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Minimum Pulse Width: '\gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0]'                                                                                                                        ;
+--------+--------------+----------------+------------------+-------------------------------------------------------------------+------------+-----------------------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock                                                             ; Clock Edge ; Target                                                                                  ;
+--------+--------------+----------------+------------------+-------------------------------------------------------------------+------------+-----------------------------------------------------------------------------------------+
; 24.978 ; 24.978       ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0]                      ;
; 24.978 ; 24.978       ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1]                      ;
; 24.978 ; 24.978       ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[2]                      ;
; 24.978 ; 24.978       ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3]                      ;
; 24.978 ; 24.978       ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|observablevcoout            ;
; 24.993 ; 24.993       ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|inclk[0]                    ;
; 24.994 ; 24.994       ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl|inclk[0] ;
; 24.994 ; 24.994       ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl|outclk   ;
; 25.004 ; 25.004       ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl|inclk[0] ;
; 25.004 ; 25.004       ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl|outclk   ;
; 25.006 ; 25.006       ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|inclk[0]                    ;
; 25.020 ; 25.020       ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0]                      ;
; 25.020 ; 25.020       ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1]                      ;
; 25.020 ; 25.020       ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[2]                      ;
; 25.020 ; 25.020       ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3]                      ;
; 25.020 ; 25.020       ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0] ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|observablevcoout            ;
+--------+--------------+----------------+------------------+-------------------------------------------------------------------+------------+-----------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast 1200mV 0C Model Minimum Pulse Width: '\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3]'                                                                                                                            ;
+-----------+--------------+----------------+------------------+--------------------------------------------------------------------+------------+------------------------------------------------------------------------------------------+
; Slack     ; Actual Width ; Required Width ; Type             ; Clock                                                              ; Clock Edge ; Target                                                                                   ;
+-----------+--------------+----------------+------------------+--------------------------------------------------------------------+------------+------------------------------------------------------------------------------------------+
; 31999.751 ; 31999.967    ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|Equal5~0_OTERM1                                                       ;
; 31999.751 ; 31999.967    ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_kbd_data                                                          ;
; 31999.751 ; 31999.967    ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_parity                                                            ;
; 31999.751 ; 31999.967    ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_r_inc                                                             ;
; 31999.751 ; 31999.967    ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_rptr[0]                                                           ;
; 31999.751 ; 31999.967    ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_rptr[1]                                                           ;
; 31999.751 ; 31999.967    ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_rptr[2]                                                           ;
; 31999.751 ; 31999.967    ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[0]                                                        ;
; 31999.751 ; 31999.967    ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[1]                                                        ;
; 31999.751 ; 31999.967    ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[2]                                                        ;
; 31999.751 ; 31999.967    ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[3]                                                        ;
; 31999.751 ; 31999.967    ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[4]                                                        ;
; 31999.751 ; 31999.967    ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[5]                                                        ;
; 31999.751 ; 31999.967    ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[6]                                                        ;
; 31999.751 ; 31999.967    ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[7]                                                        ;
; 31999.751 ; 31999.967    ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_state[0]                                                       ;
; 31999.751 ; 31999.967    ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_state[1]                                                       ;
; 31999.751 ; 31999.967    ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_state[2]                                                       ;
; 31999.751 ; 31999.967    ; 0.216          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_state[3]                                                       ;
; 31999.782 ; 31999.966    ; 0.184          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_parity                                                            ;
; 31999.782 ; 31999.966    ; 0.184          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_r_inc                                                             ;
; 31999.782 ; 31999.966    ; 0.184          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_rptr[0]                                                           ;
; 31999.782 ; 31999.966    ; 0.184          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_rptr[1]                                                           ;
; 31999.782 ; 31999.966    ; 0.184          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_rptr[2]                                                           ;
; 31999.782 ; 31999.966    ; 0.184          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[0]                                                        ;
; 31999.782 ; 31999.966    ; 0.184          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[1]                                                        ;
; 31999.782 ; 31999.966    ; 0.184          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[2]                                                        ;
; 31999.782 ; 31999.966    ; 0.184          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[3]                                                        ;
; 31999.782 ; 31999.966    ; 0.184          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[4]                                                        ;
; 31999.782 ; 31999.966    ; 0.184          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[5]                                                        ;
; 31999.782 ; 31999.966    ; 0.184          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[6]                                                        ;
; 31999.782 ; 31999.966    ; 0.184          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[7]                                                        ;
; 31999.783 ; 31999.967    ; 0.184          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|Equal5~0_OTERM1                                                       ;
; 31999.783 ; 31999.967    ; 0.184          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_kbd_data                                                          ;
; 31999.783 ; 31999.967    ; 0.184          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_state[0]                                                       ;
; 31999.783 ; 31999.967    ; 0.184          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_state[1]                                                       ;
; 31999.783 ; 31999.967    ; 0.184          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_state[2]                                                       ;
; 31999.783 ; 31999.967    ; 0.184          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_state[3]                                                       ;
; 31999.962 ; 31999.962    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_parity|clk                                                                ;
; 31999.962 ; 31999.962    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_r_inc|clk                                                                 ;
; 31999.962 ; 31999.962    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_rptr[0]|clk                                                               ;
; 31999.962 ; 31999.962    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_rptr[1]|clk                                                               ;
; 31999.962 ; 31999.962    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_rptr[2]|clk                                                               ;
; 31999.962 ; 31999.962    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_byte[0]|clk                                                            ;
; 31999.962 ; 31999.962    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_byte[1]|clk                                                            ;
; 31999.962 ; 31999.962    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_byte[2]|clk                                                            ;
; 31999.962 ; 31999.962    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_byte[3]|clk                                                            ;
; 31999.962 ; 31999.962    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_byte[4]|clk                                                            ;
; 31999.962 ; 31999.962    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_byte[5]|clk                                                            ;
; 31999.962 ; 31999.962    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_byte[6]|clk                                                            ;
; 31999.962 ; 31999.962    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_byte[7]|clk                                                            ;
; 31999.963 ; 31999.963    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|Equal5~0_NEW_REG0|clk                                                         ;
; 31999.963 ; 31999.963    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_kbd_data|clk                                                              ;
; 31999.963 ; 31999.963    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_state[0]|clk                                                           ;
; 31999.963 ; 31999.963    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_state[1]|clk                                                           ;
; 31999.963 ; 31999.963    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_state[2]|clk                                                           ;
; 31999.963 ; 31999.963    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_state[3]|clk                                                           ;
; 31999.964 ; 31999.964    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|wire_pll1_clk[3]~clkctrl|inclk[0] ;
; 31999.964 ; 31999.964    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|wire_pll1_clk[3]~clkctrl|outclk   ;
; 31999.972 ; 31999.972    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|wire_pll1_clk[3]~clkctrl|inclk[0] ;
; 31999.972 ; 31999.972    ; 0.000          ; Low Pulse Width  ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|wire_pll1_clk[3]~clkctrl|outclk   ;
; 31999.973 ; 31999.973    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|Equal5~0_NEW_REG0|clk                                                         ;
; 31999.973 ; 31999.973    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_kbd_data|clk                                                              ;
; 31999.973 ; 31999.973    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_parity|clk                                                                ;
; 31999.973 ; 31999.973    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_r_inc|clk                                                                 ;
; 31999.973 ; 31999.973    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_rptr[0]|clk                                                               ;
; 31999.973 ; 31999.973    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_rptr[1]|clk                                                               ;
; 31999.973 ; 31999.973    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_rptr[2]|clk                                                               ;
; 31999.973 ; 31999.973    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_byte[0]|clk                                                            ;
; 31999.973 ; 31999.973    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_byte[1]|clk                                                            ;
; 31999.973 ; 31999.973    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_byte[2]|clk                                                            ;
; 31999.973 ; 31999.973    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_byte[3]|clk                                                            ;
; 31999.973 ; 31999.973    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_byte[4]|clk                                                            ;
; 31999.973 ; 31999.973    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_byte[5]|clk                                                            ;
; 31999.973 ; 31999.973    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_byte[6]|clk                                                            ;
; 31999.973 ; 31999.973    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_byte[7]|clk                                                            ;
; 31999.973 ; 31999.973    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_state[0]|clk                                                           ;
; 31999.973 ; 31999.973    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_state[1]|clk                                                           ;
; 31999.973 ; 31999.973    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_state[2]|clk                                                           ;
; 31999.973 ; 31999.973    ; 0.000          ; High Pulse Width ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; my_user_io|ps2_tx_state[3]|clk                                                           ;
; 63997.936 ; 63999.936    ; 2.000          ; Min Period       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|Equal5~0_OTERM1                                                       ;
; 63997.936 ; 63999.936    ; 2.000          ; Min Period       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_kbd_data                                                          ;
; 63997.936 ; 63999.936    ; 2.000          ; Min Period       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_parity                                                            ;
; 63997.936 ; 63999.936    ; 2.000          ; Min Period       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_r_inc                                                             ;
; 63997.936 ; 63999.936    ; 2.000          ; Min Period       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_rptr[0]                                                           ;
; 63997.936 ; 63999.936    ; 2.000          ; Min Period       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_rptr[1]                                                           ;
; 63997.936 ; 63999.936    ; 2.000          ; Min Period       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_rptr[2]                                                           ;
; 63997.936 ; 63999.936    ; 2.000          ; Min Period       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[0]                                                        ;
; 63997.936 ; 63999.936    ; 2.000          ; Min Period       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[1]                                                        ;
; 63997.936 ; 63999.936    ; 2.000          ; Min Period       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[2]                                                        ;
; 63997.936 ; 63999.936    ; 2.000          ; Min Period       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[3]                                                        ;
; 63997.936 ; 63999.936    ; 2.000          ; Min Period       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[4]                                                        ;
; 63997.936 ; 63999.936    ; 2.000          ; Min Period       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[5]                                                        ;
; 63997.936 ; 63999.936    ; 2.000          ; Min Period       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[6]                                                        ;
; 63997.936 ; 63999.936    ; 2.000          ; Min Period       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_byte[7]                                                        ;
; 63997.936 ; 63999.936    ; 2.000          ; Min Period       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_state[0]                                                       ;
; 63997.936 ; 63999.936    ; 2.000          ; Min Period       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_state[1]                                                       ;
; 63997.936 ; 63999.936    ; 2.000          ; Min Period       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_state[2]                                                       ;
; 63997.936 ; 63999.936    ; 2.000          ; Min Period       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; Rise       ; user_io:my_user_io|ps2_tx_state[3]                                                       ;
+-----------+--------------+----------------+------------------+--------------------------------------------------------------------+------------+------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------+
; Setup Times                                                                                                                   ;
+---------------+-------------+-------+-------+------------+--------------------------------------------------------------------+
; Data Port     ; Clock Port  ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                                    ;
+---------------+-------------+-------+-------+------------+--------------------------------------------------------------------+
; SDRAM_DQ[*]   ; CLOCK_27[0] ; 2.249 ; 2.932 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; CLOCK_27[0] ; 1.962 ; 2.614 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; CLOCK_27[0] ; 2.150 ; 2.828 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; CLOCK_27[0] ; 2.181 ; 2.840 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; CLOCK_27[0] ; 2.122 ; 2.802 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; CLOCK_27[0] ; 2.074 ; 2.756 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; CLOCK_27[0] ; 2.112 ; 2.792 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; CLOCK_27[0] ; 1.996 ; 2.673 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; CLOCK_27[0] ; 2.028 ; 2.695 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; CLOCK_27[0] ; 1.741 ; 2.331 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; CLOCK_27[0] ; 1.762 ; 2.358 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; CLOCK_27[0] ; 2.193 ; 2.875 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; CLOCK_27[0] ; 2.201 ; 2.887 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; CLOCK_27[0] ; 2.159 ; 2.803 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; CLOCK_27[0] ; 2.249 ; 2.932 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; CLOCK_27[0] ; 2.186 ; 2.855 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; CLOCK_27[0] ; 2.183 ; 2.871 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
+---------------+-------------+-------+-------+------------+--------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------+
; Hold Times                                                                                                                      ;
+---------------+-------------+--------+--------+------------+--------------------------------------------------------------------+
; Data Port     ; Clock Port  ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                                    ;
+---------------+-------------+--------+--------+------------+--------------------------------------------------------------------+
; SDRAM_DQ[*]   ; CLOCK_27[0] ; -0.915 ; -1.473 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; CLOCK_27[0] ; -0.936 ; -1.488 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; CLOCK_27[0] ; -0.939 ; -1.491 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; CLOCK_27[0] ; -0.941 ; -1.493 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; CLOCK_27[0] ; -0.941 ; -1.493 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; CLOCK_27[0] ; -0.915 ; -1.473 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; CLOCK_27[0] ; -0.925 ; -1.483 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; CLOCK_27[0] ; -0.916 ; -1.474 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; CLOCK_27[0] ; -0.916 ; -1.474 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; CLOCK_27[0] ; -0.923 ; -1.475 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; CLOCK_27[0] ; -0.923 ; -1.475 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; CLOCK_27[0] ; -0.928 ; -1.480 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; CLOCK_27[0] ; -0.928 ; -1.480 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; CLOCK_27[0] ; -0.929 ; -1.481 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; CLOCK_27[0] ; -0.929 ; -1.481 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; CLOCK_27[0] ; -0.940 ; -1.492 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; CLOCK_27[0] ; -0.940 ; -1.492 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
+---------------+-------------+--------+--------+------------+--------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------+
; Clock to Output Times                                                                                                           ;
+---------------+-------------+--------+--------+------------+--------------------------------------------------------------------+
; Data Port     ; Clock Port  ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                                    ;
+---------------+-------------+--------+--------+------------+--------------------------------------------------------------------+
; SDRAM_A[*]    ; CLOCK_27[0] ; 1.346  ; 1.217  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[0]   ; CLOCK_27[0] ; 1.219  ; 1.063  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[1]   ; CLOCK_27[0] ; 1.220  ; 1.064  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[2]   ; CLOCK_27[0] ; 1.221  ; 1.065  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[3]   ; CLOCK_27[0] ; 1.231  ; 1.075  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[4]   ; CLOCK_27[0] ; 1.179  ; 1.040  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[5]   ; CLOCK_27[0] ; 1.346  ; 1.217  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[6]   ; CLOCK_27[0] ; 1.331  ; 1.202  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[7]   ; CLOCK_27[0] ; 1.335  ; 1.206  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[8]   ; CLOCK_27[0] ; 1.335  ; 1.206  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[9]   ; CLOCK_27[0] ; 1.334  ; 1.205  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[10]  ; CLOCK_27[0] ; 1.220  ; 1.064  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[11]  ; CLOCK_27[0] ; 1.342  ; 1.213  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_BA[*]   ; CLOCK_27[0] ; 1.218  ; 1.062  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[0]  ; CLOCK_27[0] ; 1.218  ; 1.062  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[1]  ; CLOCK_27[0] ; 1.210  ; 1.054  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CKE     ; CLOCK_27[0] ; 1.294  ; 1.206  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQ[*]   ; CLOCK_27[0] ; 1.342  ; 1.213  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; CLOCK_27[0] ; 1.326  ; 1.197  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; CLOCK_27[0] ; 1.323  ; 1.194  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; CLOCK_27[0] ; 1.171  ; 1.032  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; CLOCK_27[0] ; 1.171  ; 1.032  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; CLOCK_27[0] ; 1.232  ; 1.076  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; CLOCK_27[0] ; 1.242  ; 1.086  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; CLOCK_27[0] ; 1.231  ; 1.075  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; CLOCK_27[0] ; 1.231  ; 1.075  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; CLOCK_27[0] ; 1.319  ; 1.190  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; CLOCK_27[0] ; 1.319  ; 1.190  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; CLOCK_27[0] ; 1.334  ; 1.205  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; CLOCK_27[0] ; 1.334  ; 1.205  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; CLOCK_27[0] ; 1.163  ; 1.024  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; CLOCK_27[0] ; 1.333  ; 1.204  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; CLOCK_27[0] ; 1.342  ; 1.213  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; CLOCK_27[0] ; 1.172  ; 1.033  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQMH    ; CLOCK_27[0] ; 1.319  ; 1.190  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQML    ; CLOCK_27[0] ; 1.231  ; 1.075  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_nCAS    ; CLOCK_27[0] ; 1.219  ; 1.063  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_nRAS    ; CLOCK_27[0] ; 1.217  ; 1.061  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_nWE     ; CLOCK_27[0] ; 1.231  ; 1.075  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; AUDIO_L       ; CLOCK_27[0] ; 3.564  ; 3.417  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; AUDIO_R       ; CLOCK_27[0] ; 2.906  ; 2.708  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; LED           ; CLOCK_27[0] ; 3.627  ; 3.705  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; VGA_B[*]      ; CLOCK_27[0] ; 2.192  ; 2.169  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_B[0]     ; CLOCK_27[0] ; 2.192  ; 2.169  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_B[1]     ; CLOCK_27[0] ; 2.032  ; 2.004  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_B[2]     ; CLOCK_27[0] ; 1.977  ; 1.934  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_B[3]     ; CLOCK_27[0] ; 1.801  ; 1.755  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_B[4]     ; CLOCK_27[0] ; 1.648  ; 1.572  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_B[5]     ; CLOCK_27[0] ; 1.445  ; 1.361  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; VGA_G[*]      ; CLOCK_27[0] ; 2.427  ; 2.457  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_G[0]     ; CLOCK_27[0] ; 2.427  ; 2.457  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_G[1]     ; CLOCK_27[0] ; 2.312  ; 2.301  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_G[2]     ; CLOCK_27[0] ; 2.383  ; 2.399  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_G[3]     ; CLOCK_27[0] ; 2.026  ; 2.008  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_G[4]     ; CLOCK_27[0] ; 2.199  ; 2.198  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_G[5]     ; CLOCK_27[0] ; 2.139  ; 2.124  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; VGA_HS        ; CLOCK_27[0] ; 3.206  ; 3.015  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; VGA_R[*]      ; CLOCK_27[0] ; 1.830  ; 1.793  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_R[0]     ; CLOCK_27[0] ; 1.547  ; 1.463  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_R[1]     ; CLOCK_27[0] ; 1.533  ; 1.447  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_R[2]     ; CLOCK_27[0] ; 1.731  ; 1.676  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_R[3]     ; CLOCK_27[0] ; 1.830  ; 1.793  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_R[4]     ; CLOCK_27[0] ; 1.826  ; 1.778  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_R[5]     ; CLOCK_27[0] ; 1.769  ; 1.724  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; VGA_VS        ; CLOCK_27[0] ; 3.043  ; 2.832  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SDRAM_CLK     ; CLOCK_27[0] ; -1.547 ;        ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; SDRAM_CLK     ; CLOCK_27[0] ;        ; -1.663 ; Fall       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[2] ;
+---------------+-------------+--------+--------+------------+--------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------+
; Minimum Clock to Output Times                                                                                                   ;
+---------------+-------------+--------+--------+------------+--------------------------------------------------------------------+
; Data Port     ; Clock Port  ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                                    ;
+---------------+-------------+--------+--------+------------+--------------------------------------------------------------------+
; SDRAM_A[*]    ; CLOCK_27[0] ; 0.770  ; 0.631  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[0]   ; CLOCK_27[0] ; 0.810  ; 0.654  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[1]   ; CLOCK_27[0] ; 0.811  ; 0.655  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[2]   ; CLOCK_27[0] ; 0.812  ; 0.656  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[3]   ; CLOCK_27[0] ; 0.822  ; 0.666  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[4]   ; CLOCK_27[0] ; 0.770  ; 0.631  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[5]   ; CLOCK_27[0] ; 0.938  ; 0.809  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[6]   ; CLOCK_27[0] ; 0.923  ; 0.794  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[7]   ; CLOCK_27[0] ; 0.927  ; 0.798  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[8]   ; CLOCK_27[0] ; 0.927  ; 0.798  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[9]   ; CLOCK_27[0] ; 0.926  ; 0.797  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[10]  ; CLOCK_27[0] ; 0.811  ; 0.655  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[11]  ; CLOCK_27[0] ; 0.934  ; 0.805  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_BA[*]   ; CLOCK_27[0] ; 0.801  ; 0.645  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[0]  ; CLOCK_27[0] ; 0.809  ; 0.653  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[1]  ; CLOCK_27[0] ; 0.801  ; 0.645  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CKE     ; CLOCK_27[0] ; 0.885  ; 0.796  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQ[*]   ; CLOCK_27[0] ; 0.755  ; 0.616  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; CLOCK_27[0] ; 0.919  ; 0.790  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; CLOCK_27[0] ; 0.915  ; 0.786  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; CLOCK_27[0] ; 0.763  ; 0.624  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; CLOCK_27[0] ; 0.763  ; 0.624  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; CLOCK_27[0] ; 0.823  ; 0.667  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; CLOCK_27[0] ; 0.833  ; 0.677  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; CLOCK_27[0] ; 0.822  ; 0.666  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; CLOCK_27[0] ; 0.822  ; 0.666  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; CLOCK_27[0] ; 0.912  ; 0.783  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; CLOCK_27[0] ; 0.912  ; 0.783  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; CLOCK_27[0] ; 0.926  ; 0.797  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; CLOCK_27[0] ; 0.926  ; 0.797  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; CLOCK_27[0] ; 0.755  ; 0.616  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; CLOCK_27[0] ; 0.925  ; 0.796  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; CLOCK_27[0] ; 0.934  ; 0.805  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; CLOCK_27[0] ; 0.764  ; 0.625  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQMH    ; CLOCK_27[0] ; 0.911  ; 0.782  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQML    ; CLOCK_27[0] ; 0.822  ; 0.666  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_nCAS    ; CLOCK_27[0] ; 0.810  ; 0.654  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_nRAS    ; CLOCK_27[0] ; 0.808  ; 0.652  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_nWE     ; CLOCK_27[0] ; 0.822  ; 0.666  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; AUDIO_L       ; CLOCK_27[0] ; 3.119  ; 2.966  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; AUDIO_R       ; CLOCK_27[0] ; 2.486  ; 2.286  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; LED           ; CLOCK_27[0] ; 3.167  ; 3.253  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; VGA_B[*]      ; CLOCK_27[0] ; 1.031  ; 0.945  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_B[0]     ; CLOCK_27[0] ; 1.748  ; 1.720  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_B[1]     ; CLOCK_27[0] ; 1.595  ; 1.562  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_B[2]     ; CLOCK_27[0] ; 1.542  ; 1.495  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_B[3]     ; CLOCK_27[0] ; 1.372  ; 1.323  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_B[4]     ; CLOCK_27[0] ; 1.225  ; 1.147  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_B[5]     ; CLOCK_27[0] ; 1.031  ; 0.945  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; VGA_G[*]      ; CLOCK_27[0] ; 1.589  ; 1.566  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_G[0]     ; CLOCK_27[0] ; 1.980  ; 2.004  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_G[1]     ; CLOCK_27[0] ; 1.864  ; 1.847  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_G[2]     ; CLOCK_27[0] ; 1.932  ; 1.941  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_G[3]     ; CLOCK_27[0] ; 1.589  ; 1.566  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_G[4]     ; CLOCK_27[0] ; 1.755  ; 1.749  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_G[5]     ; CLOCK_27[0] ; 1.698  ; 1.677  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; VGA_HS        ; CLOCK_27[0] ; 2.775  ; 2.580  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; VGA_R[*]      ; CLOCK_27[0] ; 1.115  ; 1.027  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_R[0]     ; CLOCK_27[0] ; 1.129  ; 1.042  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_R[1]     ; CLOCK_27[0] ; 1.115  ; 1.027  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_R[2]     ; CLOCK_27[0] ; 1.306  ; 1.247  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_R[3]     ; CLOCK_27[0] ; 1.400  ; 1.359  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_R[4]     ; CLOCK_27[0] ; 1.397  ; 1.345  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_R[5]     ; CLOCK_27[0] ; 1.343  ; 1.294  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; VGA_VS        ; CLOCK_27[0] ; 2.618  ; 2.404  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SDRAM_CLK     ; CLOCK_27[0] ; -1.932 ;        ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; SDRAM_CLK     ; CLOCK_27[0] ;        ; -2.049 ; Fall       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[2] ;
+---------------+-------------+--------+--------+------------+--------------------------------------------------------------------+


+----------------------------------------------------------+
; Propagation Delay                                        ;
+------------+-------------+-------+-------+-------+-------+
; Input Port ; Output Port ; RR    ; RF    ; FR    ; FF    ;
+------------+-------------+-------+-------+-------+-------+
; CONF_DATA0 ; SPI_DO      ; 6.553 ; 6.553 ; 7.250 ; 7.223 ;
+------------+-------------+-------+-------+-------+-------+


+----------------------------------------------------------+
; Minimum Propagation Delay                                ;
+------------+-------------+-------+-------+-------+-------+
; Input Port ; Output Port ; RR    ; RF    ; FR    ; FF    ;
+------------+-------------+-------+-------+-------+-------+
; CONF_DATA0 ; SPI_DO      ; 5.604 ; 5.487 ; 6.180 ; 6.180 ;
+------------+-------------+-------+-------+-------+-------+


+-------------------------------------------------------------------------------------------------------------------------------+
; Output Enable Times                                                                                                           ;
+---------------+-------------+-------+-------+------------+--------------------------------------------------------------------+
; Data Port     ; Clock Port  ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                                    ;
+---------------+-------------+-------+-------+------------+--------------------------------------------------------------------+
; SDRAM_DQ[*]   ; CLOCK_27[0] ; 1.987 ; 2.032 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; CLOCK_27[0] ; 1.994 ; 2.039 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; CLOCK_27[0] ; 1.991 ; 2.036 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; CLOCK_27[0] ; 2.009 ; 2.054 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; CLOCK_27[0] ; 2.009 ; 2.054 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; CLOCK_27[0] ; 2.002 ; 2.054 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; CLOCK_27[0] ; 2.012 ; 2.064 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; CLOCK_27[0] ; 2.001 ; 2.053 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; CLOCK_27[0] ; 2.001 ; 2.053 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; CLOCK_27[0] ; 1.987 ; 2.032 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; CLOCK_27[0] ; 1.987 ; 2.032 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; CLOCK_27[0] ; 2.002 ; 2.047 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; CLOCK_27[0] ; 2.002 ; 2.047 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; CLOCK_27[0] ; 2.001 ; 2.046 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; CLOCK_27[0] ; 2.001 ; 2.046 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; CLOCK_27[0] ; 2.010 ; 2.055 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; CLOCK_27[0] ; 2.010 ; 2.055 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
+---------------+-------------+-------+-------+------------+--------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------+
; Minimum Output Enable Times                                                                                                   ;
+---------------+-------------+-------+-------+------------+--------------------------------------------------------------------+
; Data Port     ; Clock Port  ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                                    ;
+---------------+-------------+-------+-------+------------+--------------------------------------------------------------------+
; SDRAM_DQ[*]   ; CLOCK_27[0] ; 0.779 ; 0.779 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; CLOCK_27[0] ; 0.786 ; 0.786 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; CLOCK_27[0] ; 0.782 ; 0.782 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; CLOCK_27[0] ; 0.800 ; 0.800 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; CLOCK_27[0] ; 0.800 ; 0.800 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; CLOCK_27[0] ; 0.833 ; 0.833 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; CLOCK_27[0] ; 0.843 ; 0.843 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; CLOCK_27[0] ; 0.832 ; 0.832 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; CLOCK_27[0] ; 0.832 ; 0.832 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; CLOCK_27[0] ; 0.779 ; 0.779 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; CLOCK_27[0] ; 0.779 ; 0.779 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; CLOCK_27[0] ; 0.793 ; 0.793 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; CLOCK_27[0] ; 0.793 ; 0.793 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; CLOCK_27[0] ; 0.792 ; 0.792 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; CLOCK_27[0] ; 0.792 ; 0.792 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; CLOCK_27[0] ; 0.801 ; 0.801 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; CLOCK_27[0] ; 0.801 ; 0.801 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
+---------------+-------------+-------+-------+------------+--------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------+
; Output Disable Times                                                                                                                  ;
+---------------+-------------+-----------+-----------+------------+--------------------------------------------------------------------+
; Data Port     ; Clock Port  ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                                    ;
+---------------+-------------+-----------+-----------+------------+--------------------------------------------------------------------+
; SDRAM_DQ[*]   ; CLOCK_27[0] ; 2.064     ; 2.064     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; CLOCK_27[0] ; 2.071     ; 2.071     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; CLOCK_27[0] ; 2.068     ; 2.068     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; CLOCK_27[0] ; 2.086     ; 2.086     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; CLOCK_27[0] ; 2.086     ; 2.086     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; CLOCK_27[0] ; 2.086     ; 2.086     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; CLOCK_27[0] ; 2.096     ; 2.096     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; CLOCK_27[0] ; 2.085     ; 2.085     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; CLOCK_27[0] ; 2.085     ; 2.085     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; CLOCK_27[0] ; 2.064     ; 2.064     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; CLOCK_27[0] ; 2.064     ; 2.064     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; CLOCK_27[0] ; 2.079     ; 2.079     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; CLOCK_27[0] ; 2.079     ; 2.079     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; CLOCK_27[0] ; 2.078     ; 2.078     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; CLOCK_27[0] ; 2.078     ; 2.078     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; CLOCK_27[0] ; 2.087     ; 2.087     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; CLOCK_27[0] ; 2.087     ; 2.087     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
+---------------+-------------+-----------+-----------+------------+--------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------+
; Minimum Output Disable Times                                                                                                          ;
+---------------+-------------+-----------+-----------+------------+--------------------------------------------------------------------+
; Data Port     ; Clock Port  ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                                    ;
+---------------+-------------+-----------+-----------+------------+--------------------------------------------------------------------+
; SDRAM_DQ[*]   ; CLOCK_27[0] ; 0.810     ; 1.038     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; CLOCK_27[0] ; 0.817     ; 1.045     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; CLOCK_27[0] ; 0.813     ; 1.041     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; CLOCK_27[0] ; 0.831     ; 1.059     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; CLOCK_27[0] ; 0.831     ; 1.059     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; CLOCK_27[0] ; 0.864     ; 1.108     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; CLOCK_27[0] ; 0.874     ; 1.118     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; CLOCK_27[0] ; 0.863     ; 1.107     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; CLOCK_27[0] ; 0.863     ; 1.107     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; CLOCK_27[0] ; 0.810     ; 1.038     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; CLOCK_27[0] ; 0.810     ; 1.038     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; CLOCK_27[0] ; 0.824     ; 1.052     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; CLOCK_27[0] ; 0.824     ; 1.052     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; CLOCK_27[0] ; 0.823     ; 1.051     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; CLOCK_27[0] ; 0.823     ; 1.051     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; CLOCK_27[0] ; 0.832     ; 1.060     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; CLOCK_27[0] ; 0.832     ; 1.060     ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
+---------------+-------------+-----------+-----------+------------+--------------------------------------------------------------------+


---------------------------------------------
; Fast 1200mV 0C Model Metastability Report ;
---------------------------------------------
No synchronizer chains to report.


+------------------------------------------------------------------------------------------------------------------------------------+
; Multicorner Timing Analysis Summary                                                                                                ;
+---------------------------------------------------------------------+-----------+-------+----------+---------+---------------------+
; Clock                                                               ; Setup     ; Hold  ; Recovery ; Removal ; Minimum Pulse Width ;
+---------------------------------------------------------------------+-----------+-------+----------+---------+---------------------+
; Worst-case Slack                                                    ; 0.603     ; 0.137 ; 10.081   ; 0.781   ; 4.098               ;
;  CLOCK_27[0]                                                        ; N/A       ; N/A   ; N/A      ; N/A     ; 17.928              ;
;  \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 1.656     ; 0.187 ; N/A      ; N/A     ; 4.098               ;
;  \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.603     ; 0.137 ; 10.081   ; 0.781   ; 8.377               ;
;  \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 63993.379 ; 0.187 ; N/A      ; N/A     ; 31999.661           ;
;  \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0]  ; N/A       ; N/A   ; N/A      ; N/A     ; 24.963              ;
; Design-wide TNS                                                     ; 0.0       ; 0.0   ; 0.0      ; 0.0     ; 0.0                 ;
;  CLOCK_27[0]                                                        ; N/A       ; N/A   ; N/A      ; N/A     ; 0.000               ;
;  \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 0.000     ; 0.000 ; N/A      ; N/A     ; 0.000               ;
;  \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 0.000     ; 0.000 ; 0.000    ; 0.000   ; 0.000               ;
;  \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 0.000     ; 0.000 ; N/A      ; N/A     ; 0.000               ;
;  \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0]  ; N/A       ; N/A   ; N/A      ; N/A     ; 0.000               ;
+---------------------------------------------------------------------+-----------+-------+----------+---------+---------------------+


+-------------------------------------------------------------------------------------------------------------------------------+
; Setup Times                                                                                                                   ;
+---------------+-------------+-------+-------+------------+--------------------------------------------------------------------+
; Data Port     ; Clock Port  ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                                    ;
+---------------+-------------+-------+-------+------------+--------------------------------------------------------------------+
; SDRAM_DQ[*]   ; CLOCK_27[0] ; 4.916 ; 4.927 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; CLOCK_27[0] ; 4.267 ; 4.278 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; CLOCK_27[0] ; 4.765 ; 4.770 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; CLOCK_27[0] ; 4.745 ; 4.743 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; CLOCK_27[0] ; 4.675 ; 4.688 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; CLOCK_27[0] ; 4.492 ; 4.514 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; CLOCK_27[0] ; 4.572 ; 4.631 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; CLOCK_27[0] ; 4.306 ; 4.373 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; CLOCK_27[0] ; 4.346 ; 4.400 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; CLOCK_27[0] ; 3.801 ; 3.756 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; CLOCK_27[0] ; 3.898 ; 3.809 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; CLOCK_27[0] ; 4.824 ; 4.792 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; CLOCK_27[0] ; 4.827 ; 4.871 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; CLOCK_27[0] ; 4.727 ; 4.687 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; CLOCK_27[0] ; 4.916 ; 4.927 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; CLOCK_27[0] ; 4.793 ; 4.799 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; CLOCK_27[0] ; 4.814 ; 4.851 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
+---------------+-------------+-------+-------+------------+--------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------+
; Hold Times                                                                                                                      ;
+---------------+-------------+--------+--------+------------+--------------------------------------------------------------------+
; Data Port     ; Clock Port  ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                                    ;
+---------------+-------------+--------+--------+------------+--------------------------------------------------------------------+
; SDRAM_DQ[*]   ; CLOCK_27[0] ; -0.915 ; -1.473 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; CLOCK_27[0] ; -0.936 ; -1.488 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; CLOCK_27[0] ; -0.939 ; -1.491 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; CLOCK_27[0] ; -0.941 ; -1.493 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; CLOCK_27[0] ; -0.941 ; -1.493 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; CLOCK_27[0] ; -0.915 ; -1.473 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; CLOCK_27[0] ; -0.925 ; -1.483 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; CLOCK_27[0] ; -0.916 ; -1.474 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; CLOCK_27[0] ; -0.916 ; -1.474 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; CLOCK_27[0] ; -0.923 ; -1.475 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; CLOCK_27[0] ; -0.923 ; -1.475 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; CLOCK_27[0] ; -0.928 ; -1.480 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; CLOCK_27[0] ; -0.928 ; -1.480 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; CLOCK_27[0] ; -0.929 ; -1.481 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; CLOCK_27[0] ; -0.929 ; -1.481 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; CLOCK_27[0] ; -0.940 ; -1.492 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; CLOCK_27[0] ; -0.940 ; -1.492 ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
+---------------+-------------+--------+--------+------------+--------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------+
; Clock to Output Times                                                                                                           ;
+---------------+-------------+--------+--------+------------+--------------------------------------------------------------------+
; Data Port     ; Clock Port  ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                                    ;
+---------------+-------------+--------+--------+------------+--------------------------------------------------------------------+
; SDRAM_A[*]    ; CLOCK_27[0] ; 2.860  ; 2.522  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[0]   ; CLOCK_27[0] ; 2.635  ; 2.348  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[1]   ; CLOCK_27[0] ; 2.636  ; 2.349  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[2]   ; CLOCK_27[0] ; 2.637  ; 2.350  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[3]   ; CLOCK_27[0] ; 2.647  ; 2.360  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[4]   ; CLOCK_27[0] ; 2.559  ; 2.298  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[5]   ; CLOCK_27[0] ; 2.860  ; 2.522  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[6]   ; CLOCK_27[0] ; 2.843  ; 2.505  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[7]   ; CLOCK_27[0] ; 2.848  ; 2.510  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[8]   ; CLOCK_27[0] ; 2.848  ; 2.510  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[9]   ; CLOCK_27[0] ; 2.844  ; 2.506  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[10]  ; CLOCK_27[0] ; 2.636  ; 2.349  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[11]  ; CLOCK_27[0] ; 2.851  ; 2.513  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_BA[*]   ; CLOCK_27[0] ; 2.634  ; 2.347  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[0]  ; CLOCK_27[0] ; 2.634  ; 2.347  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[1]  ; CLOCK_27[0] ; 2.626  ; 2.339  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CKE     ; CLOCK_27[0] ; 2.895  ; 2.628  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQ[*]   ; CLOCK_27[0] ; 2.851  ; 2.513  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; CLOCK_27[0] ; 2.832  ; 2.494  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; CLOCK_27[0] ; 2.828  ; 2.490  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; CLOCK_27[0] ; 2.544  ; 2.283  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; CLOCK_27[0] ; 2.544  ; 2.283  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; CLOCK_27[0] ; 2.648  ; 2.361  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; CLOCK_27[0] ; 2.658  ; 2.371  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; CLOCK_27[0] ; 2.648  ; 2.361  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; CLOCK_27[0] ; 2.648  ; 2.361  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; CLOCK_27[0] ; 2.825  ; 2.487  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; CLOCK_27[0] ; 2.825  ; 2.487  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; CLOCK_27[0] ; 2.843  ; 2.505  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; CLOCK_27[0] ; 2.843  ; 2.505  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; CLOCK_27[0] ; 2.539  ; 2.278  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; CLOCK_27[0] ; 2.842  ; 2.504  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; CLOCK_27[0] ; 2.851  ; 2.513  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; CLOCK_27[0] ; 2.548  ; 2.287  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQMH    ; CLOCK_27[0] ; 2.824  ; 2.486  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQML    ; CLOCK_27[0] ; 2.647  ; 2.360  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_nCAS    ; CLOCK_27[0] ; 2.635  ; 2.348  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_nRAS    ; CLOCK_27[0] ; 2.634  ; 2.347  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_nWE     ; CLOCK_27[0] ; 2.647  ; 2.360  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; AUDIO_L       ; CLOCK_27[0] ; 6.862  ; 6.135  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; AUDIO_R       ; CLOCK_27[0] ; 5.447  ; 4.845  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; LED           ; CLOCK_27[0] ; 6.534  ; 7.377  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; VGA_B[*]      ; CLOCK_27[0] ; 4.917  ; 4.372  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_B[0]     ; CLOCK_27[0] ; 4.917  ; 4.372  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_B[1]     ; CLOCK_27[0] ; 4.603  ; 4.066  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_B[2]     ; CLOCK_27[0] ; 4.485  ; 3.859  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_B[3]     ; CLOCK_27[0] ; 4.015  ; 3.624  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_B[4]     ; CLOCK_27[0] ; 3.751  ; 3.286  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_B[5]     ; CLOCK_27[0] ; 3.228  ; 2.876  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; VGA_G[*]      ; CLOCK_27[0] ; 5.508  ; 4.792  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_G[0]     ; CLOCK_27[0] ; 5.484  ; 4.767  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_G[1]     ; CLOCK_27[0] ; 5.364  ; 4.640  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_G[2]     ; CLOCK_27[0] ; 5.508  ; 4.792  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_G[3]     ; CLOCK_27[0] ; 4.455  ; 4.024  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_G[4]     ; CLOCK_27[0] ; 5.012  ; 4.388  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_G[5]     ; CLOCK_27[0] ; 4.867  ; 4.255  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; VGA_HS        ; CLOCK_27[0] ; 6.122  ; 5.413  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; VGA_R[*]      ; CLOCK_27[0] ; 4.162  ; 3.650  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_R[0]     ; CLOCK_27[0] ; 3.492  ; 3.071  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_R[1]     ; CLOCK_27[0] ; 3.476  ; 3.070  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_R[2]     ; CLOCK_27[0] ; 3.903  ; 3.403  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_R[3]     ; CLOCK_27[0] ; 4.146  ; 3.650  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_R[4]     ; CLOCK_27[0] ; 4.162  ; 3.642  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_R[5]     ; CLOCK_27[0] ; 3.942  ; 3.537  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; VGA_VS        ; CLOCK_27[0] ; 5.735  ; 5.029  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SDRAM_CLK     ; CLOCK_27[0] ; -0.422 ;        ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; SDRAM_CLK     ; CLOCK_27[0] ;        ; -0.808 ; Fall       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[2] ;
+---------------+-------------+--------+--------+------------+--------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------+
; Minimum Clock to Output Times                                                                                                   ;
+---------------+-------------+--------+--------+------------+--------------------------------------------------------------------+
; Data Port     ; Clock Port  ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                                    ;
+---------------+-------------+--------+--------+------------+--------------------------------------------------------------------+
; SDRAM_A[*]    ; CLOCK_27[0] ; 0.770  ; 0.631  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[0]   ; CLOCK_27[0] ; 0.810  ; 0.654  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[1]   ; CLOCK_27[0] ; 0.811  ; 0.655  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[2]   ; CLOCK_27[0] ; 0.812  ; 0.656  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[3]   ; CLOCK_27[0] ; 0.822  ; 0.666  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[4]   ; CLOCK_27[0] ; 0.770  ; 0.631  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[5]   ; CLOCK_27[0] ; 0.938  ; 0.809  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[6]   ; CLOCK_27[0] ; 0.923  ; 0.794  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[7]   ; CLOCK_27[0] ; 0.927  ; 0.798  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[8]   ; CLOCK_27[0] ; 0.927  ; 0.798  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[9]   ; CLOCK_27[0] ; 0.926  ; 0.797  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[10]  ; CLOCK_27[0] ; 0.811  ; 0.655  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_A[11]  ; CLOCK_27[0] ; 0.934  ; 0.805  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_BA[*]   ; CLOCK_27[0] ; 0.801  ; 0.645  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[0]  ; CLOCK_27[0] ; 0.809  ; 0.653  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_BA[1]  ; CLOCK_27[0] ; 0.801  ; 0.645  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_CKE     ; CLOCK_27[0] ; 0.885  ; 0.796  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQ[*]   ; CLOCK_27[0] ; 0.755  ; 0.616  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[0]  ; CLOCK_27[0] ; 0.919  ; 0.790  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[1]  ; CLOCK_27[0] ; 0.915  ; 0.786  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[2]  ; CLOCK_27[0] ; 0.763  ; 0.624  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[3]  ; CLOCK_27[0] ; 0.763  ; 0.624  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[4]  ; CLOCK_27[0] ; 0.823  ; 0.667  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[5]  ; CLOCK_27[0] ; 0.833  ; 0.677  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[6]  ; CLOCK_27[0] ; 0.822  ; 0.666  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[7]  ; CLOCK_27[0] ; 0.822  ; 0.666  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[8]  ; CLOCK_27[0] ; 0.912  ; 0.783  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[9]  ; CLOCK_27[0] ; 0.912  ; 0.783  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[10] ; CLOCK_27[0] ; 0.926  ; 0.797  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[11] ; CLOCK_27[0] ; 0.926  ; 0.797  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[12] ; CLOCK_27[0] ; 0.755  ; 0.616  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[13] ; CLOCK_27[0] ; 0.925  ; 0.796  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[14] ; CLOCK_27[0] ; 0.934  ; 0.805  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
;  SDRAM_DQ[15] ; CLOCK_27[0] ; 0.764  ; 0.625  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQMH    ; CLOCK_27[0] ; 0.911  ; 0.782  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_DQML    ; CLOCK_27[0] ; 0.822  ; 0.666  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_nCAS    ; CLOCK_27[0] ; 0.810  ; 0.654  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_nRAS    ; CLOCK_27[0] ; 0.808  ; 0.652  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; SDRAM_nWE     ; CLOCK_27[0] ; 0.822  ; 0.666  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ;
; AUDIO_L       ; CLOCK_27[0] ; 3.119  ; 2.966  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; AUDIO_R       ; CLOCK_27[0] ; 2.486  ; 2.286  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; LED           ; CLOCK_27[0] ; 3.167  ; 3.253  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; VGA_B[*]      ; CLOCK_27[0] ; 1.031  ; 0.945  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_B[0]     ; CLOCK_27[0] ; 1.748  ; 1.720  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_B[1]     ; CLOCK_27[0] ; 1.595  ; 1.562  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_B[2]     ; CLOCK_27[0] ; 1.542  ; 1.495  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_B[3]     ; CLOCK_27[0] ; 1.372  ; 1.323  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_B[4]     ; CLOCK_27[0] ; 1.225  ; 1.147  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_B[5]     ; CLOCK_27[0] ; 1.031  ; 0.945  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; VGA_G[*]      ; CLOCK_27[0] ; 1.589  ; 1.566  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_G[0]     ; CLOCK_27[0] ; 1.980  ; 2.004  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_G[1]     ; CLOCK_27[0] ; 1.864  ; 1.847  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_G[2]     ; CLOCK_27[0] ; 1.932  ; 1.941  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_G[3]     ; CLOCK_27[0] ; 1.589  ; 1.566  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_G[4]     ; CLOCK_27[0] ; 1.755  ; 1.749  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_G[5]     ; CLOCK_27[0] ; 1.698  ; 1.677  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; VGA_HS        ; CLOCK_27[0] ; 2.775  ; 2.580  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; VGA_R[*]      ; CLOCK_27[0] ; 1.115  ; 1.027  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_R[0]     ; CLOCK_27[0] ; 1.129  ; 1.042  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_R[1]     ; CLOCK_27[0] ; 1.115  ; 1.027  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_R[2]     ; CLOCK_27[0] ; 1.306  ; 1.247  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_R[3]     ; CLOCK_27[0] ; 1.400  ; 1.359  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_R[4]     ; CLOCK_27[0] ; 1.397  ; 1.345  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
;  VGA_R[5]     ; CLOCK_27[0] ; 1.343  ; 1.294  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; VGA_VS        ; CLOCK_27[0] ; 2.618  ; 2.404  ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ;
; SDRAM_CLK     ; CLOCK_27[0] ; -1.932 ;        ; Rise       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[2] ;
; SDRAM_CLK     ; CLOCK_27[0] ;        ; -2.049 ; Fall       ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[2] ;
+---------------+-------------+--------+--------+------------+--------------------------------------------------------------------+


+--------------------------------------------------------------+
; Progagation Delay                                            ;
+------------+-------------+--------+--------+--------+--------+
; Input Port ; Output Port ; RR     ; RF     ; FR     ; FF     ;
+------------+-------------+--------+--------+--------+--------+
; CONF_DATA0 ; SPI_DO      ; 12.121 ; 11.881 ; 12.694 ; 12.694 ;
+------------+-------------+--------+--------+--------+--------+


+----------------------------------------------------------+
; Minimum Progagation Delay                                ;
+------------+-------------+-------+-------+-------+-------+
; Input Port ; Output Port ; RR    ; RF    ; FR    ; FF    ;
+------------+-------------+-------+-------+-------+-------+
; CONF_DATA0 ; SPI_DO      ; 5.604 ; 5.487 ; 6.180 ; 6.180 ;
+------------+-------------+-------+-------+-------+-------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Board Trace Model Assignments                                                                                                                                                                                                                                                                                                                                                                                   ;
+--------------+--------------+-------------------+-------------------------+-------------------------+---------------+---------------------+----------------+------------------+--------+------------------+------------------------+------------------------+--------------+---------------+-----------------+-------+---------------------+--------------------+---------------+-----------------+-------------+
; Pin          ; I/O Standard ; Near Tline Length ; Near Tline L per Length ; Near Tline C per Length ; Near Series R ; Near Differential R ; Near Pull-up R ; Near Pull-down R ; Near C ; Far Tline Length ; Far Tline L per Length ; Far Tline C per Length ; Far Series R ; Far Pull-up R ; Far Pull-down R ; Far C ; Termination Voltage ; Far Differential R ; EBD File Name ; EBD Signal Name ; EBD Far-end ;
+--------------+--------------+-------------------+-------------------------+-------------------------+---------------+---------------------+----------------+------------------+--------+------------------+------------------------+------------------------+--------------+---------------+-----------------+-------+---------------------+--------------------+---------------+-----------------+-------------+
; VGA_VS       ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; VGA_HS       ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; VGA_B[0]     ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; VGA_B[1]     ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; VGA_B[2]     ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; VGA_B[3]     ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; VGA_B[4]     ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; VGA_B[5]     ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; VGA_G[0]     ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; VGA_G[1]     ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; VGA_G[2]     ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; VGA_G[3]     ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; VGA_G[4]     ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; VGA_G[5]     ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; VGA_R[0]     ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; VGA_R[1]     ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; VGA_R[2]     ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; VGA_R[3]     ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; VGA_R[4]     ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; VGA_R[5]     ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; AUDIO_L      ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; AUDIO_R      ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_BA[0]  ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_BA[1]  ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_nCS    ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_nRAS   ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_nCAS   ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_nWE    ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQMH   ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQML   ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_CLK    ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_CKE    ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[0]   ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[1]   ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[2]   ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[3]   ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[4]   ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[5]   ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[6]   ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[7]   ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[8]   ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[9]   ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[10]  ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[11]  ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_A[12]  ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; LED          ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; UART_TX      ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[0]  ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[1]  ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[2]  ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[3]  ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[4]  ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[5]  ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[6]  ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[7]  ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[8]  ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[9]  ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[10] ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[11] ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[12] ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[13] ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[14] ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SDRAM_DQ[15] ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
; SPI_DO       ; 3.3-V LVTTL  ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ; n/a           ; n/a             ; n/a         ;
+--------------+--------------+-------------------+-------------------------+-------------------------+---------------+---------------------+----------------+------------------+--------+------------------+------------------------+------------------------+--------------+---------------+-----------------+-------+---------------------+--------------------+---------------+-----------------+-------------+


+------------------------------------------------------------------+
; Input Transition Times                                           ;
+---------------+--------------+-----------------+-----------------+
; Pin           ; I/O Standard ; 10-90 Rise Time ; 90-10 Fall Time ;
+---------------+--------------+-----------------+-----------------+
; CLOCK_27[1]   ; 3.3-V LVTTL  ; 2640 ps         ; 2640 ps         ;
; UART_RX       ; 3.3-V LVTTL  ; 2640 ps         ; 2640 ps         ;
; SPI_SS2       ; 3.3-V LVTTL  ; 2640 ps         ; 2640 ps         ;
; SPI_SS3       ; 3.3-V LVTTL  ; 2640 ps         ; 2640 ps         ;
; SPI_SS4       ; 3.3-V LVTTL  ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[0]   ; 3.3-V LVTTL  ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[1]   ; 3.3-V LVTTL  ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[2]   ; 3.3-V LVTTL  ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[3]   ; 3.3-V LVTTL  ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[4]   ; 3.3-V LVTTL  ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[5]   ; 3.3-V LVTTL  ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[6]   ; 3.3-V LVTTL  ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[7]   ; 3.3-V LVTTL  ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[8]   ; 3.3-V LVTTL  ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[9]   ; 3.3-V LVTTL  ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[10]  ; 3.3-V LVTTL  ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[11]  ; 3.3-V LVTTL  ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[12]  ; 3.3-V LVTTL  ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[13]  ; 3.3-V LVTTL  ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[14]  ; 3.3-V LVTTL  ; 2640 ps         ; 2640 ps         ;
; SDRAM_DQ[15]  ; 3.3-V LVTTL  ; 2640 ps         ; 2640 ps         ;
; SPI_DO        ; 3.3-V LVTTL  ; 2640 ps         ; 2640 ps         ;
; SPI_DI        ; 3.3-V LVTTL  ; 2640 ps         ; 2640 ps         ;
; CONF_DATA0    ; 3.3-V LVTTL  ; 2640 ps         ; 2640 ps         ;
; CLOCK_27[0]   ; 3.3-V LVTTL  ; 2640 ps         ; 2640 ps         ;
; SPI_SCK       ; 3.3-V LVTTL  ; 2640 ps         ; 2640 ps         ;
; ~ALTERA_DCLK~ ; 3.3-V LVTTL  ; 2640 ps         ; 2640 ps         ;
+---------------+--------------+-----------------+-----------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow Corner Signal Integrity Metrics                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                      ;
+--------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
; Pin          ; I/O Standard ; Board Delay on Rise ; Board Delay on Fall ; Steady State Voh at FPGA Pin ; Steady State Vol at FPGA Pin ; Voh Max at FPGA Pin ; Vol Min at FPGA Pin ; Ringback Voltage on Rise at FPGA Pin ; Ringback Voltage on Fall at FPGA Pin ; 10-90 Rise Time at FPGA Pin ; 90-10 Fall Time at FPGA Pin ; Monotonic Rise at FPGA Pin ; Monotonic Fall at FPGA Pin ; Steady State Voh at Far-end ; Steady State Vol at Far-end ; Voh Max at Far-end ; Vol Min at Far-end ; Ringback Voltage on Rise at Far-end ; Ringback Voltage on Fall at Far-end ; 10-90 Rise Time at Far-end ; 90-10 Fall Time at Far-end ; Monotonic Rise at Far-end ; Monotonic Fall at Far-end ;
+--------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
; VGA_VS       ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 7.47e-07 V                   ; 3.08 V              ; -0.00526 V          ; 0.185 V                              ; 0.249 V                              ; 5.8e-09 s                   ; 4.45e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 7.47e-07 V                  ; 3.08 V             ; -0.00526 V         ; 0.185 V                             ; 0.249 V                             ; 5.8e-09 s                  ; 4.45e-09 s                 ; Yes                       ; Yes                       ;
; VGA_HS       ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 7.47e-07 V                   ; 3.08 V              ; -0.00526 V          ; 0.185 V                              ; 0.249 V                              ; 5.8e-09 s                   ; 4.45e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 7.47e-07 V                  ; 3.08 V             ; -0.00526 V         ; 0.185 V                             ; 0.249 V                             ; 5.8e-09 s                  ; 4.45e-09 s                 ; Yes                       ; Yes                       ;
; VGA_B[0]     ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.33e-06 V                   ; 3.08 V              ; -0.013 V            ; 0.007 V                              ; 0.107 V                              ; 1.54e-09 s                  ; 1.03e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.33e-06 V                  ; 3.08 V             ; -0.013 V           ; 0.007 V                             ; 0.107 V                             ; 1.54e-09 s                 ; 1.03e-09 s                 ; Yes                       ; Yes                       ;
; VGA_B[1]     ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.33e-06 V                   ; 3.08 V              ; -0.013 V            ; 0.007 V                              ; 0.107 V                              ; 1.54e-09 s                  ; 1.03e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.33e-06 V                  ; 3.08 V             ; -0.013 V           ; 0.007 V                             ; 0.107 V                             ; 1.54e-09 s                 ; 1.03e-09 s                 ; Yes                       ; Yes                       ;
; VGA_B[2]     ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.33e-06 V                   ; 3.08 V              ; -0.013 V            ; 0.007 V                              ; 0.107 V                              ; 1.54e-09 s                  ; 1.03e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.33e-06 V                  ; 3.08 V             ; -0.013 V           ; 0.007 V                             ; 0.107 V                             ; 1.54e-09 s                 ; 1.03e-09 s                 ; Yes                       ; Yes                       ;
; VGA_B[3]     ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.33e-06 V                   ; 3.08 V              ; -0.013 V            ; 0.007 V                              ; 0.107 V                              ; 1.54e-09 s                  ; 1.03e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.33e-06 V                  ; 3.08 V             ; -0.013 V           ; 0.007 V                             ; 0.107 V                             ; 1.54e-09 s                 ; 1.03e-09 s                 ; Yes                       ; Yes                       ;
; VGA_B[4]     ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.33e-06 V                   ; 3.08 V              ; -0.013 V            ; 0.007 V                              ; 0.107 V                              ; 1.54e-09 s                  ; 1.03e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.33e-06 V                  ; 3.08 V             ; -0.013 V           ; 0.007 V                             ; 0.107 V                             ; 1.54e-09 s                 ; 1.03e-09 s                 ; Yes                       ; Yes                       ;
; VGA_B[5]     ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.33e-06 V                   ; 3.08 V              ; -0.013 V            ; 0.007 V                              ; 0.107 V                              ; 1.54e-09 s                  ; 1.03e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.33e-06 V                  ; 3.08 V             ; -0.013 V           ; 0.007 V                             ; 0.107 V                             ; 1.54e-09 s                 ; 1.03e-09 s                 ; Yes                       ; Yes                       ;
; VGA_G[0]     ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 8.97e-07 V                   ; 3.08 V              ; -0.0119 V           ; 0.025 V                              ; 0.13 V                               ; 2.17e-09 s                  ; 1.47e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 8.97e-07 V                  ; 3.08 V             ; -0.0119 V          ; 0.025 V                             ; 0.13 V                              ; 2.17e-09 s                 ; 1.47e-09 s                 ; Yes                       ; Yes                       ;
; VGA_G[1]     ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.33e-06 V                   ; 3.08 V              ; -0.013 V            ; 0.007 V                              ; 0.107 V                              ; 1.54e-09 s                  ; 1.03e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.33e-06 V                  ; 3.08 V             ; -0.013 V           ; 0.007 V                             ; 0.107 V                             ; 1.54e-09 s                 ; 1.03e-09 s                 ; Yes                       ; Yes                       ;
; VGA_G[2]     ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.33e-06 V                   ; 3.08 V              ; -0.013 V            ; 0.007 V                              ; 0.107 V                              ; 1.54e-09 s                  ; 1.03e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.33e-06 V                  ; 3.08 V             ; -0.013 V           ; 0.007 V                             ; 0.107 V                             ; 1.54e-09 s                 ; 1.03e-09 s                 ; Yes                       ; Yes                       ;
; VGA_G[3]     ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.33e-06 V                   ; 3.08 V              ; -0.013 V            ; 0.007 V                              ; 0.107 V                              ; 1.54e-09 s                  ; 1.03e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.33e-06 V                  ; 3.08 V             ; -0.013 V           ; 0.007 V                             ; 0.107 V                             ; 1.54e-09 s                 ; 1.03e-09 s                 ; Yes                       ; Yes                       ;
; VGA_G[4]     ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.33e-06 V                   ; 3.08 V              ; -0.013 V            ; 0.007 V                              ; 0.107 V                              ; 1.54e-09 s                  ; 1.03e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.33e-06 V                  ; 3.08 V             ; -0.013 V           ; 0.007 V                             ; 0.107 V                             ; 1.54e-09 s                 ; 1.03e-09 s                 ; Yes                       ; Yes                       ;
; VGA_G[5]     ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.33e-06 V                   ; 3.08 V              ; -0.013 V            ; 0.007 V                              ; 0.107 V                              ; 1.54e-09 s                  ; 1.03e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.33e-06 V                  ; 3.08 V             ; -0.013 V           ; 0.007 V                             ; 0.107 V                             ; 1.54e-09 s                 ; 1.03e-09 s                 ; Yes                       ; Yes                       ;
; VGA_R[0]     ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.33e-06 V                   ; 3.08 V              ; -0.013 V            ; 0.007 V                              ; 0.107 V                              ; 1.54e-09 s                  ; 1.03e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.33e-06 V                  ; 3.08 V             ; -0.013 V           ; 0.007 V                             ; 0.107 V                             ; 1.54e-09 s                 ; 1.03e-09 s                 ; Yes                       ; Yes                       ;
; VGA_R[1]     ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.33e-06 V                   ; 3.08 V              ; -0.013 V            ; 0.007 V                              ; 0.107 V                              ; 1.54e-09 s                  ; 1.03e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.33e-06 V                  ; 3.08 V             ; -0.013 V           ; 0.007 V                             ; 0.107 V                             ; 1.54e-09 s                 ; 1.03e-09 s                 ; Yes                       ; Yes                       ;
; VGA_R[2]     ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.33e-06 V                   ; 3.08 V              ; -0.013 V            ; 0.007 V                              ; 0.107 V                              ; 1.54e-09 s                  ; 1.03e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.33e-06 V                  ; 3.08 V             ; -0.013 V           ; 0.007 V                             ; 0.107 V                             ; 1.54e-09 s                 ; 1.03e-09 s                 ; Yes                       ; Yes                       ;
; VGA_R[3]     ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.33e-06 V                   ; 3.08 V              ; -0.013 V            ; 0.007 V                              ; 0.107 V                              ; 1.54e-09 s                  ; 1.03e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.33e-06 V                  ; 3.08 V             ; -0.013 V           ; 0.007 V                             ; 0.107 V                             ; 1.54e-09 s                 ; 1.03e-09 s                 ; Yes                       ; Yes                       ;
; VGA_R[4]     ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.33e-06 V                   ; 3.08 V              ; -0.013 V            ; 0.007 V                              ; 0.107 V                              ; 1.54e-09 s                  ; 1.03e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.33e-06 V                  ; 3.08 V             ; -0.013 V           ; 0.007 V                             ; 0.107 V                             ; 1.54e-09 s                 ; 1.03e-09 s                 ; Yes                       ; Yes                       ;
; VGA_R[5]     ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.33e-06 V                   ; 3.08 V              ; -0.013 V            ; 0.007 V                              ; 0.107 V                              ; 1.54e-09 s                  ; 1.03e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.33e-06 V                  ; 3.08 V             ; -0.013 V           ; 0.007 V                             ; 0.107 V                             ; 1.54e-09 s                 ; 1.03e-09 s                 ; Yes                       ; Yes                       ;
; AUDIO_L      ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 7.47e-07 V                   ; 3.08 V              ; -0.00526 V          ; 0.185 V                              ; 0.249 V                              ; 5.8e-09 s                   ; 4.45e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 7.47e-07 V                  ; 3.08 V             ; -0.00526 V         ; 0.185 V                             ; 0.249 V                             ; 5.8e-09 s                  ; 4.45e-09 s                 ; Yes                       ; Yes                       ;
; AUDIO_R      ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 5.01e-07 V                   ; 3.08 V              ; -0.00545 V          ; 0.234 V                              ; 0.291 V                              ; 5.77e-09 s                  ; 4.44e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 5.01e-07 V                  ; 3.08 V             ; -0.00545 V         ; 0.234 V                             ; 0.291 V                             ; 5.77e-09 s                 ; 4.44e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_BA[0]  ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.33e-06 V                   ; 3.08 V              ; -0.013 V            ; 0.007 V                              ; 0.107 V                              ; 1.54e-09 s                  ; 1.03e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.33e-06 V                  ; 3.08 V             ; -0.013 V           ; 0.007 V                             ; 0.107 V                             ; 1.54e-09 s                 ; 1.03e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_BA[1]  ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.33e-06 V                   ; 3.08 V              ; -0.013 V            ; 0.007 V                              ; 0.107 V                              ; 1.54e-09 s                  ; 1.03e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.33e-06 V                  ; 3.08 V             ; -0.013 V           ; 0.007 V                             ; 0.107 V                             ; 1.54e-09 s                 ; 1.03e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_nCS    ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.33e-06 V                   ; 3.08 V              ; -0.013 V            ; 0.007 V                              ; 0.107 V                              ; 1.54e-09 s                  ; 1.03e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.33e-06 V                  ; 3.08 V             ; -0.013 V           ; 0.007 V                             ; 0.107 V                             ; 1.54e-09 s                 ; 1.03e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_nRAS   ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.33e-06 V                   ; 3.08 V              ; -0.013 V            ; 0.007 V                              ; 0.107 V                              ; 1.54e-09 s                  ; 1.03e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.33e-06 V                  ; 3.08 V             ; -0.013 V           ; 0.007 V                             ; 0.107 V                             ; 1.54e-09 s                 ; 1.03e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_nCAS   ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.33e-06 V                   ; 3.08 V              ; -0.013 V            ; 0.007 V                              ; 0.107 V                              ; 1.54e-09 s                  ; 1.03e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.33e-06 V                  ; 3.08 V             ; -0.013 V           ; 0.007 V                             ; 0.107 V                             ; 1.54e-09 s                 ; 1.03e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_nWE    ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.33e-06 V                   ; 3.08 V              ; -0.013 V            ; 0.007 V                              ; 0.107 V                              ; 1.54e-09 s                  ; 1.03e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.33e-06 V                  ; 3.08 V             ; -0.013 V           ; 0.007 V                             ; 0.107 V                             ; 1.54e-09 s                 ; 1.03e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQMH   ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 8.97e-07 V                   ; 3.08 V              ; -0.0119 V           ; 0.025 V                              ; 0.13 V                               ; 2.17e-09 s                  ; 1.47e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 8.97e-07 V                  ; 3.08 V             ; -0.0119 V          ; 0.025 V                             ; 0.13 V                              ; 2.17e-09 s                 ; 1.47e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQML   ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.33e-06 V                   ; 3.08 V              ; -0.013 V            ; 0.007 V                              ; 0.107 V                              ; 1.54e-09 s                  ; 1.03e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.33e-06 V                  ; 3.08 V             ; -0.013 V           ; 0.007 V                             ; 0.107 V                             ; 1.54e-09 s                 ; 1.03e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_CLK    ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.33e-06 V                   ; 3.08 V              ; -0.013 V            ; 0.007 V                              ; 0.107 V                              ; 1.54e-09 s                  ; 1.03e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.33e-06 V                  ; 3.08 V             ; -0.013 V           ; 0.007 V                             ; 0.107 V                             ; 1.54e-09 s                 ; 1.03e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_CKE    ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 8.97e-07 V                   ; 3.09 V              ; -0.0131 V           ; 0.022 V                              ; 0.093 V                              ; 1.48e-09 s                  ; 1.01e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 8.97e-07 V                  ; 3.09 V             ; -0.0131 V          ; 0.022 V                             ; 0.093 V                             ; 1.48e-09 s                 ; 1.01e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[0]   ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.33e-06 V                   ; 3.08 V              ; -0.013 V            ; 0.007 V                              ; 0.107 V                              ; 1.54e-09 s                  ; 1.03e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.33e-06 V                  ; 3.08 V             ; -0.013 V           ; 0.007 V                             ; 0.107 V                             ; 1.54e-09 s                 ; 1.03e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[1]   ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.33e-06 V                   ; 3.08 V              ; -0.013 V            ; 0.007 V                              ; 0.107 V                              ; 1.54e-09 s                  ; 1.03e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.33e-06 V                  ; 3.08 V             ; -0.013 V           ; 0.007 V                             ; 0.107 V                             ; 1.54e-09 s                 ; 1.03e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[2]   ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.33e-06 V                   ; 3.08 V              ; -0.013 V            ; 0.007 V                              ; 0.107 V                              ; 1.54e-09 s                  ; 1.03e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.33e-06 V                  ; 3.08 V             ; -0.013 V           ; 0.007 V                             ; 0.107 V                             ; 1.54e-09 s                 ; 1.03e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[3]   ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.33e-06 V                   ; 3.08 V              ; -0.013 V            ; 0.007 V                              ; 0.107 V                              ; 1.54e-09 s                  ; 1.03e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.33e-06 V                  ; 3.08 V             ; -0.013 V           ; 0.007 V                             ; 0.107 V                             ; 1.54e-09 s                 ; 1.03e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[4]   ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 8.97e-07 V                   ; 3.09 V              ; -0.0131 V           ; 0.022 V                              ; 0.093 V                              ; 1.48e-09 s                  ; 1.01e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 8.97e-07 V                  ; 3.09 V             ; -0.0131 V          ; 0.022 V                             ; 0.093 V                             ; 1.48e-09 s                 ; 1.01e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[5]   ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 8.97e-07 V                   ; 3.08 V              ; -0.0119 V           ; 0.025 V                              ; 0.13 V                               ; 2.17e-09 s                  ; 1.47e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 8.97e-07 V                  ; 3.08 V             ; -0.0119 V          ; 0.025 V                             ; 0.13 V                              ; 2.17e-09 s                 ; 1.47e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[6]   ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 8.97e-07 V                   ; 3.08 V              ; -0.0119 V           ; 0.025 V                              ; 0.13 V                               ; 2.17e-09 s                  ; 1.47e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 8.97e-07 V                  ; 3.08 V             ; -0.0119 V          ; 0.025 V                             ; 0.13 V                              ; 2.17e-09 s                 ; 1.47e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[7]   ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 8.97e-07 V                   ; 3.08 V              ; -0.0119 V           ; 0.025 V                              ; 0.13 V                               ; 2.17e-09 s                  ; 1.47e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 8.97e-07 V                  ; 3.08 V             ; -0.0119 V          ; 0.025 V                             ; 0.13 V                              ; 2.17e-09 s                 ; 1.47e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[8]   ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 8.97e-07 V                   ; 3.08 V              ; -0.0119 V           ; 0.025 V                              ; 0.13 V                               ; 2.17e-09 s                  ; 1.47e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 8.97e-07 V                  ; 3.08 V             ; -0.0119 V          ; 0.025 V                             ; 0.13 V                              ; 2.17e-09 s                 ; 1.47e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[9]   ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 8.97e-07 V                   ; 3.08 V              ; -0.0119 V           ; 0.025 V                              ; 0.13 V                               ; 2.17e-09 s                  ; 1.47e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 8.97e-07 V                  ; 3.08 V             ; -0.0119 V          ; 0.025 V                             ; 0.13 V                              ; 2.17e-09 s                 ; 1.47e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[10]  ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.33e-06 V                   ; 3.08 V              ; -0.013 V            ; 0.007 V                              ; 0.107 V                              ; 1.54e-09 s                  ; 1.03e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.33e-06 V                  ; 3.08 V             ; -0.013 V           ; 0.007 V                             ; 0.107 V                             ; 1.54e-09 s                 ; 1.03e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[11]  ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 8.97e-07 V                   ; 3.08 V              ; -0.0119 V           ; 0.025 V                              ; 0.13 V                               ; 2.17e-09 s                  ; 1.47e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 8.97e-07 V                  ; 3.08 V             ; -0.0119 V          ; 0.025 V                             ; 0.13 V                              ; 2.17e-09 s                 ; 1.47e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[12]  ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 8.97e-07 V                   ; 3.09 V              ; -0.0131 V           ; 0.022 V                              ; 0.093 V                              ; 1.48e-09 s                  ; 1.01e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 8.97e-07 V                  ; 3.09 V             ; -0.0131 V          ; 0.022 V                             ; 0.093 V                             ; 1.48e-09 s                 ; 1.01e-09 s                 ; Yes                       ; Yes                       ;
; LED          ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 5.01e-07 V                   ; 3.08 V              ; -0.00545 V          ; 0.234 V                              ; 0.291 V                              ; 5.77e-09 s                  ; 4.44e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 5.01e-07 V                  ; 3.08 V             ; -0.00545 V         ; 0.234 V                             ; 0.291 V                             ; 5.77e-09 s                 ; 4.44e-09 s                 ; Yes                       ; Yes                       ;
; UART_TX      ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 7.47e-07 V                   ; 3.08 V              ; -0.00526 V          ; 0.185 V                              ; 0.249 V                              ; 5.8e-09 s                   ; 4.45e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 7.47e-07 V                  ; 3.08 V             ; -0.00526 V         ; 0.185 V                             ; 0.249 V                             ; 5.8e-09 s                  ; 4.45e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[0]  ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 8.97e-07 V                   ; 3.08 V              ; -0.0119 V           ; 0.025 V                              ; 0.13 V                               ; 2.17e-09 s                  ; 1.47e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 8.97e-07 V                  ; 3.08 V             ; -0.0119 V          ; 0.025 V                             ; 0.13 V                              ; 2.17e-09 s                 ; 1.47e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[1]  ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 8.97e-07 V                   ; 3.08 V              ; -0.0119 V           ; 0.025 V                              ; 0.13 V                               ; 2.17e-09 s                  ; 1.47e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 8.97e-07 V                  ; 3.08 V             ; -0.0119 V          ; 0.025 V                             ; 0.13 V                              ; 2.17e-09 s                 ; 1.47e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[2]  ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 8.97e-07 V                   ; 3.09 V              ; -0.0131 V           ; 0.022 V                              ; 0.093 V                              ; 1.48e-09 s                  ; 1.01e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 8.97e-07 V                  ; 3.09 V             ; -0.0131 V          ; 0.022 V                             ; 0.093 V                             ; 1.48e-09 s                 ; 1.01e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[3]  ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 8.97e-07 V                   ; 3.09 V              ; -0.0131 V           ; 0.022 V                              ; 0.093 V                              ; 1.48e-09 s                  ; 1.01e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 8.97e-07 V                  ; 3.09 V             ; -0.0131 V          ; 0.022 V                             ; 0.093 V                             ; 1.48e-09 s                 ; 1.01e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[4]  ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.33e-06 V                   ; 3.08 V              ; -0.013 V            ; 0.007 V                              ; 0.107 V                              ; 1.54e-09 s                  ; 1.03e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.33e-06 V                  ; 3.08 V             ; -0.013 V           ; 0.007 V                             ; 0.107 V                             ; 1.54e-09 s                 ; 1.03e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[5]  ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.33e-06 V                   ; 3.08 V              ; -0.013 V            ; 0.007 V                              ; 0.107 V                              ; 1.54e-09 s                  ; 1.03e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.33e-06 V                  ; 3.08 V             ; -0.013 V           ; 0.007 V                             ; 0.107 V                             ; 1.54e-09 s                 ; 1.03e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[6]  ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.33e-06 V                   ; 3.08 V              ; -0.013 V            ; 0.007 V                              ; 0.107 V                              ; 1.54e-09 s                  ; 1.03e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.33e-06 V                  ; 3.08 V             ; -0.013 V           ; 0.007 V                             ; 0.107 V                             ; 1.54e-09 s                 ; 1.03e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[7]  ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 1.33e-06 V                   ; 3.08 V              ; -0.013 V            ; 0.007 V                              ; 0.107 V                              ; 1.54e-09 s                  ; 1.03e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 1.33e-06 V                  ; 3.08 V             ; -0.013 V           ; 0.007 V                             ; 0.107 V                             ; 1.54e-09 s                 ; 1.03e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[8]  ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 8.97e-07 V                   ; 3.08 V              ; -0.0119 V           ; 0.025 V                              ; 0.13 V                               ; 2.17e-09 s                  ; 1.47e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 8.97e-07 V                  ; 3.08 V             ; -0.0119 V          ; 0.025 V                             ; 0.13 V                              ; 2.17e-09 s                 ; 1.47e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[9]  ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 8.97e-07 V                   ; 3.08 V              ; -0.0119 V           ; 0.025 V                              ; 0.13 V                               ; 2.17e-09 s                  ; 1.47e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 8.97e-07 V                  ; 3.08 V             ; -0.0119 V          ; 0.025 V                             ; 0.13 V                              ; 2.17e-09 s                 ; 1.47e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[10] ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 8.97e-07 V                   ; 3.08 V              ; -0.0119 V           ; 0.025 V                              ; 0.13 V                               ; 2.17e-09 s                  ; 1.47e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 8.97e-07 V                  ; 3.08 V             ; -0.0119 V          ; 0.025 V                             ; 0.13 V                              ; 2.17e-09 s                 ; 1.47e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[11] ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 8.97e-07 V                   ; 3.08 V              ; -0.0119 V           ; 0.025 V                              ; 0.13 V                               ; 2.17e-09 s                  ; 1.47e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 8.97e-07 V                  ; 3.08 V             ; -0.0119 V          ; 0.025 V                             ; 0.13 V                              ; 2.17e-09 s                 ; 1.47e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[12] ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 8.97e-07 V                   ; 3.09 V              ; -0.0131 V           ; 0.022 V                              ; 0.093 V                              ; 1.48e-09 s                  ; 1.01e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 8.97e-07 V                  ; 3.09 V             ; -0.0131 V          ; 0.022 V                             ; 0.093 V                             ; 1.48e-09 s                 ; 1.01e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[13] ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 8.97e-07 V                   ; 3.08 V              ; -0.0119 V           ; 0.025 V                              ; 0.13 V                               ; 2.17e-09 s                  ; 1.47e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 8.97e-07 V                  ; 3.08 V             ; -0.0119 V          ; 0.025 V                             ; 0.13 V                              ; 2.17e-09 s                 ; 1.47e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[14] ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 8.97e-07 V                   ; 3.08 V              ; -0.0119 V           ; 0.025 V                              ; 0.13 V                               ; 2.17e-09 s                  ; 1.47e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 8.97e-07 V                  ; 3.08 V             ; -0.0119 V          ; 0.025 V                             ; 0.13 V                              ; 2.17e-09 s                 ; 1.47e-09 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[15] ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 8.97e-07 V                   ; 3.09 V              ; -0.0131 V           ; 0.022 V                              ; 0.093 V                              ; 1.48e-09 s                  ; 1.01e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 8.97e-07 V                  ; 3.09 V             ; -0.0131 V          ; 0.022 V                             ; 0.093 V                             ; 1.48e-09 s                 ; 1.01e-09 s                 ; Yes                       ; Yes                       ;
; SPI_DO       ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.08 V                       ; 5.01e-07 V                   ; 3.08 V              ; -0.00545 V          ; 0.234 V                              ; 0.291 V                              ; 5.77e-09 s                  ; 4.44e-09 s                  ; Yes                        ; Yes                        ; 3.08 V                      ; 5.01e-07 V                  ; 3.08 V             ; -0.00545 V         ; 0.234 V                             ; 0.291 V                             ; 5.77e-09 s                 ; 4.44e-09 s                 ; Yes                       ; Yes                       ;
+--------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast Corner Signal Integrity Metrics                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                      ;
+--------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
; Pin          ; I/O Standard ; Board Delay on Rise ; Board Delay on Fall ; Steady State Voh at FPGA Pin ; Steady State Vol at FPGA Pin ; Voh Max at FPGA Pin ; Vol Min at FPGA Pin ; Ringback Voltage on Rise at FPGA Pin ; Ringback Voltage on Fall at FPGA Pin ; 10-90 Rise Time at FPGA Pin ; 90-10 Fall Time at FPGA Pin ; Monotonic Rise at FPGA Pin ; Monotonic Fall at FPGA Pin ; Steady State Voh at Far-end ; Steady State Vol at Far-end ; Voh Max at Far-end ; Vol Min at Far-end ; Ringback Voltage on Rise at Far-end ; Ringback Voltage on Fall at Far-end ; 10-90 Rise Time at Far-end ; 90-10 Fall Time at Far-end ; Monotonic Rise at Far-end ; Monotonic Fall at Far-end ;
+--------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
; VGA_VS       ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 1.83e-07 V                   ; 3.48 V              ; -0.0176 V           ; 0.357 V                              ; 0.323 V                              ; 3.9e-09 s                   ; 3.06e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 1.83e-07 V                  ; 3.48 V             ; -0.0176 V          ; 0.357 V                             ; 0.323 V                             ; 3.9e-09 s                  ; 3.06e-09 s                 ; No                        ; No                        ;
; VGA_HS       ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 1.83e-07 V                   ; 3.48 V              ; -0.0176 V           ; 0.357 V                              ; 0.323 V                              ; 3.9e-09 s                   ; 3.06e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 1.83e-07 V                  ; 3.48 V             ; -0.0176 V          ; 0.357 V                             ; 0.323 V                             ; 3.9e-09 s                  ; 3.06e-09 s                 ; No                        ; No                        ;
; VGA_B[0]     ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.28e-07 V                   ; 3.49 V              ; -0.0474 V           ; 0.222 V                              ; 0.267 V                              ; 1.03e-09 s                  ; 6.65e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.28e-07 V                  ; 3.49 V             ; -0.0474 V          ; 0.222 V                             ; 0.267 V                             ; 1.03e-09 s                 ; 6.65e-10 s                 ; No                        ; Yes                       ;
; VGA_B[1]     ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.28e-07 V                   ; 3.49 V              ; -0.0474 V           ; 0.222 V                              ; 0.267 V                              ; 1.03e-09 s                  ; 6.65e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.28e-07 V                  ; 3.49 V             ; -0.0474 V          ; 0.222 V                             ; 0.267 V                             ; 1.03e-09 s                 ; 6.65e-10 s                 ; No                        ; Yes                       ;
; VGA_B[2]     ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.28e-07 V                   ; 3.49 V              ; -0.0474 V           ; 0.222 V                              ; 0.267 V                              ; 1.03e-09 s                  ; 6.65e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.28e-07 V                  ; 3.49 V             ; -0.0474 V          ; 0.222 V                             ; 0.267 V                             ; 1.03e-09 s                 ; 6.65e-10 s                 ; No                        ; Yes                       ;
; VGA_B[3]     ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.28e-07 V                   ; 3.49 V              ; -0.0474 V           ; 0.222 V                              ; 0.267 V                              ; 1.03e-09 s                  ; 6.65e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.28e-07 V                  ; 3.49 V             ; -0.0474 V          ; 0.222 V                             ; 0.267 V                             ; 1.03e-09 s                 ; 6.65e-10 s                 ; No                        ; Yes                       ;
; VGA_B[4]     ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.28e-07 V                   ; 3.49 V              ; -0.0474 V           ; 0.222 V                              ; 0.267 V                              ; 1.03e-09 s                  ; 6.65e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.28e-07 V                  ; 3.49 V             ; -0.0474 V          ; 0.222 V                             ; 0.267 V                             ; 1.03e-09 s                 ; 6.65e-10 s                 ; No                        ; Yes                       ;
; VGA_B[5]     ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.28e-07 V                   ; 3.49 V              ; -0.0474 V           ; 0.222 V                              ; 0.267 V                              ; 1.03e-09 s                  ; 6.65e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.28e-07 V                  ; 3.49 V             ; -0.0474 V          ; 0.222 V                             ; 0.267 V                             ; 1.03e-09 s                 ; 6.65e-10 s                 ; No                        ; Yes                       ;
; VGA_G[0]     ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.22e-07 V                   ; 3.49 V              ; -0.0449 V           ; 0.354 V                              ; 0.204 V                              ; 1.36e-09 s                  ; 1.05e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.22e-07 V                  ; 3.49 V             ; -0.0449 V          ; 0.354 V                             ; 0.204 V                             ; 1.36e-09 s                 ; 1.05e-09 s                 ; No                        ; No                        ;
; VGA_G[1]     ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.28e-07 V                   ; 3.49 V              ; -0.0474 V           ; 0.222 V                              ; 0.267 V                              ; 1.03e-09 s                  ; 6.65e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.28e-07 V                  ; 3.49 V             ; -0.0474 V          ; 0.222 V                             ; 0.267 V                             ; 1.03e-09 s                 ; 6.65e-10 s                 ; No                        ; Yes                       ;
; VGA_G[2]     ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.28e-07 V                   ; 3.49 V              ; -0.0474 V           ; 0.222 V                              ; 0.267 V                              ; 1.03e-09 s                  ; 6.65e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.28e-07 V                  ; 3.49 V             ; -0.0474 V          ; 0.222 V                             ; 0.267 V                             ; 1.03e-09 s                 ; 6.65e-10 s                 ; No                        ; Yes                       ;
; VGA_G[3]     ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.28e-07 V                   ; 3.49 V              ; -0.0474 V           ; 0.222 V                              ; 0.267 V                              ; 1.03e-09 s                  ; 6.65e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.28e-07 V                  ; 3.49 V             ; -0.0474 V          ; 0.222 V                             ; 0.267 V                             ; 1.03e-09 s                 ; 6.65e-10 s                 ; No                        ; Yes                       ;
; VGA_G[4]     ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.28e-07 V                   ; 3.49 V              ; -0.0474 V           ; 0.222 V                              ; 0.267 V                              ; 1.03e-09 s                  ; 6.65e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.28e-07 V                  ; 3.49 V             ; -0.0474 V          ; 0.222 V                             ; 0.267 V                             ; 1.03e-09 s                 ; 6.65e-10 s                 ; No                        ; Yes                       ;
; VGA_G[5]     ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.28e-07 V                   ; 3.49 V              ; -0.0474 V           ; 0.222 V                              ; 0.267 V                              ; 1.03e-09 s                  ; 6.65e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.28e-07 V                  ; 3.49 V             ; -0.0474 V          ; 0.222 V                             ; 0.267 V                             ; 1.03e-09 s                 ; 6.65e-10 s                 ; No                        ; Yes                       ;
; VGA_R[0]     ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.28e-07 V                   ; 3.49 V              ; -0.0474 V           ; 0.222 V                              ; 0.267 V                              ; 1.03e-09 s                  ; 6.65e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.28e-07 V                  ; 3.49 V             ; -0.0474 V          ; 0.222 V                             ; 0.267 V                             ; 1.03e-09 s                 ; 6.65e-10 s                 ; No                        ; Yes                       ;
; VGA_R[1]     ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.28e-07 V                   ; 3.49 V              ; -0.0474 V           ; 0.222 V                              ; 0.267 V                              ; 1.03e-09 s                  ; 6.65e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.28e-07 V                  ; 3.49 V             ; -0.0474 V          ; 0.222 V                             ; 0.267 V                             ; 1.03e-09 s                 ; 6.65e-10 s                 ; No                        ; Yes                       ;
; VGA_R[2]     ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.28e-07 V                   ; 3.49 V              ; -0.0474 V           ; 0.222 V                              ; 0.267 V                              ; 1.03e-09 s                  ; 6.65e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.28e-07 V                  ; 3.49 V             ; -0.0474 V          ; 0.222 V                             ; 0.267 V                             ; 1.03e-09 s                 ; 6.65e-10 s                 ; No                        ; Yes                       ;
; VGA_R[3]     ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.28e-07 V                   ; 3.49 V              ; -0.0474 V           ; 0.222 V                              ; 0.267 V                              ; 1.03e-09 s                  ; 6.65e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.28e-07 V                  ; 3.49 V             ; -0.0474 V          ; 0.222 V                             ; 0.267 V                             ; 1.03e-09 s                 ; 6.65e-10 s                 ; No                        ; Yes                       ;
; VGA_R[4]     ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.28e-07 V                   ; 3.49 V              ; -0.0474 V           ; 0.222 V                              ; 0.267 V                              ; 1.03e-09 s                  ; 6.65e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.28e-07 V                  ; 3.49 V             ; -0.0474 V          ; 0.222 V                             ; 0.267 V                             ; 1.03e-09 s                 ; 6.65e-10 s                 ; No                        ; Yes                       ;
; VGA_R[5]     ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.28e-07 V                   ; 3.49 V              ; -0.0474 V           ; 0.222 V                              ; 0.267 V                              ; 1.03e-09 s                  ; 6.65e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.28e-07 V                  ; 3.49 V             ; -0.0474 V          ; 0.222 V                             ; 0.267 V                             ; 1.03e-09 s                 ; 6.65e-10 s                 ; No                        ; Yes                       ;
; AUDIO_L      ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 1.83e-07 V                   ; 3.48 V              ; -0.0176 V           ; 0.357 V                              ; 0.323 V                              ; 3.9e-09 s                   ; 3.06e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 1.83e-07 V                  ; 3.48 V             ; -0.0176 V          ; 0.357 V                             ; 0.323 V                             ; 3.9e-09 s                  ; 3.06e-09 s                 ; No                        ; No                        ;
; AUDIO_R      ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 1.24e-07 V                   ; 3.48 V              ; -0.0164 V           ; 0.353 V                              ; 0.315 V                              ; 3.88e-09 s                  ; 3.06e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 1.24e-07 V                  ; 3.48 V             ; -0.0164 V          ; 0.353 V                             ; 0.315 V                             ; 3.88e-09 s                 ; 3.06e-09 s                 ; No                        ; No                        ;
; SDRAM_BA[0]  ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.28e-07 V                   ; 3.49 V              ; -0.0474 V           ; 0.222 V                              ; 0.267 V                              ; 1.03e-09 s                  ; 6.65e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.28e-07 V                  ; 3.49 V             ; -0.0474 V          ; 0.222 V                             ; 0.267 V                             ; 1.03e-09 s                 ; 6.65e-10 s                 ; No                        ; Yes                       ;
; SDRAM_BA[1]  ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.28e-07 V                   ; 3.49 V              ; -0.0474 V           ; 0.222 V                              ; 0.267 V                              ; 1.03e-09 s                  ; 6.65e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.28e-07 V                  ; 3.49 V             ; -0.0474 V          ; 0.222 V                             ; 0.267 V                             ; 1.03e-09 s                 ; 6.65e-10 s                 ; No                        ; Yes                       ;
; SDRAM_nCS    ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.28e-07 V                   ; 3.49 V              ; -0.0474 V           ; 0.222 V                              ; 0.267 V                              ; 1.03e-09 s                  ; 6.65e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.28e-07 V                  ; 3.49 V             ; -0.0474 V          ; 0.222 V                             ; 0.267 V                             ; 1.03e-09 s                 ; 6.65e-10 s                 ; No                        ; Yes                       ;
; SDRAM_nRAS   ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.28e-07 V                   ; 3.49 V              ; -0.0474 V           ; 0.222 V                              ; 0.267 V                              ; 1.03e-09 s                  ; 6.65e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.28e-07 V                  ; 3.49 V             ; -0.0474 V          ; 0.222 V                             ; 0.267 V                             ; 1.03e-09 s                 ; 6.65e-10 s                 ; No                        ; Yes                       ;
; SDRAM_nCAS   ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.28e-07 V                   ; 3.49 V              ; -0.0474 V           ; 0.222 V                              ; 0.267 V                              ; 1.03e-09 s                  ; 6.65e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.28e-07 V                  ; 3.49 V             ; -0.0474 V          ; 0.222 V                             ; 0.267 V                             ; 1.03e-09 s                 ; 6.65e-10 s                 ; No                        ; Yes                       ;
; SDRAM_nWE    ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.28e-07 V                   ; 3.49 V              ; -0.0474 V           ; 0.222 V                              ; 0.267 V                              ; 1.03e-09 s                  ; 6.65e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.28e-07 V                  ; 3.49 V             ; -0.0474 V          ; 0.222 V                             ; 0.267 V                             ; 1.03e-09 s                 ; 6.65e-10 s                 ; No                        ; Yes                       ;
; SDRAM_DQMH   ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.22e-07 V                   ; 3.49 V              ; -0.0449 V           ; 0.354 V                              ; 0.204 V                              ; 1.36e-09 s                  ; 1.05e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.22e-07 V                  ; 3.49 V             ; -0.0449 V          ; 0.354 V                             ; 0.204 V                             ; 1.36e-09 s                 ; 1.05e-09 s                 ; No                        ; No                        ;
; SDRAM_DQML   ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.28e-07 V                   ; 3.49 V              ; -0.0474 V           ; 0.222 V                              ; 0.267 V                              ; 1.03e-09 s                  ; 6.65e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.28e-07 V                  ; 3.49 V             ; -0.0474 V          ; 0.222 V                             ; 0.267 V                             ; 1.03e-09 s                 ; 6.65e-10 s                 ; No                        ; Yes                       ;
; SDRAM_CLK    ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.28e-07 V                   ; 3.49 V              ; -0.0474 V           ; 0.222 V                              ; 0.267 V                              ; 1.03e-09 s                  ; 6.65e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.28e-07 V                  ; 3.49 V             ; -0.0474 V          ; 0.222 V                             ; 0.267 V                             ; 1.03e-09 s                 ; 6.65e-10 s                 ; No                        ; Yes                       ;
; SDRAM_CKE    ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.22e-07 V                   ; 3.5 V               ; -0.0534 V           ; 0.346 V                              ; 0.247 V                              ; 9.06e-10 s                  ; 6.55e-10 s                  ; Yes                        ; Yes                        ; 3.46 V                      ; 2.22e-07 V                  ; 3.5 V              ; -0.0534 V          ; 0.346 V                             ; 0.247 V                             ; 9.06e-10 s                 ; 6.55e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[0]   ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.28e-07 V                   ; 3.49 V              ; -0.0474 V           ; 0.222 V                              ; 0.267 V                              ; 1.03e-09 s                  ; 6.65e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.28e-07 V                  ; 3.49 V             ; -0.0474 V          ; 0.222 V                             ; 0.267 V                             ; 1.03e-09 s                 ; 6.65e-10 s                 ; No                        ; Yes                       ;
; SDRAM_A[1]   ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.28e-07 V                   ; 3.49 V              ; -0.0474 V           ; 0.222 V                              ; 0.267 V                              ; 1.03e-09 s                  ; 6.65e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.28e-07 V                  ; 3.49 V             ; -0.0474 V          ; 0.222 V                             ; 0.267 V                             ; 1.03e-09 s                 ; 6.65e-10 s                 ; No                        ; Yes                       ;
; SDRAM_A[2]   ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.28e-07 V                   ; 3.49 V              ; -0.0474 V           ; 0.222 V                              ; 0.267 V                              ; 1.03e-09 s                  ; 6.65e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.28e-07 V                  ; 3.49 V             ; -0.0474 V          ; 0.222 V                             ; 0.267 V                             ; 1.03e-09 s                 ; 6.65e-10 s                 ; No                        ; Yes                       ;
; SDRAM_A[3]   ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.28e-07 V                   ; 3.49 V              ; -0.0474 V           ; 0.222 V                              ; 0.267 V                              ; 1.03e-09 s                  ; 6.65e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.28e-07 V                  ; 3.49 V             ; -0.0474 V          ; 0.222 V                             ; 0.267 V                             ; 1.03e-09 s                 ; 6.65e-10 s                 ; No                        ; Yes                       ;
; SDRAM_A[4]   ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.22e-07 V                   ; 3.5 V               ; -0.0534 V           ; 0.346 V                              ; 0.247 V                              ; 9.06e-10 s                  ; 6.55e-10 s                  ; Yes                        ; Yes                        ; 3.46 V                      ; 2.22e-07 V                  ; 3.5 V              ; -0.0534 V          ; 0.346 V                             ; 0.247 V                             ; 9.06e-10 s                 ; 6.55e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_A[5]   ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.22e-07 V                   ; 3.49 V              ; -0.0449 V           ; 0.354 V                              ; 0.204 V                              ; 1.36e-09 s                  ; 1.05e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.22e-07 V                  ; 3.49 V             ; -0.0449 V          ; 0.354 V                             ; 0.204 V                             ; 1.36e-09 s                 ; 1.05e-09 s                 ; No                        ; No                        ;
; SDRAM_A[6]   ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.22e-07 V                   ; 3.49 V              ; -0.0449 V           ; 0.354 V                              ; 0.204 V                              ; 1.36e-09 s                  ; 1.05e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.22e-07 V                  ; 3.49 V             ; -0.0449 V          ; 0.354 V                             ; 0.204 V                             ; 1.36e-09 s                 ; 1.05e-09 s                 ; No                        ; No                        ;
; SDRAM_A[7]   ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.22e-07 V                   ; 3.49 V              ; -0.0449 V           ; 0.354 V                              ; 0.204 V                              ; 1.36e-09 s                  ; 1.05e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.22e-07 V                  ; 3.49 V             ; -0.0449 V          ; 0.354 V                             ; 0.204 V                             ; 1.36e-09 s                 ; 1.05e-09 s                 ; No                        ; No                        ;
; SDRAM_A[8]   ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.22e-07 V                   ; 3.49 V              ; -0.0449 V           ; 0.354 V                              ; 0.204 V                              ; 1.36e-09 s                  ; 1.05e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.22e-07 V                  ; 3.49 V             ; -0.0449 V          ; 0.354 V                             ; 0.204 V                             ; 1.36e-09 s                 ; 1.05e-09 s                 ; No                        ; No                        ;
; SDRAM_A[9]   ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.22e-07 V                   ; 3.49 V              ; -0.0449 V           ; 0.354 V                              ; 0.204 V                              ; 1.36e-09 s                  ; 1.05e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.22e-07 V                  ; 3.49 V             ; -0.0449 V          ; 0.354 V                             ; 0.204 V                             ; 1.36e-09 s                 ; 1.05e-09 s                 ; No                        ; No                        ;
; SDRAM_A[10]  ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.28e-07 V                   ; 3.49 V              ; -0.0474 V           ; 0.222 V                              ; 0.267 V                              ; 1.03e-09 s                  ; 6.65e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.28e-07 V                  ; 3.49 V             ; -0.0474 V          ; 0.222 V                             ; 0.267 V                             ; 1.03e-09 s                 ; 6.65e-10 s                 ; No                        ; Yes                       ;
; SDRAM_A[11]  ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.22e-07 V                   ; 3.49 V              ; -0.0449 V           ; 0.354 V                              ; 0.204 V                              ; 1.36e-09 s                  ; 1.05e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.22e-07 V                  ; 3.49 V             ; -0.0449 V          ; 0.354 V                             ; 0.204 V                             ; 1.36e-09 s                 ; 1.05e-09 s                 ; No                        ; No                        ;
; SDRAM_A[12]  ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.22e-07 V                   ; 3.5 V               ; -0.0534 V           ; 0.346 V                              ; 0.247 V                              ; 9.06e-10 s                  ; 6.55e-10 s                  ; Yes                        ; Yes                        ; 3.46 V                      ; 2.22e-07 V                  ; 3.5 V              ; -0.0534 V          ; 0.346 V                             ; 0.247 V                             ; 9.06e-10 s                 ; 6.55e-10 s                 ; Yes                       ; Yes                       ;
; LED          ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 1.24e-07 V                   ; 3.48 V              ; -0.0164 V           ; 0.353 V                              ; 0.315 V                              ; 3.88e-09 s                  ; 3.06e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 1.24e-07 V                  ; 3.48 V             ; -0.0164 V          ; 0.353 V                             ; 0.315 V                             ; 3.88e-09 s                 ; 3.06e-09 s                 ; No                        ; No                        ;
; UART_TX      ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 1.83e-07 V                   ; 3.48 V              ; -0.0176 V           ; 0.357 V                              ; 0.323 V                              ; 3.9e-09 s                   ; 3.06e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 1.83e-07 V                  ; 3.48 V             ; -0.0176 V          ; 0.357 V                             ; 0.323 V                             ; 3.9e-09 s                  ; 3.06e-09 s                 ; No                        ; No                        ;
; SDRAM_DQ[0]  ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.22e-07 V                   ; 3.49 V              ; -0.0449 V           ; 0.354 V                              ; 0.204 V                              ; 1.36e-09 s                  ; 1.05e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.22e-07 V                  ; 3.49 V             ; -0.0449 V          ; 0.354 V                             ; 0.204 V                             ; 1.36e-09 s                 ; 1.05e-09 s                 ; No                        ; No                        ;
; SDRAM_DQ[1]  ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.22e-07 V                   ; 3.49 V              ; -0.0449 V           ; 0.354 V                              ; 0.204 V                              ; 1.36e-09 s                  ; 1.05e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.22e-07 V                  ; 3.49 V             ; -0.0449 V          ; 0.354 V                             ; 0.204 V                             ; 1.36e-09 s                 ; 1.05e-09 s                 ; No                        ; No                        ;
; SDRAM_DQ[2]  ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.22e-07 V                   ; 3.5 V               ; -0.0534 V           ; 0.346 V                              ; 0.247 V                              ; 9.06e-10 s                  ; 6.55e-10 s                  ; Yes                        ; Yes                        ; 3.46 V                      ; 2.22e-07 V                  ; 3.5 V              ; -0.0534 V          ; 0.346 V                             ; 0.247 V                             ; 9.06e-10 s                 ; 6.55e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[3]  ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.22e-07 V                   ; 3.5 V               ; -0.0534 V           ; 0.346 V                              ; 0.247 V                              ; 9.06e-10 s                  ; 6.55e-10 s                  ; Yes                        ; Yes                        ; 3.46 V                      ; 2.22e-07 V                  ; 3.5 V              ; -0.0534 V          ; 0.346 V                             ; 0.247 V                             ; 9.06e-10 s                 ; 6.55e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[4]  ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.28e-07 V                   ; 3.49 V              ; -0.0474 V           ; 0.222 V                              ; 0.267 V                              ; 1.03e-09 s                  ; 6.65e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.28e-07 V                  ; 3.49 V             ; -0.0474 V          ; 0.222 V                             ; 0.267 V                             ; 1.03e-09 s                 ; 6.65e-10 s                 ; No                        ; Yes                       ;
; SDRAM_DQ[5]  ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.28e-07 V                   ; 3.49 V              ; -0.0474 V           ; 0.222 V                              ; 0.267 V                              ; 1.03e-09 s                  ; 6.65e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.28e-07 V                  ; 3.49 V             ; -0.0474 V          ; 0.222 V                             ; 0.267 V                             ; 1.03e-09 s                 ; 6.65e-10 s                 ; No                        ; Yes                       ;
; SDRAM_DQ[6]  ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.28e-07 V                   ; 3.49 V              ; -0.0474 V           ; 0.222 V                              ; 0.267 V                              ; 1.03e-09 s                  ; 6.65e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.28e-07 V                  ; 3.49 V             ; -0.0474 V          ; 0.222 V                             ; 0.267 V                             ; 1.03e-09 s                 ; 6.65e-10 s                 ; No                        ; Yes                       ;
; SDRAM_DQ[7]  ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 3.28e-07 V                   ; 3.49 V              ; -0.0474 V           ; 0.222 V                              ; 0.267 V                              ; 1.03e-09 s                  ; 6.65e-10 s                  ; No                         ; Yes                        ; 3.46 V                      ; 3.28e-07 V                  ; 3.49 V             ; -0.0474 V          ; 0.222 V                             ; 0.267 V                             ; 1.03e-09 s                 ; 6.65e-10 s                 ; No                        ; Yes                       ;
; SDRAM_DQ[8]  ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.22e-07 V                   ; 3.49 V              ; -0.0449 V           ; 0.354 V                              ; 0.204 V                              ; 1.36e-09 s                  ; 1.05e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.22e-07 V                  ; 3.49 V             ; -0.0449 V          ; 0.354 V                             ; 0.204 V                             ; 1.36e-09 s                 ; 1.05e-09 s                 ; No                        ; No                        ;
; SDRAM_DQ[9]  ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.22e-07 V                   ; 3.49 V              ; -0.0449 V           ; 0.354 V                              ; 0.204 V                              ; 1.36e-09 s                  ; 1.05e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.22e-07 V                  ; 3.49 V             ; -0.0449 V          ; 0.354 V                             ; 0.204 V                             ; 1.36e-09 s                 ; 1.05e-09 s                 ; No                        ; No                        ;
; SDRAM_DQ[10] ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.22e-07 V                   ; 3.49 V              ; -0.0449 V           ; 0.354 V                              ; 0.204 V                              ; 1.36e-09 s                  ; 1.05e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.22e-07 V                  ; 3.49 V             ; -0.0449 V          ; 0.354 V                             ; 0.204 V                             ; 1.36e-09 s                 ; 1.05e-09 s                 ; No                        ; No                        ;
; SDRAM_DQ[11] ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.22e-07 V                   ; 3.49 V              ; -0.0449 V           ; 0.354 V                              ; 0.204 V                              ; 1.36e-09 s                  ; 1.05e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.22e-07 V                  ; 3.49 V             ; -0.0449 V          ; 0.354 V                             ; 0.204 V                             ; 1.36e-09 s                 ; 1.05e-09 s                 ; No                        ; No                        ;
; SDRAM_DQ[12] ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.22e-07 V                   ; 3.5 V               ; -0.0534 V           ; 0.346 V                              ; 0.247 V                              ; 9.06e-10 s                  ; 6.55e-10 s                  ; Yes                        ; Yes                        ; 3.46 V                      ; 2.22e-07 V                  ; 3.5 V              ; -0.0534 V          ; 0.346 V                             ; 0.247 V                             ; 9.06e-10 s                 ; 6.55e-10 s                 ; Yes                       ; Yes                       ;
; SDRAM_DQ[13] ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.22e-07 V                   ; 3.49 V              ; -0.0449 V           ; 0.354 V                              ; 0.204 V                              ; 1.36e-09 s                  ; 1.05e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.22e-07 V                  ; 3.49 V             ; -0.0449 V          ; 0.354 V                             ; 0.204 V                             ; 1.36e-09 s                 ; 1.05e-09 s                 ; No                        ; No                        ;
; SDRAM_DQ[14] ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.22e-07 V                   ; 3.49 V              ; -0.0449 V           ; 0.354 V                              ; 0.204 V                              ; 1.36e-09 s                  ; 1.05e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 2.22e-07 V                  ; 3.49 V             ; -0.0449 V          ; 0.354 V                             ; 0.204 V                             ; 1.36e-09 s                 ; 1.05e-09 s                 ; No                        ; No                        ;
; SDRAM_DQ[15] ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 2.22e-07 V                   ; 3.5 V               ; -0.0534 V           ; 0.346 V                              ; 0.247 V                              ; 9.06e-10 s                  ; 6.55e-10 s                  ; Yes                        ; Yes                        ; 3.46 V                      ; 2.22e-07 V                  ; 3.5 V              ; -0.0534 V          ; 0.346 V                             ; 0.247 V                             ; 9.06e-10 s                 ; 6.55e-10 s                 ; Yes                       ; Yes                       ;
; SPI_DO       ; 3.3-V LVTTL  ; 0 s                 ; 0 s                 ; 3.46 V                       ; 1.24e-07 V                   ; 3.48 V              ; -0.0164 V           ; 0.353 V                              ; 0.315 V                              ; 3.88e-09 s                  ; 3.06e-09 s                  ; No                         ; No                         ; 3.46 V                      ; 1.24e-07 V                  ; 3.48 V             ; -0.0164 V          ; 0.353 V                             ; 0.315 V                             ; 3.88e-09 s                 ; 3.06e-09 s                 ; No                        ; No                        ;
+--------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Setup Transfers                                                                                                                                                                     ;
+--------------------------------------------------------------------+--------------------------------------------------------------------+----------+----------+----------+----------+
; From Clock                                                         ; To Clock                                                           ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
+--------------------------------------------------------------------+--------------------------------------------------------------------+----------+----------+----------+----------+
; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 2357     ; 0        ; 0        ; 0        ;
; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 120      ; 0        ; 0        ; 0        ;
; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 36       ; 0        ; 0        ; 0        ;
; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 49804202 ; 0        ; 0        ; 0        ;
; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3        ; 1        ; 0        ; 0        ;
; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 219      ; 0        ; 0        ; 0        ;
+--------------------------------------------------------------------+--------------------------------------------------------------------+----------+----------+----------+----------+
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Hold Transfers                                                                                                                                                                      ;
+--------------------------------------------------------------------+--------------------------------------------------------------------+----------+----------+----------+----------+
; From Clock                                                         ; To Clock                                                           ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
+--------------------------------------------------------------------+--------------------------------------------------------------------+----------+----------+----------+----------+
; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 2357     ; 0        ; 0        ; 0        ;
; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; 120      ; 0        ; 0        ; 0        ;
; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 36       ; 0        ; 0        ; 0        ;
; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 49804202 ; 0        ; 0        ; 0        ;
; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 3        ; 1        ; 0        ; 0        ;
; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] ; 219      ; 0        ; 0        ; 0        ;
+--------------------------------------------------------------------+--------------------------------------------------------------------+----------+----------+----------+----------+
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Recovery Transfers                                                                                                                                                                  ;
+--------------------------------------------------------------------+--------------------------------------------------------------------+----------+----------+----------+----------+
; From Clock                                                         ; To Clock                                                           ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
+--------------------------------------------------------------------+--------------------------------------------------------------------+----------+----------+----------+----------+
; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 4739     ; 0        ; 0        ; 0        ;
+--------------------------------------------------------------------+--------------------------------------------------------------------+----------+----------+----------+----------+
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Removal Transfers                                                                                                                                                                   ;
+--------------------------------------------------------------------+--------------------------------------------------------------------+----------+----------+----------+----------+
; From Clock                                                         ; To Clock                                                           ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
+--------------------------------------------------------------------+--------------------------------------------------------------------+----------+----------+----------+----------+
; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] ; 4739     ; 0        ; 0        ; 0        ;
+--------------------------------------------------------------------+--------------------------------------------------------------------+----------+----------+----------+----------+
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.


---------------
; Report TCCS ;
---------------
No dedicated SERDES Transmitter circuitry present in device or used in design


---------------
; Report RSKM ;
---------------
No dedicated SERDES Receiver circuitry present in device or used in design


+------------------------------------------------+
; Unconstrained Paths                            ;
+---------------------------------+-------+------+
; Property                        ; Setup ; Hold ;
+---------------------------------+-------+------+
; Illegal Clocks                  ; 0     ; 0    ;
; Unconstrained Clocks            ; 6     ; 6    ;
; Unconstrained Input Ports       ; 18    ; 18   ;
; Unconstrained Input Port Paths  ; 226   ; 226  ;
; Unconstrained Output Ports      ; 61    ; 61   ;
; Unconstrained Output Port Paths ; 79    ; 79   ;
+---------------------------------+-------+------+


+------------------------------------+
; TimeQuest Timing Analyzer Messages ;
+------------------------------------+
Info: *******************************************************************
Info: Running Quartus II 32-bit TimeQuest Timing Analyzer
    Info: Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition
    Info: Processing started: Sat Apr  4 18:07:25 2015
Info: Command: quartus_sta atari800core -c atari800core
Info: qsta_default_script.tcl version: #1
Info (11104): Parallel Compilation has detected 4 hyper-threaded processors. However, the extra hyper-threaded processors will not be used by default. Parallel Compilation will use 2 of the 2 physical processors detected instead.
Info (21077): Low junction temperature is 0 degrees C
Info (21077): High junction temperature is 85 degrees C
Info (332104): Reading SDC File: 'atari800core.sdc'
Info (332110): Deriving PLL clocks
    Info (332110): create_generated_clock -source {\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|inclk[0]} -divide_by 40 -multiply_by 227 -duty_cycle 50.00 -name {\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0]} {\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0]}
    Info (332110): create_generated_clock -source {\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|inclk[0]} -divide_by 80 -multiply_by 227 -duty_cycle 50.00 -name {\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1]} {\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1]}
    Info (332110): create_generated_clock -source {\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|inclk[0]} -divide_by 40 -multiply_by 227 -phase -99.00 -duty_cycle 50.00 -name {\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[2]} {\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[2]}
    Info (332110): create_generated_clock -source {\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|inclk[0]} -divide_by 1280 -phase -0.01 -duty_cycle 50.00 -name {\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3]} {\gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3]}
    Info (332110): create_generated_clock -source {\gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|inclk[0]} -divide_by 27 -multiply_by 20 -duty_cycle 50.00 -name {\gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0]} {\gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0]}
Warning (332174): Ignored filter at atari800core.sdc(3): clock|altpll_component|auto_generated|pll1|clk[2] could not be matched with a pin
Warning (332049): Ignored create_generated_clock at atari800core.sdc(3): Argument -source is an empty collection
    Info (332050): create_generated_clock -name sdclk_pin -source [get_pins {clock|altpll_component|auto_generated|pll1|clk[2]}] [get_ports {SDRAM_CLK}]
Info (332151): Clock uncertainty is not calculated until you update the timing netlist.
Warning (332174): Ignored filter at atari800core.sdc(5): sdclk_pin could not be matched with a clock
Warning (332049): Ignored set_input_delay at atari800core.sdc(5): Argument -clock is not an object ID
    Info (332050): set_input_delay -clock sdclk_pin -max 6.4 [get_ports SDRAM_DQ*]
Warning (332049): Ignored set_input_delay at atari800core.sdc(6): Argument -clock is not an object ID
    Info (332050): set_input_delay -clock sdclk_pin -min 3.2 [get_ports SDRAM_DQ*]
Warning (332049): Ignored set_output_delay at atari800core.sdc(7): Argument -clock is not an object ID
    Info (332050): set_output_delay -clock sdclk_pin -max 1.5 [get_ports SDRAM_*]
Warning (332049): Ignored set_output_delay at atari800core.sdc(8): Argument -clock is not an object ID
    Info (332050): set_output_delay -clock sdclk_pin -min -0.8 [get_ports SDRAM_*]
Warning (332174): Ignored filter at atari800core.sdc(9): clock|altpll_component|auto_generated|pll1|clk[0] could not be matched with a clock
Warning (332049): Ignored set_multicycle_path at atari800core.sdc(9): Argument <from> is an empty collection
    Info (332050): set_multicycle_path -from [get_clocks {sdclk_pin}] -to [get_clocks {clock|altpll_component|auto_generated|pll1|clk[0]}] -setup -end 2
Warning (332049): Ignored set_multicycle_path at atari800core.sdc(9): Argument <to> is an empty collection
Warning (332125): Found combinational loop of 2 nodes
    Warning (332126): Node "my_user_io|spi_sck~0|combout"
    Warning (332126): Node "my_user_io|spi_sck~0|datad"
Warning (332060): Node: zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|sclk was determined to be a clock but was found without an associated clock assignment.
Warning (332060): Node: sd_card:my_sd_card|read_state.RD_STATE_IDLE was determined to be a clock but was found without an associated clock assignment.
Warning (332060): Node: SPI_SCK was determined to be a clock but was found without an associated clock assignment.
Warning (332060): Node: user_io:my_user_io|sd_ack was determined to be a clock but was found without an associated clock assignment.
Warning (332060): Node: user_io:my_user_io|sd_dout_strobe was determined to be a clock but was found without an associated clock assignment.
Warning (332060): Node: sd_card:my_sd_card|write_state.WR_STATE_BUSY was determined to be a clock but was found without an associated clock assignment.
Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties.
Info: Found TIMEQUEST_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON
Info: Analyzing Slow 1200mV 85C Model
Info (332146): Worst-case setup slack is 0.603
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     0.603         0.000 \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     1.656         0.000 \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119): 63993.379         0.000 \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] 
Info (332146): Worst-case hold slack is 0.398
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     0.398         0.000 \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     0.454         0.000 \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     0.455         0.000 \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] 
Info (332146): Worst-case recovery slack is 10.081
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):    10.081         0.000 \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] 
Info (332146): Worst-case removal slack is 1.801
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     1.801         0.000 \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] 
Info (332146): Worst-case minimum pulse width slack is 4.098
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     4.098         0.000 \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     8.377         0.000 \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):    18.366         0.000 CLOCK_27[0] 
    Info (332119):    24.963         0.000 \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119): 31999.661         0.000 \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] 
Info: Analyzing Slow 1200mV 0C Model
Info (334003): Started post-fitting delay annotation
Info (334004): Delay annotation completed successfully
Warning (332060): Node: zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|sclk was determined to be a clock but was found without an associated clock assignment.
Warning (332060): Node: sd_card:my_sd_card|read_state.RD_STATE_IDLE was determined to be a clock but was found without an associated clock assignment.
Warning (332060): Node: SPI_SCK was determined to be a clock but was found without an associated clock assignment.
Warning (332060): Node: user_io:my_user_io|sd_ack was determined to be a clock but was found without an associated clock assignment.
Warning (332060): Node: user_io:my_user_io|sd_dout_strobe was determined to be a clock but was found without an associated clock assignment.
Warning (332060): Node: sd_card:my_sd_card|write_state.WR_STATE_BUSY was determined to be a clock but was found without an associated clock assignment.
Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties.
Info (332146): Worst-case setup slack is 0.773
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     0.773         0.000 \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     2.103         0.000 \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119): 63993.771         0.000 \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] 
Info (332146): Worst-case hold slack is 0.383
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     0.383         0.000 \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     0.402         0.000 \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     0.403         0.000 \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] 
Info (332146): Worst-case recovery slack is 10.640
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):    10.640         0.000 \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] 
Info (332146): Worst-case removal slack is 1.647
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     1.647         0.000 \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] 
Info (332146): Worst-case minimum pulse width slack is 4.101
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     4.101         0.000 \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     8.409         0.000 \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):    18.351         0.000 CLOCK_27[0] 
    Info (332119):    24.963         0.000 \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119): 31999.665         0.000 \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] 
Info: Analyzing Fast 1200mV 0C Model
Info (334003): Started post-fitting delay annotation
Info (334004): Delay annotation completed successfully
Warning (332060): Node: zpucore:zpu|zpu_config_regs:config_regs|spi_master:spi_master1|sclk was determined to be a clock but was found without an associated clock assignment.
Warning (332060): Node: sd_card:my_sd_card|read_state.RD_STATE_IDLE was determined to be a clock but was found without an associated clock assignment.
Warning (332060): Node: SPI_SCK was determined to be a clock but was found without an associated clock assignment.
Warning (332060): Node: user_io:my_user_io|sd_ack was determined to be a clock but was found without an associated clock assignment.
Warning (332060): Node: user_io:my_user_io|sd_dout_strobe was determined to be a clock but was found without an associated clock assignment.
Warning (332060): Node: sd_card:my_sd_card|write_state.WR_STATE_BUSY was determined to be a clock but was found without an associated clock assignment.
Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in TimeQuest to see clock uncertainties.
Info (332146): Worst-case setup slack is 1.405
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     1.405         0.000 \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     5.635         0.000 \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119): 63997.115         0.000 \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] 
Info (332146): Worst-case hold slack is 0.137
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     0.137         0.000 \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):     0.187         0.000 \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     0.187         0.000 \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] 
Info (332146): Worst-case recovery slack is 14.199
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):    14.199         0.000 \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] 
Info (332146): Worst-case removal slack is 0.781
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     0.781         0.000 \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] 
Info (332146): Worst-case minimum pulse width slack is 4.187
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     4.187         0.000 \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119):     8.557         0.000 \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[1] 
    Info (332119):    17.928         0.000 CLOCK_27[0] 
    Info (332119):    24.978         0.000 \gen_pal_pll:mist_pll|altpll_component|auto_generated|pll1|clk[0] 
    Info (332119): 31999.751         0.000 \gen_pal_pll:mist_pll2|altpll_component|auto_generated|pll1|clk[3] 
Info (332102): Design is not fully constrained for setup requirements
Info (332102): Design is not fully constrained for hold requirements
Info: Quartus II 32-bit TimeQuest Timing Analyzer was successful. 0 errors, 31 warnings
    Info: Peak virtual memory: 522 megabytes
    Info: Processing ended: Sat Apr  4 18:07:53 2015
    Info: Elapsed time: 00:00:28
    Info: Total CPU time (on all processors): 00:00:33


