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Bug #67

open

Pokey two tone timing problem

Added by admin over 6 years ago. Updated over 3 years ago.

Status:
Resolved
Priority:
Normal
Assignee:
-
Start date:
06/01/2018
Due date:
% Done:

0%

Estimated time:

Description

An old bug.. See http://atariage.com/forums/topic/228527-pokey-emulation/page-3#entry3060595

10 P=53760
20 POKE P+8,64
30 POKE P+1,10+32
31 POKE 53775,11
40 POKE P,20
50 GOTO 50

high pitched, low pitched on real Atari


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Actions #2

Updated by foft over 6 years ago

Been measuring cases on the scope...

Confirmed the extra cycle delays described in that forum post on my 600XL. Confirmed missing on the EclaireXL implementation.

Actions #3

Updated by foft over 6 years ago

I was concerned that my clocks were off at first since I was running in VGA mode, but that changes vsync slightly (50Hz vs 4.86Hz) which of course also impacts audio frequency:-) Debugging in RGB mode gives a perfect match.

Actions #4

Updated by foft over 6 years ago

A 2 cycle delay on the reset fixes both the 4 cycle and the 9 cycle case.

Now to check this specific example!

Actions #5

Updated by foft over 6 years ago

Nope, seems to be some interaction with the noise filtering. I wonder if the delay also needs applying to the pulse from the timer, that then hits the noise filter.

Actions #6

Updated by foft over 6 years ago

So, errr identical then! Going to have to think about this one...

B is Atari, A is EclaireXL.

Actions #7

Updated by foft over 6 years ago

I found if I pokey 53775,11+128 on the Atari then it matches the Eclaire output. Unfortunately forcing the serious output on eclaire to 1 or 0 does not change anything. Still its something to go on!

Actions #8

Updated by foft almost 4 years ago

I have audio test pcbs now to allow synchronised writes to pokeymax vs pokey. Which should help track down this kind of thing.

Actions #9

Updated by foft over 3 years ago

This was fixed following investigation and a simple test case/detailed spreadsheet from Synthpopalooza.

I used these new audio test pcbs and a cycle exact fpga comparison program to check it against the real pokey.

Incidentally I found another few small intermittent cycle differences which I'll be able to track down with this too.

Actions #10

Updated by foft over 3 years ago

  • Status changed from New to Resolved
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