917k's setup!
I'm sure you've already seen Steve's great setup, but if not go and see here. Very nice work:-)
http://atariage.com/forums/topic/267845-my-eclairexl-a-salute-to-the-atari-400-my-first-atari-computer/
- SIO in line pulled low by ZPU. To allow SIO debugging externally.
- ISO/ANSI keyboard selection (thanks Steve)
- Fix for crash on existing zpu menu that was introduced by PBI (this was tricky!)
- PBI access from zpu, and the groundwork for pbi access from turbo - basically we need to support a subset of addresses to make this work.
- ROM in block RAM instead of SDRAM. This is much faster.
- Antic refresh cycles on PBI
- Svideo/composite reimplemented using the Atari technique - fixed amplitude sin + brightness, phase shifted.
- 0 written to D500 on cold reboot, which Nir advises me will fix some cart reset issues.
- Debug output over GPIO, this will allow cycle by cycle capture with an 8-bit logic analyzer - and better with a 16-bit one... Which will allow us to more easily debug some of the bugs. Debugging on the FPGA usually entails capturing a very small precise section of logic, so its hard to capture things that only happen on one frame and do not repeat without significant effort. I plan to write something to capture the output and compare vs what say ... Altirra would do. Not sure how tricky that will be to wire up. Anyone want to help once I get a dump?
Anyway v15 is basically all done, except I have some timing problems - so I need to rewrite the central device select mmu logic. Its long overdue... Bear with me, this will take the rest of this week I think.
In v16 I need to start to tackle some of the bigger questions, such as ... the block rom for the ZPU is full! I was scrambling for bytes to add the ISO keyboard support. I can of course assign more rom, but I'm tempted to do a larger restructure. Perhaps a bunch of 6502s would be more in spirit? One for USB, one for drive emulation, one for... What do you think? Anyone up for porting the USB logic to 6502?
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