Index: chameleon/zpu_rom.vhdl
===================================================================
--- chameleon/zpu_rom.vhdl	(nonexistent)
+++ chameleon/zpu_rom.vhdl	(revision 122)
@@ -0,0 +1,4130 @@
+
+--
+--ROMsUsingBlockRAMResources.
+--VHDLcodeforaROMwithregisteredoutput(template2)
+--
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.std_logic_unsigned.all;
+
+entity zpu_rom is
+port(
+        clock:in std_logic;
+        address:in std_logic_vector(11 downto 0);
+        q:out std_logic_vector(31 downto 0)
+);
+end zpu_rom;
+
+architecture syn of zpu_rom is
+        type rom_type is array(0 to 4095) of std_logic_vector(31 downto 0);
+        signal ROM:rom_type:=
+(
+	X"0b0b0b89",
+X"ad040b0b",
+X"0b0b0b0b",
+X"0b0b0b0b",
+X"0b0b0b0b",
+X"0b0b0b0b",
+X"0b0b0b0b",
+X"0b0b0b0b",
+X"0b0b0b0b",
+X"00000000",
+X"00000000",
+X"00000000",
+X"00000000",
+X"00000000",
+X"00000000",
+X"00000000",
+X"71fd0608",
+X"72830609",
+X"81058205",
+X"832b2a83",
+X"ffff0652",
+X"04000000",
+X"00000000",
+X"00000000",
+X"71fd0608",
+X"83ffff73",
+X"83060981",
+X"05820583",
+X"2b2b0906",
+X"7383ffff",
+X"0b0b0b0b",
+X"83a70400",
+X"72098105",
+X"72057373",
+X"09060906",
+X"73097306",
+X"070a8106",
+X"53510400",
+X"00000000",
+X"00000000",
+X"72722473",
+X"732e0753",
+X"51040000",
+X"00000000",
+X"00000000",
+X"00000000",
+X"00000000",
+X"00000000",
+X"71737109",
+X"71068106",
+X"30720a10",
+X"0a720a10",
+X"0a31050a",
+X"81065151",
+X"53510400",
+X"00000000",
+X"72722673",
+X"732e0753",
+X"51040000",
+X"00000000",
+X"00000000",
+X"00000000",
+X"00000000",
+X"00000000",
+X"00000000",
+X"00000000",
+X"00000000",
+X"00000000",
+X"00000000",
+X"00000000",
+X"00000000",
+X"00000000",
+X"0b0b0b88",
+X"bc040000",
+X"00000000",
+X"00000000",
+X"00000000",
+X"00000000",
+X"00000000",
+X"00000000",
+X"720a722b",
+X"0a535104",
+X"00000000",
+X"00000000",
+X"00000000",
+X"00000000",
+X"00000000",
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+X"72729f06",
+X"0981050b",
+X"0b0b889f",
+X"05040000",
+X"00000000",
+X"00000000",
+X"00000000",
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+X"72722aff",
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+X"0974090a",
+X"8106ff05",
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+X"020d0406",
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+X"524f4d00",
+X"43686f6f",
+X"73652000",
+X"66696c65",
+X"00000000",
+X"4449523a",
+X"00000000",
+X"44495200",
+X"6e616d65",
+X"20000000",
+X"25303278",
+X"00000000",
+X"00000000",
+X"00000000",
+X"00003ce0",
+X"00003ce4",
+X"00003cec",
+X"00003cf8",
+X"00003d04",
+X"00003d10",
+X"00003d1c",
+X"00003d20",
+X"0001d20f",
+X"0001d400",
+X"0001d401",
+X"0001d409",
+X"0001d010",
+X"0001d301",
+X"0001d300",
+X"0001d20a",
+X"0001d01b",
+X"0001d016",
+X"0001d019",
+X"0001d018",
+X"0001d017",
+X"0001d01a",
+X"0001d403",
+X"0001d402",
+X"0001d40e",
+X"0004007c",
+X"00040078",
+X"00040074",
+X"00040068",
+X"00040060",
+X"0004005c",
+X"00040058",
+X"00040054",
+X"00040050",
+X"0004004c",
+X"00040048",
+X"00040044",
+X"00040040",
+X"00040034",
+X"00040030",
+X"0004002c",
+X"00040028",
+X"00040024",
+X"00040020",
+X"0004001c",
+X"00040018",
+X"00040014",
+X"00040010",
+X"0004000c",
+X"00040008",
+X"00040004",
+X"00040000",
+X"72025f07",
+X"f807a900",
+X"8d04038d",
+X"4402a907",
+X"8d0503a9",
+X"708d0a03",
+X"a9018d0b",
+X"03850960",
+X"7d8a4820",
+X"53e488d0",
+X"fa68aa8c",
+X"8e07ad7d",
+X"07ee8e07",
+X"60a9938d",
+X"e202a907",
+X"8de302a2",
+X"0220da07",
+X"954320da",
+X"07954435",
+X"43c9fff0",
+X"f0caca10",
+X"ec3006e6",
+X"45d002e6",
+X"4620da07",
+X"a2018144",
+X"b545d543",
+X"d0edca10",
+X"f720d207",
+X"4c9407a9",
+X"038d0fd2",
+X"6ce202ad",
+X"8e07cd7f",
+X"07d0abee",
+X"0a03d003",
+X"ee0b03ad",
+X"7d070d7e",
+X"07d08e20",
+X"d2076ce0",
+X"0220da07",
+X"8de00220",
+X"da078de1",
+X"022de002",
+X"c9fff0ed",
+X"a9008d8e",
+X"07f08200",
+X"2f617461",
+X"72693830",
+X"302f726f",
+X"6d000000",
+X"2f617461",
+X"72693830",
+X"302f7573",
+X"65720000",
+X"00000000",
+X"00000000",
+X"00000000",
+X"00000000",
+X"00000000",
+X"00000000",
+X"00000000",
+X"00000000",
+X"00000000",
+X"00000000",
+X"00000000",
+X"00000000",
+X"00000000",
+X"00000000",
+X"00000000",
+X"00000000",
+X"00000000",
+X"00000000",
+X"00000000",
+X"00000000",
+X"00000000",
+X"00000000",
+X"00000000",
+X"00000000",
+X"00000000",
+X"00000000",
+X"00000000",
+X"00000000",
+X"00000000"
+
+);
+        signal rdata:std_logic_vector(31 downto 0);
+begin
+        rdata<=ROM(conv_integer(address));
+
+        process(clock)
+        begin
+                if(clock'event and clock='1')then
+                	q<=rdata;
+                end if;
+        end process;
+end syn;
