Index: atari_chips/pokeyv2/flash_02/flash.qsys
===================================================================
--- atari_chips/pokeyv2/flash_02/flash.qsys	(revision 1335)
+++ atari_chips/pokeyv2/flash_02/flash.qsys	(nonexistent)
@@ -1,90 +0,0 @@
-<?xml version="1.0" encoding="UTF-8"?>
-<system name="$${FILENAME}">
- <component
-   name="$${FILENAME}"
-   displayName="$${FILENAME}"
-   version="1.0"
-   description=""
-   tags="INTERNAL_COMPONENT=true"
-   categories="" />
- <parameter name="bonusData"><![CDATA[bonusData 
-{
-   element onchip_flash_0
-   {
-      datum _sortIndex
-      {
-         value = "0";
-         type = "int";
-      }
-   }
-}
-]]></parameter>
- <parameter name="clockCrossingAdapter" value="HANDSHAKE" />
- <parameter name="device" value="10M02SCU169C8G" />
- <parameter name="deviceFamily" value="MAX 10" />
- <parameter name="deviceSpeedGrade" value="8" />
- <parameter name="fabricMode" value="QSYS" />
- <parameter name="generateLegacySim" value="false" />
- <parameter name="generationId" value="0" />
- <parameter name="globalResetBus" value="false" />
- <parameter name="hdlLanguage" value="VERILOG" />
- <parameter name="hideFromIPCatalog" value="true" />
- <parameter name="lockedInterfaceDefinition" value="" />
- <parameter name="maxAdditionalLatency" value="1" />
- <parameter name="projectName" value="" />
- <parameter name="sopcBorderPoints" value="false" />
- <parameter name="systemHash" value="0" />
- <parameter name="testBenchDutName" value="" />
- <parameter name="timeStamp" value="0" />
- <parameter name="useTestBenchNamingPattern" value="false" />
- <instanceScript></instanceScript>
- <interface name="clk" internal="onchip_flash_0.clk" type="clock" dir="end">
-  <port name="clock" internal="clock" />
- </interface>
- <interface name="csr" internal="onchip_flash_0.csr" type="avalon" dir="end">
-  <port name="avmm_csr_addr" internal="avmm_csr_addr" />
-  <port name="avmm_csr_read" internal="avmm_csr_read" />
-  <port name="avmm_csr_writedata" internal="avmm_csr_writedata" />
-  <port name="avmm_csr_write" internal="avmm_csr_write" />
-  <port name="avmm_csr_readdata" internal="avmm_csr_readdata" />
- </interface>
- <interface name="data" internal="onchip_flash_0.data" type="avalon" dir="end">
-  <port name="avmm_data_addr" internal="avmm_data_addr" />
-  <port name="avmm_data_read" internal="avmm_data_read" />
-  <port name="avmm_data_writedata" internal="avmm_data_writedata" />
-  <port name="avmm_data_write" internal="avmm_data_write" />
-  <port name="avmm_data_readdata" internal="avmm_data_readdata" />
-  <port name="avmm_data_waitrequest" internal="avmm_data_waitrequest" />
-  <port name="avmm_data_readdatavalid" internal="avmm_data_readdatavalid" />
-  <port name="avmm_data_burstcount" internal="avmm_data_burstcount" />
- </interface>
- <interface name="nreset" internal="onchip_flash_0.nreset" type="reset" dir="end">
-  <port name="reset_n" internal="reset_n" />
- </interface>
- <module
-   name="onchip_flash_0"
-   kind="altera_onchip_flash"
-   version="19.1"
-   enabled="1"
-   autoexport="1">
-  <parameter name="AUTO_CLOCK_RATE" value="0" />
-  <parameter name="CLOCK_FREQUENCY" value="7.25" />
-  <parameter name="CONFIGURATION_MODE">Single Uncompressed Image</parameter>
-  <parameter name="CONFIGURATION_SCHEME">Internal Configuration</parameter>
-  <parameter name="DATA_INTERFACE" value="Parallel" />
-  <parameter name="DEVICE_FAMILY" value="MAX 10" />
-  <parameter name="PART_NAME" value="10M02SCU169C8G" />
-  <parameter name="READ_BURST_COUNT" value="2" />
-  <parameter name="READ_BURST_MODE" value="Incrementing" />
-  <parameter name="SECTOR_ACCESS_MODE">Read and write,Read and write,Read only,Hidden,Read and write</parameter>
-  <parameter name="autoInitializationFileName">$${FILENAME}_onchip_flash_0</parameter>
-  <parameter name="initFlashContent" value="false" />
-  <parameter name="initializationFileName">altera_onchip_flash.hex</parameter>
-  <parameter name="initializationFileNameForSim">altera_onchip_flash.dat</parameter>
-  <parameter name="useNonDefaultInitFile" value="false" />
- </module>
- <interconnectRequirement for="$system" name="qsys_mm.clockCrossingAdapter" value="HANDSHAKE" />
- <interconnectRequirement for="$system" name="qsys_mm.enableEccProtection" value="FALSE" />
- <interconnectRequirement for="$system" name="qsys_mm.insertDefaultSlave" value="FALSE" />
- <interconnectRequirement for="$system" name="qsys_mm.maxAdditionalLatency" value="1" />
-</system>
Index: atari_chips/pokeyv2/flash_02/flash.sopcinfo
===================================================================
--- atari_chips/pokeyv2/flash_02/flash.sopcinfo	(revision 1335)
+++ atari_chips/pokeyv2/flash_02/flash.sopcinfo	(nonexistent)
@@ -1,1627 +0,0 @@
-<?xml version="1.0" encoding="UTF-8"?>
-<EnsembleReport name="flash" kind="flash" version="1.0" fabric="QSYS">
- <!-- Format version 19.1 670 (Future versions may contain additional information.) -->
- <!-- 2020.06.18.10:36:10 -->
- <!-- A collection of modules and connections -->
- <parameter name="AUTO_GENERATION_ID">
-  <type>java.lang.Integer</type>
-  <value>1592469370</value>
-  <derived>false</derived>
-  <enabled>true</enabled>
-  <visible>false</visible>
-  <valid>true</valid>
-  <sysinfo_type>GENERATION_ID</sysinfo_type>
- </parameter>
- <parameter name="AUTO_UNIQUE_ID">
-  <type>java.lang.String</type>
-  <value></value>
-  <derived>false</derived>
-  <enabled>true</enabled>
-  <visible>false</visible>
-  <valid>true</valid>
-  <sysinfo_type>UNIQUE_ID</sysinfo_type>
- </parameter>
- <parameter name="AUTO_DEVICE_FAMILY">
-  <type>java.lang.String</type>
-  <value>MAX10FPGA</value>
-  <derived>false</derived>
-  <enabled>true</enabled>
-  <visible>false</visible>
-  <valid>true</valid>
-  <sysinfo_type>DEVICE_FAMILY</sysinfo_type>
- </parameter>
- <parameter name="AUTO_DEVICE">
-  <type>java.lang.String</type>
-  <value>10M02SCU169C8G</value>
-  <derived>false</derived>
-  <enabled>true</enabled>
-  <visible>false</visible>
-  <valid>true</valid>
-  <sysinfo_type>DEVICE</sysinfo_type>
- </parameter>
- <parameter name="AUTO_DEVICE_SPEEDGRADE">
-  <type>java.lang.String</type>
-  <value>8</value>
-  <derived>false</derived>
-  <enabled>true</enabled>
-  <visible>false</visible>
-  <valid>true</valid>
-  <sysinfo_type>DEVICE_SPEEDGRADE</sysinfo_type>
- </parameter>
- <parameter name="AUTO_CLK_CLOCK_RATE">
-  <type>java.lang.Long</type>
-  <value>-1</value>
-  <derived>false</derived>
-  <enabled>true</enabled>
-  <visible>false</visible>
-  <valid>true</valid>
-  <sysinfo_type>CLOCK_RATE</sysinfo_type>
-  <sysinfo_arg>clk</sysinfo_arg>
- </parameter>
- <parameter name="AUTO_CLK_CLOCK_DOMAIN">
-  <type>java.lang.Integer</type>
-  <value>-1</value>
-  <derived>false</derived>
-  <enabled>true</enabled>
-  <visible>false</visible>
-  <valid>true</valid>
-  <sysinfo_type>CLOCK_DOMAIN</sysinfo_type>
-  <sysinfo_arg>clk</sysinfo_arg>
- </parameter>
- <parameter name="AUTO_CLK_RESET_DOMAIN">
-  <type>java.lang.Integer</type>
-  <value>-1</value>
-  <derived>false</derived>
-  <enabled>true</enabled>
-  <visible>false</visible>
-  <valid>true</valid>
-  <sysinfo_type>RESET_DOMAIN</sysinfo_type>
-  <sysinfo_arg>clk</sysinfo_arg>
- </parameter>
- <parameter name="deviceFamily">
-  <type>java.lang.String</type>
-  <value>MAX 10</value>
-  <derived>false</derived>
-  <enabled>true</enabled>
-  <visible>false</visible>
-  <valid>true</valid>
-  <sysinfo_type>DEVICE_FAMILY</sysinfo_type>
- </parameter>
- <parameter name="generateLegacySim">
-  <type>boolean</type>
-  <value>false</value>
-  <derived>false</derived>
-  <enabled>true</enabled>
-  <visible>true</visible>
-  <valid>true</valid>
- </parameter>
- <module
-   name="onchip_flash_0"
-   kind="altera_onchip_flash"
-   version="19.1"
-   path="onchip_flash_0">
-  <!-- Describes a single module. Module parameters are
-the requested settings for a module instance. -->
-  <assignment>
-   <name>embeddedsw.CMacro.BYTES_PER_PAGE</name>
-   <value>2048</value>
-  </assignment>
-  <assignment>
-   <name>embeddedsw.CMacro.READ_ONLY_MODE</name>
-   <value>0</value>
-  </assignment>
-  <assignment>
-   <name>embeddedsw.CMacro.SECTOR1_ENABLED</name>
-   <value>1</value>
-  </assignment>
-  <assignment>
-   <name>embeddedsw.CMacro.SECTOR1_END_ADDR</name>
-   <value>6143</value>
-  </assignment>
-  <assignment>
-   <name>embeddedsw.CMacro.SECTOR1_START_ADDR</name>
-   <value>0</value>
-  </assignment>
-  <assignment>
-   <name>embeddedsw.CMacro.SECTOR2_ENABLED</name>
-   <value>1</value>
-  </assignment>
-  <assignment>
-   <name>embeddedsw.CMacro.SECTOR2_END_ADDR</name>
-   <value>12287</value>
-  </assignment>
-  <assignment>
-   <name>embeddedsw.CMacro.SECTOR2_START_ADDR</name>
-   <value>6144</value>
-  </assignment>
-  <assignment>
-   <name>embeddedsw.CMacro.SECTOR3_ENABLED</name>
-   <value>1</value>
-  </assignment>
-  <assignment>
-   <name>embeddedsw.CMacro.SECTOR3_END_ADDR</name>
-   <value>81919</value>
-  </assignment>
-  <assignment>
-   <name>embeddedsw.CMacro.SECTOR3_START_ADDR</name>
-   <value>12288</value>
-  </assignment>
-  <assignment>
-   <name>embeddedsw.CMacro.SECTOR4_ENABLED</name>
-   <value>0</value>
-  </assignment>
-  <assignment>
-   <name>embeddedsw.CMacro.SECTOR4_END_ADDR</name>
-   <value>-1</value>
-  </assignment>
-  <assignment>
-   <name>embeddedsw.CMacro.SECTOR4_START_ADDR</name>
-   <value>-1</value>
-  </assignment>
-  <assignment>
-   <name>embeddedsw.CMacro.SECTOR5_ENABLED</name>
-   <value>0</value>
-  </assignment>
-  <assignment>
-   <name>embeddedsw.CMacro.SECTOR5_END_ADDR</name>
-   <value>-1</value>
-  </assignment>
-  <assignment>
-   <name>embeddedsw.CMacro.SECTOR5_START_ADDR</name>
-   <value>-1</value>
-  </assignment>
-  <assignment>
-   <name>embeddedsw.memoryInfo.DAT_SYM_INSTALL_DIR</name>
-   <value>SIM_DIR</value>
-  </assignment>
-  <assignment>
-   <name>embeddedsw.memoryInfo.FLASH_INSTALL_DIR</name>
-   <value>APP_DIR</value>
-  </assignment>
-  <assignment>
-   <name>embeddedsw.memoryInfo.GENERATE_DAT_SYM</name>
-   <value>1</value>
-  </assignment>
-  <assignment>
-   <name>embeddedsw.memoryInfo.GENERATE_FLASH</name>
-   <value>1</value>
-  </assignment>
-  <assignment>
-   <name>embeddedsw.memoryInfo.GENERATE_HEX</name>
-   <value>1</value>
-  </assignment>
-  <assignment>
-   <name>embeddedsw.memoryInfo.HAS_BYTE_LANE</name>
-   <value>0</value>
-  </assignment>
-  <assignment>
-   <name>embeddedsw.memoryInfo.HEX_INSTALL_DIR</name>
-   <value>QPF_DIR</value>
-  </assignment>
-  <assignment>
-   <name>embeddedsw.memoryInfo.IS_FLASH</name>
-   <value>1</value>
-  </assignment>
-  <assignment>
-   <name>embeddedsw.memoryInfo.MEM_INIT_DATA_WIDTH</name>
-   <value>32</value>
-  </assignment>
-  <assignment>
-   <name>embeddedsw.memoryInfo.USE_BYTE_ADDRESSING_FOR_HEX</name>
-   <value>1</value>
-  </assignment>
-  <assignment>
-   <name>postgeneration.simulation.init_file.param_name</name>
-   <value>INIT_FILENAME</value>
-  </assignment>
-  <assignment>
-   <name>postgeneration.simulation.init_file.type</name>
-   <value>MEM_INIT</value>
-  </assignment>
-  <parameter name="DATA_INTERFACE">
-   <type>java.lang.String</type>
-   <value>Parallel</value>
-   <derived>false</derived>
-   <enabled>true</enabled>
-   <visible>true</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="READ_BURST_MODE">
-   <type>java.lang.String</type>
-   <value>Incrementing</value>
-   <derived>false</derived>
-   <enabled>true</enabled>
-   <visible>true</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="READ_BURST_COUNT">
-   <type>int</type>
-   <value>2</value>
-   <derived>false</derived>
-   <enabled>true</enabled>
-   <visible>true</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="CLOCK_FREQUENCY">
-   <type>double</type>
-   <value>7.25</value>
-   <derived>false</derived>
-   <enabled>true</enabled>
-   <visible>true</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="CONFIGURATION_SCHEME">
-   <type>java.lang.String</type>
-   <value>Internal Configuration</value>
-   <derived>false</derived>
-   <enabled>false</enabled>
-   <visible>true</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="CONFIGURATION_MODE">
-   <type>java.lang.String</type>
-   <value>Single Uncompressed Image</value>
-   <derived>false</derived>
-   <enabled>true</enabled>
-   <visible>true</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="SECTOR_ID">
-   <type>[Ljava.lang.String;</type>
-   <value>1,2,NA,NA,3</value>
-   <derived>true</derived>
-   <enabled>false</enabled>
-   <visible>true</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="SECTOR_ACCESS_MODE">
-   <type>[Ljava.lang.String;</type>
-   <value>Read and write,Read and write,Read only,Hidden,Read and write</value>
-   <derived>false</derived>
-   <enabled>true</enabled>
-   <visible>true</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="SECTOR_ADDRESS_MAPPING">
-   <type>[Ljava.lang.String;</type>
-   <value>0x00000 - 0x017ff,0x01800 - 0x02fff,NA,NA,0x03000 - 0x13fff</value>
-   <derived>true</derived>
-   <enabled>false</enabled>
-   <visible>true</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="SECTOR_STORAGE_TYPE">
-   <type>[Ljava.lang.String;</type>
-   <value>UFM,UFM,NA,NA,CFM</value>
-   <derived>true</derived>
-   <enabled>false</enabled>
-   <visible>true</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="initFlashContent">
-   <type>boolean</type>
-   <value>false</value>
-   <derived>false</derived>
-   <enabled>true</enabled>
-   <visible>true</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="useNonDefaultInitFile">
-   <type>boolean</type>
-   <value>false</value>
-   <derived>false</derived>
-   <enabled>false</enabled>
-   <visible>true</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="initializationFileName">
-   <type>java.lang.String</type>
-   <value>altera_onchip_flash.hex</value>
-   <derived>false</derived>
-   <enabled>false</enabled>
-   <visible>true</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="initializationFileNameForSim">
-   <type>java.lang.String</type>
-   <value>altera_onchip_flash.dat</value>
-   <derived>false</derived>
-   <enabled>false</enabled>
-   <visible>true</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="autoInitializationFileName">
-   <type>java.lang.String</type>
-   <value>flash_onchip_flash_0</value>
-   <derived>false</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-   <sysinfo_type>UNIQUE_ID</sysinfo_type>
-  </parameter>
-  <parameter name="INIT_FILENAME">
-   <type>java.lang.String</type>
-   <value></value>
-   <derived>true</derived>
-   <enabled>false</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="INIT_FILENAME_SIM">
-   <type>java.lang.String</type>
-   <value></value>
-   <derived>true</derived>
-   <enabled>false</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="DEVICE_FAMILY">
-   <type>java.lang.String</type>
-   <value>MAX10FPGA</value>
-   <derived>false</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-   <sysinfo_type>DEVICE_FAMILY</sysinfo_type>
-  </parameter>
-  <parameter name="PART_NAME">
-   <type>java.lang.String</type>
-   <value>10M02SCU169C8G</value>
-   <derived>false</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-   <sysinfo_type>DEVICE</sysinfo_type>
-  </parameter>
-  <parameter name="AUTO_CLOCK_RATE">
-   <type>long</type>
-   <value>0</value>
-   <derived>false</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-   <sysinfo_type>CLOCK_RATE</sysinfo_type>
-   <sysinfo_arg>clk</sysinfo_arg>
-  </parameter>
-  <parameter name="DEVICE_ID">
-   <type>java.lang.String</type>
-   <value>02</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="SECTOR1_START_ADDR">
-   <type>int</type>
-   <value>0</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="SECTOR1_END_ADDR">
-   <type>int</type>
-   <value>1535</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="SECTOR2_START_ADDR">
-   <type>int</type>
-   <value>1536</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="SECTOR2_END_ADDR">
-   <type>int</type>
-   <value>3071</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="SECTOR3_START_ADDR">
-   <type>int</type>
-   <value>3072</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="SECTOR3_END_ADDR">
-   <type>int</type>
-   <value>20479</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="SECTOR4_START_ADDR">
-   <type>int</type>
-   <value>0</value>
-   <derived>true</derived>
-   <enabled>false</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="SECTOR4_END_ADDR">
-   <type>int</type>
-   <value>0</value>
-   <derived>true</derived>
-   <enabled>false</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="SECTOR5_START_ADDR">
-   <type>int</type>
-   <value>0</value>
-   <derived>true</derived>
-   <enabled>false</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="SECTOR5_END_ADDR">
-   <type>int</type>
-   <value>0</value>
-   <derived>true</derived>
-   <enabled>false</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="MIN_VALID_ADDR">
-   <type>int</type>
-   <value>0</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="MAX_VALID_ADDR">
-   <type>int</type>
-   <value>20479</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="MIN_UFM_VALID_ADDR">
-   <type>int</type>
-   <value>0</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="MAX_UFM_VALID_ADDR">
-   <type>int</type>
-   <value>3071</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="SECTOR1_MAP">
-   <type>int</type>
-   <value>1</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="SECTOR2_MAP">
-   <type>int</type>
-   <value>2</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="SECTOR3_MAP">
-   <type>int</type>
-   <value>5</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="SECTOR4_MAP">
-   <type>int</type>
-   <value>0</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="SECTOR5_MAP">
-   <type>int</type>
-   <value>0</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="ADDR_RANGE1_END_ADDR">
-   <type>int</type>
-   <value>3071</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="ADDR_RANGE2_END_ADDR">
-   <type>int</type>
-   <value>20479</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="ADDR_RANGE1_OFFSET">
-   <type>int</type>
-   <value>512</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="ADDR_RANGE2_OFFSET">
-   <type>int</type>
-   <value>512</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="ADDR_RANGE3_OFFSET">
-   <type>int</type>
-   <value>0</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="AVMM_DATA_ADDR_WIDTH">
-   <type>int</type>
-   <value>15</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="AVMM_DATA_DATA_WIDTH">
-   <type>int</type>
-   <value>32</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="AVMM_DATA_BURSTCOUNT_WIDTH">
-   <type>int</type>
-   <value>2</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="SECTOR_READ_PROTECTION_MODE">
-   <type>int</type>
-   <value>24</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="FLASH_SEQ_READ_DATA_COUNT">
-   <type>int</type>
-   <value>4</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="FLASH_ADDR_ALIGNMENT_BITS">
-   <type>int</type>
-   <value>2</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="FLASH_READ_CYCLE_MAX_INDEX">
-   <type>int</type>
-   <value>4</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="FLASH_RESET_CYCLE_MAX_INDEX">
-   <type>int</type>
-   <value>1</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="FLASH_BUSY_TIMEOUT_CYCLE_MAX_INDEX">
-   <type>int</type>
-   <value>8</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="FLASH_ERASE_TIMEOUT_CYCLE_MAX_INDEX">
-   <type>int</type>
-   <value>2537500</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="FLASH_WRITE_TIMEOUT_CYCLE_MAX_INDEX">
-   <type>int</type>
-   <value>2211</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="PARALLEL_MODE">
-   <type>boolean</type>
-   <value>false</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="READ_AND_WRITE_MODE">
-   <type>boolean</type>
-   <value>true</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="WRAPPING_BURST_MODE">
-   <type>boolean</type>
-   <value>false</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="IS_DUAL_BOOT">
-   <type>java.lang.String</type>
-   <value>False</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="IS_ERAM_SKIP">
-   <type>java.lang.String</type>
-   <value>True</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="IS_COMPRESSED_IMAGE">
-   <type>java.lang.String</type>
-   <value>False</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="deviceFamily">
-   <type>java.lang.String</type>
-   <value>UNKNOWN</value>
-   <derived>false</derived>
-   <enabled>true</enabled>
-   <visible>true</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="generateLegacySim">
-   <type>boolean</type>
-   <value>false</value>
-   <derived>false</derived>
-   <enabled>true</enabled>
-   <visible>true</visible>
-   <valid>true</valid>
-  </parameter>
-  <interface name="clk" kind="clock_sink" version="19.1">
-   <!-- The connection points exposed by a module instance for the
-particular module parameters. Connection points and their
-parameters are a RESULT of the module parameters. -->
-   <parameter name="externallyDriven">
-    <type>boolean</type>
-    <value>false</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="ptfSchematicName">
-    <type>java.lang.String</type>
-    <value></value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="deviceFamily">
-    <type>java.lang.String</type>
-    <value>UNKNOWN</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="generateLegacySim">
-    <type>boolean</type>
-    <value>false</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="clockRateKnown">
-    <type>java.lang.Boolean</type>
-    <value>false</value>
-    <derived>true</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="clockRate">
-    <type>java.lang.Long</type>
-    <value>0</value>
-    <derived>true</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <type>clock</type>
-   <isStart>false</isStart>
-   <port>
-    <name>clock</name>
-    <direction>Input</direction>
-    <width>1</width>
-    <role>clk</role>
-   </port>
-  </interface>
-  <interface name="nreset" kind="reset_sink" version="19.1">
-   <!-- The connection points exposed by a module instance for the
-particular module parameters. Connection points and their
-parameters are a RESULT of the module parameters. -->
-   <parameter name="associatedClock">
-    <type>java.lang.String</type>
-    <value>clk</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="synchronousEdges">
-    <type>com.altera.sopcmodel.reset.Reset$Edges</type>
-    <value>DEASSERT</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="deviceFamily">
-    <type>java.lang.String</type>
-    <value>UNKNOWN</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="generateLegacySim">
-    <type>boolean</type>
-    <value>false</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <type>reset</type>
-   <isStart>false</isStart>
-   <port>
-    <name>reset_n</name>
-    <direction>Input</direction>
-    <width>1</width>
-    <role>reset_n</role>
-   </port>
-  </interface>
-  <interface name="data" kind="avalon_slave" version="19.1">
-   <!-- The connection points exposed by a module instance for the
-particular module parameters. Connection points and their
-parameters are a RESULT of the module parameters. -->
-   <assignment>
-    <name>embeddedsw.configuration.isFlash</name>
-    <value>1</value>
-   </assignment>
-   <assignment>
-    <name>embeddedsw.configuration.isMemoryDevice</name>
-    <value>1</value>
-   </assignment>
-   <assignment>
-    <name>embeddedsw.configuration.isNonVolatileStorage</name>
-    <value>1</value>
-   </assignment>
-   <assignment>
-    <name>embeddedsw.configuration.isPrintableDevice</name>
-    <value>0</value>
-   </assignment>
-   <parameter name="addressAlignment">
-    <type>com.altera.sopcmodel.avalon.AvalonConnectionPoint$AddressAlignment</type>
-    <value>DYNAMIC</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="addressGroup">
-    <type>int</type>
-    <value>0</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="addressSpan">
-    <type>java.math.BigInteger</type>
-    <value>81920</value>
-    <derived>true</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="addressUnits">
-    <type>com.altera.sopcmodel.avalon.EAddrBurstUnits</type>
-    <value>WORDS</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="alwaysBurstMaxBurst">
-    <type>boolean</type>
-    <value>false</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="associatedClock">
-    <type>java.lang.String</type>
-    <value>clk</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="associatedReset">
-    <type>java.lang.String</type>
-    <value>nreset</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="bitsPerSymbol">
-    <type>int</type>
-    <value>8</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="bridgedAddressOffset">
-    <type>java.math.BigInteger</type>
-    <value></value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="bridgesToMaster">
-    <type>com.altera.entityinterfaces.IConnectionPoint</type>
-    <value></value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="burstOnBurstBoundariesOnly">
-    <type>boolean</type>
-    <value>false</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="burstcountUnits">
-    <type>com.altera.sopcmodel.avalon.EAddrBurstUnits</type>
-    <value>WORDS</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="constantBurstBehavior">
-    <type>boolean</type>
-    <value>false</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="explicitAddressSpan">
-    <type>java.math.BigInteger</type>
-    <value>81920</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="holdTime">
-    <type>int</type>
-    <value>0</value>
-    <derived>false</derived>
-    <enabled>false</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="interleaveBursts">
-    <type>boolean</type>
-    <value>false</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="isBigEndian">
-    <type>boolean</type>
-    <value>false</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="isFlash">
-    <type>boolean</type>
-    <value>true</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="isMemoryDevice">
-    <type>boolean</type>
-    <value>true</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="isNonVolatileStorage">
-    <type>boolean</type>
-    <value>true</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="linewrapBursts">
-    <type>boolean</type>
-    <value>false</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="maximumPendingReadTransactions">
-    <type>int</type>
-    <value>1</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="maximumPendingWriteTransactions">
-    <type>int</type>
-    <value>0</value>
-    <derived>false</derived>
-    <enabled>false</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="minimumUninterruptedRunLength">
-    <type>int</type>
-    <value>0</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="printableDevice">
-    <type>boolean</type>
-    <value>false</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="readLatency">
-    <type>int</type>
-    <value>0</value>
-    <derived>false</derived>
-    <enabled>false</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="readWaitStates">
-    <type>int</type>
-    <value>0</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="readWaitTime">
-    <type>int</type>
-    <value>0</value>
-    <derived>false</derived>
-    <enabled>false</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="registerIncomingSignals">
-    <type>boolean</type>
-    <value>false</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="registerOutgoingSignals">
-    <type>boolean</type>
-    <value>false</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="setupTime">
-    <type>int</type>
-    <value>0</value>
-    <derived>false</derived>
-    <enabled>false</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="timingUnits">
-    <type>com.altera.sopcmodel.avalon.TimingUnits</type>
-    <value>Cycles</value>
-    <derived>false</derived>
-    <enabled>false</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="transparentBridge">
-    <type>boolean</type>
-    <value>false</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="wellBehavedWaitrequest">
-    <type>boolean</type>
-    <value>false</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="writeLatency">
-    <type>int</type>
-    <value>0</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="writeWaitStates">
-    <type>int</type>
-    <value>0</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="writeWaitTime">
-    <type>int</type>
-    <value>0</value>
-    <derived>false</derived>
-    <enabled>false</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="deviceFamily">
-    <type>java.lang.String</type>
-    <value>UNKNOWN</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="generateLegacySim">
-    <type>boolean</type>
-    <value>false</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <type>avalon</type>
-   <isStart>false</isStart>
-   <port>
-    <name>avmm_data_addr</name>
-    <direction>Input</direction>
-    <width>15</width>
-    <role>address</role>
-   </port>
-   <port>
-    <name>avmm_data_read</name>
-    <direction>Input</direction>
-    <width>1</width>
-    <role>read</role>
-   </port>
-   <port>
-    <name>avmm_data_writedata</name>
-    <direction>Input</direction>
-    <width>32</width>
-    <role>writedata</role>
-   </port>
-   <port>
-    <name>avmm_data_write</name>
-    <direction>Input</direction>
-    <width>1</width>
-    <role>write</role>
-   </port>
-   <port>
-    <name>avmm_data_readdata</name>
-    <direction>Output</direction>
-    <width>32</width>
-    <role>readdata</role>
-   </port>
-   <port>
-    <name>avmm_data_waitrequest</name>
-    <direction>Output</direction>
-    <width>1</width>
-    <role>waitrequest</role>
-   </port>
-   <port>
-    <name>avmm_data_readdatavalid</name>
-    <direction>Output</direction>
-    <width>1</width>
-    <role>readdatavalid</role>
-   </port>
-   <port>
-    <name>avmm_data_burstcount</name>
-    <direction>Input</direction>
-    <width>2</width>
-    <role>burstcount</role>
-   </port>
-  </interface>
-  <interface name="csr" kind="avalon_slave" version="19.1">
-   <!-- The connection points exposed by a module instance for the
-particular module parameters. Connection points and their
-parameters are a RESULT of the module parameters. -->
-   <assignment>
-    <name>embeddedsw.configuration.isFlash</name>
-    <value>0</value>
-   </assignment>
-   <assignment>
-    <name>embeddedsw.configuration.isMemoryDevice</name>
-    <value>0</value>
-   </assignment>
-   <assignment>
-    <name>embeddedsw.configuration.isNonVolatileStorage</name>
-    <value>0</value>
-   </assignment>
-   <assignment>
-    <name>embeddedsw.configuration.isPrintableDevice</name>
-    <value>0</value>
-   </assignment>
-   <parameter name="addressAlignment">
-    <type>com.altera.sopcmodel.avalon.AvalonConnectionPoint$AddressAlignment</type>
-    <value>DYNAMIC</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="addressGroup">
-    <type>int</type>
-    <value>0</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="addressSpan">
-    <type>java.math.BigInteger</type>
-    <value>8</value>
-    <derived>true</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="addressUnits">
-    <type>com.altera.sopcmodel.avalon.EAddrBurstUnits</type>
-    <value>WORDS</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="alwaysBurstMaxBurst">
-    <type>boolean</type>
-    <value>false</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="associatedClock">
-    <type>java.lang.String</type>
-    <value>clk</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="associatedReset">
-    <type>java.lang.String</type>
-    <value>nreset</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="bitsPerSymbol">
-    <type>int</type>
-    <value>8</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="bridgedAddressOffset">
-    <type>java.math.BigInteger</type>
-    <value></value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="bridgesToMaster">
-    <type>com.altera.entityinterfaces.IConnectionPoint</type>
-    <value></value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="burstOnBurstBoundariesOnly">
-    <type>boolean</type>
-    <value>false</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="burstcountUnits">
-    <type>com.altera.sopcmodel.avalon.EAddrBurstUnits</type>
-    <value>WORDS</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="constantBurstBehavior">
-    <type>boolean</type>
-    <value>false</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="explicitAddressSpan">
-    <type>java.math.BigInteger</type>
-    <value>0</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="holdTime">
-    <type>int</type>
-    <value>0</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="interleaveBursts">
-    <type>boolean</type>
-    <value>false</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="isBigEndian">
-    <type>boolean</type>
-    <value>false</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="isFlash">
-    <type>boolean</type>
-    <value>false</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="isMemoryDevice">
-    <type>boolean</type>
-    <value>false</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="isNonVolatileStorage">
-    <type>boolean</type>
-    <value>false</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="linewrapBursts">
-    <type>boolean</type>
-    <value>false</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="maximumPendingReadTransactions">
-    <type>int</type>
-    <value>0</value>
-    <derived>false</derived>
-    <enabled>false</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="maximumPendingWriteTransactions">
-    <type>int</type>
-    <value>0</value>
-    <derived>false</derived>
-    <enabled>false</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="minimumUninterruptedRunLength">
-    <type>int</type>
-    <value>0</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="printableDevice">
-    <type>boolean</type>
-    <value>false</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="readLatency">
-    <type>int</type>
-    <value>0</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="readWaitStates">
-    <type>int</type>
-    <value>1</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="readWaitTime">
-    <type>int</type>
-    <value>1</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="registerIncomingSignals">
-    <type>boolean</type>
-    <value>false</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="registerOutgoingSignals">
-    <type>boolean</type>
-    <value>false</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="setupTime">
-    <type>int</type>
-    <value>0</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="timingUnits">
-    <type>com.altera.sopcmodel.avalon.TimingUnits</type>
-    <value>Cycles</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="transparentBridge">
-    <type>boolean</type>
-    <value>false</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="wellBehavedWaitrequest">
-    <type>boolean</type>
-    <value>false</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="writeLatency">
-    <type>int</type>
-    <value>0</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="writeWaitStates">
-    <type>int</type>
-    <value>0</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="writeWaitTime">
-    <type>int</type>
-    <value>0</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="deviceFamily">
-    <type>java.lang.String</type>
-    <value>UNKNOWN</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="generateLegacySim">
-    <type>boolean</type>
-    <value>false</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <type>avalon</type>
-   <isStart>false</isStart>
-   <port>
-    <name>avmm_csr_addr</name>
-    <direction>Input</direction>
-    <width>1</width>
-    <role>address</role>
-   </port>
-   <port>
-    <name>avmm_csr_read</name>
-    <direction>Input</direction>
-    <width>1</width>
-    <role>read</role>
-   </port>
-   <port>
-    <name>avmm_csr_writedata</name>
-    <direction>Input</direction>
-    <width>32</width>
-    <role>writedata</role>
-   </port>
-   <port>
-    <name>avmm_csr_write</name>
-    <direction>Input</direction>
-    <width>1</width>
-    <role>write</role>
-   </port>
-   <port>
-    <name>avmm_csr_readdata</name>
-    <direction>Output</direction>
-    <width>32</width>
-    <role>readdata</role>
-   </port>
-  </interface>
- </module>
- <plugin>
-  <instanceCount>1</instanceCount>
-  <name>altera_onchip_flash</name>
-  <type>com.altera.entityinterfaces.IElementClass</type>
-  <subtype>com.altera.entityinterfaces.IModule</subtype>
-  <displayName>On-Chip Flash Intel FPGA IP</displayName>
-  <version>19.1</version>
- </plugin>
- <plugin>
-  <instanceCount>1</instanceCount>
-  <name>clock_sink</name>
-  <type>com.altera.entityinterfaces.IElementClass</type>
-  <subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>
-  <displayName>Clock Input</displayName>
-  <version>19.1</version>
- </plugin>
- <plugin>
-  <instanceCount>1</instanceCount>
-  <name>reset_sink</name>
-  <type>com.altera.entityinterfaces.IElementClass</type>
-  <subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>
-  <displayName>Reset Input</displayName>
-  <version>19.1</version>
- </plugin>
- <plugin>
-  <instanceCount>2</instanceCount>
-  <name>avalon_slave</name>
-  <type>com.altera.entityinterfaces.IElementClass</type>
-  <subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>
-  <displayName>Avalon Memory Mapped Slave</displayName>
-  <version>19.1</version>
- </plugin>
- <reportVersion>19.1 670</reportVersion>
- <uniqueIdentifier></uniqueIdentifier>
-</EnsembleReport>
Index: atari_chips/pokeyv2/flash_02/flash/flash_inst.v
===================================================================
--- atari_chips/pokeyv2/flash_02/flash/flash_inst.v	(revision 1335)
+++ atari_chips/pokeyv2/flash_02/flash/flash_inst.v	(nonexistent)
@@ -1,18 +0,0 @@
-	flash u0 (
-		.clock                   (<connected-to-clock>),                   //    clk.clk
-		.reset_n                 (<connected-to-reset_n>),                 // nreset.reset_n
-		.avmm_data_addr          (<connected-to-avmm_data_addr>),          //   data.address
-		.avmm_data_read          (<connected-to-avmm_data_read>),          //       .read
-		.avmm_data_writedata     (<connected-to-avmm_data_writedata>),     //       .writedata
-		.avmm_data_write         (<connected-to-avmm_data_write>),         //       .write
-		.avmm_data_readdata      (<connected-to-avmm_data_readdata>),      //       .readdata
-		.avmm_data_waitrequest   (<connected-to-avmm_data_waitrequest>),   //       .waitrequest
-		.avmm_data_readdatavalid (<connected-to-avmm_data_readdatavalid>), //       .readdatavalid
-		.avmm_data_burstcount    (<connected-to-avmm_data_burstcount>),    //       .burstcount
-		.avmm_csr_addr           (<connected-to-avmm_csr_addr>),           //    csr.address
-		.avmm_csr_read           (<connected-to-avmm_csr_read>),           //       .read
-		.avmm_csr_writedata      (<connected-to-avmm_csr_writedata>),      //       .writedata
-		.avmm_csr_write          (<connected-to-avmm_csr_write>),          //       .write
-		.avmm_csr_readdata       (<connected-to-avmm_csr_readdata>)        //       .readdata
-	);
-
Index: atari_chips/pokeyv2/flash_02/flash/flash.html
===================================================================
--- atari_chips/pokeyv2/flash_02/flash/flash.html	(revision 1335)
+++ atari_chips/pokeyv2/flash_02/flash/flash.html	(nonexistent)
@@ -1,467 +0,0 @@
-<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
-
-<html xmlns="http://www.w3.org/1999/xhtml">
- <head>
-  <title>datasheet for flash</title>
-  <style type="text/css">
-body { font-family:arial ;}
-a { text-decoration:underline ; color:#003000 ;}
-a:hover { text-decoration:underline ; color:0030f0 ;}
-td { padding : 5px ;}
-table.topTitle { width:100% ;}
-table.topTitle td.l { text-align:left ; font-weight: bold ; font-size:30px ;}
-table.topTitle td.r { text-align:right ; font-weight: bold ; font-size:16px ;}
-table.blueBar { width : 100% ; border-spacing : 0px ;}
-table.blueBar td { background:#0036ff ; font-size:12px ; color : white ; text-align : left ; font-weight : bold ;}
-table.blueBar td.l { text-align : left ;}
-table.blueBar td.r { text-align : right ;}
-table.items { width:100% ; border-collapse:collapse ;}
-table.items td.label { font-weight:bold ; font-size:16px ; vertical-align:top ;}
-table.items td.mono { font-family:courier ; font-size:12px ; white-space:pre ;}
-div.label { font-weight:bold ; font-size:16px ; vertical-align:top ; text-align:center ;}
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-table.grid td { border:1px solid #bbb ; font-size:12px ;}
-body { font-family:arial ;}
-table.x { font-family:courier ; border-collapse:collapse ; padding:2px ;}
-table.x td { border:1px solid #bbb ;}
-td.tableTitle { font-weight:bold ; text-align:center ;}
-table.grid { border-collapse:collapse ;}
-table.grid td { border:1px solid #bbb ;}
-table.grid td.tableTitle { font-weight:bold ; text-align:center ;}
-table.mmap { border-collapse:collapse ; text-size:11px ; border:1px solid #d8d8d8 ;}
-table.mmap td { border-color:#d8d8d8 ; border-width:1px ; border-style:solid ;}
-table.mmap td.empty { border-style:none ; background-color:#f0f0f0 ;}
-table.mmap td.slavemodule { text-align:left ; font-size:11px ; border-style:solid solid none solid ;}
-table.mmap td.slavem { text-align:right ; font-size:9px ; font-style:italic ; border-style:none solid none solid ;}
-table.mmap td.slaveb { text-align:right ; font-size:9px ; font-style:italic ; border-style:none solid solid solid ;}
-table.mmap td.mastermodule { text-align:center ; font-size:11px ; border-style:solid solid none solid ;}
-table.mmap td.masterlr { text-align:center ; font-size:9px ; font-style:italic ; border-style:none solid solid solid ;}
-table.mmap td.masterl { text-align:center ; font-size:9px ; font-style:italic ; border-style:none none solid solid ;}
-table.mmap td.masterm { text-align:center ; font-size:9px ; font-style:italic ; border-style:none none solid none ;}
-table.mmap td.masterr { text-align:center ; font-size:9px ; font-style:italic ; border-style:none solid solid none ;}
-table.mmap td.addr { font-family:courier ; font-size:9px ; text-align:right ;}
-table.connectionboxes { border-collapse:separate ; border-spacing:0px ; font-family:arial ;}
-table.connectionboxes td.from { border-bottom:1px solid black ; font-size:9px ; font-style:italic ; vertical-align:bottom ; text-align:left ;}
-table.connectionboxes td.to { font-size:9px ; font-style:italic ; vertical-align:top ; text-align:right ;}
-table.connectionboxes td.lefthandwire { border-bottom:1px solid black ; font-size:9px ; font-style:italic ; vertical-align:bottom ; text-align:right ;}
-table.connectionboxes td.righthandwire { border-bottom:1px solid black ; font-size:9px ; font-style:italic ; vertical-align:bottom ; text-align:left ;}
-table.connectionboxes td.righthandlabel { font-size:11px ; vertical-align:bottom ; text-align:left ;}
-table.connectionboxes td.neighbor { padding:3px ; border:1px solid black ; font-size: 11px ; background:#e8e8e8 ; vertical-align:center ; text-align:center ;}
-table.connectionboxes td.main { padding:8px ; border:1px solid black ; font-size: 14px ; font-weight:bold ; background:#ffffff ; vertical-align:center ; text-align:center ;}
-.parametersbox { border:1px solid #d0d0d0 ; display:inline-block ; max-height:160px ; overflow:auto ; width:360px ; font-size:10px ;}
-.flowbox { display:inline-block ;}
-.parametersbox table { font-size:10px ;}
-td.parametername { font-style:italic ;}
-td.parametervalue { font-weight:bold ;}
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- </head>
- <body>
-  <table class="topTitle">
-   <tr>
-    <td class="l">flash</td>
-    <td class="r">
-     <br/>
-     <br/>
-    </td>
-   </tr>
-  </table>
-  <table class="blueBar">
-   <tr>
-    <td class="l">2020.06.18.10:36:10</td>
-    <td class="r">Datasheet</td>
-   </tr>
-  </table>
-  <div style="width:100% ;  height:10px"> </div>
-  <div class="label">Overview</div>
-  <div class="greydiv">
-   <div style="display:inline-block ; text-align:left">
-    <table class="connectionboxes">
-     <tr style="height:6px">
-      <td></td>
-     </tr>
-    </table>
-   </div><span style="display:inline-block ; width:28px"> </span>
-   <div style="display:inline-block ; text-align:left"><span>
-     <br/>All Components
-     <br/>&#160;&#160;
-     <a href="#module_onchip_flash_0"><b>onchip_flash_0</b>
-     </a> altera_onchip_flash 19.1</span>
-   </div>
-  </div>
-  <div style="width:100% ;  height:10px"> </div>
-  <div class="label">Memory Map</div>
-  <table class="mmap">
-   <tr>
-    <td class="empty" rowspan="2"></td>
-   </tr>
-   <tr>
-    <td class="slavemodule">&#160;
-     <a href="#module_onchip_flash_0"><b>onchip_flash_0</b>
-     </a>
-    </td>
-   </tr>
-   <tr>
-    <td class="slavem">data&#160;</td>
-   </tr>
-   <tr>
-    <td class="slavem">csr&#160;</td>
-   </tr>
-  </table>
-  <a name="module_onchip_flash_0"> </a>
-  <div>
-   <hr/>
-   <h2>onchip_flash_0</h2>altera_onchip_flash v19.1
-   <br/>
-   <br/>
-   <br/>
-   <table class="flowbox">
-    <tr>
-     <td class="parametersbox">
-      <h2>Parameters</h2>
-      <table>
-       <tr>
-        <td class="parametername">DATA_INTERFACE</td>
-        <td class="parametervalue">Parallel</td>
-       </tr>
-       <tr>
-        <td class="parametername">READ_BURST_MODE</td>
-        <td class="parametervalue">Incrementing</td>
-       </tr>
-       <tr>
-        <td class="parametername">READ_BURST_COUNT</td>
-        <td class="parametervalue">2</td>
-       </tr>
-       <tr>
-        <td class="parametername">CLOCK_FREQUENCY</td>
-        <td class="parametervalue">7.25</td>
-       </tr>
-       <tr>
-        <td class="parametername">CONFIGURATION_SCHEME</td>
-        <td class="parametervalue">Internal Configuration</td>
-       </tr>
-       <tr>
-        <td class="parametername">CONFIGURATION_MODE</td>
-        <td class="parametervalue">Single Uncompressed Image</td>
-       </tr>
-       <tr>
-        <td class="parametername">SECTOR_ID</td>
-        <td class="parametervalue">1,2,NA,NA,3</td>
-       </tr>
-       <tr>
-        <td class="parametername">SECTOR_ACCESS_MODE</td>
-        <td class="parametervalue">Read and write,Read and write,Read only,Hidden,Read and write</td>
-       </tr>
-       <tr>
-        <td class="parametername">SECTOR_ADDRESS_MAPPING</td>
-        <td class="parametervalue">0x00000 - 0x017ff,0x01800 - 0x02fff,NA,NA,0x03000 - 0x13fff</td>
-       </tr>
-       <tr>
-        <td class="parametername">SECTOR_STORAGE_TYPE</td>
-        <td class="parametervalue">UFM,UFM,NA,NA,CFM</td>
-       </tr>
-       <tr>
-        <td class="parametername">initFlashContent</td>
-        <td class="parametervalue">false</td>
-       </tr>
-       <tr>
-        <td class="parametername">useNonDefaultInitFile</td>
-        <td class="parametervalue">false</td>
-       </tr>
-       <tr>
-        <td class="parametername">initializationFileName</td>
-        <td class="parametervalue">altera_onchip_flash.hex</td>
-       </tr>
-       <tr>
-        <td class="parametername">initializationFileNameForSim</td>
-        <td class="parametervalue">altera_onchip_flash.dat</td>
-       </tr>
-       <tr>
-        <td class="parametername">autoInitializationFileName</td>
-        <td class="parametervalue">flash_onchip_flash_0</td>
-       </tr>
-       <tr>
-        <td class="parametername">INIT_FILENAME</td>
-        <td class="parametervalue"></td>
-       </tr>
-       <tr>
-        <td class="parametername">INIT_FILENAME_SIM</td>
-        <td class="parametervalue"></td>
-       </tr>
-       <tr>
-        <td class="parametername">DEVICE_FAMILY</td>
-        <td class="parametervalue">MAX10FPGA</td>
-       </tr>
-       <tr>
-        <td class="parametername">PART_NAME</td>
-        <td class="parametervalue">10M02SCU169C8G</td>
-       </tr>
-       <tr>
-        <td class="parametername">AUTO_CLOCK_RATE</td>
-        <td class="parametervalue">0</td>
-       </tr>
-       <tr>
-        <td class="parametername">DEVICE_ID</td>
-        <td class="parametervalue">02</td>
-       </tr>
-       <tr>
-        <td class="parametername">SECTOR1_START_ADDR</td>
-        <td class="parametervalue">0</td>
-       </tr>
-       <tr>
-        <td class="parametername">SECTOR1_END_ADDR</td>
-        <td class="parametervalue">1535</td>
-       </tr>
-       <tr>
-        <td class="parametername">SECTOR2_START_ADDR</td>
-        <td class="parametervalue">1536</td>
-       </tr>
-       <tr>
-        <td class="parametername">SECTOR2_END_ADDR</td>
-        <td class="parametervalue">3071</td>
-       </tr>
-       <tr>
-        <td class="parametername">SECTOR3_START_ADDR</td>
-        <td class="parametervalue">3072</td>
-       </tr>
-       <tr>
-        <td class="parametername">SECTOR3_END_ADDR</td>
-        <td class="parametervalue">20479</td>
-       </tr>
-       <tr>
-        <td class="parametername">SECTOR4_START_ADDR</td>
-        <td class="parametervalue">0</td>
-       </tr>
-       <tr>
-        <td class="parametername">SECTOR4_END_ADDR</td>
-        <td class="parametervalue">0</td>
-       </tr>
-       <tr>
-        <td class="parametername">SECTOR5_START_ADDR</td>
-        <td class="parametervalue">0</td>
-       </tr>
-       <tr>
-        <td class="parametername">SECTOR5_END_ADDR</td>
-        <td class="parametervalue">0</td>
-       </tr>
-       <tr>
-        <td class="parametername">MIN_VALID_ADDR</td>
-        <td class="parametervalue">0</td>
-       </tr>
-       <tr>
-        <td class="parametername">MAX_VALID_ADDR</td>
-        <td class="parametervalue">20479</td>
-       </tr>
-       <tr>
-        <td class="parametername">MIN_UFM_VALID_ADDR</td>
-        <td class="parametervalue">0</td>
-       </tr>
-       <tr>
-        <td class="parametername">MAX_UFM_VALID_ADDR</td>
-        <td class="parametervalue">3071</td>
-       </tr>
-       <tr>
-        <td class="parametername">SECTOR1_MAP</td>
-        <td class="parametervalue">1</td>
-       </tr>
-       <tr>
-        <td class="parametername">SECTOR2_MAP</td>
-        <td class="parametervalue">2</td>
-       </tr>
-       <tr>
-        <td class="parametername">SECTOR3_MAP</td>
-        <td class="parametervalue">5</td>
-       </tr>
-       <tr>
-        <td class="parametername">SECTOR4_MAP</td>
-        <td class="parametervalue">0</td>
-       </tr>
-       <tr>
-        <td class="parametername">SECTOR5_MAP</td>
-        <td class="parametervalue">0</td>
-       </tr>
-       <tr>
-        <td class="parametername">ADDR_RANGE1_END_ADDR</td>
-        <td class="parametervalue">3071</td>
-       </tr>
-       <tr>
-        <td class="parametername">ADDR_RANGE2_END_ADDR</td>
-        <td class="parametervalue">20479</td>
-       </tr>
-       <tr>
-        <td class="parametername">ADDR_RANGE1_OFFSET</td>
-        <td class="parametervalue">512</td>
-       </tr>
-       <tr>
-        <td class="parametername">ADDR_RANGE2_OFFSET</td>
-        <td class="parametervalue">512</td>
-       </tr>
-       <tr>
-        <td class="parametername">ADDR_RANGE3_OFFSET</td>
-        <td class="parametervalue">0</td>
-       </tr>
-       <tr>
-        <td class="parametername">AVMM_DATA_ADDR_WIDTH</td>
-        <td class="parametervalue">15</td>
-       </tr>
-       <tr>
-        <td class="parametername">AVMM_DATA_DATA_WIDTH</td>
-        <td class="parametervalue">32</td>
-       </tr>
-       <tr>
-        <td class="parametername">AVMM_DATA_BURSTCOUNT_WIDTH</td>
-        <td class="parametervalue">2</td>
-       </tr>
-       <tr>
-        <td class="parametername">SECTOR_READ_PROTECTION_MODE</td>
-        <td class="parametervalue">24</td>
-       </tr>
-       <tr>
-        <td class="parametername">FLASH_SEQ_READ_DATA_COUNT</td>
-        <td class="parametervalue">4</td>
-       </tr>
-       <tr>
-        <td class="parametername">FLASH_ADDR_ALIGNMENT_BITS</td>
-        <td class="parametervalue">2</td>
-       </tr>
-       <tr>
-        <td class="parametername">FLASH_READ_CYCLE_MAX_INDEX</td>
-        <td class="parametervalue">4</td>
-       </tr>
-       <tr>
-        <td class="parametername">FLASH_RESET_CYCLE_MAX_INDEX</td>
-        <td class="parametervalue">1</td>
-       </tr>
-       <tr>
-        <td class="parametername">FLASH_BUSY_TIMEOUT_CYCLE_MAX_INDEX</td>
-        <td class="parametervalue">8</td>
-       </tr>
-       <tr>
-        <td class="parametername">FLASH_ERASE_TIMEOUT_CYCLE_MAX_INDEX</td>
-        <td class="parametervalue">2537500</td>
-       </tr>
-       <tr>
-        <td class="parametername">FLASH_WRITE_TIMEOUT_CYCLE_MAX_INDEX</td>
-        <td class="parametervalue">2211</td>
-       </tr>
-       <tr>
-        <td class="parametername">PARALLEL_MODE</td>
-        <td class="parametervalue">false</td>
-       </tr>
-       <tr>
-        <td class="parametername">READ_AND_WRITE_MODE</td>
-        <td class="parametervalue">true</td>
-       </tr>
-       <tr>
-        <td class="parametername">WRAPPING_BURST_MODE</td>
-        <td class="parametervalue">false</td>
-       </tr>
-       <tr>
-        <td class="parametername">IS_DUAL_BOOT</td>
-        <td class="parametervalue">False</td>
-       </tr>
-       <tr>
-        <td class="parametername">IS_ERAM_SKIP</td>
-        <td class="parametervalue">True</td>
-       </tr>
-       <tr>
-        <td class="parametername">IS_COMPRESSED_IMAGE</td>
-        <td class="parametervalue">False</td>
-       </tr>
-       <tr>
-        <td class="parametername">deviceFamily</td>
-        <td class="parametervalue">UNKNOWN</td>
-       </tr>
-       <tr>
-        <td class="parametername">generateLegacySim</td>
-        <td class="parametervalue">false</td>
-       </tr>
-      </table>
-     </td>
-    </tr>
-   </table>&#160;&#160;
-   <table class="flowbox">
-    <tr>
-     <td class="parametersbox">
-      <h2>Software Assignments</h2>
-      <table>
-       <tr>
-        <td class="parametername">BYTES_PER_PAGE</td>
-        <td class="parametervalue">2048</td>
-       </tr>
-       <tr>
-        <td class="parametername">READ_ONLY_MODE</td>
-        <td class="parametervalue">0</td>
-       </tr>
-       <tr>
-        <td class="parametername">SECTOR1_ENABLED</td>
-        <td class="parametervalue">1</td>
-       </tr>
-       <tr>
-        <td class="parametername">SECTOR1_END_ADDR</td>
-        <td class="parametervalue">6143</td>
-       </tr>
-       <tr>
-        <td class="parametername">SECTOR1_START_ADDR</td>
-        <td class="parametervalue">0</td>
-       </tr>
-       <tr>
-        <td class="parametername">SECTOR2_ENABLED</td>
-        <td class="parametervalue">1</td>
-       </tr>
-       <tr>
-        <td class="parametername">SECTOR2_END_ADDR</td>
-        <td class="parametervalue">12287</td>
-       </tr>
-       <tr>
-        <td class="parametername">SECTOR2_START_ADDR</td>
-        <td class="parametervalue">6144</td>
-       </tr>
-       <tr>
-        <td class="parametername">SECTOR3_ENABLED</td>
-        <td class="parametervalue">1</td>
-       </tr>
-       <tr>
-        <td class="parametername">SECTOR3_END_ADDR</td>
-        <td class="parametervalue">81919</td>
-       </tr>
-       <tr>
-        <td class="parametername">SECTOR3_START_ADDR</td>
-        <td class="parametervalue">12288</td>
-       </tr>
-       <tr>
-        <td class="parametername">SECTOR4_ENABLED</td>
-        <td class="parametervalue">0</td>
-       </tr>
-       <tr>
-        <td class="parametername">SECTOR4_END_ADDR</td>
-        <td class="parametervalue">-1</td>
-       </tr>
-       <tr>
-        <td class="parametername">SECTOR4_START_ADDR</td>
-        <td class="parametervalue">-1</td>
-       </tr>
-       <tr>
-        <td class="parametername">SECTOR5_ENABLED</td>
-        <td class="parametervalue">0</td>
-       </tr>
-       <tr>
-        <td class="parametername">SECTOR5_END_ADDR</td>
-        <td class="parametervalue">-1</td>
-       </tr>
-       <tr>
-        <td class="parametername">SECTOR5_START_ADDR</td>
-        <td class="parametervalue">-1</td>
-       </tr>
-      </table>
-     </td>
-    </tr>
-   </table>
-  </div>
-  <table class="blueBar">
-   <tr>
-    <td class="l">generation took 0.00 seconds</td>
-    <td class="r">rendering took 0.02 seconds</td>
-   </tr>
-  </table>
- </body>
-</html>
Index: atari_chips/pokeyv2/flash_02/flash/flash.ppf
===================================================================
--- atari_chips/pokeyv2/flash_02/flash/flash.ppf	(revision 1335)
+++ atari_chips/pokeyv2/flash_02/flash/flash.ppf	(nonexistent)
@@ -1,24 +0,0 @@
-<?xml version="1.0" encoding="UTF-8"?>
-<pinplan
- variation_name="onchip_flash_0"
- megafunction_name="ALTERA_ONCHIP_FLASH"
- intended_family="MAX 10"
- specifies="all_ports">
- <global>
-  <pin name="clock" direction="input" scope="external" />
-  <pin name="reset_n" direction="input" scope="external" />
-  <pin name="avmm_data_addr[14..0]" direction="input" scope="external" />
-  <pin name="avmm_data_read" direction="input" scope="external" />
-  <pin name="avmm_data_writedata[31..0]" direction="input" scope="external" />
-  <pin name="avmm_data_write" direction="input" scope="external" />
-  <pin name="avmm_data_readdata[31..0]" direction="output" scope="external" />
-  <pin name="avmm_data_waitrequest" direction="output" scope="external" />
-  <pin name="avmm_data_readdatavalid" direction="output" scope="external" />
-  <pin name="avmm_data_burstcount[1..0]" direction="input" scope="external" />
-  <pin name="avmm_csr_addr" direction="input" scope="external" />
-  <pin name="avmm_csr_read" direction="input" scope="external" />
-  <pin name="avmm_csr_writedata[31..0]" direction="input" scope="external" />
-  <pin name="avmm_csr_write" direction="input" scope="external" />
-  <pin name="avmm_csr_readdata[31..0]" direction="output" scope="external" />
- </global>
-</pinplan>
Index: atari_chips/pokeyv2/flash_02/flash/flash_bb.v
===================================================================
--- atari_chips/pokeyv2/flash_02/flash/flash_bb.v	(revision 1335)
+++ atari_chips/pokeyv2/flash_02/flash/flash_bb.v	(nonexistent)
@@ -1,34 +0,0 @@
-
-module flash (
-	clock,
-	reset_n,
-	avmm_data_addr,
-	avmm_data_read,
-	avmm_data_writedata,
-	avmm_data_write,
-	avmm_data_readdata,
-	avmm_data_waitrequest,
-	avmm_data_readdatavalid,
-	avmm_data_burstcount,
-	avmm_csr_addr,
-	avmm_csr_read,
-	avmm_csr_writedata,
-	avmm_csr_write,
-	avmm_csr_readdata);	
-
-	input		clock;
-	input		reset_n;
-	input	[14:0]	avmm_data_addr;
-	input		avmm_data_read;
-	input	[31:0]	avmm_data_writedata;
-	input		avmm_data_write;
-	output	[31:0]	avmm_data_readdata;
-	output		avmm_data_waitrequest;
-	output		avmm_data_readdatavalid;
-	input	[1:0]	avmm_data_burstcount;
-	input		avmm_csr_addr;
-	input		avmm_csr_read;
-	input	[31:0]	avmm_csr_writedata;
-	input		avmm_csr_write;
-	output	[31:0]	avmm_csr_readdata;
-endmodule
Index: atari_chips/pokeyv2/flash_02/flash/flash.bsf
===================================================================
--- atari_chips/pokeyv2/flash_02/flash/flash.bsf	(revision 1335)
+++ atari_chips/pokeyv2/flash_02/flash/flash.bsf	(nonexistent)
@@ -1,170 +0,0 @@
-/*
-WARNING: Do NOT edit the input and output ports in this file in a text
-editor if you plan to continue editing the block that represents it in
-the Block Editor! File corruption is VERY likely to occur.
-*/
-/*
-Copyright (C) 2019  Intel Corporation. All rights reserved.
-Your use of Intel Corporation's design tools, logic functions 
-and other software and tools, and any partner logic 
-functions, and any output files from any of the foregoing 
-(including device programming or simulation files), and any 
-associated documentation or information are expressly subject 
-to the terms and conditions of the Intel Program License 
-Subscription Agreement, the Intel Quartus Prime License Agreement,
-the Intel FPGA IP License Agreement, or other applicable license
-agreement, including, without limitation, that your use is for
-the sole purpose of programming logic devices manufactured by
-Intel and sold by Intel or its authorized distributors.  Please
-refer to the applicable agreement for further details, at
-https://fpgasoftware.intel.com/eula.
-*/
-(header "symbol" (version "1.1"))
-(symbol
-	(rect 0 0 368 400)
-	(text "flash" (rect 170 -1 188 11)(font "Arial" (font_size 10)))
-	(text "inst" (rect 8 384 20 396)(font "Arial" ))
-	(port
-		(pt 0 72)
-		(input)
-		(text "clock" (rect 0 0 20 12)(font "Arial" (font_size 8)))
-		(text "clock" (rect 4 61 34 72)(font "Arial" (font_size 8)))
-		(line (pt 0 72)(pt 144 72)(line_width 1))
-	)
-	(port
-		(pt 0 112)
-		(input)
-		(text "avmm_csr_addr" (rect 0 0 69 12)(font "Arial" (font_size 8)))
-		(text "avmm_csr_addr" (rect 4 101 82 112)(font "Arial" (font_size 8)))
-		(line (pt 0 112)(pt 144 112)(line_width 1))
-	)
-	(port
-		(pt 0 128)
-		(input)
-		(text "avmm_csr_read" (rect 0 0 69 12)(font "Arial" (font_size 8)))
-		(text "avmm_csr_read" (rect 4 117 82 128)(font "Arial" (font_size 8)))
-		(line (pt 0 128)(pt 144 128)(line_width 1))
-	)
-	(port
-		(pt 0 144)
-		(input)
-		(text "avmm_csr_writedata[31..0]" (rect 0 0 109 12)(font "Arial" (font_size 8)))
-		(text "avmm_csr_writedata[31..0]" (rect 4 133 154 144)(font "Arial" (font_size 8)))
-		(line (pt 0 144)(pt 144 144)(line_width 3))
-	)
-	(port
-		(pt 0 160)
-		(input)
-		(text "avmm_csr_write" (rect 0 0 69 12)(font "Arial" (font_size 8)))
-		(text "avmm_csr_write" (rect 4 149 88 160)(font "Arial" (font_size 8)))
-		(line (pt 0 160)(pt 144 160)(line_width 1))
-	)
-	(port
-		(pt 0 216)
-		(input)
-		(text "avmm_data_addr[14..0]" (rect 0 0 97 12)(font "Arial" (font_size 8)))
-		(text "avmm_data_addr[14..0]" (rect 4 205 130 216)(font "Arial" (font_size 8)))
-		(line (pt 0 216)(pt 144 216)(line_width 3))
-	)
-	(port
-		(pt 0 232)
-		(input)
-		(text "avmm_data_read" (rect 0 0 73 12)(font "Arial" (font_size 8)))
-		(text "avmm_data_read" (rect 4 221 88 232)(font "Arial" (font_size 8)))
-		(line (pt 0 232)(pt 144 232)(line_width 1))
-	)
-	(port
-		(pt 0 248)
-		(input)
-		(text "avmm_data_writedata[31..0]" (rect 0 0 113 12)(font "Arial" (font_size 8)))
-		(text "avmm_data_writedata[31..0]" (rect 4 237 160 248)(font "Arial" (font_size 8)))
-		(line (pt 0 248)(pt 144 248)(line_width 3))
-	)
-	(port
-		(pt 0 264)
-		(input)
-		(text "avmm_data_write" (rect 0 0 73 12)(font "Arial" (font_size 8)))
-		(text "avmm_data_write" (rect 4 253 94 264)(font "Arial" (font_size 8)))
-		(line (pt 0 264)(pt 144 264)(line_width 1))
-	)
-	(port
-		(pt 0 328)
-		(input)
-		(text "avmm_data_burstcount[1..0]" (rect 0 0 115 12)(font "Arial" (font_size 8)))
-		(text "avmm_data_burstcount[1..0]" (rect 4 317 160 328)(font "Arial" (font_size 8)))
-		(line (pt 0 328)(pt 144 328)(line_width 3))
-	)
-	(port
-		(pt 0 368)
-		(input)
-		(text "reset_n" (rect 0 0 30 12)(font "Arial" (font_size 8)))
-		(text "reset_n" (rect 4 357 46 368)(font "Arial" (font_size 8)))
-		(line (pt 0 368)(pt 144 368)(line_width 1))
-	)
-	(port
-		(pt 0 176)
-		(output)
-		(text "avmm_csr_readdata[31..0]" (rect 0 0 109 12)(font "Arial" (font_size 8)))
-		(text "avmm_csr_readdata[31..0]" (rect 4 165 148 176)(font "Arial" (font_size 8)))
-		(line (pt 0 176)(pt 144 176)(line_width 3))
-	)
-	(port
-		(pt 0 280)
-		(output)
-		(text "avmm_data_readdata[31..0]" (rect 0 0 113 12)(font "Arial" (font_size 8)))
-		(text "avmm_data_readdata[31..0]" (rect 4 269 154 280)(font "Arial" (font_size 8)))
-		(line (pt 0 280)(pt 144 280)(line_width 3))
-	)
-	(port
-		(pt 0 296)
-		(output)
-		(text "avmm_data_waitrequest" (rect 0 0 99 12)(font "Arial" (font_size 8)))
-		(text "avmm_data_waitrequest" (rect 4 285 130 296)(font "Arial" (font_size 8)))
-		(line (pt 0 296)(pt 144 296)(line_width 1))
-	)
-	(port
-		(pt 0 312)
-		(output)
-		(text "avmm_data_readdatavalid" (rect 0 0 107 12)(font "Arial" (font_size 8)))
-		(text "avmm_data_readdatavalid" (rect 4 301 142 312)(font "Arial" (font_size 8)))
-		(line (pt 0 312)(pt 144 312)(line_width 1))
-	)
-	(drawing
-		(text "clk" (rect 129 43 276 99)(font "Arial" (color 128 0 0)(font_size 9)))
-		(text "clk" (rect 149 67 316 144)(font "Arial" (color 0 0 0)))
-		(text "csr" (rect 127 83 272 179)(font "Arial" (color 128 0 0)(font_size 9)))
-		(text "address" (rect 149 107 340 224)(font "Arial" (color 0 0 0)))
-		(text "read" (rect 149 123 322 256)(font "Arial" (color 0 0 0)))
-		(text "writedata" (rect 149 139 352 288)(font "Arial" (color 0 0 0)))
-		(text "write" (rect 149 155 328 320)(font "Arial" (color 0 0 0)))
-		(text "readdata" (rect 149 171 346 352)(font "Arial" (color 0 0 0)))
-		(text "data" (rect 120 187 264 387)(font "Arial" (color 128 0 0)(font_size 9)))
-		(text "address" (rect 149 211 340 432)(font "Arial" (color 0 0 0)))
-		(text "read" (rect 149 227 322 464)(font "Arial" (color 0 0 0)))
-		(text "writedata" (rect 149 243 352 496)(font "Arial" (color 0 0 0)))
-		(text "write" (rect 149 259 328 528)(font "Arial" (color 0 0 0)))
-		(text "readdata" (rect 149 275 346 560)(font "Arial" (color 0 0 0)))
-		(text "waitrequest" (rect 149 291 364 592)(font "Arial" (color 0 0 0)))
-		(text "readdatavalid" (rect 149 307 376 624)(font "Arial" (color 0 0 0)))
-		(text "burstcount" (rect 149 323 358 656)(font "Arial" (color 0 0 0)))
-		(text "nreset" (rect 108 339 252 691)(font "Arial" (color 128 0 0)(font_size 9)))
-		(text "reset_n" (rect 149 363 340 736)(font "Arial" (color 0 0 0)))
-		(text " flash " (rect 344 384 730 778)(font "Arial" ))
-		(line (pt 144 32)(pt 224 32)(line_width 1))
-		(line (pt 224 32)(pt 224 384)(line_width 1))
-		(line (pt 144 384)(pt 224 384)(line_width 1))
-		(line (pt 144 32)(pt 144 384)(line_width 1))
-		(line (pt 145 52)(pt 145 76)(line_width 1))
-		(line (pt 146 52)(pt 146 76)(line_width 1))
-		(line (pt 145 92)(pt 145 180)(line_width 1))
-		(line (pt 146 92)(pt 146 180)(line_width 1))
-		(line (pt 145 196)(pt 145 332)(line_width 1))
-		(line (pt 146 196)(pt 146 332)(line_width 1))
-		(line (pt 145 348)(pt 145 372)(line_width 1))
-		(line (pt 146 348)(pt 146 372)(line_width 1))
-		(line (pt 0 0)(pt 368 0)(line_width 1))
-		(line (pt 368 0)(pt 368 400)(line_width 1))
-		(line (pt 0 400)(pt 368 400)(line_width 1))
-		(line (pt 0 0)(pt 0 400)(line_width 1))
-	)
-)
Index: atari_chips/pokeyv2/flash_02/flash/flash_generation_previous.rpt
===================================================================
--- atari_chips/pokeyv2/flash_02/flash/flash_generation_previous.rpt	(revision 1335)
+++ atari_chips/pokeyv2/flash_02/flash/flash_generation_previous.rpt	(nonexistent)
@@ -1,29 +0,0 @@
-Info: Starting: Create block symbol file (.bsf)
-Info: qsys-generate /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_10M08_quad_sid/flash.qsys --block-symbol-file --output-directory=/home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_10M08_quad_sid/flash --family="MAX 10" --part=10M08SCU169C8G
-Progress: Loading build_10M08_quad_sid/flash.qsys
-Progress: Reading input file
-Progress: Adding onchip_flash_0 [altera_onchip_flash 19.1]
-Progress: Parameterizing module onchip_flash_0
-Progress: Building connections
-Progress: Parameterizing connections
-Progress: Validating
-Progress: Done reading input file
-Info: qsys-generate succeeded.
-Info: Finished: Create block symbol file (.bsf)
-Info: 
-Info: Starting: Create HDL design files for synthesis
-Info: qsys-generate /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_10M08_quad_sid/flash.qsys --synthesis=VHDL --output-directory=/home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_10M08_quad_sid/flash/synthesis --family="MAX 10" --part=10M08SCU169C8G
-Progress: Loading build_10M08_quad_sid/flash.qsys
-Progress: Reading input file
-Progress: Adding onchip_flash_0 [altera_onchip_flash 19.1]
-Progress: Parameterizing module onchip_flash_0
-Progress: Building connections
-Progress: Parameterizing connections
-Progress: Validating
-Progress: Done reading input file
-Info: flash: Generating flash "flash" for QUARTUS_SYNTH
-Info: onchip_flash_0: Generating top-level entity altera_onchip_flash
-Info: onchip_flash_0: "flash" instantiated altera_onchip_flash "onchip_flash_0"
-Info: flash: Done "flash" with 2 modules, 7 files
-Info: qsys-generate succeeded.
-Info: Finished: Create HDL design files for synthesis
Index: atari_chips/pokeyv2/flash_02/flash/synthesis/flash.vhd
===================================================================
--- atari_chips/pokeyv2/flash_02/flash/synthesis/flash.vhd	(revision 1335)
+++ atari_chips/pokeyv2/flash_02/flash/synthesis/flash.vhd	(nonexistent)
@@ -1,167 +0,0 @@
--- flash.vhd
-
--- Generated using ACDS version 19.1 670
-
-library IEEE;
-use IEEE.std_logic_1164.all;
-use IEEE.numeric_std.all;
-
-entity flash is
-	port (
-		clock                   : in  std_logic                     := '0';             --    clk.clk
-		avmm_csr_addr           : in  std_logic                     := '0';             --    csr.address
-		avmm_csr_read           : in  std_logic                     := '0';             --       .read
-		avmm_csr_writedata      : in  std_logic_vector(31 downto 0) := (others => '0'); --       .writedata
-		avmm_csr_write          : in  std_logic                     := '0';             --       .write
-		avmm_csr_readdata       : out std_logic_vector(31 downto 0);                    --       .readdata
-		avmm_data_addr          : in  std_logic_vector(14 downto 0) := (others => '0'); --   data.address
-		avmm_data_read          : in  std_logic                     := '0';             --       .read
-		avmm_data_writedata     : in  std_logic_vector(31 downto 0) := (others => '0'); --       .writedata
-		avmm_data_write         : in  std_logic                     := '0';             --       .write
-		avmm_data_readdata      : out std_logic_vector(31 downto 0);                    --       .readdata
-		avmm_data_waitrequest   : out std_logic;                                        --       .waitrequest
-		avmm_data_readdatavalid : out std_logic;                                        --       .readdatavalid
-		avmm_data_burstcount    : in  std_logic_vector(1 downto 0)  := (others => '0'); --       .burstcount
-		reset_n                 : in  std_logic                     := '0'              -- nreset.reset_n
-	);
-end entity flash;
-
-architecture rtl of flash is
-	component altera_onchip_flash is
-		generic (
-			INIT_FILENAME                       : string  := "";
-			INIT_FILENAME_SIM                   : string  := "";
-			DEVICE_FAMILY                       : string  := "Unknown";
-			PART_NAME                           : string  := "Unknown";
-			DEVICE_ID                           : string  := "Unknown";
-			SECTOR1_START_ADDR                  : integer := 0;
-			SECTOR1_END_ADDR                    : integer := 0;
-			SECTOR2_START_ADDR                  : integer := 0;
-			SECTOR2_END_ADDR                    : integer := 0;
-			SECTOR3_START_ADDR                  : integer := 0;
-			SECTOR3_END_ADDR                    : integer := 0;
-			SECTOR4_START_ADDR                  : integer := 0;
-			SECTOR4_END_ADDR                    : integer := 0;
-			SECTOR5_START_ADDR                  : integer := 0;
-			SECTOR5_END_ADDR                    : integer := 0;
-			MIN_VALID_ADDR                      : integer := 0;
-			MAX_VALID_ADDR                      : integer := 0;
-			MIN_UFM_VALID_ADDR                  : integer := 0;
-			MAX_UFM_VALID_ADDR                  : integer := 0;
-			SECTOR1_MAP                         : integer := 0;
-			SECTOR2_MAP                         : integer := 0;
-			SECTOR3_MAP                         : integer := 0;
-			SECTOR4_MAP                         : integer := 0;
-			SECTOR5_MAP                         : integer := 0;
-			ADDR_RANGE1_END_ADDR                : integer := 0;
-			ADDR_RANGE2_END_ADDR                : integer := 0;
-			ADDR_RANGE1_OFFSET                  : integer := 0;
-			ADDR_RANGE2_OFFSET                  : integer := 0;
-			ADDR_RANGE3_OFFSET                  : integer := 0;
-			AVMM_DATA_ADDR_WIDTH                : integer := 19;
-			AVMM_DATA_DATA_WIDTH                : integer := 32;
-			AVMM_DATA_BURSTCOUNT_WIDTH          : integer := 4;
-			SECTOR_READ_PROTECTION_MODE         : integer := 31;
-			FLASH_SEQ_READ_DATA_COUNT           : integer := 2;
-			FLASH_ADDR_ALIGNMENT_BITS           : integer := 1;
-			FLASH_READ_CYCLE_MAX_INDEX          : integer := 4;
-			FLASH_RESET_CYCLE_MAX_INDEX         : integer := 29;
-			FLASH_BUSY_TIMEOUT_CYCLE_MAX_INDEX  : integer := 112;
-			FLASH_ERASE_TIMEOUT_CYCLE_MAX_INDEX : integer := 40603248;
-			FLASH_WRITE_TIMEOUT_CYCLE_MAX_INDEX : integer := 35382;
-			PARALLEL_MODE                       : boolean := true;
-			READ_AND_WRITE_MODE                 : boolean := true;
-			WRAPPING_BURST_MODE                 : boolean := false;
-			IS_DUAL_BOOT                        : string  := "False";
-			IS_ERAM_SKIP                        : string  := "False";
-			IS_COMPRESSED_IMAGE                 : string  := "False"
-		);
-		port (
-			clock                   : in  std_logic                     := 'X';             -- clk
-			reset_n                 : in  std_logic                     := 'X';             -- reset_n
-			avmm_data_addr          : in  std_logic_vector(14 downto 0) := (others => 'X'); -- address
-			avmm_data_read          : in  std_logic                     := 'X';             -- read
-			avmm_data_writedata     : in  std_logic_vector(31 downto 0) := (others => 'X'); -- writedata
-			avmm_data_write         : in  std_logic                     := 'X';             -- write
-			avmm_data_readdata      : out std_logic_vector(31 downto 0);                    -- readdata
-			avmm_data_waitrequest   : out std_logic;                                        -- waitrequest
-			avmm_data_readdatavalid : out std_logic;                                        -- readdatavalid
-			avmm_data_burstcount    : in  std_logic_vector(1 downto 0)  := (others => 'X'); -- burstcount
-			avmm_csr_addr           : in  std_logic                     := 'X';             -- address
-			avmm_csr_read           : in  std_logic                     := 'X';             -- read
-			avmm_csr_writedata      : in  std_logic_vector(31 downto 0) := (others => 'X'); -- writedata
-			avmm_csr_write          : in  std_logic                     := 'X';             -- write
-			avmm_csr_readdata       : out std_logic_vector(31 downto 0)                     -- readdata
-		);
-	end component altera_onchip_flash;
-
-begin
-
-	onchip_flash_0 : component altera_onchip_flash
-		generic map (
-			INIT_FILENAME                       => "",
-			INIT_FILENAME_SIM                   => "",
-			DEVICE_FAMILY                       => "MAX 10",
-			PART_NAME                           => "10M02SCU169C8G",
-			DEVICE_ID                           => "02",
-			SECTOR1_START_ADDR                  => 0,
-			SECTOR1_END_ADDR                    => 1535,
-			SECTOR2_START_ADDR                  => 1536,
-			SECTOR2_END_ADDR                    => 3071,
-			SECTOR3_START_ADDR                  => 3072,
-			SECTOR3_END_ADDR                    => 20479,
-			SECTOR4_START_ADDR                  => 0,
-			SECTOR4_END_ADDR                    => 0,
-			SECTOR5_START_ADDR                  => 0,
-			SECTOR5_END_ADDR                    => 0,
-			MIN_VALID_ADDR                      => 0,
-			MAX_VALID_ADDR                      => 20479,
-			MIN_UFM_VALID_ADDR                  => 0,
-			MAX_UFM_VALID_ADDR                  => 3071,
-			SECTOR1_MAP                         => 1,
-			SECTOR2_MAP                         => 2,
-			SECTOR3_MAP                         => 5,
-			SECTOR4_MAP                         => 0,
-			SECTOR5_MAP                         => 0,
-			ADDR_RANGE1_END_ADDR                => 3071,
-			ADDR_RANGE2_END_ADDR                => 20479,
-			ADDR_RANGE1_OFFSET                  => 512,
-			ADDR_RANGE2_OFFSET                  => 512,
-			ADDR_RANGE3_OFFSET                  => 0,
-			AVMM_DATA_ADDR_WIDTH                => 15,
-			AVMM_DATA_DATA_WIDTH                => 32,
-			AVMM_DATA_BURSTCOUNT_WIDTH          => 2,
-			SECTOR_READ_PROTECTION_MODE         => 24,
-			FLASH_SEQ_READ_DATA_COUNT           => 4,
-			FLASH_ADDR_ALIGNMENT_BITS           => 2,
-			FLASH_READ_CYCLE_MAX_INDEX          => 4,
-			FLASH_RESET_CYCLE_MAX_INDEX         => 1,
-			FLASH_BUSY_TIMEOUT_CYCLE_MAX_INDEX  => 8,
-			FLASH_ERASE_TIMEOUT_CYCLE_MAX_INDEX => 2537500,
-			FLASH_WRITE_TIMEOUT_CYCLE_MAX_INDEX => 2211,
-			PARALLEL_MODE                       => false,
-			READ_AND_WRITE_MODE                 => true,
-			WRAPPING_BURST_MODE                 => false,
-			IS_DUAL_BOOT                        => "False",
-			IS_ERAM_SKIP                        => "True",
-			IS_COMPRESSED_IMAGE                 => "False"
-		)
-		port map (
-			clock                   => clock,                   --    clk.clk
-			reset_n                 => reset_n,                 -- nreset.reset_n
-			avmm_data_addr          => avmm_data_addr,          --   data.address
-			avmm_data_read          => avmm_data_read,          --       .read
-			avmm_data_writedata     => avmm_data_writedata,     --       .writedata
-			avmm_data_write         => avmm_data_write,         --       .write
-			avmm_data_readdata      => avmm_data_readdata,      --       .readdata
-			avmm_data_waitrequest   => avmm_data_waitrequest,   --       .waitrequest
-			avmm_data_readdatavalid => avmm_data_readdatavalid, --       .readdatavalid
-			avmm_data_burstcount    => avmm_data_burstcount,    --       .burstcount
-			avmm_csr_addr           => avmm_csr_addr,           --    csr.address
-			avmm_csr_read           => avmm_csr_read,           --       .read
-			avmm_csr_writedata      => avmm_csr_writedata,      --       .writedata
-			avmm_csr_write          => avmm_csr_write,          --       .write
-			avmm_csr_readdata       => avmm_csr_readdata        --       .readdata
-		);
-
-end architecture rtl; -- of flash
Index: atari_chips/pokeyv2/flash_02/flash/synthesis/flash.debuginfo
===================================================================
--- atari_chips/pokeyv2/flash_02/flash/synthesis/flash.debuginfo	(revision 1335)
+++ atari_chips/pokeyv2/flash_02/flash/synthesis/flash.debuginfo	(nonexistent)
@@ -1,1679 +0,0 @@
-<?xml version="1.0" encoding="UTF-8"?>
-<EnsembleReport name="flash" kind="system" version="19.1" fabric="QSYS">
- <!-- Format version 19.1 670 (Future versions may contain additional information.) -->
- <!-- 2020.06.18.10:36:10 -->
- <!-- A collection of modules and connections -->
- <parameter name="clockCrossingAdapter">
-  <type>com.altera.sopcmodel.ensemble.EClockAdapter</type>
-  <value>HANDSHAKE</value>
-  <derived>false</derived>
-  <enabled>true</enabled>
-  <visible>true</visible>
-  <valid>true</valid>
- </parameter>
- <parameter name="device">
-  <type>java.lang.String</type>
-  <value>10M02SCU169C8G</value>
-  <derived>false</derived>
-  <enabled>true</enabled>
-  <visible>true</visible>
-  <valid>true</valid>
- </parameter>
- <parameter name="deviceFamily">
-  <type>java.lang.String</type>
-  <value>MAX10FPGA</value>
-  <derived>false</derived>
-  <enabled>true</enabled>
-  <visible>true</visible>
-  <valid>true</valid>
- </parameter>
- <parameter name="deviceSpeedGrade">
-  <type>java.lang.String</type>
-  <value>8</value>
-  <derived>false</derived>
-  <enabled>true</enabled>
-  <visible>false</visible>
-  <valid>true</valid>
- </parameter>
- <parameter name="fabricMode">
-  <type>com.altera.sopcmodel.ensemble.Ensemble$EFabricMode</type>
-  <value>QSYS</value>
-  <derived>false</derived>
-  <enabled>true</enabled>
-  <visible>false</visible>
-  <valid>true</valid>
- </parameter>
- <parameter name="generateLegacySim">
-  <type>boolean</type>
-  <value>false</value>
-  <derived>false</derived>
-  <enabled>true</enabled>
-  <visible>false</visible>
-  <valid>true</valid>
- </parameter>
- <parameter name="generationId">
-  <type>int</type>
-  <value>1592469370</value>
-  <derived>false</derived>
-  <enabled>true</enabled>
-  <visible>true</visible>
-  <valid>true</valid>
- </parameter>
- <parameter name="globalResetBus">
-  <type>boolean</type>
-  <value>false</value>
-  <derived>false</derived>
-  <enabled>true</enabled>
-  <visible>false</visible>
-  <valid>true</valid>
- </parameter>
- <parameter name="hdlLanguage">
-  <type>com.altera.entityinterfaces.moduleext.IModuleGenerateHDL$HDLLanguage</type>
-  <value>VERILOG</value>
-  <derived>false</derived>
-  <enabled>false</enabled>
-  <visible>false</visible>
-  <valid>true</valid>
- </parameter>
- <parameter name="hideFromIPCatalog">
-  <type>boolean</type>
-  <value>true</value>
-  <derived>false</derived>
-  <enabled>true</enabled>
-  <visible>true</visible>
-  <valid>true</valid>
- </parameter>
- <parameter name="lockedInterfaceDefinition">
-  <type>com.altera.sopcmodel.definition.BoundaryDefinition</type>
-  <value></value>
-  <derived>false</derived>
-  <enabled>true</enabled>
-  <visible>false</visible>
-  <valid>true</valid>
- </parameter>
- <parameter name="maxAdditionalLatency">
-  <type>int</type>
-  <value>1</value>
-  <derived>false</derived>
-  <enabled>true</enabled>
-  <visible>true</visible>
-  <valid>true</valid>
- </parameter>
- <parameter name="projectName">
-  <type>java.lang.String</type>
-  <value></value>
-  <derived>false</derived>
-  <enabled>true</enabled>
-  <visible>false</visible>
-  <valid>true</valid>
- </parameter>
- <parameter name="sopcBorderPoints">
-  <type>boolean</type>
-  <value>false</value>
-  <derived>false</derived>
-  <enabled>true</enabled>
-  <visible>false</visible>
-  <valid>true</valid>
- </parameter>
- <parameter name="systemHash">
-  <type>long</type>
-  <value>0</value>
-  <derived>false</derived>
-  <enabled>true</enabled>
-  <visible>false</visible>
-  <valid>true</valid>
- </parameter>
- <parameter name="testBenchDutName">
-  <type>java.lang.String</type>
-  <value></value>
-  <derived>false</derived>
-  <enabled>true</enabled>
-  <visible>false</visible>
-  <valid>true</valid>
- </parameter>
- <parameter name="timeStamp">
-  <type>long</type>
-  <value>0</value>
-  <derived>false</derived>
-  <enabled>true</enabled>
-  <visible>false</visible>
-  <valid>true</valid>
- </parameter>
- <parameter name="useTestBenchNamingPattern">
-  <type>boolean</type>
-  <value>false</value>
-  <derived>false</derived>
-  <enabled>true</enabled>
-  <visible>false</visible>
-  <valid>true</valid>
- </parameter>
- <module
-   name="onchip_flash_0"
-   kind="altera_onchip_flash"
-   version="19.1"
-   path="onchip_flash_0">
-  <!-- Describes a single module. Module parameters are
-the requested settings for a module instance. -->
-  <assignment>
-   <name>embeddedsw.CMacro.BYTES_PER_PAGE</name>
-   <value>2048</value>
-  </assignment>
-  <assignment>
-   <name>embeddedsw.CMacro.READ_ONLY_MODE</name>
-   <value>0</value>
-  </assignment>
-  <assignment>
-   <name>embeddedsw.CMacro.SECTOR1_ENABLED</name>
-   <value>1</value>
-  </assignment>
-  <assignment>
-   <name>embeddedsw.CMacro.SECTOR1_END_ADDR</name>
-   <value>6143</value>
-  </assignment>
-  <assignment>
-   <name>embeddedsw.CMacro.SECTOR1_START_ADDR</name>
-   <value>0</value>
-  </assignment>
-  <assignment>
-   <name>embeddedsw.CMacro.SECTOR2_ENABLED</name>
-   <value>1</value>
-  </assignment>
-  <assignment>
-   <name>embeddedsw.CMacro.SECTOR2_END_ADDR</name>
-   <value>12287</value>
-  </assignment>
-  <assignment>
-   <name>embeddedsw.CMacro.SECTOR2_START_ADDR</name>
-   <value>6144</value>
-  </assignment>
-  <assignment>
-   <name>embeddedsw.CMacro.SECTOR3_ENABLED</name>
-   <value>1</value>
-  </assignment>
-  <assignment>
-   <name>embeddedsw.CMacro.SECTOR3_END_ADDR</name>
-   <value>81919</value>
-  </assignment>
-  <assignment>
-   <name>embeddedsw.CMacro.SECTOR3_START_ADDR</name>
-   <value>12288</value>
-  </assignment>
-  <assignment>
-   <name>embeddedsw.CMacro.SECTOR4_ENABLED</name>
-   <value>0</value>
-  </assignment>
-  <assignment>
-   <name>embeddedsw.CMacro.SECTOR4_END_ADDR</name>
-   <value>-1</value>
-  </assignment>
-  <assignment>
-   <name>embeddedsw.CMacro.SECTOR4_START_ADDR</name>
-   <value>-1</value>
-  </assignment>
-  <assignment>
-   <name>embeddedsw.CMacro.SECTOR5_ENABLED</name>
-   <value>0</value>
-  </assignment>
-  <assignment>
-   <name>embeddedsw.CMacro.SECTOR5_END_ADDR</name>
-   <value>-1</value>
-  </assignment>
-  <assignment>
-   <name>embeddedsw.CMacro.SECTOR5_START_ADDR</name>
-   <value>-1</value>
-  </assignment>
-  <assignment>
-   <name>embeddedsw.memoryInfo.DAT_SYM_INSTALL_DIR</name>
-   <value>SIM_DIR</value>
-  </assignment>
-  <assignment>
-   <name>embeddedsw.memoryInfo.FLASH_INSTALL_DIR</name>
-   <value>APP_DIR</value>
-  </assignment>
-  <assignment>
-   <name>embeddedsw.memoryInfo.GENERATE_DAT_SYM</name>
-   <value>1</value>
-  </assignment>
-  <assignment>
-   <name>embeddedsw.memoryInfo.GENERATE_FLASH</name>
-   <value>1</value>
-  </assignment>
-  <assignment>
-   <name>embeddedsw.memoryInfo.GENERATE_HEX</name>
-   <value>1</value>
-  </assignment>
-  <assignment>
-   <name>embeddedsw.memoryInfo.HAS_BYTE_LANE</name>
-   <value>0</value>
-  </assignment>
-  <assignment>
-   <name>embeddedsw.memoryInfo.HEX_INSTALL_DIR</name>
-   <value>QPF_DIR</value>
-  </assignment>
-  <assignment>
-   <name>embeddedsw.memoryInfo.IS_FLASH</name>
-   <value>1</value>
-  </assignment>
-  <assignment>
-   <name>embeddedsw.memoryInfo.MEM_INIT_DATA_WIDTH</name>
-   <value>32</value>
-  </assignment>
-  <assignment>
-   <name>embeddedsw.memoryInfo.USE_BYTE_ADDRESSING_FOR_HEX</name>
-   <value>1</value>
-  </assignment>
-  <assignment>
-   <name>postgeneration.simulation.init_file.param_name</name>
-   <value>INIT_FILENAME</value>
-  </assignment>
-  <assignment>
-   <name>postgeneration.simulation.init_file.type</name>
-   <value>MEM_INIT</value>
-  </assignment>
-  <parameter name="DATA_INTERFACE">
-   <type>java.lang.String</type>
-   <value>Parallel</value>
-   <derived>false</derived>
-   <enabled>true</enabled>
-   <visible>true</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="READ_BURST_MODE">
-   <type>java.lang.String</type>
-   <value>Incrementing</value>
-   <derived>false</derived>
-   <enabled>true</enabled>
-   <visible>true</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="READ_BURST_COUNT">
-   <type>int</type>
-   <value>2</value>
-   <derived>false</derived>
-   <enabled>true</enabled>
-   <visible>true</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="CLOCK_FREQUENCY">
-   <type>double</type>
-   <value>7.25</value>
-   <derived>false</derived>
-   <enabled>true</enabled>
-   <visible>true</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="CONFIGURATION_SCHEME">
-   <type>java.lang.String</type>
-   <value>Internal Configuration</value>
-   <derived>false</derived>
-   <enabled>false</enabled>
-   <visible>true</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="CONFIGURATION_MODE">
-   <type>java.lang.String</type>
-   <value>Single Uncompressed Image</value>
-   <derived>false</derived>
-   <enabled>true</enabled>
-   <visible>true</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="SECTOR_ID">
-   <type>[Ljava.lang.String;</type>
-   <value>1,2,NA,NA,3</value>
-   <derived>true</derived>
-   <enabled>false</enabled>
-   <visible>true</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="SECTOR_ACCESS_MODE">
-   <type>[Ljava.lang.String;</type>
-   <value>Read and write,Read and write,Read only,Hidden,Read and write</value>
-   <derived>false</derived>
-   <enabled>true</enabled>
-   <visible>true</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="SECTOR_ADDRESS_MAPPING">
-   <type>[Ljava.lang.String;</type>
-   <value>0x00000 - 0x017ff,0x01800 - 0x02fff,NA,NA,0x03000 - 0x13fff</value>
-   <derived>true</derived>
-   <enabled>false</enabled>
-   <visible>true</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="SECTOR_STORAGE_TYPE">
-   <type>[Ljava.lang.String;</type>
-   <value>UFM,UFM,NA,NA,CFM</value>
-   <derived>true</derived>
-   <enabled>false</enabled>
-   <visible>true</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="initFlashContent">
-   <type>boolean</type>
-   <value>false</value>
-   <derived>false</derived>
-   <enabled>true</enabled>
-   <visible>true</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="useNonDefaultInitFile">
-   <type>boolean</type>
-   <value>false</value>
-   <derived>false</derived>
-   <enabled>false</enabled>
-   <visible>true</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="initializationFileName">
-   <type>java.lang.String</type>
-   <value>altera_onchip_flash.hex</value>
-   <derived>false</derived>
-   <enabled>false</enabled>
-   <visible>true</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="initializationFileNameForSim">
-   <type>java.lang.String</type>
-   <value>altera_onchip_flash.dat</value>
-   <derived>false</derived>
-   <enabled>false</enabled>
-   <visible>true</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="autoInitializationFileName">
-   <type>java.lang.String</type>
-   <value>flash_onchip_flash_0</value>
-   <derived>false</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-   <sysinfo_type>UNIQUE_ID</sysinfo_type>
-  </parameter>
-  <parameter name="INIT_FILENAME">
-   <type>java.lang.String</type>
-   <value></value>
-   <derived>true</derived>
-   <enabled>false</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="INIT_FILENAME_SIM">
-   <type>java.lang.String</type>
-   <value></value>
-   <derived>true</derived>
-   <enabled>false</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="DEVICE_FAMILY">
-   <type>java.lang.String</type>
-   <value>MAX10FPGA</value>
-   <derived>false</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-   <sysinfo_type>DEVICE_FAMILY</sysinfo_type>
-  </parameter>
-  <parameter name="PART_NAME">
-   <type>java.lang.String</type>
-   <value>10M02SCU169C8G</value>
-   <derived>false</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-   <sysinfo_type>DEVICE</sysinfo_type>
-  </parameter>
-  <parameter name="AUTO_CLOCK_RATE">
-   <type>long</type>
-   <value>0</value>
-   <derived>false</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-   <sysinfo_type>CLOCK_RATE</sysinfo_type>
-   <sysinfo_arg>clk</sysinfo_arg>
-  </parameter>
-  <parameter name="DEVICE_ID">
-   <type>java.lang.String</type>
-   <value>02</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="SECTOR1_START_ADDR">
-   <type>int</type>
-   <value>0</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="SECTOR1_END_ADDR">
-   <type>int</type>
-   <value>1535</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="SECTOR2_START_ADDR">
-   <type>int</type>
-   <value>1536</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="SECTOR2_END_ADDR">
-   <type>int</type>
-   <value>3071</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="SECTOR3_START_ADDR">
-   <type>int</type>
-   <value>3072</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="SECTOR3_END_ADDR">
-   <type>int</type>
-   <value>20479</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="SECTOR4_START_ADDR">
-   <type>int</type>
-   <value>0</value>
-   <derived>true</derived>
-   <enabled>false</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="SECTOR4_END_ADDR">
-   <type>int</type>
-   <value>0</value>
-   <derived>true</derived>
-   <enabled>false</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="SECTOR5_START_ADDR">
-   <type>int</type>
-   <value>0</value>
-   <derived>true</derived>
-   <enabled>false</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="SECTOR5_END_ADDR">
-   <type>int</type>
-   <value>0</value>
-   <derived>true</derived>
-   <enabled>false</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="MIN_VALID_ADDR">
-   <type>int</type>
-   <value>0</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="MAX_VALID_ADDR">
-   <type>int</type>
-   <value>20479</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="MIN_UFM_VALID_ADDR">
-   <type>int</type>
-   <value>0</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="MAX_UFM_VALID_ADDR">
-   <type>int</type>
-   <value>3071</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="SECTOR1_MAP">
-   <type>int</type>
-   <value>1</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="SECTOR2_MAP">
-   <type>int</type>
-   <value>2</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="SECTOR3_MAP">
-   <type>int</type>
-   <value>5</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="SECTOR4_MAP">
-   <type>int</type>
-   <value>0</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="SECTOR5_MAP">
-   <type>int</type>
-   <value>0</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="ADDR_RANGE1_END_ADDR">
-   <type>int</type>
-   <value>3071</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="ADDR_RANGE2_END_ADDR">
-   <type>int</type>
-   <value>20479</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="ADDR_RANGE1_OFFSET">
-   <type>int</type>
-   <value>512</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="ADDR_RANGE2_OFFSET">
-   <type>int</type>
-   <value>512</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="ADDR_RANGE3_OFFSET">
-   <type>int</type>
-   <value>0</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="AVMM_DATA_ADDR_WIDTH">
-   <type>int</type>
-   <value>15</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="AVMM_DATA_DATA_WIDTH">
-   <type>int</type>
-   <value>32</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="AVMM_DATA_BURSTCOUNT_WIDTH">
-   <type>int</type>
-   <value>2</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="SECTOR_READ_PROTECTION_MODE">
-   <type>int</type>
-   <value>24</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="FLASH_SEQ_READ_DATA_COUNT">
-   <type>int</type>
-   <value>4</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="FLASH_ADDR_ALIGNMENT_BITS">
-   <type>int</type>
-   <value>2</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="FLASH_READ_CYCLE_MAX_INDEX">
-   <type>int</type>
-   <value>4</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="FLASH_RESET_CYCLE_MAX_INDEX">
-   <type>int</type>
-   <value>1</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="FLASH_BUSY_TIMEOUT_CYCLE_MAX_INDEX">
-   <type>int</type>
-   <value>8</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="FLASH_ERASE_TIMEOUT_CYCLE_MAX_INDEX">
-   <type>int</type>
-   <value>2537500</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="FLASH_WRITE_TIMEOUT_CYCLE_MAX_INDEX">
-   <type>int</type>
-   <value>2211</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="PARALLEL_MODE">
-   <type>boolean</type>
-   <value>false</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="READ_AND_WRITE_MODE">
-   <type>boolean</type>
-   <value>true</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="WRAPPING_BURST_MODE">
-   <type>boolean</type>
-   <value>false</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="IS_DUAL_BOOT">
-   <type>java.lang.String</type>
-   <value>False</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="IS_ERAM_SKIP">
-   <type>java.lang.String</type>
-   <value>True</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="IS_COMPRESSED_IMAGE">
-   <type>java.lang.String</type>
-   <value>False</value>
-   <derived>true</derived>
-   <enabled>true</enabled>
-   <visible>false</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="deviceFamily">
-   <type>java.lang.String</type>
-   <value>UNKNOWN</value>
-   <derived>false</derived>
-   <enabled>true</enabled>
-   <visible>true</visible>
-   <valid>true</valid>
-  </parameter>
-  <parameter name="generateLegacySim">
-   <type>boolean</type>
-   <value>false</value>
-   <derived>false</derived>
-   <enabled>true</enabled>
-   <visible>true</visible>
-   <valid>true</valid>
-  </parameter>
-  <interface name="clk" kind="clock_sink" version="19.1">
-   <!-- The connection points exposed by a module instance for the
-particular module parameters. Connection points and their
-parameters are a RESULT of the module parameters. -->
-   <parameter name="externallyDriven">
-    <type>boolean</type>
-    <value>false</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="ptfSchematicName">
-    <type>java.lang.String</type>
-    <value></value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="deviceFamily">
-    <type>java.lang.String</type>
-    <value>UNKNOWN</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="generateLegacySim">
-    <type>boolean</type>
-    <value>false</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="clockRateKnown">
-    <type>java.lang.Boolean</type>
-    <value>false</value>
-    <derived>true</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="clockRate">
-    <type>java.lang.Long</type>
-    <value>0</value>
-    <derived>true</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <type>clock</type>
-   <isStart>false</isStart>
-   <port>
-    <name>clock</name>
-    <direction>Input</direction>
-    <width>1</width>
-    <role>clk</role>
-   </port>
-  </interface>
-  <interface name="nreset" kind="reset_sink" version="19.1">
-   <!-- The connection points exposed by a module instance for the
-particular module parameters. Connection points and their
-parameters are a RESULT of the module parameters. -->
-   <parameter name="associatedClock">
-    <type>java.lang.String</type>
-    <value>clk</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="synchronousEdges">
-    <type>com.altera.sopcmodel.reset.Reset$Edges</type>
-    <value>DEASSERT</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="deviceFamily">
-    <type>java.lang.String</type>
-    <value>UNKNOWN</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="generateLegacySim">
-    <type>boolean</type>
-    <value>false</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <type>reset</type>
-   <isStart>false</isStart>
-   <port>
-    <name>reset_n</name>
-    <direction>Input</direction>
-    <width>1</width>
-    <role>reset_n</role>
-   </port>
-  </interface>
-  <interface name="data" kind="avalon_slave" version="19.1">
-   <!-- The connection points exposed by a module instance for the
-particular module parameters. Connection points and their
-parameters are a RESULT of the module parameters. -->
-   <assignment>
-    <name>embeddedsw.configuration.isFlash</name>
-    <value>1</value>
-   </assignment>
-   <assignment>
-    <name>embeddedsw.configuration.isMemoryDevice</name>
-    <value>1</value>
-   </assignment>
-   <assignment>
-    <name>embeddedsw.configuration.isNonVolatileStorage</name>
-    <value>1</value>
-   </assignment>
-   <assignment>
-    <name>embeddedsw.configuration.isPrintableDevice</name>
-    <value>0</value>
-   </assignment>
-   <parameter name="addressAlignment">
-    <type>com.altera.sopcmodel.avalon.AvalonConnectionPoint$AddressAlignment</type>
-    <value>DYNAMIC</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="addressGroup">
-    <type>int</type>
-    <value>0</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="addressSpan">
-    <type>java.math.BigInteger</type>
-    <value>81920</value>
-    <derived>true</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="addressUnits">
-    <type>com.altera.sopcmodel.avalon.EAddrBurstUnits</type>
-    <value>WORDS</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="alwaysBurstMaxBurst">
-    <type>boolean</type>
-    <value>false</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="associatedClock">
-    <type>java.lang.String</type>
-    <value>clk</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="associatedReset">
-    <type>java.lang.String</type>
-    <value>nreset</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="bitsPerSymbol">
-    <type>int</type>
-    <value>8</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="bridgedAddressOffset">
-    <type>java.math.BigInteger</type>
-    <value></value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="bridgesToMaster">
-    <type>com.altera.entityinterfaces.IConnectionPoint</type>
-    <value></value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="burstOnBurstBoundariesOnly">
-    <type>boolean</type>
-    <value>false</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="burstcountUnits">
-    <type>com.altera.sopcmodel.avalon.EAddrBurstUnits</type>
-    <value>WORDS</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="constantBurstBehavior">
-    <type>boolean</type>
-    <value>false</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="explicitAddressSpan">
-    <type>java.math.BigInteger</type>
-    <value>81920</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="holdTime">
-    <type>int</type>
-    <value>0</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="interleaveBursts">
-    <type>boolean</type>
-    <value>false</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="isBigEndian">
-    <type>boolean</type>
-    <value>false</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="isFlash">
-    <type>boolean</type>
-    <value>true</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="isMemoryDevice">
-    <type>boolean</type>
-    <value>true</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="isNonVolatileStorage">
-    <type>boolean</type>
-    <value>true</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="linewrapBursts">
-    <type>boolean</type>
-    <value>false</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="maximumPendingReadTransactions">
-    <type>int</type>
-    <value>1</value>
-    <derived>false</derived>
-    <enabled>false</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="maximumPendingWriteTransactions">
-    <type>int</type>
-    <value>0</value>
-    <derived>false</derived>
-    <enabled>false</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="minimumUninterruptedRunLength">
-    <type>int</type>
-    <value>0</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="printableDevice">
-    <type>boolean</type>
-    <value>false</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="readLatency">
-    <type>int</type>
-    <value>0</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="readWaitStates">
-    <type>int</type>
-    <value>0</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="readWaitTime">
-    <type>int</type>
-    <value>0</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="registerIncomingSignals">
-    <type>boolean</type>
-    <value>false</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="registerOutgoingSignals">
-    <type>boolean</type>
-    <value>false</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="setupTime">
-    <type>int</type>
-    <value>0</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="timingUnits">
-    <type>com.altera.sopcmodel.avalon.TimingUnits</type>
-    <value>Cycles</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="transparentBridge">
-    <type>boolean</type>
-    <value>false</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="wellBehavedWaitrequest">
-    <type>boolean</type>
-    <value>false</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="writeLatency">
-    <type>int</type>
-    <value>0</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="writeWaitStates">
-    <type>int</type>
-    <value>0</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="writeWaitTime">
-    <type>int</type>
-    <value>0</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="deviceFamily">
-    <type>java.lang.String</type>
-    <value>UNKNOWN</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="generateLegacySim">
-    <type>boolean</type>
-    <value>false</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <type>avalon</type>
-   <isStart>false</isStart>
-   <port>
-    <name>avmm_data_addr</name>
-    <direction>Input</direction>
-    <width>15</width>
-    <role>address</role>
-   </port>
-   <port>
-    <name>avmm_data_read</name>
-    <direction>Input</direction>
-    <width>1</width>
-    <role>read</role>
-   </port>
-   <port>
-    <name>avmm_data_writedata</name>
-    <direction>Input</direction>
-    <width>32</width>
-    <role>writedata</role>
-   </port>
-   <port>
-    <name>avmm_data_write</name>
-    <direction>Input</direction>
-    <width>1</width>
-    <role>write</role>
-   </port>
-   <port>
-    <name>avmm_data_readdata</name>
-    <direction>Output</direction>
-    <width>32</width>
-    <role>readdata</role>
-   </port>
-   <port>
-    <name>avmm_data_waitrequest</name>
-    <direction>Output</direction>
-    <width>1</width>
-    <role>waitrequest</role>
-   </port>
-   <port>
-    <name>avmm_data_readdatavalid</name>
-    <direction>Output</direction>
-    <width>1</width>
-    <role>readdatavalid</role>
-   </port>
-   <port>
-    <name>avmm_data_burstcount</name>
-    <direction>Input</direction>
-    <width>2</width>
-    <role>burstcount</role>
-   </port>
-  </interface>
-  <interface name="csr" kind="avalon_slave" version="19.1">
-   <!-- The connection points exposed by a module instance for the
-particular module parameters. Connection points and their
-parameters are a RESULT of the module parameters. -->
-   <assignment>
-    <name>embeddedsw.configuration.isFlash</name>
-    <value>0</value>
-   </assignment>
-   <assignment>
-    <name>embeddedsw.configuration.isMemoryDevice</name>
-    <value>0</value>
-   </assignment>
-   <assignment>
-    <name>embeddedsw.configuration.isNonVolatileStorage</name>
-    <value>0</value>
-   </assignment>
-   <assignment>
-    <name>embeddedsw.configuration.isPrintableDevice</name>
-    <value>0</value>
-   </assignment>
-   <parameter name="addressAlignment">
-    <type>com.altera.sopcmodel.avalon.AvalonConnectionPoint$AddressAlignment</type>
-    <value>DYNAMIC</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="addressGroup">
-    <type>int</type>
-    <value>0</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="addressSpan">
-    <type>java.math.BigInteger</type>
-    <value>8</value>
-    <derived>true</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="addressUnits">
-    <type>com.altera.sopcmodel.avalon.EAddrBurstUnits</type>
-    <value>WORDS</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="alwaysBurstMaxBurst">
-    <type>boolean</type>
-    <value>false</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="associatedClock">
-    <type>java.lang.String</type>
-    <value>clk</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="associatedReset">
-    <type>java.lang.String</type>
-    <value>nreset</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="bitsPerSymbol">
-    <type>int</type>
-    <value>8</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="bridgedAddressOffset">
-    <type>java.math.BigInteger</type>
-    <value></value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="bridgesToMaster">
-    <type>com.altera.entityinterfaces.IConnectionPoint</type>
-    <value></value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="burstOnBurstBoundariesOnly">
-    <type>boolean</type>
-    <value>false</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="burstcountUnits">
-    <type>com.altera.sopcmodel.avalon.EAddrBurstUnits</type>
-    <value>WORDS</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="constantBurstBehavior">
-    <type>boolean</type>
-    <value>false</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="explicitAddressSpan">
-    <type>java.math.BigInteger</type>
-    <value>0</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="holdTime">
-    <type>int</type>
-    <value>0</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="interleaveBursts">
-    <type>boolean</type>
-    <value>false</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="isBigEndian">
-    <type>boolean</type>
-    <value>false</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="isFlash">
-    <type>boolean</type>
-    <value>false</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="isMemoryDevice">
-    <type>boolean</type>
-    <value>false</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="isNonVolatileStorage">
-    <type>boolean</type>
-    <value>false</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="linewrapBursts">
-    <type>boolean</type>
-    <value>false</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="maximumPendingReadTransactions">
-    <type>int</type>
-    <value>0</value>
-    <derived>false</derived>
-    <enabled>false</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="maximumPendingWriteTransactions">
-    <type>int</type>
-    <value>0</value>
-    <derived>false</derived>
-    <enabled>false</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="minimumUninterruptedRunLength">
-    <type>int</type>
-    <value>0</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="printableDevice">
-    <type>boolean</type>
-    <value>false</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="readLatency">
-    <type>int</type>
-    <value>0</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="readWaitStates">
-    <type>int</type>
-    <value>1</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="readWaitTime">
-    <type>int</type>
-    <value>1</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="registerIncomingSignals">
-    <type>boolean</type>
-    <value>false</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="registerOutgoingSignals">
-    <type>boolean</type>
-    <value>false</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="setupTime">
-    <type>int</type>
-    <value>0</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="timingUnits">
-    <type>com.altera.sopcmodel.avalon.TimingUnits</type>
-    <value>Cycles</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="transparentBridge">
-    <type>boolean</type>
-    <value>false</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="wellBehavedWaitrequest">
-    <type>boolean</type>
-    <value>false</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="writeLatency">
-    <type>int</type>
-    <value>0</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="writeWaitStates">
-    <type>int</type>
-    <value>0</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>false</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="writeWaitTime">
-    <type>int</type>
-    <value>0</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="deviceFamily">
-    <type>java.lang.String</type>
-    <value>UNKNOWN</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <parameter name="generateLegacySim">
-    <type>boolean</type>
-    <value>false</value>
-    <derived>false</derived>
-    <enabled>true</enabled>
-    <visible>true</visible>
-    <valid>true</valid>
-   </parameter>
-   <type>avalon</type>
-   <isStart>false</isStart>
-   <port>
-    <name>avmm_csr_addr</name>
-    <direction>Input</direction>
-    <width>1</width>
-    <role>address</role>
-   </port>
-   <port>
-    <name>avmm_csr_read</name>
-    <direction>Input</direction>
-    <width>1</width>
-    <role>read</role>
-   </port>
-   <port>
-    <name>avmm_csr_writedata</name>
-    <direction>Input</direction>
-    <width>32</width>
-    <role>writedata</role>
-   </port>
-   <port>
-    <name>avmm_csr_write</name>
-    <direction>Input</direction>
-    <width>1</width>
-    <role>write</role>
-   </port>
-   <port>
-    <name>avmm_csr_readdata</name>
-    <direction>Output</direction>
-    <width>32</width>
-    <role>readdata</role>
-   </port>
-  </interface>
- </module>
- <plugin>
-  <instanceCount>1</instanceCount>
-  <name>altera_onchip_flash</name>
-  <type>com.altera.entityinterfaces.IElementClass</type>
-  <subtype>com.altera.entityinterfaces.IModule</subtype>
-  <displayName>On-Chip Flash Intel FPGA IP</displayName>
-  <version>19.1</version>
- </plugin>
- <plugin>
-  <instanceCount>1</instanceCount>
-  <name>clock_sink</name>
-  <type>com.altera.entityinterfaces.IElementClass</type>
-  <subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>
-  <displayName>Clock Input</displayName>
-  <version>19.1</version>
- </plugin>
- <plugin>
-  <instanceCount>1</instanceCount>
-  <name>reset_sink</name>
-  <type>com.altera.entityinterfaces.IElementClass</type>
-  <subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>
-  <displayName>Reset Input</displayName>
-  <version>19.1</version>
- </plugin>
- <plugin>
-  <instanceCount>2</instanceCount>
-  <name>avalon_slave</name>
-  <type>com.altera.entityinterfaces.IElementClass</type>
-  <subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>
-  <displayName>Avalon Memory Mapped Slave</displayName>
-  <version>19.1</version>
- </plugin>
- <reportVersion>19.1 670</reportVersion>
- <uniqueIdentifier>F44D30F4F5CE00000172C69235AF</uniqueIdentifier>
-</EnsembleReport>
Index: atari_chips/pokeyv2/flash_02/flash/synthesis/submodules/altera_onchip_flash.v
===================================================================
--- atari_chips/pokeyv2/flash_02/flash/synthesis/submodules/altera_onchip_flash.v	(revision 1335)
+++ atari_chips/pokeyv2/flash_02/flash/synthesis/submodules/altera_onchip_flash.v	(nonexistent)
@@ -1,331 +0,0 @@
-// (C) 2001-2019 Intel Corporation. All rights reserved.
-// Your use of Intel Corporation's design tools, logic functions and other 
-// software and tools, and its AMPP partner logic functions, and any output 
-// files from any of the foregoing (including device programming or simulation 
-// files), and any associated documentation or information are expressly subject 
-// to the terms and conditions of the Intel Program License Subscription 
-// Agreement, Intel FPGA IP License Agreement, or other applicable 
-// license agreement, including, without limitation, that your use is for the 
-// sole purpose of programming logic devices manufactured by Intel and sold by 
-// Intel or its authorized distributors.  Please refer to the applicable 
-// agreement for further details.
-
-
-////////////////////////////////////////////////////////////////////
-//
-//   ALTERA_ONCHIP_FLASH
-//
-//  Copyright (C) 1991-2013 Altera Corporation
-//  Your use of Altera Corporation's design tools, logic functions 
-//  and other software and tools, and its AMPP partner logic 
-//  functions, and any output files from any of the foregoing 
-//  (including device programming or simulation files), and any 
-//  associated documentation or information are expressly subject 
-//  to the terms and conditions of the Altera Program License 
-//  Subscription Agreement, Altera MegaCore Function License 
-//  Agreement, or other applicable license agreement, including, 
-//  without limitation, that your use is for the sole purpose of 
-//  programming logic devices manufactured by Altera and sold by 
-//  Altera or its authorized distributors.  Please refer to the 
-//  applicable agreement for further details.
-//
-////////////////////////////////////////////////////////////////////
-
-// synthesis VERILOG_INPUT_VERSION VERILOG_2001
-
-`timescale 1 ps / 1 ps
-
-module  altera_onchip_flash ( 
-	// To/From System
-	clock,
-	reset_n,
-	
-	// To/From Avalon_MM data slave interface
-	avmm_data_read,
-	avmm_data_write,
-	avmm_data_addr,
-	avmm_data_writedata,
-	avmm_data_burstcount,
-	avmm_data_waitrequest,
-	avmm_data_readdatavalid,
-	avmm_data_readdata,
-	
-	// To/From Avalon_MM csr slave interface
-	avmm_csr_read,
-	avmm_csr_write,
-	avmm_csr_addr,
-	avmm_csr_writedata,
-	avmm_csr_readdata
-);
-	parameter DEVICE_FAMILY = "MAX 10";
-	parameter PART_NAME = "Unknown";
-	parameter IS_DUAL_BOOT = "False";
-	parameter IS_ERAM_SKIP = "False";
-	parameter IS_COMPRESSED_IMAGE = "False";
-	parameter INIT_FILENAME = "";
-
-	// simulation only start
-	parameter DEVICE_ID = "08";
-	parameter INIT_FILENAME_SIM = "";
-	// simulation only end
-
-	parameter PARALLEL_MODE = 0;
-	parameter READ_AND_WRITE_MODE = 0;
-	parameter WRAPPING_BURST_MODE = 0;
-	
-	parameter AVMM_CSR_DATA_WIDTH = 32;
-	parameter AVMM_DATA_DATA_WIDTH = 32;
-	parameter AVMM_DATA_ADDR_WIDTH = 20;
-	parameter AVMM_DATA_BURSTCOUNT_WIDTH = 13;
-	parameter FLASH_DATA_WIDTH = 32;
-	parameter FLASH_ADDR_WIDTH = 23;
-	parameter FLASH_SEQ_READ_DATA_COUNT = 2;	//number of 32-bit data per sequential read. only need in parallel mode.
-	parameter FLASH_READ_CYCLE_MAX_INDEX = 3;	//period to for each sequential read. only need in parallel mode.
-	parameter FLASH_ADDR_ALIGNMENT_BITS = 1; 	//number of last addr bits for alignment. only need in parallel mode.
-	parameter FLASH_RESET_CYCLE_MAX_INDEX = 28;	//period that required by flash before back to idle for erase and program operation
-	parameter FLASH_BUSY_TIMEOUT_CYCLE_MAX_INDEX = 112; //flash busy timeout period (960ns)
-	parameter FLASH_ERASE_TIMEOUT_CYCLE_MAX_INDEX = 40603248; //erase timeout period (350ms)
-	parameter FLASH_WRITE_TIMEOUT_CYCLE_MAX_INDEX = 35382; //write timeout period (305us)
-	parameter MIN_VALID_ADDR = 1;
-	parameter MAX_VALID_ADDR = 1;
-	parameter MIN_UFM_VALID_ADDR = 1;
-	parameter MAX_UFM_VALID_ADDR = 1;
-	parameter SECTOR1_START_ADDR = 1;
-	parameter SECTOR1_END_ADDR = 1;
-	parameter SECTOR2_START_ADDR = 1;
-	parameter SECTOR2_END_ADDR = 1;
-	parameter SECTOR3_START_ADDR = 1;
-	parameter SECTOR3_END_ADDR = 1;
-	parameter SECTOR4_START_ADDR = 1;
-	parameter SECTOR4_END_ADDR = 1;
-	parameter SECTOR5_START_ADDR = 1;
-	parameter SECTOR5_END_ADDR = 1;
-	parameter SECTOR_READ_PROTECTION_MODE = 5'b11111;
-	parameter SECTOR1_MAP = 1;
-	parameter SECTOR2_MAP = 1;
-	parameter SECTOR3_MAP = 1;
-	parameter SECTOR4_MAP = 1;
-	parameter SECTOR5_MAP = 1;
-	parameter ADDR_RANGE1_END_ADDR = 1;
-	parameter ADDR_RANGE2_END_ADDR = 1;
-	parameter ADDR_RANGE1_OFFSET = 1;
-	parameter ADDR_RANGE2_OFFSET = 1;
-	parameter ADDR_RANGE3_OFFSET = 1;
-	// To/From System
-	input clock;
-	input reset_n;
-
-	// To/From Avalon_MM data slave interface
-	input avmm_data_read;
-	input avmm_data_write;
-	input [AVMM_DATA_ADDR_WIDTH-1:0] avmm_data_addr;
-	input [AVMM_DATA_DATA_WIDTH-1:0] avmm_data_writedata;
-	input [AVMM_DATA_BURSTCOUNT_WIDTH-1:0] avmm_data_burstcount;
-	output avmm_data_waitrequest;
-	output avmm_data_readdatavalid;
-	output [AVMM_DATA_DATA_WIDTH-1:0] avmm_data_readdata;
-
-	// To/From Avalon_MM csr slave interface
-	input avmm_csr_read;
-	input avmm_csr_write;
-	input avmm_csr_addr;
-	input [AVMM_CSR_DATA_WIDTH-1:0] avmm_csr_writedata;
-	output [AVMM_CSR_DATA_WIDTH-1:0] avmm_csr_readdata;
-
-	wire [AVMM_DATA_DATA_WIDTH-1:0] avmm_data_readdata_wire;
-	wire [AVMM_CSR_DATA_WIDTH-1:0] avmm_csr_readdata_wire;
-	wire [31:0] csr_control_wire;
-	wire [9:0] csr_status_wire;
-	wire [FLASH_ADDR_WIDTH-1:0] flash_ardin_wire;
-	wire [FLASH_DATA_WIDTH-1:0] flash_drdout_wire;
-	wire flash_busy;
-	wire flash_se_pass;
-	wire flash_sp_pass;
-	wire flash_osc;
-	wire flash_xe_ye;
-	wire flash_se;
-	wire flash_arclk;
-	wire flash_arshft;
-	wire flash_drclk;
-	wire flash_drshft;
-	wire flash_drdin;
-	wire flash_nprogram;
-	wire flash_nerase;
-	wire flash_par_en;
-	wire flash_xe_ye_wire;
-	wire flash_se_wire;
-	
-	assign avmm_data_readdata = avmm_data_readdata_wire;
-
-	generate
-		if (READ_AND_WRITE_MODE == 0) begin
-			assign avmm_csr_readdata = 32'hffffffff;
-			assign csr_control_wire = 32'h3fffffff;
-		end
-		else begin
-			assign avmm_csr_readdata = avmm_csr_readdata_wire;
-		end
-	endgenerate
-
-	generate
-		if (DEVICE_ID == "02" || DEVICE_ID == "01") begin
-			assign flash_par_en = 1'b1;
-			assign flash_xe_ye = 1'b1;
-			assign flash_se = 1'b1;
-		end
-		else begin
-			assign flash_par_en = PARALLEL_MODE[0];
-			assign flash_xe_ye = flash_xe_ye_wire;
-			assign flash_se = flash_se_wire;
-		end
-	endgenerate
-	
-	generate
-		if (READ_AND_WRITE_MODE) begin
-			// -------------------------------------------------------------------
-			// Instantiate a Avalon_MM csr slave controller
-			// -------------------------------------------------------------------	
-			altera_onchip_flash_avmm_csr_controller avmm_csr_controller ( 
-				// To/From System
-				.clock(clock),
-				.reset_n(reset_n),
-
-				// To/From Avalon_MM csr slave interface
-				.avmm_read(avmm_csr_read),
-				.avmm_write(avmm_csr_write),
-				.avmm_addr(avmm_csr_addr),
-				.avmm_writedata(avmm_csr_writedata),
-				.avmm_readdata(avmm_csr_readdata_wire),
-		
-				// To/From Avalon_MM data slave interface
-				.csr_control(csr_control_wire),
-				.csr_status(csr_status_wire)
-			);
-		end
-	endgenerate
-
-	// -------------------------------------------------------------------
-	// Instantiate a Avalon_MM data slave controller
-	// -------------------------------------------------------------------	
-	altera_onchip_flash_avmm_data_controller # (
-
-		.READ_AND_WRITE_MODE (READ_AND_WRITE_MODE),
-		.WRAPPING_BURST_MODE (WRAPPING_BURST_MODE),
-		.AVMM_DATA_ADDR_WIDTH (AVMM_DATA_ADDR_WIDTH),
-		.AVMM_DATA_BURSTCOUNT_WIDTH (AVMM_DATA_BURSTCOUNT_WIDTH),
-		.FLASH_SEQ_READ_DATA_COUNT (FLASH_SEQ_READ_DATA_COUNT),
-		.FLASH_READ_CYCLE_MAX_INDEX (FLASH_READ_CYCLE_MAX_INDEX),
-		.FLASH_ADDR_ALIGNMENT_BITS (FLASH_ADDR_ALIGNMENT_BITS),
-		.FLASH_RESET_CYCLE_MAX_INDEX (FLASH_RESET_CYCLE_MAX_INDEX),
-		.FLASH_BUSY_TIMEOUT_CYCLE_MAX_INDEX (FLASH_BUSY_TIMEOUT_CYCLE_MAX_INDEX),
-		.FLASH_ERASE_TIMEOUT_CYCLE_MAX_INDEX (FLASH_ERASE_TIMEOUT_CYCLE_MAX_INDEX),
-		.FLASH_WRITE_TIMEOUT_CYCLE_MAX_INDEX (FLASH_WRITE_TIMEOUT_CYCLE_MAX_INDEX),
-		.MIN_VALID_ADDR (MIN_VALID_ADDR),
-		.MAX_VALID_ADDR (MAX_VALID_ADDR),
-		.SECTOR1_START_ADDR (SECTOR1_START_ADDR),
-		.SECTOR1_END_ADDR (SECTOR1_END_ADDR),
-		.SECTOR2_START_ADDR (SECTOR2_START_ADDR),
-		.SECTOR2_END_ADDR (SECTOR2_END_ADDR),
-		.SECTOR3_START_ADDR (SECTOR3_START_ADDR),
-		.SECTOR3_END_ADDR (SECTOR3_END_ADDR),
-		.SECTOR4_START_ADDR (SECTOR4_START_ADDR),
-		.SECTOR4_END_ADDR (SECTOR4_END_ADDR),
-		.SECTOR5_START_ADDR (SECTOR5_START_ADDR),
-		.SECTOR5_END_ADDR (SECTOR5_END_ADDR),
-		.SECTOR_READ_PROTECTION_MODE (SECTOR_READ_PROTECTION_MODE),
-		.SECTOR1_MAP (SECTOR1_MAP),
-		.SECTOR2_MAP (SECTOR2_MAP),
-		.SECTOR3_MAP (SECTOR3_MAP),
-		.SECTOR4_MAP (SECTOR4_MAP),
-		.SECTOR5_MAP (SECTOR5_MAP),
-		.ADDR_RANGE1_END_ADDR (ADDR_RANGE1_END_ADDR),
-		.ADDR_RANGE2_END_ADDR (ADDR_RANGE2_END_ADDR),
-		.ADDR_RANGE1_OFFSET (ADDR_RANGE1_OFFSET),
-		.ADDR_RANGE2_OFFSET (ADDR_RANGE2_OFFSET),
-		.ADDR_RANGE3_OFFSET (ADDR_RANGE3_OFFSET)
-
-	) avmm_data_controller ( 
-		// To/From System
-		.clock(clock),
-		.reset_n(reset_n),
-		
-		// To/From Flash IP interface
-		.flash_busy(flash_busy),
-		.flash_se_pass(flash_se_pass),
-		.flash_sp_pass(flash_sp_pass),
-		.flash_osc(flash_osc),
-		.flash_drdout(flash_drdout_wire),
-		.flash_xe_ye(flash_xe_ye_wire),
-		.flash_se(flash_se_wire),
-		.flash_arclk(flash_arclk),
-		.flash_arshft(flash_arshft),
-		.flash_drclk(flash_drclk),
-		.flash_drshft(flash_drshft),
-		.flash_drdin(flash_drdin),
-		.flash_nprogram(flash_nprogram),
-		.flash_nerase(flash_nerase),
-		.flash_ardin(flash_ardin_wire),
-
-		// To/From Avalon_MM data slave interface
-		.avmm_read(avmm_data_read),
-		.avmm_write(avmm_data_write),
-		.avmm_addr(avmm_data_addr),
-		.avmm_writedata(avmm_data_writedata),
-		.avmm_burstcount(avmm_data_burstcount),
-		.avmm_waitrequest(avmm_data_waitrequest),
-		.avmm_readdatavalid(avmm_data_readdatavalid),
-		.avmm_readdata(avmm_data_readdata_wire),
-
-		// To/From Avalon_MM csr slave interface
-		.csr_control(csr_control_wire),
-		.csr_status(csr_status_wire)
-	);
-	
-	// -------------------------------------------------------------------
-	// Instantiate wysiwyg for onchip flash block
-	// -------------------------------------------------------------------
-	altera_onchip_flash_block # (
-	
-		.DEVICE_FAMILY (DEVICE_FAMILY),
-		.PART_NAME (PART_NAME),
-		.IS_DUAL_BOOT (IS_DUAL_BOOT),
-		.IS_ERAM_SKIP (IS_ERAM_SKIP),
-		.IS_COMPRESSED_IMAGE (IS_COMPRESSED_IMAGE),
-		.INIT_FILENAME (INIT_FILENAME),
-		.MIN_VALID_ADDR (MIN_VALID_ADDR),
-		.MAX_VALID_ADDR (MAX_VALID_ADDR),
-		.MIN_UFM_VALID_ADDR (MIN_UFM_VALID_ADDR),
-		.MAX_UFM_VALID_ADDR (MAX_UFM_VALID_ADDR),
-		.ADDR_RANGE1_END_ADDR (ADDR_RANGE1_END_ADDR),
-        .ADDR_RANGE2_END_ADDR (ADDR_RANGE2_END_ADDR),
-		.ADDR_RANGE1_OFFSET (ADDR_RANGE1_OFFSET),
-		.ADDR_RANGE2_OFFSET (ADDR_RANGE2_OFFSET),
-		.ADDR_RANGE3_OFFSET (ADDR_RANGE3_OFFSET),
-		// simulation only start
-		.DEVICE_ID (DEVICE_ID),
-		.INIT_FILENAME_SIM (INIT_FILENAME_SIM)
-		// simulation only end
-		
-	) altera_onchip_flash_block (
-		.xe_ye(flash_xe_ye),
-		.se(flash_se),
-		.arclk(flash_arclk),
-		.arshft(flash_arshft),
-		.ardin(flash_ardin_wire),
-		.drclk(flash_drclk),
-		.drshft(flash_drshft),
-		.drdin(flash_drdin),
-		.nprogram(flash_nprogram),
-		.nerase(flash_nerase),
-		.nosc_ena(1'b0),
-		.par_en(flash_par_en),
-		.drdout(flash_drdout_wire),
-		.busy(flash_busy),
-		.se_pass(flash_se_pass),
-		.sp_pass(flash_sp_pass),
-		.osc(flash_osc)
-	);
-	
-	
-endmodule //altera_onchip_flash
-//VALID FILE
Index: atari_chips/pokeyv2/flash_02/flash/synthesis/submodules/altera_onchip_flash.sdc
===================================================================
--- atari_chips/pokeyv2/flash_02/flash/synthesis/submodules/altera_onchip_flash.sdc	(revision 1335)
+++ atari_chips/pokeyv2/flash_02/flash/synthesis/submodules/altera_onchip_flash.sdc	(nonexistent)
@@ -1,92 +0,0 @@
-# (C) 2001-2019 Intel Corporation. All rights reserved.
-# Your use of Intel Corporation's design tools, logic functions and other 
-# software and tools, and its AMPP partner logic functions, and any output 
-# files from any of the foregoing (including device programming or simulation 
-# files), and any associated documentation or information are expressly subject 
-# to the terms and conditions of the Intel Program License Subscription 
-# Agreement, Intel FPGA IP License Agreement, or other applicable 
-# license agreement, including, without limitation, that your use is for the 
-# sole purpose of programming logic devices manufactured by Intel and sold by 
-# Intel or its authorized distributors.  Please refer to the applicable 
-# agreement for further details.
-
-
-
-#**************************************************************
-# Time Information
-#**************************************************************
-
-
-
-#**************************************************************
-# Create Clock
-#**************************************************************
-
-
-
-#**************************************************************
-# Create Generated Clock
-#**************************************************************
-
-
-
-#**************************************************************
-# Set Clock Latency
-#**************************************************************
-
-
-
-#**************************************************************
-# Set Clock Uncertainty
-#**************************************************************
-
-
-
-#**************************************************************
-# Set Input Delay
-#**************************************************************
-
-
-
-#**************************************************************
-# Set Output Delay
-#**************************************************************
-
-
-
-#**************************************************************
-# Set Clock Groups
-#**************************************************************
-
-
-
-#**************************************************************
-# Set False Path
-#**************************************************************
-
-set_false_path -to [get_registers {*|flash_busy_reg}]
-set_false_path -to [get_registers {*|flash_busy_clear_reg}]
-
-
-#**************************************************************
-# Set Multicycle Path
-#**************************************************************
-
-
-
-#**************************************************************
-# Set Maximum Delay
-#**************************************************************
-
-
-
-#**************************************************************
-# Set Minimum Delay
-#**************************************************************
-
-
-
-#**************************************************************
-# Set Input Transition
-#**************************************************************
-
Index: atari_chips/pokeyv2/flash_02/flash/synthesis/submodules/rtl/altera_onchip_flash_block.v
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream

Property changes on: atari_chips/pokeyv2/flash_02/flash/synthesis/submodules/rtl/altera_onchip_flash_block.v
___________________________________________________________________
Deleted: svn:mime-type
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-application/octet-stream
\ No newline at end of property
Index: atari_chips/pokeyv2/flash_02/flash/synthesis/submodules/altera_onchip_flash_avmm_csr_controller.v
===================================================================
--- atari_chips/pokeyv2/flash_02/flash/synthesis/submodules/altera_onchip_flash_avmm_csr_controller.v	(revision 1335)
+++ atari_chips/pokeyv2/flash_02/flash/synthesis/submodules/altera_onchip_flash_avmm_csr_controller.v	(nonexistent)
@@ -1,182 +0,0 @@
-// (C) 2001-2019 Intel Corporation. All rights reserved.
-// Your use of Intel Corporation's design tools, logic functions and other 
-// software and tools, and its AMPP partner logic functions, and any output 
-// files from any of the foregoing (including device programming or simulation 
-// files), and any associated documentation or information are expressly subject 
-// to the terms and conditions of the Intel Program License Subscription 
-// Agreement, Intel FPGA IP License Agreement, or other applicable 
-// license agreement, including, without limitation, that your use is for the 
-// sole purpose of programming logic devices manufactured by Intel and sold by 
-// Intel or its authorized distributors.  Please refer to the applicable 
-// agreement for further details.
-
-
-////////////////////////////////////////////////////////////////////
-//
-//  ALTERA_ONCHIP_FLASH_AVMM_CSR_CONTROLLER
-//
-//  Copyright (C) 1991-2013 Altera Corporation
-//  Your use of Altera Corporation's design tools, logic functions 
-//  and other software and tools, and its AMPP partner logic 
-//  functions, and any output files from any of the foregoing 
-//  (including device programming or simulation files), and any 
-//  associated documentation or information are expressly subject 
-//  to the terms and conditions of the Altera Program License 
-//  Subscription Agreement, Altera MegaCore Function License 
-//  Agreement, or other applicable license agreement, including, 
-//  without limitation, that your use is for the sole purpose of 
-//  programming logic devices manufactured by Altera and sold by 
-//  Altera or its authorized distributors.  Please refer to the 
-//  applicable agreement for further details.
-//
-////////////////////////////////////////////////////////////////////
-
-// synthesis VERILOG_INPUT_VERSION VERILOG_2001
-
-`timescale 1 ps / 1 ps
-
-module altera_onchip_flash_avmm_csr_controller (
-	// To/From System
-	clock,
-	reset_n,
-
-	// To/From Avalon_MM csr slave interface
-	avmm_read,
-	avmm_write,
-	avmm_addr,
-	avmm_writedata,
-	avmm_readdata,
-	
-	// To/From Avalon_MM data slave interface
-	csr_status,
-	csr_control
-);
-
-	parameter AVMM_CSR_DATA_WIDTH = 32;
-
-	localparam [1:0]	ERASE_ST_IDLE = 0,
-						ERASE_ST_PENDING = 1,
-						ERASE_ST_BUSY = 2;
-
-	localparam [1:0]	STATUS_IDLE = 0,
-						STATUS_BUSY_ERASE = 1,
-						STATUS_BUSY_WRITE = 2,
-						STATUS_BUSY_READ = 3;
-
-	// To/From System
-	input clock;
-	input reset_n;
-
-	// To/From Avalon_MM csr slave interface
-	input avmm_read;
-	input avmm_write;
-	input avmm_addr;
-	input [AVMM_CSR_DATA_WIDTH-1:0] avmm_writedata;
-	output [AVMM_CSR_DATA_WIDTH-1:0] avmm_readdata;
-	
-	// To/From Avalon_MM data slave interface
-	input [9:0] csr_status;
-	output [31:0] csr_control;
-	
-	reg [22:0] csr_sector_page_erase_addr_reg;
-	reg [4:0] csr_wp_mode;
-	reg [1:0] csr_erase_state;
-	reg csr_control_access;
-	reg reset_n_reg1;
-	reg reset_n_reg2;
-
-	wire reset_n_w;
-	wire is_idle;
-	wire is_erase_busy;
-	wire valid_csr_erase_addr;
-	wire valid_csr_write;
-	wire [31:0] csr_control_signal;
-	wire [22:0] csr_erase_addr;
-
-	assign is_idle = (csr_status[1:0] == STATUS_IDLE);
-	assign is_erase_busy = (csr_status[1:0] == STATUS_BUSY_ERASE);
-	assign csr_erase_addr = avmm_writedata[22:0];
-	assign valid_csr_erase_addr = (csr_erase_addr != {(23){1'b1}});
-	assign valid_csr_write = (avmm_write & avmm_addr);		
-	assign csr_control_signal = { csr_erase_state, {(2){1'b1}}, csr_wp_mode, csr_sector_page_erase_addr_reg };
-	assign csr_control = csr_control_signal;
-	assign avmm_readdata = (csr_control_access) ? csr_control_signal : { {(22){1'b1}}, csr_status[9:0] };
-
-	// avoid async reset removal issue 
-	assign reset_n_w = reset_n_reg2;
-	
-	// Initiate register value for simulation. The initiate value can't be xx
-	initial begin
-		csr_sector_page_erase_addr_reg <= {(23){1'b1}};
-		csr_wp_mode = {(5){1'b1}};
-		csr_erase_state = ERASE_ST_IDLE;
-		csr_control_access = 1'b0;
-		reset_n_reg1 = 1'b0;
-		reset_n_reg2 = 1'b0;
-	end
-
-	// -------------------------------------------------------------------
-	// Avoid async reset removal issue 
-	// -------------------------------------------------------------------
-	always @ (negedge reset_n or posedge clock) begin
-		if (~reset_n) begin
-			{reset_n_reg2, reset_n_reg1} <= 2'b0;
-		end
-		else begin
-			{reset_n_reg2, reset_n_reg1} <= {reset_n_reg1, 1'b1};
-		end
-	end
-	
-	// -------------------------------------------------------------------
-	// Avalon_MM read/write
-	// -------------------------------------------------------------------		
-	always @ (posedge clock) begin
-		
-		// synchronous reset
-		if (~reset_n_w) begin
-
-			// reset all register
-			csr_sector_page_erase_addr_reg <= {(23){1'b1}};
-			csr_wp_mode <= {(5){1'b1}};
-			csr_erase_state <= ERASE_ST_IDLE;
-			csr_control_access <= 1'b0;
-
-		end
-		else begin
-
-			// store read address
-			if (avmm_read) begin
-				csr_control_access <= avmm_addr;
-			end
-		
-			// write control register
-			if (valid_csr_write) begin
-				csr_wp_mode <= avmm_writedata[27:23];
-				if (is_idle) begin 
-					csr_sector_page_erase_addr_reg <= avmm_writedata[22:0]; 
-				end
-			end
-		
-			// erase control fsm
-			case (csr_erase_state)
-				ERASE_ST_IDLE:
-					if (is_idle && valid_csr_write && valid_csr_erase_addr) begin 
-						csr_erase_state <= ERASE_ST_PENDING;
-					end
-				ERASE_ST_PENDING:
-					if (is_erase_busy) begin 
-						csr_erase_state <= ERASE_ST_BUSY; 
-					end
-				ERASE_ST_BUSY:
-					if (is_idle) begin
-						csr_erase_state <= ERASE_ST_IDLE; 
-					end
-				default: begin
-					csr_erase_state <= ERASE_ST_IDLE;
-				end
-			endcase
-		end
-		
-	end
-
-endmodule
Index: atari_chips/pokeyv2/flash_02/flash/synthesis/submodules/altera_onchip_flash_avmm_data_controller.v
===================================================================
--- atari_chips/pokeyv2/flash_02/flash/synthesis/submodules/altera_onchip_flash_avmm_data_controller.v	(revision 1335)
+++ atari_chips/pokeyv2/flash_02/flash/synthesis/submodules/altera_onchip_flash_avmm_data_controller.v	(nonexistent)
@@ -1,893 +0,0 @@
-// (C) 2001-2019 Intel Corporation. All rights reserved.
-// Your use of Intel Corporation's design tools, logic functions and other 
-// software and tools, and its AMPP partner logic functions, and any output 
-// files from any of the foregoing (including device programming or simulation 
-// files), and any associated documentation or information are expressly subject 
-// to the terms and conditions of the Intel Program License Subscription 
-// Agreement, Intel FPGA IP License Agreement, or other applicable 
-// license agreement, including, without limitation, that your use is for the 
-// sole purpose of programming logic devices manufactured by Intel and sold by 
-// Intel or its authorized distributors.  Please refer to the applicable 
-// agreement for further details.
-
-
-////////////////////////////////////////////////////////////////////
-//
-//  ALTERA_ONCHIP_FLASH_AVMM_DATA_CONTROLLER (PARALLEL-to-SERIAL MODE)
-//
-//  Copyright (C) 1991-2013 Altera Corporation
-//  Your use of Altera Corporation's design tools, logic functions 
-//  and other software and tools, and its AMPP partner logic 
-//  functions, and any output files from any of the foregoing 
-//  (including device programming or simulation files), and any 
-//  associated documentation or information are expressly subject 
-//  to the terms and conditions of the Altera Program License 
-//  Subscription Agreement, Altera MegaCore Function License 
-//  Agreement, or other applicable license agreement, including, 
-//  without limitation, that your use is for the sole purpose of 
-//  programming logic devices manufactured by Altera and sold by 
-//  Altera or its authorized distributors.  Please refer to the 
-//  applicable agreement for further details.
-//
-////////////////////////////////////////////////////////////////////
-
-// synthesis VERILOG_INPUT_VERSION VERILOG_2001
-
-`timescale 1 ps / 1 ps
-
-module altera_onchip_flash_avmm_data_controller (
-    // To/From System
-    clock,
-    reset_n,
-    
-    // To/From Flash IP interface
-    flash_busy,
-    flash_se_pass,
-    flash_sp_pass,
-    flash_osc,
-    flash_drdout,
-    flash_xe_ye,
-    flash_se,
-    flash_arclk,
-    flash_arshft,
-    flash_drclk,
-    flash_drshft,
-    flash_drdin,
-    flash_nprogram,
-    flash_nerase,
-    flash_ardin,
-        
-    // To/From Avalon_MM data slave interface
-    avmm_read,
-    avmm_write,
-    avmm_addr,
-    avmm_writedata,
-    avmm_burstcount,
-    avmm_waitrequest,
-    avmm_readdatavalid,
-    avmm_readdata,
-        
-    // To/From Avalon_MM csr slave interface
-    csr_control,
-    csr_status
-);
-
-    parameter READ_AND_WRITE_MODE = 0;
-    parameter WRAPPING_BURST_MODE = 0;
-    parameter DATA_WIDTH = 32;
-    parameter AVMM_DATA_ADDR_WIDTH = 20;
-    parameter AVMM_DATA_BURSTCOUNT_WIDTH = 4;
-    parameter FLASH_ADDR_WIDTH = 23;
-    parameter FLASH_SEQ_READ_DATA_COUNT = 2;    //number of 32-bit data per sequential read
-    parameter FLASH_READ_CYCLE_MAX_INDEX = 3;    //period to for each sequential read
-    parameter FLASH_ADDR_ALIGNMENT_BITS = 1;     //number of last addr bits for alignment
-    parameter FLASH_RESET_CYCLE_MAX_INDEX = 28;    //period that required by flash before back to idle for erase and program operation
-    parameter FLASH_BUSY_TIMEOUT_CYCLE_MAX_INDEX = 112; //flash busy timeout period (960ns)
-    parameter FLASH_ERASE_TIMEOUT_CYCLE_MAX_INDEX = 40603248; //erase timeout period (350ms)
-    parameter FLASH_WRITE_TIMEOUT_CYCLE_MAX_INDEX = 35382; //write timeout period (305us)
-    parameter MIN_VALID_ADDR = 1;
-    parameter MAX_VALID_ADDR = 1;
-    parameter SECTOR1_START_ADDR = 1;
-    parameter SECTOR1_END_ADDR = 1;
-    parameter SECTOR2_START_ADDR = 1;
-    parameter SECTOR2_END_ADDR = 1;
-    parameter SECTOR3_START_ADDR = 1;
-    parameter SECTOR3_END_ADDR = 1;
-    parameter SECTOR4_START_ADDR = 1;
-    parameter SECTOR4_END_ADDR = 1;
-    parameter SECTOR5_START_ADDR = 1;
-    parameter SECTOR5_END_ADDR = 1;
-    parameter SECTOR_READ_PROTECTION_MODE = 5'b11111;
-    parameter SECTOR1_MAP = 1;
-    parameter SECTOR2_MAP = 1;
-    parameter SECTOR3_MAP = 1;
-    parameter SECTOR4_MAP = 1;
-    parameter SECTOR5_MAP = 1;
-    parameter ADDR_RANGE1_END_ADDR = 1;
-    parameter ADDR_RANGE2_END_ADDR = 1;
-    parameter ADDR_RANGE1_OFFSET = 1;
-    parameter ADDR_RANGE2_OFFSET = 1;
-    parameter ADDR_RANGE3_OFFSET = 1;
-    
-    localparam [1:0]    ERASE_ST_IDLE = 0,
-                        ERASE_ST_PENDING = 1,
-                        ERASE_ST_BUSY = 2;
-
-    localparam [1:0]    STATUS_IDLE = 0,
-                        STATUS_BUSY_ERASE = 1,
-                        STATUS_BUSY_WRITE = 2,
-                        STATUS_BUSY_READ = 3;
-    
-    // State 0~4 is common for both RW and read only mode. State 5~8 is only needed in RW mode.
-    localparam [3:0]    OP_STATE_IDLE = 0,
-                        OP_STATE_ADDR = 1,
-                        OP_STATE_READ_SHIFT = 2,
-                        OP_STATE_READ_DATA = 3,
-                        OP_STATE_CLEAR = 4,
-                        OP_STATE_WRITE = 5,
-                        OP_STATE_WAIT_BUSY = 6,
-                        OP_STATE_WAIT_DONE = 7,
-                        OP_STATE_RESET = 8;
-
-    // To/From System
-    input clock;
-    input reset_n;
-    
-    // To/From Flash IP interface
-    input flash_busy;
-    input flash_se_pass;
-    input flash_sp_pass;
-    input flash_osc;
-    input [DATA_WIDTH-1:0] flash_drdout;
-    output flash_xe_ye;
-    output flash_se;
-    output flash_arclk;
-    output flash_arshft;
-    output flash_drclk;
-    output flash_drshft;
-    output flash_drdin;
-    output flash_nprogram;
-    output flash_nerase;
-    output [FLASH_ADDR_WIDTH-1:0] flash_ardin;
-        
-    // To/From Avalon_MM data slave interface
-    input avmm_read;
-    input avmm_write;
-    input [AVMM_DATA_ADDR_WIDTH-1:0] avmm_addr;
-    input [DATA_WIDTH-1:0] avmm_writedata;
-    input [AVMM_DATA_BURSTCOUNT_WIDTH-1:0] avmm_burstcount;
-    output avmm_waitrequest;
-    output avmm_readdatavalid;
-    output [DATA_WIDTH-1:0] avmm_readdata;
-        
-    // To/From Avalon_MM csr slave interface
-    input [31:0] csr_control;
-    output [9:0] csr_status;
-
-    reg reset_n_reg1;
-    reg reset_n_reg2;
-    reg flash_busy_reg;
-    reg flash_busy_clear_reg;
-    reg flash_addr_neg_reg;
-    reg flash_drdin_neg_reg;
-    reg [DATA_WIDTH-1:0] flash_drdout_neg_reg;
-    reg [AVMM_DATA_BURSTCOUNT_WIDTH-1:0] cur_burstcount;
-    reg [1:0] csr_status_busy;
-    reg csr_status_e_pass;
-    reg csr_status_w_pass;
-    reg csr_status_r_pass;
-
-    reg [3:0] op_state;
-    reg op_wait;
-    reg op_r_wait;
-    reg op_wait_neg_reg;
-    reg op_count_start;
-    reg op_w_count_start;
-    reg [FLASH_ADDR_WIDTH-1:0] op_addr;
-    reg op_wrap_back_addr;
-    reg op_range2_addr;
-    reg op_range3_addr;
-    reg op_illegal_write_addr;
-    reg op_scan_busy;
-    
-    reg arclk_en;
-    reg enable_arclk_neg_reg;
-    reg enable_arclk_neg_pos_reg;
-    reg enable_drclk_neg_reg;
-    reg enable_drclk_neg_pos_reg;
-
-    reg flash_arshft_reg;
-    reg flash_arshft_neg_reg;
-    reg flash_drshft_reg;
-    reg flash_drshft_neg_reg;
-    reg avmm_readdatavalid_reg;
-    reg avmm_readdatavalid_neg_reg;
-
-    wire reset_n_w;
-    wire op_wait_wire;
-    wire flash_ardin_w;
-    wire flash_drdin_w;
-    wire [DATA_WIDTH-1:0] flash_drdout_w;
-    
-    wire [FLASH_ADDR_WIDTH-1:0] csr_page_erase_addr;
-    wire [2:0] csr_sector_erase_addr;
-    wire valid_csr_sector_erase_addr;
-    wire [1:0] csr_erase_state;
-    wire [4:0] csr_write_protection_mode;
-    wire valid_csr_erase;
-    
-    wire [1:0] addr_mux;
-    wire [FLASH_ADDR_WIDTH-1:0] cur_addr;
-    wire [FLASH_ADDR_WIDTH-1:0] flash_addr_wire;
-    wire [FLASH_ADDR_WIDTH-1:0] flash_page_addr_wire;
-    wire [2:0] flash_sector_wire;
-    wire is_valid_write_burst_count;
-    wire is_addr_within_valid_range;
-    wire is_addr_writable;
-    wire is_busy;
-    wire is_busy_erase;
-    wire is_busy_write;
-    wire is_busy_read;
-    wire [4:0] counter_count_wire;
-    wire flash_busy_sync;
-    wire flash_busy_clear_sync;
-
-    generate
-        if (READ_AND_WRITE_MODE == 1) begin
-            assign is_busy = (op_state != OP_STATE_IDLE);
-            assign is_busy_erase = (csr_status_busy == STATUS_BUSY_ERASE);
-            assign is_busy_write = (csr_status_busy == STATUS_BUSY_WRITE);
-            assign is_busy_read = (csr_status_busy == STATUS_BUSY_READ);
-            assign csr_status = { SECTOR_READ_PROTECTION_MODE[4:0], csr_status_e_pass, csr_status_w_pass, csr_status_r_pass, csr_status_busy};
-            assign csr_page_erase_addr = { {(3){1'b0}}, csr_control[19:0] };
-            assign csr_sector_erase_addr = csr_control[22:20];
-            assign csr_erase_state = csr_control[31:30];
-            assign csr_write_protection_mode = csr_control[27:23];
-            assign valid_csr_sector_erase_addr = (csr_sector_erase_addr != {(3){1'b1}});
-            assign valid_csr_erase = (csr_erase_state == ERASE_ST_PENDING);
-
-            assign addr_mux = { valid_csr_erase, valid_csr_sector_erase_addr };
-
-            assign cur_addr = 
-                (addr_mux == 2'b11) ? csr_sector_erase_addr :
-                (addr_mux == 2'b10) ? csr_page_erase_addr   :
-                avmm_addr ;
-
-            assign flash_addr_wire = 
-                (op_wrap_back_addr == 1'b1) ? ADDR_RANGE1_OFFSET[FLASH_ADDR_WIDTH-1:0] :
-                (op_range2_addr == 1'b1) ? ADDR_RANGE1_END_ADDR[FLASH_ADDR_WIDTH-1:0] + {{(FLASH_ADDR_WIDTH-1){1'b0}}, 1'b1} + ADDR_RANGE2_OFFSET[FLASH_ADDR_WIDTH-1:0]:
-                (op_range3_addr == 1'b1) ? ADDR_RANGE2_END_ADDR[FLASH_ADDR_WIDTH-1:0] + {{(FLASH_ADDR_WIDTH-1){1'b0}}, 1'b1} + ADDR_RANGE3_OFFSET[FLASH_ADDR_WIDTH-1:0]:
-                (addr_mux == 2'b11) ? { flash_sector_wire, 1'b0, {(19){1'b1}} } : 
-                flash_page_addr_wire;
-
-            assign flash_drdin = flash_drdin_neg_reg;
-            assign flash_nerase = ~(is_busy_erase && (op_state == OP_STATE_WAIT_BUSY || op_state == OP_STATE_WAIT_DONE));
-            assign flash_nprogram = ~(is_busy_write && (op_state == OP_STATE_WAIT_BUSY || op_state == OP_STATE_WAIT_DONE));
-            assign is_valid_write_burst_count = (avmm_burstcount == 1);
-        end
-        else begin
-            
-            assign is_busy = (op_state != OP_STATE_IDLE);
-            assign is_busy_read = is_busy;
-            assign csr_status = 10'b0000000000;
-            assign cur_addr = avmm_addr;
-            assign flash_addr_wire = 
-                (op_wrap_back_addr == 1'b1) ? ADDR_RANGE1_OFFSET[FLASH_ADDR_WIDTH-1:0] :
-                (op_range2_addr == 1'b1) ? ADDR_RANGE1_END_ADDR[FLASH_ADDR_WIDTH-1:0] + {{(FLASH_ADDR_WIDTH-1){1'b0}}, 1'b1} + ADDR_RANGE2_OFFSET[FLASH_ADDR_WIDTH-1:0]:
-                (op_range3_addr == 1'b1) ? ADDR_RANGE2_END_ADDR[FLASH_ADDR_WIDTH-1:0] + {{(FLASH_ADDR_WIDTH-1){1'b0}}, 1'b1} + ADDR_RANGE3_OFFSET[FLASH_ADDR_WIDTH-1:0]:
-                flash_page_addr_wire;
-            assign flash_drdin = 1'b1;
-            assign flash_nerase = 1'b1;
-            assign flash_nprogram = 1'b1;
-        end
-    endgenerate
-    
-    assign op_wait_wire = (op_wait || op_wait_neg_reg);
-
-    assign avmm_waitrequest = (~reset_n || (((op_state == OP_STATE_IDLE || op_state == OP_STATE_RESET || op_wait_wire) || op_r_wait) && (avmm_write || avmm_read)));
-    assign avmm_readdatavalid = avmm_readdatavalid_neg_reg;
-    assign avmm_readdata = (csr_status_r_pass) ? flash_drdout_neg_reg : 32'hffffffff;
-
-    assign flash_arshft = flash_arshft_neg_reg;
-    assign flash_drshft = flash_drshft_neg_reg;
-    assign flash_arclk = (~enable_arclk_neg_reg || clock || enable_arclk_neg_pos_reg);
-    assign flash_drclk = (~enable_drclk_neg_reg || clock || enable_drclk_neg_pos_reg);
-    assign flash_ardin = { {(FLASH_ADDR_WIDTH-1){1'b1}}, flash_addr_neg_reg};
-    assign flash_xe_ye = 1'b0;
-    assign flash_se = 1'b0;
-        
-    // avoid async reset removal issue 
-    assign reset_n_w = reset_n_reg2;
-
-    // initial register
-    initial begin
-        reset_n_reg1 = 0;
-        reset_n_reg2 = 0;
-        csr_status_busy = STATUS_IDLE;
-        csr_status_e_pass = 0;
-        csr_status_w_pass = 0;
-        csr_status_r_pass = 0;
-        flash_busy_reg = 0;
-        flash_busy_clear_reg = 0;
-        flash_addr_neg_reg = 0;
-        flash_drdin_neg_reg = 0;
-        flash_drdout_neg_reg = 0;
-        flash_arshft_reg = 1;
-        flash_arshft_neg_reg = 1;
-        flash_drshft_reg = 1;
-        flash_drshft_neg_reg = 1;
-        avmm_readdatavalid_reg = 0;
-        avmm_readdatavalid_neg_reg = 0;
-        cur_burstcount = 0;
-        op_state = OP_STATE_IDLE;
-        op_wait = 0;
-        op_r_wait = 0;
-        op_wait_neg_reg = 0;
-        op_count_start = 0;
-        op_w_count_start = 0;
-        op_addr = 0;
-        op_wrap_back_addr = 0;
-        op_range2_addr = 0;
-        op_range3_addr = 0;
-        op_illegal_write_addr = 0;
-        op_scan_busy = 0;
-        arclk_en = 0;
-        enable_arclk_neg_reg = 0;
-        enable_arclk_neg_pos_reg = 0;
-        enable_drclk_neg_reg = 0;
-        enable_drclk_neg_pos_reg = 0;
-    end
-    
-    // -------------------------------------------------------------------
-    // Avoid async reset removal issue 
-    // -------------------------------------------------------------------
-    always @ (negedge reset_n or posedge clock) begin
-        if (~reset_n) begin
-            {reset_n_reg2, reset_n_reg1} <= 2'b0;
-        end
-        else begin
-            {reset_n_reg2, reset_n_reg1} <= {reset_n_reg1, 1'b1};
-        end
-    end
-
-    // -------------------------------------------------------------------
-    // Get rid of the race condition between different dynamic clock. Trigger clock enable in early half cycle.
-    // -------------------------------------------------------------------
-    always @ (negedge clock) begin
-        if (~reset_n_w) begin
-            enable_arclk_neg_reg <= 0;
-            enable_drclk_neg_reg <= 0;
-            flash_addr_neg_reg <= 0;
-            flash_drdin_neg_reg <= 0;
-            flash_arshft_neg_reg <= 1;
-            flash_drshft_neg_reg <= 1;
-            flash_drdout_neg_reg <= 0;
-            avmm_readdatavalid_neg_reg <= 0;
-            op_wait_neg_reg <= 0;
-        end
-        else begin
-            enable_arclk_neg_reg <= arclk_en;
-            enable_drclk_neg_reg <= ((op_state == OP_STATE_WRITE) || (op_state == OP_STATE_READ_SHIFT) || (op_state == OP_STATE_READ_DATA));
-            flash_addr_neg_reg <= flash_ardin_w;
-            flash_drdin_neg_reg <= flash_drdin_w;
-            flash_arshft_neg_reg <= flash_arshft_reg;
-            flash_drshft_neg_reg <= flash_drshft_reg;
-            flash_drdout_neg_reg <= flash_drdout_w;
-            avmm_readdatavalid_neg_reg <= avmm_readdatavalid_reg;
-            op_wait_neg_reg <= op_wait;
-        end
-    end
-
-    // -------------------------------------------------------------------
-    // Avalon_MM data interface fsm - communicate between Avalon_MM and Flash IP
-    // -------------------------------------------------------------------        
-    generate // generate always block based on read and write mode. Write and erase operation is unnecessary in read only mode.
-
-        if (READ_AND_WRITE_MODE == 1) begin
-
-            // -------------------------------------------------------------------
-            // Monitor and store flash busy signal, it may faster then the clock
-            // -------------------------------------------------------------------
-            always @ (negedge reset_n or negedge op_scan_busy  or posedge flash_osc) begin
-                if (~reset_n || ~op_scan_busy) begin
-                    flash_busy_reg <= 0;
-                    flash_busy_clear_reg <= 0;
-                end
-                else if (flash_busy_reg) begin                    
-                    flash_busy_reg <= flash_busy_reg;
-                    flash_busy_clear_reg <= ~flash_busy;
-                end
-                else begin
-                    flash_busy_reg <= flash_busy;
-                    flash_busy_clear_reg <= 0;
-                end
-            end
-
-            altera_std_synchronizer #(
-                .depth (2)
-            ) stdsync_1 ( 
-                .clk(clock), // clock
-                .din(flash_busy_reg), // busy signal
-                .dout(flash_busy_sync), // busy signal which reg to clock
-                .reset_n(reset_n) // active low reset
-            );
-
-            altera_std_synchronizer #(
-                .depth (2)
-            ) stdsync_2 ( 
-                .clk(clock), // clock
-                .din(flash_busy_clear_reg), // busy signal
-                .dout(flash_busy_clear_sync), // busy signal which reg to clock
-                .reset_n(reset_n) // active low reset
-            );
-        
-            // -------------------------------------------------------------------
-            // FSM for write, erase and read operation
-            // -------------------------------------------------------------------        
-        
-            always @ (posedge clock) begin
-                if (~reset_n_w) begin
-                    op_state <= OP_STATE_IDLE;
-                    csr_status_w_pass <= 0;
-                    csr_status_e_pass <= 0;
-                    csr_status_r_pass <= 0;
-                    op_r_wait <= 0;
-                end
-                else begin
-                    case (op_state)
-                        OP_STATE_IDLE: begin
-                            // reset all register
-                            flash_drshft_reg <= 1;
-                            op_count_start <= 1;
-                            op_w_count_start <= 0;
-                            arclk_en <= 0;
-                            enable_arclk_neg_pos_reg <= 0;
-                            enable_drclk_neg_pos_reg <= 0;
-                            op_wait <= 0;
-                            op_addr <= 0;
-                            op_wrap_back_addr <= 0;
-                            op_range2_addr <= 0;
-                            op_scan_busy <= 0;
-                            
-                            // wait command
-                            if (valid_csr_erase) begin
-                                csr_status_busy <= STATUS_BUSY_ERASE;
-                                op_wait <= 1;
-                                if (is_addr_writable) begin
-                                    op_state <= OP_STATE_ADDR;
-                                end
-                                else begin
-                                    op_state <= OP_STATE_RESET;
-                                    csr_status_e_pass <= 0;
-                                end
-                            end
-                            else if (avmm_write) begin
-                                csr_status_busy <= STATUS_BUSY_WRITE;
-                                op_r_wait <= 0;
-                                op_wait <= 1;
-                                if (is_addr_writable && is_valid_write_burst_count) begin
-                                    op_state <= OP_STATE_ADDR;
-                                end
-                                else begin
-                                    op_state <= OP_STATE_RESET;
-                                    csr_status_w_pass <= 0;
-                                end
-                            end
-                            else if (avmm_read) begin
-                                csr_status_busy <= STATUS_BUSY_READ;
-                                op_state <= OP_STATE_ADDR;
-                                op_r_wait <= 0;
-                                op_wait <= 1;
-                                op_addr <= avmm_addr;
-                                cur_burstcount <= avmm_burstcount;
-                                if (is_addr_within_valid_range) begin
-                                    csr_status_r_pass <= 1;
-                                end
-                                else begin
-                                    csr_status_r_pass <= 0;
-                                end
-                            end
-                            else begin
-                                csr_status_busy <= STATUS_IDLE;
-                                op_count_start <= 0;
-                            end
-                        end
-
-                        OP_STATE_ADDR: begin
-                            op_count_start <= 0;
-                            avmm_readdatavalid_reg <= 0;
-                            if (counter_count_wire == (FLASH_ADDR_WIDTH-1)) begin
-                                enable_arclk_neg_pos_reg <= 1;
-                                arclk_en <= 0;
-                                op_count_start <= 1;
-                                case (csr_status_busy)
-                                    STATUS_BUSY_ERASE: begin
-                                        op_count_start <= 1;
-                                        op_scan_busy <= 1;
-                                        op_state <= OP_STATE_WAIT_BUSY;
-                                    end
-                                    STATUS_BUSY_WRITE: begin
-                                        op_w_count_start <= 1;
-                                        op_state <= OP_STATE_WRITE;
-                                    end
-                                    default: begin
-                                        op_wait <= 0;
-                                        flash_drshft_reg <= 0;
-                                        op_state <= OP_STATE_READ_SHIFT;
-                                    end
-                                endcase
-                            end
-                            else begin
-                                arclk_en <= 1;
-                            end
-                        end
-
-                        OP_STATE_WRITE: begin
-                            op_count_start <= 0;
-                            op_w_count_start <= 0;
-                            enable_arclk_neg_pos_reg <= 0;
-                            if (counter_count_wire == (DATA_WIDTH-1)) begin
-                                enable_drclk_neg_pos_reg <= 1;
-                                op_count_start <= 1;
-                                op_wait <= 0;
-                                op_scan_busy <= 1;
-                                op_state <= OP_STATE_WAIT_BUSY;
-                            end
-                        end    
-
-                        OP_STATE_READ_SHIFT: begin
-                            avmm_readdatavalid_reg <= 0;
-                            flash_drshft_reg <= 1;
-                            enable_arclk_neg_pos_reg <= 0;
-                            op_count_start <= 1;
-                            op_r_wait <= 1;
-                            op_state <= OP_STATE_READ_DATA;
-                            
-                            if (cur_burstcount > 1) begin
-                                if (op_addr == MAX_VALID_ADDR) begin
-                                    op_addr <= MIN_VALID_ADDR[FLASH_ADDR_WIDTH-1:0];
-                                    op_wrap_back_addr <= 1;
-                                end
-                                else if (op_addr == ADDR_RANGE1_END_ADDR[FLASH_ADDR_WIDTH-1:0] && ADDR_RANGE2_OFFSET != 0) begin
-                                    op_addr <= op_addr + {{(FLASH_ADDR_WIDTH-1){1'b0}}, 1'b1};
-                                    op_range2_addr <= 1;
-                                end
-                                else if (op_addr == ADDR_RANGE2_END_ADDR[FLASH_ADDR_WIDTH-1:0] && ADDR_RANGE3_OFFSET != 0) begin
-                                    op_addr <= op_addr + {{(FLASH_ADDR_WIDTH-1){1'b0}}, 1'b1};
-                                    op_range3_addr <= 1;
-                                end
-                                else begin
-                                    flash_arshft_reg <= 0;
-                                    arclk_en <= 1;
-                                    op_addr <= op_addr + {{(FLASH_ADDR_WIDTH-1){1'b0}}, 1'b1};
-                                    op_wrap_back_addr <= 0;
-                                    op_range2_addr <= 0;
-                                    op_range3_addr <= 0;
-                                end
-                            end
-                        end
-
-                        OP_STATE_READ_DATA: begin
-                            op_count_start <= 0;
-                            enable_arclk_neg_pos_reg <= 1;
-                            flash_arshft_reg <= 1;
-                            arclk_en <= 0;
-
-                            if (counter_count_wire == 30) begin
-                                avmm_readdatavalid_reg <= 1;
-                                enable_arclk_neg_pos_reg <= 0;
-                                
-                                if (cur_burstcount == 1) begin
-                                    enable_drclk_neg_pos_reg <= 1;
-                                    op_state <= OP_STATE_CLEAR;
-                                end
-                                else if (op_wrap_back_addr || op_range2_addr) begin
-                                    op_count_start <= 1;
-                                    op_state <= OP_STATE_ADDR;
-                                end
-                                else begin
-                                    flash_drshft_reg <= 0;
-                                    op_state <= OP_STATE_READ_SHIFT;
-                                end
-                                
-                                cur_burstcount <= cur_burstcount - {{(AVMM_DATA_BURSTCOUNT_WIDTH-1){1'b0}}, 1'b1};
-                            end
-                        end
-                        
-                        OP_STATE_WAIT_BUSY: begin
-                            op_r_wait <= 1;
-                            op_count_start <= 0;
-                            if (flash_busy_sync) begin
-                                op_count_start <= 1;
-                                op_state <= OP_STATE_WAIT_DONE;
-                            end
-                            else begin
-                                if (counter_count_wire == FLASH_BUSY_TIMEOUT_CYCLE_MAX_INDEX) begin
-                                    op_count_start <= 1;
-                                    op_state <= OP_STATE_RESET;
-                                    if (is_busy_write)
-                                        csr_status_w_pass <= 0;
-                                    else
-                                        csr_status_e_pass <= 0;
-                                end
-                            end
-                        end
-                        
-                        OP_STATE_WAIT_DONE: begin
-                            op_count_start <= 0;
-                            if (flash_busy_clear_sync) begin
-                                op_wait <= 1;
-                                op_count_start <= 1;
-                                op_state <= OP_STATE_RESET;
-                                if (is_busy_write)
-                                    csr_status_w_pass <= flash_sp_pass;
-                                else
-                                    csr_status_e_pass <= flash_se_pass;
-                            end
-                            else begin
-                                if ((is_busy_erase && counter_count_wire == FLASH_ERASE_TIMEOUT_CYCLE_MAX_INDEX) ||
-                                    (is_busy_write && counter_count_wire == FLASH_WRITE_TIMEOUT_CYCLE_MAX_INDEX)) begin
-                                    op_wait <= 1;
-                                    op_count_start <= 1;
-                                    op_state <= OP_STATE_RESET;
-                                    if (is_busy_write)
-                                        csr_status_w_pass <= 0;
-                                    else
-                                        csr_status_e_pass <= 0;
-                                end
-                            end
-                        end
-
-                        OP_STATE_RESET: begin
-                            op_scan_busy <= 0;
-                            op_count_start <= 0;
-                            if (counter_count_wire == FLASH_RESET_CYCLE_MAX_INDEX) begin
-                                op_wait <= 0;
-                                op_state <= OP_STATE_CLEAR;
-                            end
-                        end
-
-                        OP_STATE_CLEAR: begin
-                            avmm_readdatavalid_reg <= 0;
-                            if (~avmm_write && ~avmm_read) begin
-                                op_r_wait <= 0;
-                            end
-                            op_state <= OP_STATE_IDLE;
-                        end
-                        
-                        default: begin
-                            op_state <= OP_STATE_IDLE;
-                        end
-                        
-                    endcase
-                end
-            end
-        end
-        else begin
-        
-            // -------------------------------------------------------------------
-            // FSM for read only operation. It is the simplify version of erase/write/read FSM
-            // -------------------------------------------------------------------                
-        
-            always @ (posedge clock) begin
-                if (~reset_n_w) begin
-                    op_state <= OP_STATE_IDLE;
-                    csr_status_r_pass <= 0;
-                    op_r_wait <= 0;
-                end
-                else begin
-                    case (op_state)
-                        OP_STATE_IDLE: begin
-                            // reset all register
-                            op_count_start <= 1;
-                            arclk_en <= 0;
-                            enable_arclk_neg_pos_reg <= 0;
-                            enable_drclk_neg_pos_reg <= 0;
-                            op_wait <= 0;
-                            op_addr <= 0;
-                            op_wrap_back_addr <= 0;
-                            op_range2_addr <= 0;
-                            cur_burstcount <= 0;
-                            
-                            // wait command
-                            if (avmm_read) begin
-                                op_state <= OP_STATE_ADDR;
-                                op_r_wait <= 0;
-                                op_wait <= 1;
-                                op_addr <= avmm_addr;
-                                cur_burstcount <= avmm_burstcount;
-                                if (is_addr_within_valid_range) begin
-                                    csr_status_r_pass <= 1;
-                                end
-                                else begin
-                                    csr_status_r_pass <= 0;
-                                end
-                            end
-                            else begin
-                                op_count_start <= 0;
-                            end
-                        end
-
-                        OP_STATE_ADDR: begin
-                            op_count_start <= 0;
-                            avmm_readdatavalid_reg <= 0;
-                            if (counter_count_wire == (FLASH_ADDR_WIDTH-1)) begin
-                                flash_drshft_reg <= 0;
-                                enable_arclk_neg_pos_reg <= 1;
-                                arclk_en <= 0;
-                                op_count_start <= 1;
-                                op_wait <= 0;
-                                op_state <= OP_STATE_READ_SHIFT;
-                            end
-                            else begin
-                                arclk_en <= 1;
-                            end
-                        end
-
-                        OP_STATE_READ_SHIFT: begin
-                            avmm_readdatavalid_reg <= 0;
-                            flash_drshft_reg <= 1;
-                            enable_arclk_neg_pos_reg <= 0;
-                            op_count_start <= 1;
-                            op_r_wait <= 1;
-                            op_state <= OP_STATE_READ_DATA;
-                            
-                            if (cur_burstcount > 1) begin
-                                if (op_addr == MAX_VALID_ADDR) begin
-                                    op_addr <= MIN_VALID_ADDR[FLASH_ADDR_WIDTH-1:0];
-                                    op_wrap_back_addr <= 1;
-                                end
-                                else if (op_addr == ADDR_RANGE1_END_ADDR[FLASH_ADDR_WIDTH-1:0] && ADDR_RANGE2_OFFSET != 0) begin
-                                    op_addr <= op_addr + {{(FLASH_ADDR_WIDTH-1){1'b0}}, 1'b1};
-                                    op_range2_addr <= 1;
-                                end
-                                else begin
-                                    flash_arshft_reg <= 0;
-                                    arclk_en <= 1;
-                                    op_addr <= op_addr + {{(FLASH_ADDR_WIDTH-1){1'b0}}, 1'b1};
-                                    op_wrap_back_addr <= 0;
-                                    op_range2_addr <= 0;
-                                end
-                            end
-                        end
-
-                        OP_STATE_READ_DATA: begin
-                            op_count_start <= 0;
-                            enable_arclk_neg_pos_reg <= 1;
-                            flash_arshft_reg <= 1;
-                            arclk_en <= 0;
-
-                            if (counter_count_wire == 30) begin
-                                avmm_readdatavalid_reg <= 1;
-                                enable_arclk_neg_pos_reg <= 0;
-                                
-                                if (cur_burstcount == 1) begin
-                                    enable_drclk_neg_pos_reg <= 1;
-                                    op_state <= OP_STATE_CLEAR;
-                                end
-                                else if (op_wrap_back_addr || op_range2_addr) begin
-                                    op_count_start <= 1;
-                                    op_state <= OP_STATE_ADDR;
-                                end
-                                else begin
-                                    flash_drshft_reg <= 0;
-                                    op_state <= OP_STATE_READ_SHIFT;
-                                end
-                                
-                                cur_burstcount <= cur_burstcount - {{(AVMM_DATA_BURSTCOUNT_WIDTH-1){1'b0}}, 1'b1};
-                            end
-                        end
-
-                        OP_STATE_CLEAR: begin
-                            avmm_readdatavalid_reg <= 0;
-                            if (~avmm_read) begin
-                                op_r_wait <= 0;
-                            end
-                            op_state <= OP_STATE_IDLE;
-                        end
-                        
-                        default: begin
-                            op_state <= OP_STATE_IDLE;
-                        end
-                        
-                    endcase
-                end
-            end
-        end
-        
-    endgenerate
-
-    altera_onchip_flash_address_range_check    # (
-        .MIN_VALID_ADDR(MIN_VALID_ADDR),
-        .MAX_VALID_ADDR(MAX_VALID_ADDR)
-    ) address_range_checker (
-        .address(cur_addr),
-        .is_addr_within_valid_range(is_addr_within_valid_range)
-    );
-
-    altera_onchip_flash_convert_address # (
-        .ADDR_RANGE1_END_ADDR(ADDR_RANGE1_END_ADDR),
-        .ADDR_RANGE2_END_ADDR(ADDR_RANGE2_END_ADDR),
-        .ADDR_RANGE1_OFFSET(ADDR_RANGE1_OFFSET),
-        .ADDR_RANGE2_OFFSET(ADDR_RANGE2_OFFSET),
-        .ADDR_RANGE3_OFFSET(ADDR_RANGE3_OFFSET)
-    ) address_convertor (
-        .address(cur_addr),
-        .flash_addr(flash_page_addr_wire)
-    );
-
-    generate // sector address convertsion is unnecessary in read only mode
-        if (READ_AND_WRITE_MODE == 1) begin    
-            altera_onchip_flash_address_write_protection_check # (
-                .SECTOR1_START_ADDR(SECTOR1_START_ADDR),
-                .SECTOR1_END_ADDR(SECTOR1_END_ADDR),
-                .SECTOR2_START_ADDR(SECTOR2_START_ADDR),
-                .SECTOR2_END_ADDR(SECTOR2_END_ADDR),
-                .SECTOR3_START_ADDR(SECTOR3_START_ADDR),
-                .SECTOR3_END_ADDR(SECTOR3_END_ADDR),
-                .SECTOR4_START_ADDR(SECTOR4_START_ADDR),
-                .SECTOR4_END_ADDR(SECTOR4_END_ADDR),
-                .SECTOR5_START_ADDR(SECTOR5_START_ADDR),
-                .SECTOR5_END_ADDR(SECTOR5_END_ADDR),
-                .SECTOR_READ_PROTECTION_MODE(SECTOR_READ_PROTECTION_MODE)
-            ) address_write_protection_checker (
-                .use_sector_addr(valid_csr_erase && valid_csr_sector_erase_addr),
-                .address(cur_addr),
-                .write_protection_mode(csr_write_protection_mode),
-                .is_addr_writable(is_addr_writable)
-            );
-        
-            altera_onchip_flash_convert_sector # (
-                .SECTOR1_MAP(SECTOR1_MAP),
-                .SECTOR2_MAP(SECTOR2_MAP),
-                .SECTOR3_MAP(SECTOR3_MAP),
-                .SECTOR4_MAP(SECTOR4_MAP),
-                .SECTOR5_MAP(SECTOR5_MAP)
-            ) sector_convertor (
-                .sector(cur_addr[2:0]),
-                .flash_sector(flash_sector_wire)
-            );
-        end
-    endgenerate
-    
-    altera_onchip_flash_counter share_counter (
-        .clock(clock),
-        .reset(op_count_start),
-        .count(counter_count_wire)
-    );
-    
-    // -------------------------------------------------------------------
-    // Instantiate a shift register to send the address to UFM serially (parallel -> serial)
-    // -------------------------------------------------------------------
-    lpm_shiftreg # (
-        .lpm_type ("LPM_SHIFTREG"),
-        .lpm_width (FLASH_ADDR_WIDTH),
-        .lpm_direction ("LEFT")
-    ) ufm_addr_shiftreg (
-        .data(flash_addr_wire),
-        .clock(clock),
-        .enable(op_state == OP_STATE_ADDR),
-        .load(op_count_start),
-        .shiftout(flash_ardin_w),
-        .aclr(~reset_n)
-    );
-
-    // -------------------------------------------------------------------
-    // Instantiate a shift register to send the data to/from UFM (write: parallel -> serial, read: serial -> parallel)
-    // -------------------------------------------------------------------
-    lpm_shiftreg # (
-        .lpm_type ("LPM_SHIFTREG"),
-        .lpm_width (DATA_WIDTH),
-        .lpm_direction ("LEFT")
-    ) ufm_data_shiftreg (
-        .data(avmm_writedata), // write data parallel in
-        .shiftin(flash_drdout[0]), // read data serial in
-        .clock(clock),
-        .enable(op_state == OP_STATE_WRITE || (op_state == OP_STATE_READ_DATA && cur_burstcount > 0)), // during write and read shift
-        .load(op_w_count_start), // 1=load (p2s), 0=shift(s2p)
-        .shiftout(flash_drdin_w), // write data serial out
-        .q(flash_drdout_w), // read data parallel out
-        .aclr(~reset_n)
-    );
-    
-endmodule
Index: atari_chips/pokeyv2/flash_02/flash/synthesis/submodules/altera_onchip_flash_util.v
===================================================================
--- atari_chips/pokeyv2/flash_02/flash/synthesis/submodules/altera_onchip_flash_util.v	(revision 1335)
+++ atari_chips/pokeyv2/flash_02/flash/synthesis/submodules/altera_onchip_flash_util.v	(nonexistent)
@@ -1,270 +0,0 @@
-// (C) 2001-2019 Intel Corporation. All rights reserved.
-// Your use of Intel Corporation's design tools, logic functions and other 
-// software and tools, and its AMPP partner logic functions, and any output 
-// files from any of the foregoing (including device programming or simulation 
-// files), and any associated documentation or information are expressly subject 
-// to the terms and conditions of the Intel Program License Subscription 
-// Agreement, Intel FPGA IP License Agreement, or other applicable 
-// license agreement, including, without limitation, that your use is for the 
-// sole purpose of programming logic devices manufactured by Intel and sold by 
-// Intel or its authorized distributors.  Please refer to the applicable 
-// agreement for further details.
-
-
-////////////////////////////////////////////////////////////////////
-//
-//  ALTERA_ONCHIP_FLASH_UTIL
-//
-//  Copyright (C) 1991-2013 Altera Corporation
-//  Your use of Altera Corporation's design tools, logic functions 
-//  and other software and tools, and its AMPP partner logic 
-//  functions, and any output files from any of the foregoing 
-//  (including device programming or simulation files), and any 
-//  associated documentation or information are expressly subject 
-//  to the terms and conditions of the Altera Program License 
-//  Subscription Agreement, Altera MegaCore Function License 
-//  Agreement, or other applicable license agreement, including, 
-//  without limitation, that your use is for the sole purpose of 
-//  programming logic devices manufactured by Altera and sold by 
-//  Altera or its authorized distributors.  Please refer to the 
-//  applicable agreement for further details.
-//
-////////////////////////////////////////////////////////////////////
-
-// synthesis VERILOG_INPUT_VERSION VERILOG_2001
-
-`timescale 1 ps / 1 ps
-
-module altera_onchip_flash_address_range_check (
-    address,
-    is_addr_within_valid_range
-);
-
-    parameter FLASH_ADDR_WIDTH = 23;
-    parameter MIN_VALID_ADDR = 1;
-    parameter MAX_VALID_ADDR = 1;
-
-    input [FLASH_ADDR_WIDTH-1:0] address;
-    output is_addr_within_valid_range;
-    
-    assign is_addr_within_valid_range = (address >= MIN_VALID_ADDR) && (address <= MAX_VALID_ADDR);
-
-endmodule
-
-
-module altera_onchip_flash_address_write_protection_check (
-    use_sector_addr,
-    address,
-    write_protection_mode,
-    is_addr_writable
-);
-
-    parameter FLASH_ADDR_WIDTH = 23;
-    parameter SECTOR1_START_ADDR = 1;
-    parameter SECTOR1_END_ADDR = 1;
-    parameter SECTOR2_START_ADDR = 1;
-    parameter SECTOR2_END_ADDR = 1;
-    parameter SECTOR3_START_ADDR = 1;
-    parameter SECTOR3_END_ADDR = 1;
-    parameter SECTOR4_START_ADDR = 1;
-    parameter SECTOR4_END_ADDR = 1;
-    parameter SECTOR5_START_ADDR = 1;
-    parameter SECTOR5_END_ADDR = 1;
-    parameter SECTOR_READ_PROTECTION_MODE = 5'b11111;
-
-    input use_sector_addr;
-    input [FLASH_ADDR_WIDTH-1:0] address;
-    input [4:0] write_protection_mode;
-    output is_addr_writable;
-
-    wire is_sector1_addr;
-    wire is_sector2_addr;
-    wire is_sector3_addr;
-    wire is_sector4_addr;
-    wire is_sector5_addr;    
-    wire is_sector1_writable;
-    wire is_sector2_writable;
-    wire is_sector3_writable;
-    wire is_sector4_writable;
-    wire is_sector5_writable;
-    
-    assign is_sector1_addr = (use_sector_addr) ? (address == 1) : ((address >= SECTOR1_START_ADDR) && (address <= SECTOR1_END_ADDR));
-    assign is_sector2_addr = (use_sector_addr) ? (address == 2) : ((address >= SECTOR2_START_ADDR) && (address <= SECTOR2_END_ADDR));
-    assign is_sector3_addr = (use_sector_addr) ? (address == 3) : ((address >= SECTOR3_START_ADDR) && (address <= SECTOR3_END_ADDR));
-    assign is_sector4_addr = (use_sector_addr) ? (address == 4) : ((address >= SECTOR4_START_ADDR) && (address <= SECTOR4_END_ADDR));
-    assign is_sector5_addr = (use_sector_addr) ? (address == 5) : ((address >= SECTOR5_START_ADDR) && (address <= SECTOR5_END_ADDR));
-    assign is_sector1_writable = ~(write_protection_mode[0] || SECTOR_READ_PROTECTION_MODE[0]);
-    assign is_sector2_writable = ~(write_protection_mode[1] || SECTOR_READ_PROTECTION_MODE[1]);
-    assign is_sector3_writable = ~(write_protection_mode[2] || SECTOR_READ_PROTECTION_MODE[2]);
-    assign is_sector4_writable = ~(write_protection_mode[3] || SECTOR_READ_PROTECTION_MODE[3]);
-    assign is_sector5_writable = ~(write_protection_mode[4] || SECTOR_READ_PROTECTION_MODE[4]);
-    assign is_addr_writable = ((is_sector1_writable && is_sector1_addr) ||
-                               (is_sector2_writable && is_sector2_addr) ||
-                               (is_sector3_writable && is_sector3_addr) ||
-                               (is_sector4_writable && is_sector4_addr) ||
-                               (is_sector5_writable && is_sector5_addr));
-
-endmodule
-
-module altera_onchip_flash_s_address_write_protection_check (
-    address,
-    is_sector1_writable,
-    is_sector2_writable,
-    is_sector3_writable,
-    is_sector4_writable,
-    is_sector5_writable,
-    is_addr_writable
-);
-
-    input [2:0] address;
-    input is_sector1_writable;
-    input is_sector2_writable;
-    input is_sector3_writable;
-    input is_sector4_writable;
-    input is_sector5_writable;
-    output is_addr_writable;
-
-    wire is_sector1_addr;
-    wire is_sector2_addr;
-    wire is_sector3_addr;
-    wire is_sector4_addr;
-    wire is_sector5_addr;
-
-    assign is_sector1_addr = (address == 1);
-    assign is_sector2_addr = (address == 2);
-    assign is_sector3_addr = (address == 3);
-    assign is_sector4_addr = (address == 4);
-    assign is_sector5_addr = (address == 5);
-
-    assign is_addr_writable = ((is_sector1_writable && is_sector1_addr) ||
-                               (is_sector2_writable && is_sector2_addr) ||
-                               (is_sector3_writable && is_sector3_addr) ||
-                               (is_sector4_writable && is_sector4_addr) ||
-                               (is_sector5_writable && is_sector5_addr));
-
-endmodule
-
-module altera_onchip_flash_a_address_write_protection_check (
-    address,
-    is_sector1_writable,
-    is_sector2_writable,
-    is_sector3_writable,
-    is_sector4_writable,
-    is_sector5_writable,
-    is_addr_writable
-);
-
-    parameter FLASH_ADDR_WIDTH = 23;
-    parameter SECTOR1_START_ADDR = 1;
-    parameter SECTOR1_END_ADDR = 1;
-    parameter SECTOR2_START_ADDR = 1;
-    parameter SECTOR2_END_ADDR = 1;
-    parameter SECTOR3_START_ADDR = 1;
-    parameter SECTOR3_END_ADDR = 1;
-    parameter SECTOR4_START_ADDR = 1;
-    parameter SECTOR4_END_ADDR = 1;
-    parameter SECTOR5_START_ADDR = 1;
-    parameter SECTOR5_END_ADDR = 1;
-
-    input [FLASH_ADDR_WIDTH-1:0] address;
-    input is_sector1_writable;
-    input is_sector2_writable;
-    input is_sector3_writable;
-    input is_sector4_writable;
-    input is_sector5_writable;
-    output is_addr_writable;
-
-    wire is_sector1_addr;
-    wire is_sector2_addr;
-    wire is_sector3_addr;
-    wire is_sector4_addr;
-    wire is_sector5_addr;
-
-    assign is_sector1_addr = ((address >= SECTOR1_START_ADDR) && (address <= SECTOR1_END_ADDR));
-    assign is_sector2_addr = ((address >= SECTOR2_START_ADDR) && (address <= SECTOR2_END_ADDR));
-    assign is_sector3_addr = ((address >= SECTOR3_START_ADDR) && (address <= SECTOR3_END_ADDR));
-    assign is_sector4_addr = ((address >= SECTOR4_START_ADDR) && (address <= SECTOR4_END_ADDR));
-    assign is_sector5_addr = ((address >= SECTOR5_START_ADDR) && (address <= SECTOR5_END_ADDR));
-
-    assign is_addr_writable = ((is_sector1_writable && is_sector1_addr) ||
-                               (is_sector2_writable && is_sector2_addr) ||
-                               (is_sector3_writable && is_sector3_addr) ||
-                               (is_sector4_writable && is_sector4_addr) ||
-                               (is_sector5_writable && is_sector5_addr));
-
-endmodule
-
-module altera_onchip_flash_convert_address (
-    address,
-    flash_addr
-);
-
-    parameter FLASH_ADDR_WIDTH = 23;
-    parameter ADDR_RANGE1_END_ADDR = 1;
-    parameter ADDR_RANGE2_END_ADDR = 1;
-    parameter ADDR_RANGE1_OFFSET = 1;
-    parameter ADDR_RANGE2_OFFSET = 1;
-    parameter ADDR_RANGE3_OFFSET = 1;
-
-    input [FLASH_ADDR_WIDTH-1:0] address;
-    output [FLASH_ADDR_WIDTH-1:0] flash_addr;
-
-    assign flash_addr = (address <= ADDR_RANGE1_END_ADDR[FLASH_ADDR_WIDTH-1:0]) ? (address + ADDR_RANGE1_OFFSET[FLASH_ADDR_WIDTH-1:0]) : 
-                        (address <= ADDR_RANGE2_END_ADDR[FLASH_ADDR_WIDTH-1:0]) ? (address + ADDR_RANGE2_OFFSET[FLASH_ADDR_WIDTH-1:0]) :
-                        (address + ADDR_RANGE3_OFFSET[FLASH_ADDR_WIDTH-1:0]);
-    
-endmodule
-
-
-module altera_onchip_flash_convert_sector (
-    sector,
-    flash_sector
-);
-
-    parameter SECTOR1_MAP = 1;
-    parameter SECTOR2_MAP = 1;
-    parameter SECTOR3_MAP = 1;
-    parameter SECTOR4_MAP = 1;
-    parameter SECTOR5_MAP = 1;
-
-    input [2:0] sector;
-    output [2:0] flash_sector;
-
-    assign flash_sector = 
-        (sector == 1) ? SECTOR1_MAP[2:0] :
-        (sector == 2) ? SECTOR2_MAP[2:0] :
-        (sector == 3) ? SECTOR3_MAP[2:0] :
-        (sector == 4) ? SECTOR4_MAP[2:0] :
-        (sector == 5) ? SECTOR5_MAP[2:0] :
-        3'd0; // Set to 0 for invalid sector ID
-
-endmodule
-
-
-module altera_onchip_flash_counter (
-    clock,
-    reset,
-    count
-);
-    input clock;
-    input reset;
-    output [4:0] count;
-    
-    reg [4:0] count_reg;
-    
-    assign count = count_reg;
-
-    initial begin
-        count_reg = 0;
-    end
-    
-    always @ (posedge reset or posedge clock) begin
-        if (reset) begin
-            count_reg <= 0;
-        end
-        else begin
-            count_reg <= count_reg + 5'd1;
-        end
-    end
-
-endmodule
Index: atari_chips/pokeyv2/flash_02/flash/synthesis/flash.qip
===================================================================
--- atari_chips/pokeyv2/flash_02/flash/synthesis/flash.qip	(revision 1335)
+++ atari_chips/pokeyv2/flash_02/flash/synthesis/flash.qip	(nonexistent)
@@ -1,93 +0,0 @@
-set_global_assignment -entity "flash" -library "flash" -name IP_TOOL_NAME "Qsys"
-set_global_assignment -entity "flash" -library "flash" -name IP_TOOL_VERSION "19.1"
-set_global_assignment -entity "flash" -library "flash" -name IP_TOOL_ENV "Qsys"
-set_global_assignment -library "flash" -name SOPCINFO_FILE [file join $::quartus(qip_path) "../../flash.sopcinfo"]
-set_global_assignment -entity "flash" -library "flash" -name SLD_INFO "QSYS_NAME flash HAS_SOPCINFO 1 GENERATION_ID 1592469370"
-set_global_assignment -library "flash" -name MISC_FILE [file join $::quartus(qip_path) "../flash.cmp"]
-set_global_assignment -library "flash" -name SLD_FILE [file join $::quartus(qip_path) "flash.debuginfo"]
-set_global_assignment -entity "flash" -library "flash" -name IP_TARGETED_DEVICE_FAMILY "MAX 10"
-set_global_assignment -entity "flash" -library "flash" -name IP_GENERATED_DEVICE_FAMILY "{MAX 10}"
-set_global_assignment -entity "flash" -library "flash" -name IP_QSYS_MODE "STANDALONE"
-set_global_assignment -name SYNTHESIS_ONLY_QIP ON
-set_global_assignment -library "flash" -name MISC_FILE [file join $::quartus(qip_path) "../../flash.qsys"]
-set_global_assignment -entity "flash" -library "flash" -name IP_COMPONENT_NAME "Zmxhc2g="
-set_global_assignment -entity "flash" -library "flash" -name IP_COMPONENT_DISPLAY_NAME "Zmxhc2g="
-set_global_assignment -entity "flash" -library "flash" -name IP_COMPONENT_REPORT_HIERARCHY "On"
-set_global_assignment -entity "flash" -library "flash" -name IP_COMPONENT_INTERNAL "Off"
-set_global_assignment -entity "flash" -library "flash" -name IP_COMPONENT_VERSION "MS4w"
-set_global_assignment -entity "flash" -library "flash" -name IP_COMPONENT_PARAMETER "QVVUT19HRU5FUkFUSU9OX0lE::MTU5MjQ2OTM3MA==::QXV0byBHRU5FUkFUSU9OX0lE"
-set_global_assignment -entity "flash" -library "flash" -name IP_COMPONENT_PARAMETER "QVVUT19ERVZJQ0VfRkFNSUxZ::TUFYIDEw::QXV0byBERVZJQ0VfRkFNSUxZ"
-set_global_assignment -entity "flash" -library "flash" -name IP_COMPONENT_PARAMETER "QVVUT19ERVZJQ0U=::MTBNMDJTQ1UxNjlDOEc=::QXV0byBERVZJQ0U="
-set_global_assignment -entity "flash" -library "flash" -name IP_COMPONENT_PARAMETER "QVVUT19ERVZJQ0VfU1BFRURHUkFERQ==::OA==::QXV0byBERVZJQ0VfU1BFRURHUkFERQ=="
-set_global_assignment -entity "flash" -library "flash" -name IP_COMPONENT_PARAMETER "QVVUT19DTEtfQ0xPQ0tfUkFURQ==::LTE=::QXV0byBDTE9DS19SQVRF"
-set_global_assignment -entity "flash" -library "flash" -name IP_COMPONENT_PARAMETER "QVVUT19DTEtfQ0xPQ0tfRE9NQUlO::LTE=::QXV0byBDTE9DS19ET01BSU4="
-set_global_assignment -entity "flash" -library "flash" -name IP_COMPONENT_PARAMETER "QVVUT19DTEtfUkVTRVRfRE9NQUlO::LTE=::QXV0byBSRVNFVF9ET01BSU4="
-set_instance_assignment -name MESSAGE_DISABLE 332060 -entity altera_onchip_flash
-set_global_assignment -entity "altera_onchip_flash" -library "flash" -name IP_COMPONENT_NAME "YWx0ZXJhX29uY2hpcF9mbGFzaA=="
-set_global_assignment -entity "altera_onchip_flash" -library "flash" -name IP_COMPONENT_DISPLAY_NAME "T24tQ2hpcCBGbGFzaCBJbnRlbCBGUEdBIElQ"
-set_global_assignment -entity "altera_onchip_flash" -library "flash" -name IP_COMPONENT_REPORT_HIERARCHY "Off"
-set_global_assignment -entity "altera_onchip_flash" -library "flash" -name IP_COMPONENT_INTERNAL "Off"
-set_global_assignment -entity "altera_onchip_flash" -library "flash" -name IP_COMPONENT_AUTHOR "QWx0ZXJhIENvcnBvcmF0aW9u"
-set_global_assignment -entity "altera_onchip_flash" -library "flash" -name IP_COMPONENT_VERSION "MTkuMQ=="
-set_global_assignment -entity "altera_onchip_flash" -library "flash" -name IP_COMPONENT_DESCRIPTION "QWx0ZXJhIE9uLUNoaXAgRmxhc2ggTWVnYWZ1bmN0aW9uIHdpdGggQXZhbG9uLU1NIFNsYXZlIEludGVyZmFjZS4="
-set_global_assignment -entity "altera_onchip_flash" -library "flash" -name IP_COMPONENT_PARAMETER "REFUQV9JTlRFUkZBQ0U=::UGFyYWxsZWw=::RGF0YSBpbnRlcmZhY2U="
-set_global_assignment -entity "altera_onchip_flash" -library "flash" -name IP_COMPONENT_PARAMETER "UkVBRF9CVVJTVF9NT0RF::SW5jcmVtZW50aW5n::UmVhZCBidXJzdCBtb2Rl"
-set_global_assignment -entity "altera_onchip_flash" -library "flash" -name IP_COMPONENT_PARAMETER "UkVBRF9CVVJTVF9DT1VOVA==::Mg==::UmVhZCBidXJzdCBjb3VudA=="
-set_global_assignment -entity "altera_onchip_flash" -library "flash" -name IP_COMPONENT_PARAMETER "Q0xPQ0tfRlJFUVVFTkNZ::Ny4yNQ==::Q2xvY2sgZnJlcXVlbmN5"
-set_global_assignment -entity "altera_onchip_flash" -library "flash" -name IP_COMPONENT_PARAMETER "Q09ORklHVVJBVElPTl9NT0RF::U2luZ2xlIFVuY29tcHJlc3NlZCBJbWFnZQ==::Q29uZmlndXJhdGlvbiBNb2Rl"
-set_global_assignment -entity "altera_onchip_flash" -library "flash" -name IP_COMPONENT_PARAMETER "U0VDVE9SX0FDQ0VTU19NT0RF::UmVhZCBhbmQgd3JpdGUsUmVhZCBhbmQgd3JpdGUsUmVhZCBvbmx5LEhpZGRlbixSZWFkIGFuZCB3cml0ZQ==::QWNjZXNzIE1vZGU="
-set_global_assignment -entity "altera_onchip_flash" -library "flash" -name IP_COMPONENT_PARAMETER "aW5pdEZsYXNoQ29udGVudA==::ZmFsc2U=::SW5pdGlhbGl6ZSBmbGFzaCBjb250ZW50"
-set_global_assignment -entity "altera_onchip_flash" -library "flash" -name IP_COMPONENT_PARAMETER "YXV0b0luaXRpYWxpemF0aW9uRmlsZU5hbWU=::Zmxhc2hfb25jaGlwX2ZsYXNoXzA=::YXV0b0luaXRpYWxpemF0aW9uRmlsZU5hbWU="
-set_global_assignment -entity "altera_onchip_flash" -library "flash" -name IP_COMPONENT_PARAMETER "REVWSUNFX0ZBTUlMWQ==::TUFYIDEw::REVWSUNFX0ZBTUlMWQ=="
-set_global_assignment -entity "altera_onchip_flash" -library "flash" -name IP_COMPONENT_PARAMETER "UEFSVF9OQU1F::MTBNMDJTQ1UxNjlDOEc=::UEFSVF9OQU1F"
-set_global_assignment -entity "altera_onchip_flash" -library "flash" -name IP_COMPONENT_PARAMETER "QVVUT19DTE9DS19SQVRF::MA==::QVVUT19DTE9DS19SQVRF"
-set_global_assignment -entity "altera_onchip_flash" -library "flash" -name IP_COMPONENT_PARAMETER "REVWSUNFX0lE::MDI=::REVWSUNFX0lE"
-set_global_assignment -entity "altera_onchip_flash" -library "flash" -name IP_COMPONENT_PARAMETER "U0VDVE9SMV9TVEFSVF9BRERS::MA==::U0VDVE9SMV9TVEFSVF9BRERS"
-set_global_assignment -entity "altera_onchip_flash" -library "flash" -name IP_COMPONENT_PARAMETER "U0VDVE9SMV9FTkRfQUREUg==::MTUzNQ==::U0VDVE9SMV9FTkRfQUREUg=="
-set_global_assignment -entity "altera_onchip_flash" -library "flash" -name IP_COMPONENT_PARAMETER "U0VDVE9SMl9TVEFSVF9BRERS::MTUzNg==::U0VDVE9SMl9TVEFSVF9BRERS"
-set_global_assignment -entity "altera_onchip_flash" -library "flash" -name IP_COMPONENT_PARAMETER "U0VDVE9SMl9FTkRfQUREUg==::MzA3MQ==::U0VDVE9SMl9FTkRfQUREUg=="
-set_global_assignment -entity "altera_onchip_flash" -library "flash" -name IP_COMPONENT_PARAMETER "U0VDVE9SM19TVEFSVF9BRERS::MzA3Mg==::U0VDVE9SM19TVEFSVF9BRERS"
-set_global_assignment -entity "altera_onchip_flash" -library "flash" -name IP_COMPONENT_PARAMETER "U0VDVE9SM19FTkRfQUREUg==::MjA0Nzk=::U0VDVE9SM19FTkRfQUREUg=="
-set_global_assignment -entity "altera_onchip_flash" -library "flash" -name IP_COMPONENT_PARAMETER "TUlOX1ZBTElEX0FERFI=::MA==::TUlOX1ZBTElEX0FERFI="
-set_global_assignment -entity "altera_onchip_flash" -library "flash" -name IP_COMPONENT_PARAMETER "TUFYX1ZBTElEX0FERFI=::MjA0Nzk=::TUFYX1ZBTElEX0FERFI="
-set_global_assignment -entity "altera_onchip_flash" -library "flash" -name IP_COMPONENT_PARAMETER "TUlOX1VGTV9WQUxJRF9BRERS::MA==::TUlOX1VGTV9WQUxJRF9BRERS"
-set_global_assignment -entity "altera_onchip_flash" -library "flash" -name IP_COMPONENT_PARAMETER "TUFYX1VGTV9WQUxJRF9BRERS::MzA3MQ==::TUFYX1VGTV9WQUxJRF9BRERS"
-set_global_assignment -entity "altera_onchip_flash" -library "flash" -name IP_COMPONENT_PARAMETER "U0VDVE9SMV9NQVA=::MQ==::U0VDVE9SMV9NQVA="
-set_global_assignment -entity "altera_onchip_flash" -library "flash" -name IP_COMPONENT_PARAMETER "U0VDVE9SMl9NQVA=::Mg==::U0VDVE9SMl9NQVA="
-set_global_assignment -entity "altera_onchip_flash" -library "flash" -name IP_COMPONENT_PARAMETER "U0VDVE9SM19NQVA=::NQ==::U0VDVE9SM19NQVA="
-set_global_assignment -entity "altera_onchip_flash" -library "flash" -name IP_COMPONENT_PARAMETER "U0VDVE9SNF9NQVA=::MA==::U0VDVE9SNF9NQVA="
-set_global_assignment -entity "altera_onchip_flash" -library "flash" -name IP_COMPONENT_PARAMETER "U0VDVE9SNV9NQVA=::MA==::U0VDVE9SNV9NQVA="
-set_global_assignment -entity "altera_onchip_flash" -library "flash" -name IP_COMPONENT_PARAMETER "QUREUl9SQU5HRTFfRU5EX0FERFI=::MzA3MQ==::QUREUl9SQU5HRTFfRU5EX0FERFI="
-set_global_assignment -entity "altera_onchip_flash" -library "flash" -name IP_COMPONENT_PARAMETER "QUREUl9SQU5HRTJfRU5EX0FERFI=::MjA0Nzk=::QUREUl9SQU5HRTJfRU5EX0FERFI="
-set_global_assignment -entity "altera_onchip_flash" -library "flash" -name IP_COMPONENT_PARAMETER "QUREUl9SQU5HRTFfT0ZGU0VU::NTEy::QUREUl9SQU5HRTFfT0ZGU0VU"
-set_global_assignment -entity "altera_onchip_flash" -library "flash" -name IP_COMPONENT_PARAMETER "QUREUl9SQU5HRTJfT0ZGU0VU::NTEy::QUREUl9SQU5HRTJfT0ZGU0VU"
-set_global_assignment -entity "altera_onchip_flash" -library "flash" -name IP_COMPONENT_PARAMETER "QUREUl9SQU5HRTNfT0ZGU0VU::MA==::QUREUl9SQU5HRTNfT0ZGU0VU"
-set_global_assignment -entity "altera_onchip_flash" -library "flash" -name IP_COMPONENT_PARAMETER "QVZNTV9EQVRBX0FERFJfV0lEVEg=::MTU=::QVZNTV9EQVRBX0FERFJfV0lEVEg="
-set_global_assignment -entity "altera_onchip_flash" -library "flash" -name IP_COMPONENT_PARAMETER "QVZNTV9EQVRBX0RBVEFfV0lEVEg=::MzI=::QVZNTV9EQVRBX0RBVEFfV0lEVEg="
-set_global_assignment -entity "altera_onchip_flash" -library "flash" -name IP_COMPONENT_PARAMETER "QVZNTV9EQVRBX0JVUlNUQ09VTlRfV0lEVEg=::Mg==::QVZNTV9EQVRBX0JVUlNUQ09VTlRfV0lEVEg="
-set_global_assignment -entity "altera_onchip_flash" -library "flash" -name IP_COMPONENT_PARAMETER "U0VDVE9SX1JFQURfUFJPVEVDVElPTl9NT0RF::MjQ=::U0VDVE9SX1JFQURfUFJPVEVDVElPTl9NT0RF"
-set_global_assignment -entity "altera_onchip_flash" -library "flash" -name IP_COMPONENT_PARAMETER "RkxBU0hfU0VRX1JFQURfREFUQV9DT1VOVA==::NA==::RkxBU0hfU0VRX1JFQURfREFUQV9DT1VOVA=="
-set_global_assignment -entity "altera_onchip_flash" -library "flash" -name IP_COMPONENT_PARAMETER "RkxBU0hfQUREUl9BTElHTk1FTlRfQklUUw==::Mg==::RkxBU0hfQUREUl9BTElHTk1FTlRfQklUUw=="
-set_global_assignment -entity "altera_onchip_flash" -library "flash" -name IP_COMPONENT_PARAMETER "RkxBU0hfUkVBRF9DWUNMRV9NQVhfSU5ERVg=::NA==::RkxBU0hfUkVBRF9DWUNMRV9NQVhfSU5ERVg="
-set_global_assignment -entity "altera_onchip_flash" -library "flash" -name IP_COMPONENT_PARAMETER "RkxBU0hfUkVTRVRfQ1lDTEVfTUFYX0lOREVY::MQ==::RkxBU0hfUkVTRVRfQ1lDTEVfTUFYX0lOREVY"
-set_global_assignment -entity "altera_onchip_flash" -library "flash" -name IP_COMPONENT_PARAMETER "RkxBU0hfQlVTWV9USU1FT1VUX0NZQ0xFX01BWF9JTkRFWA==::OA==::RkxBU0hfQlVTWV9USU1FT1VUX0NZQ0xFX01BWF9JTkRFWA=="
-set_global_assignment -entity "altera_onchip_flash" -library "flash" -name IP_COMPONENT_PARAMETER "RkxBU0hfRVJBU0VfVElNRU9VVF9DWUNMRV9NQVhfSU5ERVg=::MjUzNzUwMA==::RkxBU0hfRVJBU0VfVElNRU9VVF9DWUNMRV9NQVhfSU5ERVg="
-set_global_assignment -entity "altera_onchip_flash" -library "flash" -name IP_COMPONENT_PARAMETER "RkxBU0hfV1JJVEVfVElNRU9VVF9DWUNMRV9NQVhfSU5ERVg=::MjIxMQ==::RkxBU0hfV1JJVEVfVElNRU9VVF9DWUNMRV9NQVhfSU5ERVg="
-set_global_assignment -entity "altera_onchip_flash" -library "flash" -name IP_COMPONENT_PARAMETER "UEFSQUxMRUxfTU9ERQ==::ZmFsc2U=::UEFSQUxMRUxfTU9ERQ=="
-set_global_assignment -entity "altera_onchip_flash" -library "flash" -name IP_COMPONENT_PARAMETER "UkVBRF9BTkRfV1JJVEVfTU9ERQ==::dHJ1ZQ==::UkVBRF9BTkRfV1JJVEVfTU9ERQ=="
-set_global_assignment -entity "altera_onchip_flash" -library "flash" -name IP_COMPONENT_PARAMETER "V1JBUFBJTkdfQlVSU1RfTU9ERQ==::ZmFsc2U=::V1JBUFBJTkdfQlVSU1RfTU9ERQ=="
-set_global_assignment -entity "altera_onchip_flash" -library "flash" -name IP_COMPONENT_PARAMETER "SVNfRFVBTF9CT09U::RmFsc2U=::SVNfRFVBTF9CT09U"
-set_global_assignment -entity "altera_onchip_flash" -library "flash" -name IP_COMPONENT_PARAMETER "SVNfRVJBTV9TS0lQ::VHJ1ZQ==::SVNfRVJBTV9TS0lQ"
-set_global_assignment -entity "altera_onchip_flash" -library "flash" -name IP_COMPONENT_PARAMETER "SVNfQ09NUFJFU1NFRF9JTUFHRQ==::RmFsc2U=::SVNfQ09NUFJFU1NFRF9JTUFHRQ=="
-
-set_global_assignment -library "flash" -name VHDL_FILE [file join $::quartus(qip_path) "flash.vhd"]
-set_global_assignment -library "flash" -name VERILOG_FILE [file join $::quartus(qip_path) "submodules/altera_onchip_flash_util.v"]
-set_global_assignment -library "flash" -name VERILOG_FILE [file join $::quartus(qip_path) "submodules/altera_onchip_flash.v"]
-set_global_assignment -library "flash" -name VERILOG_FILE [file join $::quartus(qip_path) "submodules/altera_onchip_flash_avmm_data_controller.v"]
-set_global_assignment -library "flash" -name VERILOG_FILE [file join $::quartus(qip_path) "submodules/altera_onchip_flash_avmm_csr_controller.v"]
-set_global_assignment -library "flash" -name SDC_FILE [file join $::quartus(qip_path) "submodules/altera_onchip_flash.sdc"]
-set_global_assignment -library "flash" -name VERILOG_FILE [file join $::quartus(qip_path) "submodules/rtl/altera_onchip_flash_block.v"]
-
-set_global_assignment -entity "altera_onchip_flash" -library "flash" -name IP_TOOL_NAME "altera_onchip_flash"
-set_global_assignment -entity "altera_onchip_flash" -library "flash" -name IP_TOOL_VERSION "19.1"
-set_global_assignment -entity "altera_onchip_flash" -library "flash" -name IP_TOOL_ENV "Qsys"
Index: atari_chips/pokeyv2/flash_02/flash/flash_inst.vhd
===================================================================
--- atari_chips/pokeyv2/flash_02/flash/flash_inst.vhd	(revision 1335)
+++ atari_chips/pokeyv2/flash_02/flash/flash_inst.vhd	(nonexistent)
@@ -1,39 +0,0 @@
-	component flash is
-		port (
-			clock                   : in  std_logic                     := 'X';             -- clk
-			reset_n                 : in  std_logic                     := 'X';             -- reset_n
-			avmm_data_addr          : in  std_logic_vector(14 downto 0) := (others => 'X'); -- address
-			avmm_data_read          : in  std_logic                     := 'X';             -- read
-			avmm_data_writedata     : in  std_logic_vector(31 downto 0) := (others => 'X'); -- writedata
-			avmm_data_write         : in  std_logic                     := 'X';             -- write
-			avmm_data_readdata      : out std_logic_vector(31 downto 0);                    -- readdata
-			avmm_data_waitrequest   : out std_logic;                                        -- waitrequest
-			avmm_data_readdatavalid : out std_logic;                                        -- readdatavalid
-			avmm_data_burstcount    : in  std_logic_vector(1 downto 0)  := (others => 'X'); -- burstcount
-			avmm_csr_addr           : in  std_logic                     := 'X';             -- address
-			avmm_csr_read           : in  std_logic                     := 'X';             -- read
-			avmm_csr_writedata      : in  std_logic_vector(31 downto 0) := (others => 'X'); -- writedata
-			avmm_csr_write          : in  std_logic                     := 'X';             -- write
-			avmm_csr_readdata       : out std_logic_vector(31 downto 0)                     -- readdata
-		);
-	end component flash;
-
-	u0 : component flash
-		port map (
-			clock                   => CONNECTED_TO_clock,                   --    clk.clk
-			reset_n                 => CONNECTED_TO_reset_n,                 -- nreset.reset_n
-			avmm_data_addr          => CONNECTED_TO_avmm_data_addr,          --   data.address
-			avmm_data_read          => CONNECTED_TO_avmm_data_read,          --       .read
-			avmm_data_writedata     => CONNECTED_TO_avmm_data_writedata,     --       .writedata
-			avmm_data_write         => CONNECTED_TO_avmm_data_write,         --       .write
-			avmm_data_readdata      => CONNECTED_TO_avmm_data_readdata,      --       .readdata
-			avmm_data_waitrequest   => CONNECTED_TO_avmm_data_waitrequest,   --       .waitrequest
-			avmm_data_readdatavalid => CONNECTED_TO_avmm_data_readdatavalid, --       .readdatavalid
-			avmm_data_burstcount    => CONNECTED_TO_avmm_data_burstcount,    --       .burstcount
-			avmm_csr_addr           => CONNECTED_TO_avmm_csr_addr,           --    csr.address
-			avmm_csr_read           => CONNECTED_TO_avmm_csr_read,           --       .read
-			avmm_csr_writedata      => CONNECTED_TO_avmm_csr_writedata,      --       .writedata
-			avmm_csr_write          => CONNECTED_TO_avmm_csr_write,          --       .write
-			avmm_csr_readdata       => CONNECTED_TO_avmm_csr_readdata        --       .readdata
-		);
-
Index: atari_chips/pokeyv2/flash_02/flash/flash.cmp
===================================================================
--- atari_chips/pokeyv2/flash_02/flash/flash.cmp	(revision 1335)
+++ atari_chips/pokeyv2/flash_02/flash/flash.cmp	(nonexistent)
@@ -1,20 +0,0 @@
-	component flash is
-		port (
-			clock                   : in  std_logic                     := 'X';             -- clk
-			avmm_csr_addr           : in  std_logic                     := 'X';             -- address
-			avmm_csr_read           : in  std_logic                     := 'X';             -- read
-			avmm_csr_writedata      : in  std_logic_vector(31 downto 0) := (others => 'X'); -- writedata
-			avmm_csr_write          : in  std_logic                     := 'X';             -- write
-			avmm_csr_readdata       : out std_logic_vector(31 downto 0);                    -- readdata
-			avmm_data_addr          : in  std_logic_vector(14 downto 0) := (others => 'X'); -- address
-			avmm_data_read          : in  std_logic                     := 'X';             -- read
-			avmm_data_writedata     : in  std_logic_vector(31 downto 0) := (others => 'X'); -- writedata
-			avmm_data_write         : in  std_logic                     := 'X';             -- write
-			avmm_data_readdata      : out std_logic_vector(31 downto 0);                    -- readdata
-			avmm_data_waitrequest   : out std_logic;                                        -- waitrequest
-			avmm_data_readdatavalid : out std_logic;                                        -- readdatavalid
-			avmm_data_burstcount    : in  std_logic_vector(1 downto 0)  := (others => 'X'); -- burstcount
-			reset_n                 : in  std_logic                     := 'X'              -- reset_n
-		);
-	end component flash;
-
Index: atari_chips/pokeyv2/flash_02/flash/flash.xml
===================================================================
--- atari_chips/pokeyv2/flash_02/flash/flash.xml	(revision 1335)
+++ atari_chips/pokeyv2/flash_02/flash/flash.xml	(nonexistent)
@@ -1,371 +0,0 @@
-<?xml version="1.0" encoding="UTF-8"?>
-<deploy
- date="2020.06.18.10:36:10"
- outputDirectory="/home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_10M02_stereo_auto/flash/">
- <perimeter>
-  <parameter
-     name="AUTO_GENERATION_ID"
-     type="Integer"
-     defaultValue="0"
-     onHdl="0"
-     affectsHdl="1" />
-  <parameter
-     name="AUTO_UNIQUE_ID"
-     type="String"
-     defaultValue=""
-     onHdl="0"
-     affectsHdl="1" />
-  <parameter
-     name="AUTO_DEVICE_FAMILY"
-     type="String"
-     defaultValue="MAX 10"
-     onHdl="0"
-     affectsHdl="1" />
-  <parameter
-     name="AUTO_DEVICE"
-     type="String"
-     defaultValue="10M02SCU169C8G"
-     onHdl="0"
-     affectsHdl="1" />
-  <parameter
-     name="AUTO_DEVICE_SPEEDGRADE"
-     type="String"
-     defaultValue="8"
-     onHdl="0"
-     affectsHdl="1" />
-  <parameter
-     name="AUTO_CLK_CLOCK_RATE"
-     type="Long"
-     defaultValue="-1"
-     onHdl="0"
-     affectsHdl="1" />
-  <parameter
-     name="AUTO_CLK_CLOCK_DOMAIN"
-     type="Integer"
-     defaultValue="-1"
-     onHdl="0"
-     affectsHdl="1" />
-  <parameter
-     name="AUTO_CLK_RESET_DOMAIN"
-     type="Integer"
-     defaultValue="-1"
-     onHdl="0"
-     affectsHdl="1" />
-  <interface name="clk" kind="clock" start="0">
-   <property name="clockRate" value="0" />
-   <property name="externallyDriven" value="false" />
-   <property name="ptfSchematicName" value="" />
-   <port name="clock" direction="input" role="clk" width="1" />
-  </interface>
-  <interface name="csr" kind="avalon" start="0">
-   <property name="addressAlignment" value="DYNAMIC" />
-   <property name="addressGroup" value="0" />
-   <property name="addressSpan" value="8" />
-   <property name="addressUnits" value="WORDS" />
-   <property name="alwaysBurstMaxBurst" value="false" />
-   <property name="associatedClock" value="clk" />
-   <property name="associatedReset" value="nreset" />
-   <property name="bitsPerSymbol" value="8" />
-   <property name="bridgedAddressOffset" value="0" />
-   <property name="bridgesToMaster" value="" />
-   <property name="burstOnBurstBoundariesOnly" value="false" />
-   <property name="burstcountUnits" value="WORDS" />
-   <property name="constantBurstBehavior" value="false" />
-   <property name="explicitAddressSpan" value="0" />
-   <property name="holdTime" value="0" />
-   <property name="interleaveBursts" value="false" />
-   <property name="isBigEndian" value="false" />
-   <property name="isFlash" value="false" />
-   <property name="isMemoryDevice" value="false" />
-   <property name="isNonVolatileStorage" value="false" />
-   <property name="linewrapBursts" value="false" />
-   <property name="maximumPendingReadTransactions" value="0" />
-   <property name="maximumPendingWriteTransactions" value="0" />
-   <property name="minimumUninterruptedRunLength" value="0" />
-   <property name="printableDevice" value="false" />
-   <property name="readLatency" value="0" />
-   <property name="readWaitStates" value="1" />
-   <property name="readWaitTime" value="1" />
-   <property name="registerIncomingSignals" value="false" />
-   <property name="registerOutgoingSignals" value="false" />
-   <property name="setupTime" value="0" />
-   <property name="timingUnits" value="Cycles" />
-   <property name="transparentBridge" value="false" />
-   <property name="wellBehavedWaitrequest" value="false" />
-   <property name="writeLatency" value="0" />
-   <property name="writeWaitStates" value="0" />
-   <property name="writeWaitTime" value="0" />
-   <port name="avmm_csr_addr" direction="input" role="address" width="1" />
-   <port name="avmm_csr_read" direction="input" role="read" width="1" />
-   <port
-       name="avmm_csr_writedata"
-       direction="input"
-       role="writedata"
-       width="32" />
-   <port name="avmm_csr_write" direction="input" role="write" width="1" />
-   <port
-       name="avmm_csr_readdata"
-       direction="output"
-       role="readdata"
-       width="32" />
-  </interface>
-  <interface name="data" kind="avalon" start="0">
-   <property name="addressAlignment" value="DYNAMIC" />
-   <property name="addressGroup" value="0" />
-   <property name="addressSpan" value="81920" />
-   <property name="addressUnits" value="WORDS" />
-   <property name="alwaysBurstMaxBurst" value="false" />
-   <property name="associatedClock" value="clk" />
-   <property name="associatedReset" value="nreset" />
-   <property name="bitsPerSymbol" value="8" />
-   <property name="bridgedAddressOffset" value="0" />
-   <property name="bridgesToMaster" value="" />
-   <property name="burstOnBurstBoundariesOnly" value="false" />
-   <property name="burstcountUnits" value="WORDS" />
-   <property name="constantBurstBehavior" value="false" />
-   <property name="explicitAddressSpan" value="81920" />
-   <property name="holdTime" value="0" />
-   <property name="interleaveBursts" value="false" />
-   <property name="isBigEndian" value="false" />
-   <property name="isFlash" value="true" />
-   <property name="isMemoryDevice" value="true" />
-   <property name="isNonVolatileStorage" value="true" />
-   <property name="linewrapBursts" value="false" />
-   <property name="maximumPendingReadTransactions" value="1" />
-   <property name="maximumPendingWriteTransactions" value="0" />
-   <property name="minimumUninterruptedRunLength" value="0" />
-   <property name="printableDevice" value="false" />
-   <property name="readLatency" value="0" />
-   <property name="readWaitStates" value="0" />
-   <property name="readWaitTime" value="0" />
-   <property name="registerIncomingSignals" value="false" />
-   <property name="registerOutgoingSignals" value="false" />
-   <property name="setupTime" value="0" />
-   <property name="timingUnits" value="Cycles" />
-   <property name="transparentBridge" value="false" />
-   <property name="wellBehavedWaitrequest" value="false" />
-   <property name="writeLatency" value="0" />
-   <property name="writeWaitStates" value="0" />
-   <property name="writeWaitTime" value="0" />
-   <port name="avmm_data_addr" direction="input" role="address" width="15" />
-   <port name="avmm_data_read" direction="input" role="read" width="1" />
-   <port
-       name="avmm_data_writedata"
-       direction="input"
-       role="writedata"
-       width="32" />
-   <port name="avmm_data_write" direction="input" role="write" width="1" />
-   <port
-       name="avmm_data_readdata"
-       direction="output"
-       role="readdata"
-       width="32" />
-   <port
-       name="avmm_data_waitrequest"
-       direction="output"
-       role="waitrequest"
-       width="1" />
-   <port
-       name="avmm_data_readdatavalid"
-       direction="output"
-       role="readdatavalid"
-       width="1" />
-   <port
-       name="avmm_data_burstcount"
-       direction="input"
-       role="burstcount"
-       width="2" />
-  </interface>
-  <interface name="nreset" kind="reset" start="0">
-   <property name="associatedClock" value="clk" />
-   <property name="synchronousEdges" value="DEASSERT" />
-   <port name="reset_n" direction="input" role="reset_n" width="1" />
-  </interface>
- </perimeter>
- <entity
-   path=""
-   parameterizationKey="flash:1.0:AUTO_CLK_CLOCK_DOMAIN=-1,AUTO_CLK_CLOCK_RATE=-1,AUTO_CLK_RESET_DOMAIN=-1,AUTO_DEVICE=10M02SCU169C8G,AUTO_DEVICE_FAMILY=MAX 10,AUTO_DEVICE_SPEEDGRADE=8,AUTO_GENERATION_ID=1592469370,AUTO_UNIQUE_ID=(altera_onchip_flash:19.1:ADDR_RANGE1_END_ADDR=3071,ADDR_RANGE1_OFFSET=512,ADDR_RANGE2_END_ADDR=20479,ADDR_RANGE2_OFFSET=512,ADDR_RANGE3_OFFSET=0,AUTO_CLOCK_RATE=0,AVMM_DATA_ADDR_WIDTH=15,AVMM_DATA_BURSTCOUNT_WIDTH=2,AVMM_DATA_DATA_WIDTH=32,CLOCK_FREQUENCY=7.25,CONFIGURATION_MODE=Single Uncompressed Image,CONFIGURATION_SCHEME=Internal Configuration,DATA_INTERFACE=Parallel,DEVICE_FAMILY=MAX 10,DEVICE_ID=02,FLASH_ADDR_ALIGNMENT_BITS=2,FLASH_BUSY_TIMEOUT_CYCLE_MAX_INDEX=8,FLASH_ERASE_TIMEOUT_CYCLE_MAX_INDEX=2537500,FLASH_READ_CYCLE_MAX_INDEX=4,FLASH_RESET_CYCLE_MAX_INDEX=1,FLASH_SEQ_READ_DATA_COUNT=4,FLASH_WRITE_TIMEOUT_CYCLE_MAX_INDEX=2211,INIT_FILENAME=,INIT_FILENAME_SIM=,IS_COMPRESSED_IMAGE=False,IS_DUAL_BOOT=False,IS_ERAM_SKIP=True,MAX_UFM_VALID_ADDR=3071,MAX_VALID_ADDR=20479,MIN_UFM_VALID_ADDR=0,MIN_VALID_ADDR=0,PARALLEL_MODE=false,PART_NAME=10M02SCU169C8G,READ_AND_WRITE_MODE=true,READ_BURST_COUNT=2,READ_BURST_MODE=Incrementing,SECTOR1_END_ADDR=1535,SECTOR1_MAP=1,SECTOR1_START_ADDR=0,SECTOR2_END_ADDR=3071,SECTOR2_MAP=2,SECTOR2_START_ADDR=1536,SECTOR3_END_ADDR=20479,SECTOR3_MAP=5,SECTOR3_START_ADDR=3072,SECTOR4_END_ADDR=0,SECTOR4_MAP=0,SECTOR4_START_ADDR=0,SECTOR5_END_ADDR=0,SECTOR5_MAP=0,SECTOR5_START_ADDR=0,SECTOR_ACCESS_MODE=Read and write,Read and write,Read only,Hidden,Read and write,SECTOR_ADDRESS_MAPPING=0x00000 - 0x017ff,0x01800 - 0x02fff,NA,NA,0x03000 - 0x13fff,SECTOR_ID=1,2,NA,NA,3,SECTOR_READ_PROTECTION_MODE=24,SECTOR_STORAGE_TYPE=UFM,UFM,NA,NA,CFM,WRAPPING_BURST_MODE=false,autoInitializationFileName=flash_onchip_flash_0,initFlashContent=false,initializationFileName=altera_onchip_flash.hex,initializationFileNameForSim=altera_onchip_flash.dat,useNonDefaultInitFile=false)"
-   instancePathKey="flash"
-   kind="flash"
-   version="1.0"
-   name="flash">
-  <parameter name="AUTO_CLK_CLOCK_RATE" value="-1" />
-  <parameter name="AUTO_GENERATION_ID" value="1592469370" />
-  <parameter name="AUTO_DEVICE" value="10M02SCU169C8G" />
-  <parameter name="AUTO_DEVICE_FAMILY" value="MAX 10" />
-  <parameter name="AUTO_CLK_RESET_DOMAIN" value="-1" />
-  <parameter name="AUTO_CLK_CLOCK_DOMAIN" value="-1" />
-  <parameter name="AUTO_UNIQUE_ID" value="" />
-  <parameter name="AUTO_DEVICE_SPEEDGRADE" value="8" />
-  <generatedFiles>
-   <file
-       path="/home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_10M02_stereo_auto/flash/synthesis/flash.vhd"
-       type="VHDL" />
-  </generatedFiles>
-  <childGeneratedFiles>
-   <file
-       path="/home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_10M02_stereo_auto/flash/synthesis/submodules/altera_onchip_flash_util.v"
-       type="VERILOG"
-       attributes="" />
-   <file
-       path="/home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_10M02_stereo_auto/flash/synthesis/submodules/altera_onchip_flash.v"
-       type="VERILOG"
-       attributes="" />
-   <file
-       path="/home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_10M02_stereo_auto/flash/synthesis/submodules/altera_onchip_flash_avmm_data_controller.v"
-       type="VERILOG"
-       attributes="" />
-   <file
-       path="/home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_10M02_stereo_auto/flash/synthesis/submodules/altera_onchip_flash_avmm_csr_controller.v"
-       type="VERILOG"
-       attributes="" />
-   <file
-       path="/home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_10M02_stereo_auto/flash/synthesis/submodules/altera_onchip_flash.sdc"
-       type="SDC"
-       attributes="" />
-   <file
-       path="/home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_10M02_stereo_auto/flash/synthesis/submodules/rtl/altera_onchip_flash_block.v"
-       type="VERILOG"
-       attributes="" />
-  </childGeneratedFiles>
-  <sourceFiles>
-   <file
-       path="/home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_10M02_stereo_auto/flash.qsys" />
-  </sourceFiles>
-  <childSourceFiles>
-   <file
-       path="/home/markw/intelFPGA_lite/19.1/ip/altera/altera_onchip_flash/altera_onchip_flash/altera_onchip_flash_hw.tcl" />
-  </childSourceFiles>
-  <messages>
-   <message level="Debug" culprit="flash">queue size: 0 starting:flash "flash"</message>
-   <message level="Progress" culprit="min"></message>
-   <message level="Progress" culprit="max"></message>
-   <message level="Progress" culprit="current"></message>
-   <message level="Debug">Transform: CustomInstructionTransform</message>
-   <message level="Debug">No custom instruction connections, skipping transform </message>
-   <message level="Debug" culprit="merlin_custom_instruction_transform"><![CDATA[After transform: <b>1</b> modules, <b>0</b> connections]]></message>
-   <message level="Debug">Transform: MMTransform</message>
-   <message level="Debug">Transform: InterruptMapperTransform</message>
-   <message level="Debug">Transform: InterruptSyncTransform</message>
-   <message level="Debug">Transform: InterruptFanoutTransform</message>
-   <message level="Debug">Transform: AvalonStreamingTransform</message>
-   <message level="Debug">Transform: ResetAdaptation</message>
-   <message level="Debug" culprit="flash"><![CDATA["<b>flash</b>" reuses <b>altera_onchip_flash</b> "<b>submodules/altera_onchip_flash</b>"]]></message>
-   <message level="Debug" culprit="flash">queue size: 0 starting:altera_onchip_flash "submodules/altera_onchip_flash"</message>
-   <message level="Info" culprit="onchip_flash_0">Generating top-level entity altera_onchip_flash</message>
-   <message level="Info" culprit="onchip_flash_0"><![CDATA["<b>flash</b>" instantiated <b>altera_onchip_flash</b> "<b>onchip_flash_0</b>"]]></message>
-  </messages>
- </entity>
- <entity
-   path="submodules/"
-   parameterizationKey="altera_onchip_flash:19.1:ADDR_RANGE1_END_ADDR=3071,ADDR_RANGE1_OFFSET=512,ADDR_RANGE2_END_ADDR=20479,ADDR_RANGE2_OFFSET=512,ADDR_RANGE3_OFFSET=0,AUTO_CLOCK_RATE=0,AVMM_DATA_ADDR_WIDTH=15,AVMM_DATA_BURSTCOUNT_WIDTH=2,AVMM_DATA_DATA_WIDTH=32,CLOCK_FREQUENCY=7.25,CONFIGURATION_MODE=Single Uncompressed Image,CONFIGURATION_SCHEME=Internal Configuration,DATA_INTERFACE=Parallel,DEVICE_FAMILY=MAX 10,DEVICE_ID=02,FLASH_ADDR_ALIGNMENT_BITS=2,FLASH_BUSY_TIMEOUT_CYCLE_MAX_INDEX=8,FLASH_ERASE_TIMEOUT_CYCLE_MAX_INDEX=2537500,FLASH_READ_CYCLE_MAX_INDEX=4,FLASH_RESET_CYCLE_MAX_INDEX=1,FLASH_SEQ_READ_DATA_COUNT=4,FLASH_WRITE_TIMEOUT_CYCLE_MAX_INDEX=2211,INIT_FILENAME=,INIT_FILENAME_SIM=,IS_COMPRESSED_IMAGE=False,IS_DUAL_BOOT=False,IS_ERAM_SKIP=True,MAX_UFM_VALID_ADDR=3071,MAX_VALID_ADDR=20479,MIN_UFM_VALID_ADDR=0,MIN_VALID_ADDR=0,PARALLEL_MODE=false,PART_NAME=10M02SCU169C8G,READ_AND_WRITE_MODE=true,READ_BURST_COUNT=2,READ_BURST_MODE=Incrementing,SECTOR1_END_ADDR=1535,SECTOR1_MAP=1,SECTOR1_START_ADDR=0,SECTOR2_END_ADDR=3071,SECTOR2_MAP=2,SECTOR2_START_ADDR=1536,SECTOR3_END_ADDR=20479,SECTOR3_MAP=5,SECTOR3_START_ADDR=3072,SECTOR4_END_ADDR=0,SECTOR4_MAP=0,SECTOR4_START_ADDR=0,SECTOR5_END_ADDR=0,SECTOR5_MAP=0,SECTOR5_START_ADDR=0,SECTOR_ACCESS_MODE=Read and write,Read and write,Read only,Hidden,Read and write,SECTOR_ADDRESS_MAPPING=0x00000 - 0x017ff,0x01800 - 0x02fff,NA,NA,0x03000 - 0x13fff,SECTOR_ID=1,2,NA,NA,3,SECTOR_READ_PROTECTION_MODE=24,SECTOR_STORAGE_TYPE=UFM,UFM,NA,NA,CFM,WRAPPING_BURST_MODE=false,autoInitializationFileName=flash_onchip_flash_0,initFlashContent=false,initializationFileName=altera_onchip_flash.hex,initializationFileNameForSim=altera_onchip_flash.dat,useNonDefaultInitFile=false"
-   instancePathKey="flash:.:onchip_flash_0"
-   kind="altera_onchip_flash"
-   version="19.1"
-   name="altera_onchip_flash">
-  <parameter name="SECTOR_READ_PROTECTION_MODE" value="24" />
-  <parameter name="MIN_UFM_VALID_ADDR" value="0" />
-  <parameter name="AVMM_DATA_ADDR_WIDTH" value="15" />
-  <parameter name="SECTOR3_START_ADDR" value="3072" />
-  <parameter name="AUTO_CLOCK_RATE" value="0" />
-  <parameter name="FLASH_ERASE_TIMEOUT_CYCLE_MAX_INDEX" value="2537500" />
-  <parameter name="SECTOR1_END_ADDR" value="1535" />
-  <parameter name="SECTOR4_END_ADDR" value="0" />
-  <parameter name="initializationFileNameForSim" value="altera_onchip_flash.dat" />
-  <parameter name="MAX_VALID_ADDR" value="20479" />
-  <parameter name="DATA_INTERFACE" value="Parallel" />
-  <parameter name="AVMM_DATA_DATA_WIDTH" value="32" />
-  <parameter name="SECTOR1_MAP" value="1" />
-  <parameter name="INIT_FILENAME_SIM" value="" />
-  <parameter name="initializationFileName" value="altera_onchip_flash.hex" />
-  <parameter name="MIN_VALID_ADDR" value="0" />
-  <parameter name="useNonDefaultInitFile" value="false" />
-  <parameter name="SECTOR2_MAP" value="2" />
-  <parameter name="SECTOR3_END_ADDR" value="20479" />
-  <parameter name="CONFIGURATION_SCHEME" value="Internal Configuration" />
-  <parameter name="SECTOR3_MAP" value="5" />
-  <parameter name="DEVICE_ID" value="02" />
-  <parameter name="WRAPPING_BURST_MODE" value="false" />
-  <parameter name="SECTOR5_MAP" value="0" />
-  <parameter name="FLASH_SEQ_READ_DATA_COUNT" value="4" />
-  <parameter name="FLASH_WRITE_TIMEOUT_CYCLE_MAX_INDEX" value="2211" />
-  <parameter name="autoInitializationFileName" value="flash_onchip_flash_0" />
-  <parameter name="DEVICE_FAMILY" value="MAX 10" />
-  <parameter name="ADDR_RANGE3_OFFSET" value="0" />
-  <parameter name="ADDR_RANGE2_OFFSET" value="512" />
-  <parameter name="SECTOR2_END_ADDR" value="3071" />
-  <parameter name="SECTOR4_MAP" value="0" />
-  <parameter name="FLASH_RESET_CYCLE_MAX_INDEX" value="1" />
-  <parameter
-     name="SECTOR_ADDRESS_MAPPING"
-     value="0x00000 - 0x017ff,0x01800 - 0x02fff,NA,NA,0x03000 - 0x13fff" />
-  <parameter name="IS_ERAM_SKIP" value="True" />
-  <parameter name="READ_BURST_MODE" value="Incrementing" />
-  <parameter name="READ_AND_WRITE_MODE" value="true" />
-  <parameter name="FLASH_BUSY_TIMEOUT_CYCLE_MAX_INDEX" value="8" />
-  <parameter name="SECTOR5_START_ADDR" value="0" />
-  <parameter name="PART_NAME" value="10M02SCU169C8G" />
-  <parameter name="ADDR_RANGE1_OFFSET" value="512" />
-  <parameter name="MAX_UFM_VALID_ADDR" value="3071" />
-  <parameter name="INIT_FILENAME" value="" />
-  <parameter name="CONFIGURATION_MODE" value="Single Uncompressed Image" />
-  <parameter name="PARALLEL_MODE" value="false" />
-  <parameter name="SECTOR4_START_ADDR" value="0" />
-  <parameter name="FLASH_ADDR_ALIGNMENT_BITS" value="2" />
-  <parameter
-     name="SECTOR_ACCESS_MODE"
-     value="Read and write,Read and write,Read only,Hidden,Read and write" />
-  <parameter name="initFlashContent" value="false" />
-  <parameter name="SECTOR1_START_ADDR" value="0" />
-  <parameter name="ADDR_RANGE1_END_ADDR" value="3071" />
-  <parameter name="IS_COMPRESSED_IMAGE" value="False" />
-  <parameter name="SECTOR_ID" value="1,2,NA,NA,3" />
-  <parameter name="READ_BURST_COUNT" value="2" />
-  <parameter name="FLASH_READ_CYCLE_MAX_INDEX" value="4" />
-  <parameter name="AVMM_DATA_BURSTCOUNT_WIDTH" value="2" />
-  <parameter name="CLOCK_FREQUENCY" value="7.25" />
-  <parameter name="SECTOR_STORAGE_TYPE" value="UFM,UFM,NA,NA,CFM" />
-  <parameter name="ADDR_RANGE2_END_ADDR" value="20479" />
-  <parameter name="SECTOR5_END_ADDR" value="0" />
-  <parameter name="SECTOR2_START_ADDR" value="1536" />
-  <parameter name="IS_DUAL_BOOT" value="False" />
-  <generatedFiles>
-   <file
-       path="/home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_10M02_stereo_auto/flash/synthesis/submodules/altera_onchip_flash_util.v"
-       type="VERILOG"
-       attributes="" />
-   <file
-       path="/home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_10M02_stereo_auto/flash/synthesis/submodules/altera_onchip_flash.v"
-       type="VERILOG"
-       attributes="" />
-   <file
-       path="/home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_10M02_stereo_auto/flash/synthesis/submodules/altera_onchip_flash_avmm_data_controller.v"
-       type="VERILOG"
-       attributes="" />
-   <file
-       path="/home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_10M02_stereo_auto/flash/synthesis/submodules/altera_onchip_flash_avmm_csr_controller.v"
-       type="VERILOG"
-       attributes="" />
-   <file
-       path="/home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_10M02_stereo_auto/flash/synthesis/submodules/altera_onchip_flash.sdc"
-       type="SDC"
-       attributes="" />
-   <file
-       path="/home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_10M02_stereo_auto/flash/synthesis/submodules/rtl/altera_onchip_flash_block.v"
-       type="VERILOG"
-       attributes="" />
-  </generatedFiles>
-  <childGeneratedFiles/>
-  <sourceFiles>
-   <file
-       path="/home/markw/intelFPGA_lite/19.1/ip/altera/altera_onchip_flash/altera_onchip_flash/altera_onchip_flash_hw.tcl" />
-  </sourceFiles>
-  <childSourceFiles/>
-  <instantiator instantiator="flash" as="onchip_flash_0" />
-  <messages>
-   <message level="Debug" culprit="flash">queue size: 0 starting:altera_onchip_flash "submodules/altera_onchip_flash"</message>
-   <message level="Info" culprit="onchip_flash_0">Generating top-level entity altera_onchip_flash</message>
-   <message level="Info" culprit="onchip_flash_0"><![CDATA["<b>flash</b>" instantiated <b>altera_onchip_flash</b> "<b>onchip_flash_0</b>"]]></message>
-  </messages>
- </entity>
-</deploy>
Index: atari_chips/pokeyv2/flash_02/flash/flash_generation.rpt
===================================================================
--- atari_chips/pokeyv2/flash_02/flash/flash_generation.rpt	(revision 1335)
+++ atari_chips/pokeyv2/flash_02/flash/flash_generation.rpt	(nonexistent)
@@ -1,29 +0,0 @@
-Info: Starting: Create block symbol file (.bsf)
-Info: qsys-generate /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_10M02_stereo_auto/flash.qsys --block-symbol-file --output-directory=/home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_10M02_stereo_auto/flash --family="MAX 10" --part=10M02SCU169C8G
-Progress: Loading build_10M02_stereo_auto/flash.qsys
-Progress: Reading input file
-Progress: Adding onchip_flash_0 [altera_onchip_flash 19.1]
-Progress: Parameterizing module onchip_flash_0
-Progress: Building connections
-Progress: Parameterizing connections
-Progress: Validating
-Progress: Done reading input file
-Info: qsys-generate succeeded.
-Info: Finished: Create block symbol file (.bsf)
-Info: 
-Info: Starting: Create HDL design files for synthesis
-Info: qsys-generate /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_10M02_stereo_auto/flash.qsys --synthesis=VHDL --output-directory=/home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_10M02_stereo_auto/flash/synthesis --family="MAX 10" --part=10M02SCU169C8G
-Progress: Loading build_10M02_stereo_auto/flash.qsys
-Progress: Reading input file
-Progress: Adding onchip_flash_0 [altera_onchip_flash 19.1]
-Progress: Parameterizing module onchip_flash_0
-Progress: Building connections
-Progress: Parameterizing connections
-Progress: Validating
-Progress: Done reading input file
-Info: flash: Generating flash "flash" for QUARTUS_SYNTH
-Info: onchip_flash_0: Generating top-level entity altera_onchip_flash
-Info: onchip_flash_0: "flash" instantiated altera_onchip_flash "onchip_flash_0"
-Info: flash: Done "flash" with 2 modules, 7 files
-Info: qsys-generate succeeded.
-Info: Finished: Create HDL design files for synthesis
