Project

General

Profile

« Previous | Next » 

Revision 1427

Added by markw about 1 year ago

Add other sigmadelta clock

View differences:

sidmaxv1.sdc
-group { \
pll_inst|altpll_component|auto_generated|pll1|clk[0] \
pll_inst|altpll_component|auto_generated|pll1|clk[1] \
}
} \
-group { pll_inst|altpll_component|auto_generated|pll1|clk[2] }
# IOX_RST : OUT STD_LOGIC;
# IOX_INT : IN STD_LOGIC;

Also available in: Unified diff