Index: atari_chips/pokeyv2/int_osc/int_osc.bsf
===================================================================
--- atari_chips/pokeyv2/int_osc/int_osc.bsf	(revision 1427)
+++ atari_chips/pokeyv2/int_osc/int_osc.bsf	(revision 1428)
@@ -4,7 +4,7 @@
 the Block Editor! File corruption is VERY likely to occur.
 */
 /*
-Copyright (C) 2020  Intel Corporation. All rights reserved.
+Copyright (C) 2024  Intel Corporation. All rights reserved.
 Your use of Intel Corporation's design tools, logic functions 
 and other software and tools, and any partner logic 
 functions, and any output files from any of the foregoing 
Index: atari_chips/pokeyv2/int_osc/int_osc.html
===================================================================
--- atari_chips/pokeyv2/int_osc/int_osc.html	(revision 1427)
+++ atari_chips/pokeyv2/int_osc/int_osc.html	(revision 1428)
@@ -67,7 +67,7 @@
   </table>
   <table class="blueBar">
    <tr>
-    <td class="l">2021.01.13.20:13:30</td>
+    <td class="l">2024.08.31.14:17:07</td>
     <td class="r">Datasheet</td>
    </tr>
   </table>
@@ -95,7 +95,7 @@
   <a name="module_int_osc_0"> </a>
   <div>
    <hr/>
-   <h2>int_osc_0</h2>altera_int_osc v20.1
+   <h2>int_osc_0</h2>altera_int_osc v23.1
    <br/>
    <br/>
    <br/>
Index: atari_chips/pokeyv2/int_osc/int_osc.xml
===================================================================
--- atari_chips/pokeyv2/int_osc/int_osc.xml	(revision 1427)
+++ atari_chips/pokeyv2/int_osc/int_osc.xml	(revision 1428)
@@ -1,7 +1,7 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <deploy
- date="2021.01.13.20:13:30"
- outputDirectory="/home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_10M08_fullv2/int_osc/">
+ date="2024.08.31.14:17:07"
+ outputDirectory="/home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_sidmax_10M08_full/int_osc/">
  <perimeter>
   <parameter
      name="AUTO_GENERATION_ID"
@@ -49,12 +49,12 @@
  </perimeter>
  <entity
    path=""
-   parameterizationKey="int_osc:1.0:AUTO_DEVICE=10M08SCU169C8G,AUTO_DEVICE_FAMILY=MAX 10,AUTO_DEVICE_SPEEDGRADE=8,AUTO_GENERATION_ID=1610565210,AUTO_UNIQUE_ID=(altera_int_osc:20.1:CBX_AUTO_BLACKBOX=ALL,CLOCK_FREQUENCY=116,CLOCK_FREQUENCY_1=116,CLOCK_FREQUENCY_2=77,DEVICE_FAMILY=MAX 10,DEVICE_ID=08,INFORMATION=The output frequency for 10M02, 10M04, 10M08, 10M16, and 10M25 devices is 55~116MHz &lt;br&gt;The output frequency for 10M40, and 10M50 devices is 35~77MHz &lt;br&gt;,PART_NAME=10M08SCU169C8G)"
+   parameterizationKey="int_osc:1.0:AUTO_DEVICE=10M08SCU169C8G,AUTO_DEVICE_FAMILY=MAX 10,AUTO_DEVICE_SPEEDGRADE=8,AUTO_GENERATION_ID=1725106627,AUTO_UNIQUE_ID=(altera_int_osc:23.1:CBX_AUTO_BLACKBOX=ALL,CLOCK_FREQUENCY=116,CLOCK_FREQUENCY_1=116,CLOCK_FREQUENCY_2=77,DEVICE_FAMILY=MAX 10,DEVICE_ID=08,INFORMATION=The output frequency for 10M02, 10M04, 10M08, 10M16, and 10M25 devices is 55~116MHz &lt;br&gt;The output frequency for 10M40, and 10M50 devices is 35~77MHz &lt;br&gt;,PART_NAME=10M08SCU169C8G)"
    instancePathKey="int_osc"
    kind="int_osc"
    version="1.0"
    name="int_osc">
-  <parameter name="AUTO_GENERATION_ID" value="1610565210" />
+  <parameter name="AUTO_GENERATION_ID" value="1725106627" />
   <parameter name="AUTO_DEVICE" value="10M08SCU169C8G" />
   <parameter name="AUTO_DEVICE_FAMILY" value="MAX 10" />
   <parameter name="AUTO_UNIQUE_ID" value="" />
@@ -61,26 +61,26 @@
   <parameter name="AUTO_DEVICE_SPEEDGRADE" value="8" />
   <generatedFiles>
    <file
-       path="/home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_10M08_fullv2/int_osc/synthesis/int_osc.vhd"
+       path="/home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_sidmax_10M08_full/int_osc/synthesis/int_osc.vhd"
        type="VHDL" />
   </generatedFiles>
   <childGeneratedFiles>
    <file
-       path="/home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_10M08_fullv2/int_osc/synthesis/submodules/altera_int_osc.v"
+       path="/home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_sidmax_10M08_full/int_osc/synthesis/submodules/altera_int_osc.v"
        type="VERILOG"
        attributes="" />
    <file
-       path="/home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_10M08_fullv2/int_osc/synthesis/submodules/altera_int_osc.sdc"
+       path="/home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_sidmax_10M08_full/int_osc/synthesis/submodules/altera_int_osc.sdc"
        type="SDC"
        attributes="" />
   </childGeneratedFiles>
   <sourceFiles>
    <file
-       path="/home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_10M08_fullv2/int_osc.qsys" />
+       path="/home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_sidmax_10M08_full/int_osc.qsys" />
   </sourceFiles>
   <childSourceFiles>
    <file
-       path="/home/markw/intelFPGA_lite/20.1/ip/altera/altera_int_osc/altera_int_osc_hw.tcl" />
+       path="/home/markw/intelFPGA_lite/23.1std/ip/altera/altera_int_osc/altera_int_osc_hw.tcl" />
   </childSourceFiles>
   <messages>
    <message level="Debug" culprit="int_osc">queue size: 0 starting:int_osc "int_osc"</message>
@@ -104,10 +104,10 @@
  </entity>
  <entity
    path="submodules/"
-   parameterizationKey="altera_int_osc:20.1:CBX_AUTO_BLACKBOX=ALL,CLOCK_FREQUENCY=116,CLOCK_FREQUENCY_1=116,CLOCK_FREQUENCY_2=77,DEVICE_FAMILY=MAX 10,DEVICE_ID=08,INFORMATION=The output frequency for 10M02, 10M04, 10M08, 10M16, and 10M25 devices is 55~116MHz &lt;br&gt;The output frequency for 10M40, and 10M50 devices is 35~77MHz &lt;br&gt;,PART_NAME=10M08SCU169C8G"
+   parameterizationKey="altera_int_osc:23.1:CBX_AUTO_BLACKBOX=ALL,CLOCK_FREQUENCY=116,CLOCK_FREQUENCY_1=116,CLOCK_FREQUENCY_2=77,DEVICE_FAMILY=MAX 10,DEVICE_ID=08,INFORMATION=The output frequency for 10M02, 10M04, 10M08, 10M16, and 10M25 devices is 55~116MHz &lt;br&gt;The output frequency for 10M40, and 10M50 devices is 35~77MHz &lt;br&gt;,PART_NAME=10M08SCU169C8G"
    instancePathKey="int_osc:.:int_osc_0"
    kind="altera_int_osc"
-   version="20.1"
+   version="23.1"
    name="altera_int_osc">
   <parameter name="CLOCK_FREQUENCY_2" value="77" />
   <parameter name="CLOCK_FREQUENCY_1" value="116" />
@@ -121,11 +121,11 @@
   <parameter name="DEVICE_ID" value="08" />
   <generatedFiles>
    <file
-       path="/home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_10M08_fullv2/int_osc/synthesis/submodules/altera_int_osc.v"
+       path="/home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_sidmax_10M08_full/int_osc/synthesis/submodules/altera_int_osc.v"
        type="VERILOG"
        attributes="" />
    <file
-       path="/home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_10M08_fullv2/int_osc/synthesis/submodules/altera_int_osc.sdc"
+       path="/home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_sidmax_10M08_full/int_osc/synthesis/submodules/altera_int_osc.sdc"
        type="SDC"
        attributes="" />
   </generatedFiles>
@@ -132,7 +132,7 @@
   <childGeneratedFiles/>
   <sourceFiles>
    <file
-       path="/home/markw/intelFPGA_lite/20.1/ip/altera/altera_int_osc/altera_int_osc_hw.tcl" />
+       path="/home/markw/intelFPGA_lite/23.1std/ip/altera/altera_int_osc/altera_int_osc_hw.tcl" />
   </sourceFiles>
   <childSourceFiles/>
   <instantiator instantiator="int_osc" as="int_osc_0" />
Index: atari_chips/pokeyv2/int_osc/int_osc_generation.rpt
===================================================================
--- atari_chips/pokeyv2/int_osc/int_osc_generation.rpt	(revision 1427)
+++ atari_chips/pokeyv2/int_osc/int_osc_generation.rpt	(revision 1428)
@@ -1,8 +1,8 @@
 Info: Starting: Create simulation model
-Info: qsys-generate /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_10M08_fullv2/int_osc.qsys --simulation=VHDL --allow-mixed-language-simulation --output-directory=/home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_10M08_fullv2/int_osc/simulation --family="MAX 10" --part=10M08SCU169C8G
-Progress: Loading build_10M08_fullv2/int_osc.qsys
+Info: qsys-generate /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_sidmax_10M08_full/int_osc.qsys --simulation=VHDL --allow-mixed-language-simulation --output-directory=/home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_sidmax_10M08_full/int_osc/simulation --family="MAX 10" --part=10M08SCU169C8G
+Progress: Loading build_sidmax_10M08_full/int_osc.qsys
 Progress: Reading input file
-Progress: Adding int_osc_0 [altera_int_osc 20.1]
+Progress: Adding int_osc_0 [altera_int_osc 23.1]
 Progress: Parameterizing module int_osc_0
 Progress: Building connections
 Progress: Parameterizing connections
@@ -15,29 +15,29 @@
 Info: qsys-generate succeeded.
 Info: Finished: Create simulation model
 Info: Starting: Create Modelsim Project.
-Info: sim-script-gen --spd=/home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_10M08_fullv2/int_osc/int_osc.spd --output-directory=/home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_10M08_fullv2/int_osc/simulation/ --use-relative-paths=true
-Info: Doing: ip-make-simscript --spd=/home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_10M08_fullv2/int_osc/int_osc.spd --output-directory=/home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_10M08_fullv2/int_osc/simulation/ --use-relative-paths=true
-Info: Generating the following file(s) for MODELSIM simulator in /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_10M08_fullv2/int_osc/simulation/ directory:
-Info: 	mentor/msim_setup.tcl
-Info: Skipping VCS script generation since VHDL file $QUARTUS_INSTALL_DIR/eda/sim_lib/altera_syn_attributes.vhd is required for simulation
-Info: Generating the following file(s) for VCSMX simulator in /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_10M08_fullv2/int_osc/simulation/ directory:
+Info: sim-script-gen --spd=/home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_sidmax_10M08_full/int_osc/int_osc.spd --output-directory=/home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_sidmax_10M08_full/int_osc/simulation/ --use-relative-paths=true
+Info: Doing: ip-make-simscript --spd=/home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_sidmax_10M08_full/int_osc/int_osc.spd --output-directory=/home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_sidmax_10M08_full/int_osc/simulation/ --use-relative-paths=true
+Info: Generating the following file(s) for XCELIUM simulator in /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_sidmax_10M08_full/int_osc/simulation/ directory:
+Info: 	xcelium/cds.lib
+Info: 	xcelium/hdl.var
+Info: 	xcelium/xcelium_setup.sh
+Info: 	1 .cds.lib files in xcelium/cds_libs/ directory
+Info: Generating the following file(s) for VCSMX simulator in /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_sidmax_10M08_full/int_osc/simulation/ directory:
 Info: 	synopsys/vcsmx/synopsys_sim.setup
 Info: 	synopsys/vcsmx/vcsmx_setup.sh
-Info: Generating the following file(s) for NCSIM simulator in /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_10M08_fullv2/int_osc/simulation/ directory:
-Info: 	cadence/cds.lib
-Info: 	cadence/hdl.var
-Info: 	cadence/ncsim_setup.sh
-Info: 	1 .cds.lib files in cadence/cds_libs/ directory
-Info: Generating the following file(s) for RIVIERA simulator in /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_10M08_fullv2/int_osc/simulation/ directory:
+Info: Generating the following file(s) for RIVIERA simulator in /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_sidmax_10M08_full/int_osc/simulation/ directory:
 Info: 	aldec/rivierapro_setup.tcl
-Info: For information on how to simulate your IP, see the explanatory comments in the simulator-specific subdirectories under /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_10M08_fullv2/int_osc/simulation/.
+Info: Skipping VCS script generation since VHDL file $QUARTUS_INSTALL_DIR/eda/sim_lib/altera_syn_attributes.vhd is required for simulation
+Info: Generating the following file(s) for MODELSIM simulator in /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_sidmax_10M08_full/int_osc/simulation/ directory:
+Info: 	mentor/msim_setup.tcl
+Info: For information on how to simulate your IP, see the explanatory comments in the simulator-specific subdirectories under /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_sidmax_10M08_full/int_osc/simulation/.
 Info: Regenerate these scripts whenever you make any change to any Quartus-generated IP in your project.
 Info: Finished: Create Modelsim Project.
 Info: Starting: Create block symbol file (.bsf)
-Info: qsys-generate /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_10M08_fullv2/int_osc.qsys --block-symbol-file --output-directory=/home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_10M08_fullv2/int_osc --family="MAX 10" --part=10M08SCU169C8G
-Progress: Loading build_10M08_fullv2/int_osc.qsys
+Info: qsys-generate /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_sidmax_10M08_full/int_osc.qsys --block-symbol-file --output-directory=/home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_sidmax_10M08_full/int_osc --family="MAX 10" --part=10M08SCU169C8G
+Progress: Loading build_sidmax_10M08_full/int_osc.qsys
 Progress: Reading input file
-Progress: Adding int_osc_0 [altera_int_osc 20.1]
+Progress: Adding int_osc_0 [altera_int_osc 23.1]
 Progress: Parameterizing module int_osc_0
 Progress: Building connections
 Progress: Parameterizing connections
@@ -47,10 +47,10 @@
 Info: Finished: Create block symbol file (.bsf)
 Info: 
 Info: Starting: Create HDL design files for synthesis
-Info: qsys-generate /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_10M08_fullv2/int_osc.qsys --synthesis=VHDL --output-directory=/home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_10M08_fullv2/int_osc/synthesis --family="MAX 10" --part=10M08SCU169C8G
-Progress: Loading build_10M08_fullv2/int_osc.qsys
+Info: qsys-generate /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_sidmax_10M08_full/int_osc.qsys --synthesis=VHDL --output-directory=/home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_sidmax_10M08_full/int_osc/synthesis --family="MAX 10" --part=10M08SCU169C8G
+Progress: Loading build_sidmax_10M08_full/int_osc.qsys
 Progress: Reading input file
-Progress: Adding int_osc_0 [altera_int_osc 20.1]
+Progress: Adding int_osc_0 [altera_int_osc 23.1]
 Progress: Parameterizing module int_osc_0
 Progress: Building connections
 Progress: Parameterizing connections
Index: atari_chips/pokeyv2/int_osc/synthesis/int_osc.debuginfo
===================================================================
--- atari_chips/pokeyv2/int_osc/synthesis/int_osc.debuginfo	(revision 1427)
+++ atari_chips/pokeyv2/int_osc/synthesis/int_osc.debuginfo	(revision 1428)
@@ -1,7 +1,7 @@
 <?xml version="1.0" encoding="UTF-8"?>
-<EnsembleReport name="int_osc" kind="system" version="20.1" fabric="QSYS">
- <!-- Format version 20.1 720 (Future versions may contain additional information.) -->
- <!-- 2021.01.13.20:13:30 -->
+<EnsembleReport name="int_osc" kind="system" version="23.1" fabric="QSYS">
+ <!-- Format version 23.1 993 (Future versions may contain additional information.) -->
+ <!-- 2024.08.31.14:17:07 -->
  <!-- A collection of modules and connections -->
  <parameter name="clockCrossingAdapter">
   <type>com.altera.sopcmodel.ensemble.EClockAdapter</type>
@@ -53,7 +53,7 @@
  </parameter>
  <parameter name="generationId">
   <type>int</type>
-  <value>1610565210</value>
+  <value>1725106627</value>
   <derived>false</derived>
   <enabled>true</enabled>
   <visible>true</visible>
@@ -150,7 +150,7 @@
  <module
    name="int_osc_0"
    kind="altera_int_osc"
-   version="20.1"
+   version="23.1"
    path="int_osc_0">
   <!-- Describes a single module. Module parameters are
 the requested settings for a module instance. -->
@@ -236,7 +236,7 @@
    <visible>true</visible>
    <valid>true</valid>
   </parameter>
-  <interface name="oscena" kind="conduit_end" version="20.1">
+  <interface name="oscena" kind="conduit_end" version="23.1">
    <!-- The connection points exposed by a module instance for the
 particular module parameters. Connection points and their
 parameters are a RESULT of the module parameters. -->
@@ -285,7 +285,7 @@
     <role>oscena</role>
    </port>
   </interface>
-  <interface name="clkout" kind="clock_source" version="20.1">
+  <interface name="clkout" kind="clock_source" version="23.1">
    <!-- The connection points exposed by a module instance for the
 particular module parameters. Connection points and their
 parameters are a RESULT of the module parameters. -->
@@ -365,7 +365,7 @@
   <type>com.altera.entityinterfaces.IElementClass</type>
   <subtype>com.altera.entityinterfaces.IModule</subtype>
   <displayName>Internal Oscillator</displayName>
-  <version>20.1</version>
+  <version>23.1</version>
  </plugin>
  <plugin>
   <instanceCount>1</instanceCount>
@@ -373,7 +373,7 @@
   <type>com.altera.entityinterfaces.IElementClass</type>
   <subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>
   <displayName>Conduit</displayName>
-  <version>20.1</version>
+  <version>23.1</version>
  </plugin>
  <plugin>
   <instanceCount>1</instanceCount>
@@ -381,8 +381,8 @@
   <type>com.altera.entityinterfaces.IElementClass</type>
   <subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>
   <displayName>Clock Output</displayName>
-  <version>20.1</version>
+  <version>23.1</version>
  </plugin>
- <reportVersion>20.1 720</reportVersion>
- <uniqueIdentifier>F44D30F4F5CE00000176FD2AD272</uniqueIdentifier>
+ <reportVersion>23.1 993</reportVersion>
+ <uniqueIdentifier>02424E4C123F00000191A85E239F</uniqueIdentifier>
 </EnsembleReport>
Index: atari_chips/pokeyv2/int_osc/synthesis/int_osc.qip
===================================================================
--- atari_chips/pokeyv2/int_osc/synthesis/int_osc.qip	(revision 1427)
+++ atari_chips/pokeyv2/int_osc/synthesis/int_osc.qip	(revision 1428)
@@ -1,8 +1,8 @@
 set_global_assignment -entity "int_osc" -library "int_osc" -name IP_TOOL_NAME "Qsys"
-set_global_assignment -entity "int_osc" -library "int_osc" -name IP_TOOL_VERSION "20.1"
+set_global_assignment -entity "int_osc" -library "int_osc" -name IP_TOOL_VERSION "23.1"
 set_global_assignment -entity "int_osc" -library "int_osc" -name IP_TOOL_ENV "Qsys"
 set_global_assignment -library "int_osc" -name SOPCINFO_FILE [file join $::quartus(qip_path) "../../int_osc.sopcinfo"]
-set_global_assignment -entity "int_osc" -library "int_osc" -name SLD_INFO "QSYS_NAME int_osc HAS_SOPCINFO 1 GENERATION_ID 1610565210"
+set_global_assignment -entity "int_osc" -library "int_osc" -name SLD_INFO "QSYS_NAME int_osc HAS_SOPCINFO 1 GENERATION_ID 1725106627"
 set_global_assignment -library "int_osc" -name MISC_FILE [file join $::quartus(qip_path) "../int_osc.cmp"]
 set_global_assignment -library "int_osc" -name SLD_FILE [file join $::quartus(qip_path) "int_osc.debuginfo"]
 set_global_assignment -entity "int_osc" -library "int_osc" -name IP_TARGETED_DEVICE_FAMILY "MAX 10"
@@ -15,7 +15,7 @@
 set_global_assignment -entity "int_osc" -library "int_osc" -name IP_COMPONENT_REPORT_HIERARCHY "On"
 set_global_assignment -entity "int_osc" -library "int_osc" -name IP_COMPONENT_INTERNAL "Off"
 set_global_assignment -entity "int_osc" -library "int_osc" -name IP_COMPONENT_VERSION "MS4w"
-set_global_assignment -entity "int_osc" -library "int_osc" -name IP_COMPONENT_PARAMETER "QVVUT19HRU5FUkFUSU9OX0lE::MTYxMDU2NTIxMA==::QXV0byBHRU5FUkFUSU9OX0lE"
+set_global_assignment -entity "int_osc" -library "int_osc" -name IP_COMPONENT_PARAMETER "QVVUT19HRU5FUkFUSU9OX0lE::MTcyNTEwNjYyNw==::QXV0byBHRU5FUkFUSU9OX0lE"
 set_global_assignment -entity "int_osc" -library "int_osc" -name IP_COMPONENT_PARAMETER "QVVUT19ERVZJQ0VfRkFNSUxZ::TUFYIDEw::QXV0byBERVZJQ0VfRkFNSUxZ"
 set_global_assignment -entity "int_osc" -library "int_osc" -name IP_COMPONENT_PARAMETER "QVVUT19ERVZJQ0U=::MTBNMDhTQ1UxNjlDOEc=::QXV0byBERVZJQ0U="
 set_global_assignment -entity "int_osc" -library "int_osc" -name IP_COMPONENT_PARAMETER "QVVUT19ERVZJQ0VfU1BFRURHUkFERQ==::OA==::QXV0byBERVZJQ0VfU1BFRURHUkFERQ=="
@@ -24,7 +24,7 @@
 set_global_assignment -entity "altera_int_osc" -library "int_osc" -name IP_COMPONENT_REPORT_HIERARCHY "Off"
 set_global_assignment -entity "altera_int_osc" -library "int_osc" -name IP_COMPONENT_INTERNAL "Off"
 set_global_assignment -entity "altera_int_osc" -library "int_osc" -name IP_COMPONENT_AUTHOR "QWx0ZXJhIENvcnBvcmF0aW9u"
-set_global_assignment -entity "altera_int_osc" -library "int_osc" -name IP_COMPONENT_VERSION "MjAuMQ=="
+set_global_assignment -entity "altera_int_osc" -library "int_osc" -name IP_COMPONENT_VERSION "MjMuMQ=="
 set_global_assignment -entity "altera_int_osc" -library "int_osc" -name IP_COMPONENT_DESCRIPTION "SW50ZXJuYWwgT3NjaWxsYXRvciBwcm92aWRlcyBpbnRlcm5hbCBjbG9jayBzb3VyY2UgZm9yIGRlYnVnZ2luZyBwdXJwb3NlLg=="
 set_global_assignment -entity "altera_int_osc" -library "int_osc" -name IP_COMPONENT_PARAMETER "SU5GT1JNQVRJT04=::VGhlIG91dHB1dCBmcmVxdWVuY3kgZm9yIDEwTTAyLCAxME0wNCwgMTBNMDgsIDEwTTE2LCBhbmQgMTBNMjUgZGV2aWNlcyBpcyA1NX4xMTZNSHogPGJyPlRoZSBvdXRwdXQgZnJlcXVlbmN5IGZvciAxME00MCwgYW5kIDEwTTUwIGRldmljZXMgaXMgMzV+NzdNSHogPGJyPg==::SU5GT1JNQVRJT04="
 set_global_assignment -entity "altera_int_osc" -library "int_osc" -name IP_COMPONENT_PARAMETER "REVWSUNFX0ZBTUlMWQ==::TUFYIDEw::RGV2aWNlIGZhbWlseQ=="
@@ -39,5 +39,5 @@
 set_global_assignment -library "int_osc" -name SDC_FILE [file join $::quartus(qip_path) "submodules/altera_int_osc.sdc"]
 
 set_global_assignment -entity "altera_int_osc" -library "int_osc" -name IP_TOOL_NAME "altera_int_osc"
-set_global_assignment -entity "altera_int_osc" -library "int_osc" -name IP_TOOL_VERSION "20.1"
+set_global_assignment -entity "altera_int_osc" -library "int_osc" -name IP_TOOL_VERSION "23.1"
 set_global_assignment -entity "altera_int_osc" -library "int_osc" -name IP_TOOL_ENV "Qsys"
Index: atari_chips/pokeyv2/int_osc/synthesis/int_osc.vhd
===================================================================
--- atari_chips/pokeyv2/int_osc/synthesis/int_osc.vhd	(revision 1427)
+++ atari_chips/pokeyv2/int_osc/synthesis/int_osc.vhd	(revision 1428)
@@ -1,6 +1,6 @@
 -- int_osc.vhd
 
--- Generated using ACDS version 20.1 720
+-- Generated using ACDS version 23.1 993
 
 library IEEE;
 use IEEE.std_logic_1164.all;
Index: atari_chips/pokeyv2/int_osc/synthesis/submodules/altera_int_osc.sdc
===================================================================
--- atari_chips/pokeyv2/int_osc/synthesis/submodules/altera_int_osc.sdc	(revision 1427)
+++ atari_chips/pokeyv2/int_osc/synthesis/submodules/altera_int_osc.sdc	(revision 1428)
@@ -1,4 +1,4 @@
-# (C) 2001-2020 Intel Corporation. All rights reserved.
+# (C) 2001-2024 Intel Corporation. All rights reserved.
 # Your use of Intel Corporation's design tools, logic functions and other 
 # software and tools, and its AMPP partner logic functions, and any output 
 # files from any of the foregoing (including device programming or simulation 
Index: atari_chips/pokeyv2/int_osc/synthesis/submodules/altera_int_osc.v
===================================================================
--- atari_chips/pokeyv2/int_osc/synthesis/submodules/altera_int_osc.v	(revision 1427)
+++ atari_chips/pokeyv2/int_osc/synthesis/submodules/altera_int_osc.v	(revision 1428)
@@ -1,4 +1,4 @@
-// (C) 2001-2020 Intel Corporation. All rights reserved.
+// (C) 2001-2024 Intel Corporation. All rights reserved.
 // Your use of Intel Corporation's design tools, logic functions and other 
 // software and tools, and its AMPP partner logic functions, and any output 
 // files from any of the foregoing (including device programming or simulation 
Index: atari_chips/pokeyv2/int_osc.qsys
===================================================================
--- atari_chips/pokeyv2/int_osc.qsys	(revision 1427)
+++ atari_chips/pokeyv2/int_osc.qsys	(revision 1428)
@@ -47,7 +47,7 @@
  <module
    name="int_osc_0"
    kind="altera_int_osc"
-   version="20.1"
+   version="23.1"
    enabled="1"
    autoexport="1">
   <parameter name="CBX_AUTO_BLACKBOX" value="ALL" />
Index: atari_chips/pokeyv2/int_osc.sopcinfo
===================================================================
--- atari_chips/pokeyv2/int_osc.sopcinfo	(revision 1427)
+++ atari_chips/pokeyv2/int_osc.sopcinfo	(revision 1428)
@@ -1,11 +1,11 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <EnsembleReport name="int_osc" kind="int_osc" version="1.0" fabric="QSYS">
- <!-- Format version 20.1 720 (Future versions may contain additional information.) -->
- <!-- 2021.01.13.20:13:30 -->
+ <!-- Format version 23.1 993 (Future versions may contain additional information.) -->
+ <!-- 2024.08.31.14:17:07 -->
  <!-- A collection of modules and connections -->
  <parameter name="AUTO_GENERATION_ID">
   <type>java.lang.Integer</type>
-  <value>1610565210</value>
+  <value>1725106627</value>
   <derived>false</derived>
   <enabled>true</enabled>
   <visible>false</visible>
@@ -68,7 +68,7 @@
  <module
    name="int_osc_0"
    kind="altera_int_osc"
-   version="20.1"
+   version="23.1"
    path="int_osc_0">
   <!-- Describes a single module. Module parameters are
 the requested settings for a module instance. -->
@@ -154,7 +154,7 @@
    <visible>true</visible>
    <valid>true</valid>
   </parameter>
-  <interface name="oscena" kind="conduit_end" version="20.1">
+  <interface name="oscena" kind="conduit_end" version="23.1">
    <!-- The connection points exposed by a module instance for the
 particular module parameters. Connection points and their
 parameters are a RESULT of the module parameters. -->
@@ -203,7 +203,7 @@
     <role>oscena</role>
    </port>
   </interface>
-  <interface name="clkout" kind="clock_source" version="20.1">
+  <interface name="clkout" kind="clock_source" version="23.1">
    <!-- The connection points exposed by a module instance for the
 particular module parameters. Connection points and their
 parameters are a RESULT of the module parameters. -->
@@ -283,7 +283,7 @@
   <type>com.altera.entityinterfaces.IElementClass</type>
   <subtype>com.altera.entityinterfaces.IModule</subtype>
   <displayName>Internal Oscillator</displayName>
-  <version>20.1</version>
+  <version>23.1</version>
  </plugin>
  <plugin>
   <instanceCount>1</instanceCount>
@@ -291,7 +291,7 @@
   <type>com.altera.entityinterfaces.IElementClass</type>
   <subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>
   <displayName>Conduit</displayName>
-  <version>20.1</version>
+  <version>23.1</version>
  </plugin>
  <plugin>
   <instanceCount>1</instanceCount>
@@ -299,8 +299,8 @@
   <type>com.altera.entityinterfaces.IElementClass</type>
   <subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>
   <displayName>Clock Output</displayName>
-  <version>20.1</version>
+  <version>23.1</version>
  </plugin>
- <reportVersion>20.1 720</reportVersion>
+ <reportVersion>23.1 993</reportVersion>
  <uniqueIdentifier></uniqueIdentifier>
 </EnsembleReport>
