Revision 1496
Added by markw 3 days ago
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set_global_assignment -name VHDL_FILE iox_glue.vhdl
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set_global_assignment -name VHDL_FILE i2c_master.vhd
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set_global_assignment -name VHDL_FILE slave_timing_6502.vhd
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set_global_assignment -name VHDL_FILE pll_reset_sync.vhdl
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set_global_assignment -name SDC_FILE pokeymax.sdc
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set_global_assignment -name VHDL_FILE complete_address_decoder.vhdl
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set_global_assignment -name VHDL_FILE syncreset_enable_divider.vhd
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| ... | ... | |
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set_global_assignment -name VHDL_FILE latch_delay_line.vhdl
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set_global_assignment -name VHDL_FILE sigmadelta_1storder.vhd
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set_global_assignment -name VHDL_FILE sigmadelta_2ndorder.vhd
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set_global_assignment -name VHDL_FILE sigmadelta_2ndorder_dither.vhd
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set_global_assignment -name VHDL_FILE filtered_sigmadelta.vhd
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set_global_assignment -name VHDL_FILE fir_filter.vhdl
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set_global_assignment -name VHDL_FILE fir_rom.vhdl
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Added two new components: sync reset and 2nd order dither.