Index: atari_chips/pokeyv2/sidmaxv1.qsf
===================================================================
--- atari_chips/pokeyv2/sidmaxv1.qsf	(revision 1533)
+++ atari_chips/pokeyv2/sidmaxv1.qsf	(revision 1534)
@@ -143,6 +143,7 @@
 set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to CLK_OUT
 
 set_global_assignment -name OPTIMIZATION_MODE BALANCED
+set_global_assignment -name VHDL_FILE audio_signal_detector.vhd
 set_global_assignment -name VHDL_FILE flash_controller.vhd
 set_global_assignment -name VHDL_FILE stereo_detect.vhd
 set_global_assignment -name VHDL_FILE slave_timing_6502.vhd
@@ -156,8 +157,10 @@
 set_global_assignment -name VHDL_FILE sigmadelta_1storder.vhd
 set_global_assignment -name VHDL_FILE sigmadelta_2ndorder.vhd
 set_global_assignment -name VHDL_FILE sigmadelta_2ndorder_dither.vhd
+set_global_assignment -name VHDL_FILE sigmadelta_dither.vhd
 set_global_assignment -name VHDL_FILE filtered_sigmadelta.vhd
 set_global_assignment -name VHDL_FILE generic_ram_infer.vhdl
+set_global_assignment -name VHDL_FILE m9k_grouped.vhdl
 set_global_assignment -name VHDL_FILE simple_low_pass_filter.vhdl
 set_global_assignment -name VHDL_FILE pokey/pokey_poly_17_9.vhdl
 set_global_assignment -name VHDL_FILE pokey/pokey_poly_5.vhdl
@@ -197,6 +200,10 @@
 set_global_assignment -name VHDL_FILE sample/adpcm.vhdl
 set_global_assignment -name VHDL_FILE sample/top.vhdl
 set_global_assignment -name VHDL_FILE covox/top.vhdl
+set_global_assignment -name SYSTEMVERILOG_FILE sigma_delta/sigma_delta_adc.sv
+set_global_assignment -name SYSTEMVERILOG_FILE sigma_delta/cic_comb.sv
+set_global_assignment -name SYSTEMVERILOG_FILE sigma_delta/cic_integrator.sv
+set_global_assignment -name SYSTEMVERILOG_FILE sigma_delta/fir_compensator.sv
 set_global_assignment -name QIP_FILE int_osc/synthesis/int_osc.qip
 set_global_assignment -name QIP_FILE pll.qip
 set_global_assignment -name QIP_FILE flash/synthesis/flash.qip
Index: atari_chips/pokeyv2/sidmaxv1.vhd
===================================================================
--- atari_chips/pokeyv2/sidmaxv1.vhd	(revision 1533)
+++ atari_chips/pokeyv2/sidmaxv1.vhd	(revision 1534)
@@ -19,11 +19,10 @@
 	GENERIC
 	(
 		pokeys : integer := 1; -- 1-4
-		lowpass : integer := 0; -- 0=lowpass off, 1=lowpass on (leave on except if there is no space! Low impact...)
+		lowpass : integer := 0; -- 0=lowpass off, 1=lowpass on (only needed for hdmi/spdif and we already have a local filter there)
 		enable_auto_stereo : integer := 0;   -- 1=auto detect a4 => not toggling => mono
 
 		fancy_switch_bit : integer := 20; -- 0=ext is low => mono
-		gtia_audio_bit : integer := 0;    -- 0=no gtia on l/r,1=gtia mixed on l/r
 		detect_right_on_by_default : integer := 1; 
 		saturate_on_by_default : integer := 1; 
 		a5_bit : integer := 0;
@@ -32,6 +31,9 @@
 		spdif_bit : integer := 0;
 		irq_bit : integer := 0;
 
+		adc_audio_detect : integer := 0;  -- Detect 0 crossing/amplitude etc, otherwise silence
+		sigmadelta_implementation : integer := 4; -- 4 is dithered 2nd order (recommended if it fits), 2 is 2nd order without dithering
+
 		ext_bits : integer := 3; 
 
 		enable_config : integer := 1;
@@ -40,12 +42,16 @@
 		enable_sample : integer := 0;
 		enable_flash : integer := 0;
 		enable_spdif: integer := 0;
+		enable_adc: integer := 1;
 	
 		sid_wave_base : integer := 42496; --to_integer(unsigned(x"a600"));
 
+		sample_ram_size : integer := 43008; --to_integer(unsigned(x"a600"));
+
 		flash_addr_bits : integer := 16;
 
-   		version : STRING  := "DEVELOPR" -- 8 char string atascii
+   		version : STRING  := "DEVELOPR"; -- 8 char string atascii
+   		board : integer  := 00 -- $MAJOR$MINOR
 	);
 	PORT
 	(
@@ -85,6 +91,17 @@
 END sidmax;		
 		
 ARCHITECTURE vhdl OF sidmax IS
+	component sigma_delta_adc is
+	port (
+    		clk : in std_logic;
+    		rst : in std_logic;
+    		adc_lvds_pin : in std_logic;
+    		adc_fb_pin : out std_logic;
+    		adc_output : out std_logic_vector(19 downto 0);
+    		adc_valid : out std_logic
+	);
+	end component;
+
 	component lvds_tx is
 		port (
 			tx_in  : in  std_logic_vector(0 downto 0) := (others => 'X'); -- tx_in
@@ -173,19 +190,20 @@
 	signal WRITE_DATA : std_logic_vector(7 downto 0);
 	signal DEVICE_ADDR : std_logic_vector(3 downto 0);
 
-	signal POKEY_AUDIO_0 : unsigned(15 downto 0);
-	signal POKEY_AUDIO_1 : unsigned(15 downto 0);
-	signal POKEY_AUDIO_2 : unsigned(15 downto 0);
-	signal POKEY_AUDIO_3 : unsigned(15 downto 0);
+	signal POKEY_AUDIO_UNSIGNED : UNSIGNED_AUDIO_TYPE(3 downto 0);	
 	
-	signal AUDIO_0_UNSIGNED : unsigned(15 downto 0);
-	signal AUDIO_2_UNSIGNED : unsigned(15 downto 0);
-	signal AUDIO_3_UNSIGNED : unsigned(15 downto 0);	
+	signal AUDIO_MIXED_SIGNED : SIGNED_AUDIO_TYPE(3 downto 0);
 	
 	signal AUDIO_0_SIGMADELTA : std_logic;
+	signal AUDIO_1_SIGMADELTA : std_logic;
 	signal AUDIO_2_SIGMADELTA : std_logic;
 	signal AUDIO_3_SIGMADELTA : std_logic;
 
+	signal SIGMADELTA_DITHER1 : std_logic_vector(15 downto 0);
+	signal SIGMADELTA_DITHER2 : std_logic_vector(15 downto 0);
+	signal SIGMADELTA_DITHER3 : std_logic_vector(15 downto 0);
+	signal SIGMADELTA_DITHER4 : std_logic_vector(15 downto 0);
+
 	signal POKEY_PROFILE_ADDR : std_logic_vector(5 downto 0);
 	signal POKEY_PROFILE_REQUEST : std_logic;
 	signal POKEY_PROFILE_READY : std_logic;
@@ -192,7 +210,7 @@
 
 	-- SID
 	signal SID_CLK_ENABLE : std_logic;
-	signal SID_AUDIO : SID_AUDIO_TYPE(1 downto 0);
+	signal SID_AUDIO_SIGNED : SIGNED_AUDIO_TYPE(1 downto 0);
 	signal SID_FLASH1_ADDR : std_logic_vector(16 downto 0);
         signal SID_FLASH1_ROMREQUEST : std_logic;
         signal SID_FLASH1_ROMREADY : std_logic;
@@ -227,7 +245,7 @@
 	signal PSG_ENABLE_2Mhz : std_logic;
 	signal PSG_ENABLE_1Mhz : std_logic;
 	signal PSG_ENABLE : std_logic;
-	signal PSG_AUDIO : PSG_AUDIO_TYPE(1 downto 0);	
+	signal PSG_AUDIO_UNSIGNED : UNSIGNED_AUDIO_TYPE(1 downto 0);	
 
 	signal PSG_CHANNEL : PSG_CHANNEL_TYPE(5 downto 0);	
 	signal PSG_CHANGED : std_logic_vector(1 downto 0);
@@ -285,7 +303,9 @@
 	signal SATURATE_REG : std_logic;
 	signal POST_DIVIDE_REG : std_logic_vector(7 downto 0);	
 	signal GTIA_ENABLE_REG : std_logic_vector(3 downto 0);
-	signal VERSION_LOC_REG : std_logic_vector(2 downto 0);
+	signal ADC_VOLUME_REG : std_logic_vector(1 downto 0);
+	signal SIO_DATA_VOLUME_REG : std_logic_vector(1 downto 0);
+	signal VERSION_LOC_REG : std_logic_vector(3 downto 0);
 	signal PAL_REG : std_logic;
 	
 	signal DETECT_RIGHT_NEXT : std_logic;
@@ -294,7 +314,9 @@
 	signal SATURATE_NEXT : std_logic;
 	signal POST_DIVIDE_NEXT : std_logic_vector(7 downto 0);
 	signal GTIA_ENABLE_NEXT : std_logic_vector(3 downto 0);
-	signal VERSION_LOC_NEXT : std_logic_vector(2 downto 0);
+	signal ADC_VOLUME_NEXT : std_logic_vector(1 downto 0);
+	signal SIO_DATA_VOLUME_NEXT : std_logic_vector(1 downto 0);
+	signal VERSION_LOC_NEXT : std_logic_vector(3 downto 0);
 	signal PAL_NEXT : std_logic;
 	
 		--config infra
@@ -303,7 +325,7 @@
 	signal CONFIG_ENABLE_NEXT: std_logic;
 	
 	-- SAMPLE/COVOX
-	signal SAMPLE_AUDIO : SAMPLE_AUDIO_TYPE(1 downto 0);
+	signal SAMPLE_AUDIO_SIGNED : SIGNED_AUDIO_TYPE(1 downto 0);	
 	signal SAMPLE_IRQ : std_logic;
 	signal SAMPLE_RAM_ADDRESS : std_logic_vector(15 downto 0);
 	signal SAMPLE_RAM_WRITE_ENABLE : std_logic;
@@ -348,6 +370,15 @@
 	-- 3=psg off
 	-- 4=sample off
 
+	-- output channel on/off
+	signal CHANNEL_EN_REG : std_logic_vector(4 downto 0);
+	signal CHANNEL_EN_NEXT : std_logic_vector(4 downto 0);
+	-- 0=0 (37)
+	-- 1=1
+	-- 2=2 L ext 
+	-- 3=3 R ext
+	-- 4=spdif
+
 	signal PSG_ENABLE_NEXT : std_logic;
 	signal PSG_ENABLE_REG : std_logic;
 
@@ -364,6 +395,39 @@
 	-- irq - SID does not have one!
 	signal IRQ : std_logic; -- expose via EXT? TODO
 
+	-- adc
+	signal CLK49152 : std_logic;
+
+	signal adc_reg : signed(15 downto 0);
+	signal adc_next : signed(15 downto 0);
+
+	signal adc_use_reg : signed(15 downto 0);
+	signal adc_use_next : signed(15 downto 0);
+
+	signal adc_frozen_reg : signed(15 downto 0);
+	signal adc_frozen_next : signed(15 downto 0);
+	
+	signal sio_noise : signed(15 downto 0);
+
+	signal adc_in_signed : signed(15 downto 0);
+	signal adc_out_signed : signed(15 downto 0);
+	
+	signal adc_enabled : std_logic;
+
+	signal adc_valid : std_logic;
+	signal adc_output : std_logic_vector(19 downto 0);
+
+	signal adc_sample_reg : std_logic_vector(15 downto 0);
+	signal adc_sample_next : std_logic_vector(15 downto 0);
+
+    	signal adc_lvds_pin : std_logic;
+    	signal adc_fb_pin : std_logic;
+
+	signal SIO_AUDIO_UNSIGNED : unsigned(15 downto 0);	
+
+	-- paddles
+	signal PADDLE_ADJ : std_logic_vector(7 downto 0);
+
 	function getByte(a : string; x : integer) return std_logic_vector is
    		 variable ret : std_logic_vector(7 downto 0);
 	begin
@@ -378,24 +442,23 @@
 	  end if;
 	end function min;
 
-	-- adc
-	signal count_reg : unsigned(7 downto 0);
-	signal count_next : unsigned(7 downto 0);
+	function unsigned_to_signed(audio_in : unsigned(15 downto 0)) return signed is
+   		 variable ret : std_logic_vector(15 downto 0);
+	begin
+	        ret(15) := not(audio_in(15));
+	        ret(14 downto 0) := std_logic_vector(audio_in(14 downto 0));
+	    return signed(ret);
+	end function unsigned_to_signed;
 
-	signal sum_reg : unsigned(7 downto 0);
-	signal sum_next : unsigned(7 downto 0);
+	function signed_to_unsigned(audio_in : signed(15 downto 0)) return unsigned is
+   		 variable ret : std_logic_vector(15 downto 0);
+	begin
+	        ret(15) := not(audio_in(15));
+	        ret(14 downto 0) := std_logic_vector(audio_in(14 downto 0));
+	    return unsigned(ret);
+	end function signed_to_unsigned;
 
-	signal sample_reg : unsigned(7 downto 0);
-	signal sample_next : unsigned(7 downto 0);
-
-	signal toggle_reg : std_logic_vector(255 downto 0);
-	signal toggle_next : std_logic_vector(255 downto 0);
-
-	signal decimate_reg : unsigned(3 downto 0);
-	signal decimate_next : unsigned(3 downto 0);
-
-	signal rpin : std_logic;
-
+	-- adc
 	signal ADC_FILTERED1 : unsigned(15 downto 0);	
 	signal ADC_FILTERED2 : unsigned(15 downto 0);	
 	
@@ -468,6 +531,8 @@
 		flash_req7_addr(12 downto 9) => (others=>'0'),
 		flash_req7_addr(8 downto 0) => "11"&SATURATE_REG&POKEY_PROFILE_ADDR,  --TODO + init.bin
 
+		flash_req8_addr(12 downto 0) => (others=>'0'),
+
 		flash_req_request(0) => CPU_FLASH_REQUEST_REG,
 		flash_req_request(1) => CONFIG_FLASH_REQUEST,
 		flash_req_request(2) => ADPCM_STEP_REQUEST,
@@ -475,7 +540,7 @@
 		flash_req_request(4) => SID_FLASH2_ROMREQUEST,
 		flash_req_request(5) => PSG_PROFILE_REQUEST,
 		flash_req_request(6) => POKEY_PROFILE_REQUEST,
-		flash_req_request(7 downto 7) => (others=>'0'),
+		flash_req_request(7) => open,
 		flash_req_complete(7 downto 0) => open,
 
 		flash_req_complete_slow(0) => CPU_FLASH_COMPLETE,
@@ -485,7 +550,7 @@
 		flash_req_complete_slow(4) => SID_FLASH2_ROMREADY,
 		flash_req_complete_slow(5) => PSG_PROFILE_READY,
 		flash_req_complete_slow(6) => POKEY_PROFILE_READY,
-		flash_req_complete_slow(7 downto 7) => open,
+		flash_req_complete_slow(7) => open,
 
 		flash_data_out_slow => flash_do_slow
 	);
@@ -529,8 +594,6 @@
 	EXT_INT(20) <= '1';
 	EXT_INT(ext_bits downto 1) <= EXT;
 
-        synchronizer_gtia_audio : entity work.synchronizer
-                port map (clk=>clk, raw=>EXT_INT(gtia_audio_bit), sync=>GTIA_AUDIO);
         synchronizer_fancy_enable : entity work.synchronizer
 		port map (clk=>clk, raw=>EXT_INT(fancy_switch_bit), sync=>FANCY_SWITCH);
 
@@ -673,10 +736,10 @@
 		 CHANNEL_1 => CHANNEL1SUM_REG,
 		 CHANNEL_2 => CHANNEL2SUM_REG,
 		 CHANNEL_3 => CHANNEL3SUM_REG,
-		 VOLUME_OUT_0 => POKEY_AUDIO_0,
-		 VOLUME_OUT_1 => POKEY_AUDIO_1,
-		 VOLUME_OUT_2 => POKEY_AUDIO_2,
-		 VOLUME_OUT_3 => POKEY_AUDIO_3,
+		 VOLUME_OUT_0 => POKEY_AUDIO_UNSIGNED(0),
+		 VOLUME_OUT_1 => POKEY_AUDIO_UNSIGNED(1),
+		 VOLUME_OUT_2 => POKEY_AUDIO_UNSIGNED(2),
+		 VOLUME_OUT_3 => POKEY_AUDIO_UNSIGNED(3),
 		 PROFILE_ADDR => POKEY_PROFILE_ADDR,
 		 PROFILE_REQUEST => POKEY_PROFILE_REQUEST,
 		 PROFILE_READY => POKEY_PROFILE_READY,
@@ -804,7 +867,7 @@
 	POT_Y => POTY_P,
 	POT_RESET => SID_POT_RESET,
 	--EXTFILTER_EN => '0',
-	AUDIO => SID_AUDIO(0), 
+	AUDIO => SID_AUDIO_SIGNED(0), 
 
 	SIDTYPE => SID_TYPE1,
 	EXT => SID_EXT1_REG,
@@ -842,7 +905,7 @@
 	POT_Y => POTY_P,
 	POT_RESET => open,
 	--EXTFILTER_EN => '0',
-	AUDIO => SID_AUDIO(1),
+	AUDIO => SID_AUDIO_SIGNED(1),
 
 	SIDTYPE => SID_TYPE2,
 	EXT => SID_EXT2_REG,
@@ -863,8 +926,8 @@
 -- PSG
 --------------------------------------------------------
 psg_off : if enable_psg=0 generate 
-	PSG_AUDIO(0) <= (others=>'0');
-	PSG_AUDIO(1) <= (others=>'0');
+	PSG_AUDIO_UNSIGNED(0) <= to_unsigned(0,16);
+	PSG_AUDIO_UNSIGNED(1) <= to_unsigned(0,16);
 	PSG_DO(0) <= (others=>'0');
 	PSG_DO(1) <= (others=>'0');
 end generate psg_off;
@@ -959,8 +1022,8 @@
 		CHANNEL_MASK_1=>PSG_MIX1, --LABC:RABC
 		CHANNEL_MASK_2=>PSG_MIX2,
 
-		AUDIO_OUT_1 => PSG_AUDIO(0),
-		AUDIO_OUT_2 => PSG_AUDIO(1),
+		AUDIO_OUT_1 => PSG_AUDIO_UNSIGNED(0),
+		AUDIO_OUT_2 => PSG_AUDIO_UNSIGNED(1),
 
 		--PROFILE_SELECT=>PSG_PROFILESEL_REG,
 		PROFILE_ADDR => PSG_PROFILE_ADDR,
@@ -977,8 +1040,8 @@
 covox_off : if enable_covox=0 generate 
 	SAMPLE_IRQ <= '0';
 	SAMPLE_DO <= (others=>'0');
-	SAMPLE_AUDIO(0) <= (others=>'0');
-	SAMPLE_AUDIO(1) <= (others=>'0');
+	SAMPLE_AUDIO_SIGNED(0) <= to_signed(0,16);
+	SAMPLE_AUDIO_SIGNED(1) <= to_signed(0,16);
 	ADPCM_STEP_REQUEST <= '0';
 end generate covox_off;
 
@@ -995,8 +1058,8 @@
 		ADDR => ADDR_IN(1 downto 0),
 		DI => WRITE_DATA(7 downto 0),
 		DO => SAMPLE_DO,
-		AUDIO0 => SAMPLE_AUDIO(0),
-		AUDIO1 => SAMPLE_AUDIO(1) 
+		AUDIO0 => SAMPLE_AUDIO_SIGNED(0),
+		AUDIO1 => SAMPLE_AUDIO_SIGNED(1) 
 	);
 end generate covox_on;
 
@@ -1016,8 +1079,8 @@
 		ADDR => ADDR_IN(4 downto 0),
 		DI => WRITE_DATA(7 downto 0),
 		DO => SAMPLE_DO,
-		AUDIO0 => SAMPLE_AUDIO(0),
-		AUDIO1 => SAMPLE_AUDIO(1),
+		AUDIO0 => SAMPLE_AUDIO_SIGNED(0),
+		AUDIO1 => SAMPLE_AUDIO_SIGNED(1),
 		IRQ => SAMPLE_IRQ,
 		
 		RAM_ADDR => SAMPLE_RAM_ADDRESS,
@@ -1030,11 +1093,48 @@
 		ADPCM_STEP_VALUE => FLASH_DO_SLOW(14 downto 0)
 	);
 
+packed_ram45 : if sample_ram_size=46080 generate 
+	sample_ram_inst : entity work.m9k_grouped
+	GENERIC MAP
+	(
+		 NUM_GROUPS        => 5,
+		 --EXTRA_RAM_BLOCKS => 3
+		 EXTRA_RAM_BLOCKS  => 0
+	)
+	PORT MAP
+	(
+	        clock => clk,
+		reset_n => reset_n,
+		data => write_data,
+		address => sample_ram_address,
+		we => sample_ram_write_enable,
+		q => sample_ram_data
+	);
+end generate;
+
+packed_ram64 : if sample_ram_size=65536 generate 
+	sample_ram_inst : entity work.m9k_grouped
+	--GENERIC MAP
+	--(
+	--	DATA_WIDTH => 8
+	--)
+	PORT MAP
+	(
+	        clock => clk,
+		reset_n => reset_n,
+		data => write_data,
+		address => sample_ram_address,
+		we => sample_ram_write_enable,
+		q => sample_ram_data
+	);
+end generate;
+
+normal_ram : if not(sample_ram_size=65536 or sample_ram_size=46080) generate 
 	sample_ram_inst : entity work.generic_ram_infer
 	GENERIC MAP
 	(
 		ADDRESS_WIDTH => 16,
-		SPACE => 43008,
+		SPACE => SAMPLE_RAM_SIZE,
 		DATA_WIDTH => 8
 	)
 	PORT MAP
@@ -1046,6 +1146,7 @@
 		we => sample_ram_write_enable,
 		q => sample_ram_data
 	);
+end generate;
 
 end generate sample_on;
 		
@@ -1184,6 +1285,8 @@
 		end if;
 		POST_DIVIDE_REG <= "10100000"; -- 1/2 5v, 3/4 1v
 		GTIA_ENABLE_REG <= "1100"; -- external only
+		ADC_VOLUME_REG <= "11"; -- 0=silent,1=1x,2=2x,3=4x
+		SIO_DATA_VOLUME_REG <= "10"; -- 0=silent,1=quieter,2=normal,3=louder
 		CONFIG_ENABLE_REG <= '0';
 		VERSION_LOC_REG <= (others=>'0');
 		PAL_REG <= '1';
@@ -1197,6 +1300,7 @@
 		SID_EXT1_REG <= "10"; -- 00=GND,01=digifix,10=ADC
 		SID_EXT2_REG <= "10"; -- 00=GND,01=digifix,10=ADC
 		RESTRICT_CAPABILITY_REG <= (others=>'1');
+		CHANNEL_EN_REG <= (others=>'1');
 	elsif (clk'event and clk='1') then
 		DETECT_RIGHT_REG <= DETECT_RIGHT_NEXT;
 		IRQ_EN_REG <= IRQ_EN_NEXT;
@@ -1204,6 +1308,8 @@
 		SATURATE_REG <= SATURATE_NEXT;
 		POST_DIVIDE_REG <= POST_DIVIDE_NEXT;
 		GTIA_ENABLE_REG <= GTIA_ENABLE_NEXT;
+		ADC_VOLUME_REG <= ADC_VOLUME_NEXT;
+		SIO_DATA_VOLUME_REG <= SIO_DATA_VOLUME_NEXT;
 		CONFIG_ENABLE_REG <= CONFIG_ENABLE_NEXT;
 		VERSION_LOC_REG <= VERSION_LOC_NEXT;
 		PAL_REG <= PAL_NEXT;
@@ -1217,6 +1323,7 @@
 		SID_EXT1_REG <= SID_EXT1_NEXT;
 		SID_EXT2_REG <= SID_EXT2_NEXT;
 		RESTRICT_CAPABILITY_REG <= RESTRICT_CAPABILITY_NEXT;
+		CHANNEL_EN_REG <= CHANNEL_EN_NEXT;
 	end if;
 end process;
 
@@ -1233,6 +1340,8 @@
 	CONFIG_ENABLE_REG,
 	POST_DIVIDE_REG,
 	GTIA_ENABLE_REG,
+	ADC_VOLUME_REG,
+	SIO_DATA_VOLUME_REG,
 	VERSION_LOC_REG,
 	PSG_FREQ_REG,
 	PSG_STEREOMODE_REG,
@@ -1242,6 +1351,7 @@
 	CPU_FLASH_REQUEST_REG,CPU_FLASH_WRITE_N_REG,CPU_FLASH_CFG_REG,CPU_FLASH_ADDR_REG,CPU_FLASH_DATA_REG,
 	CPU_FLASH_COMPLETE,CONFIG_FLASH_COMPLETE,CONFIG_FLASH_ADDR,flash_do_slow,
 	RESTRICT_CAPABILITY_REG,
+	CHANNEL_EN_REG,
 	PAL_REG,
 	SID_EXT1_REG,SID_EXT2_REG
 )
@@ -1254,6 +1364,9 @@
 	POST_DIVIDE_NEXT <= POST_DIVIDE_REG;
 	
 	GTIA_ENABLE_NEXT <= GTIA_ENABLE_REG;
+
+	ADC_VOLUME_NEXT <= ADC_VOLUME_REG;
+	SIO_DATA_VOLUME_NEXT <= SIO_DATA_VOLUME_REG;
 	
 	CONFIG_ENABLE_NEXT <= CONFIG_ENABLE_REG;
 	
@@ -1277,6 +1390,7 @@
 	CPU_FLASH_DATA_NEXT <= CPU_FLASH_DATA_REG;
 
 	RESTRICT_CAPABILITY_NEXT <= RESTRICT_CAPABILITY_REG;
+	CHANNEL_EN_NEXT <= CHANNEL_EN_REG;
 
 	PAL_NEXT <= PAL_REG;
 
@@ -1297,7 +1411,8 @@
 					-- 6-7 reserved
 				POST_DIVIDE_NEXT <= flash_do_slow(15 downto 8);
 				GTIA_ENABLE_NEXT <= flash_do_slow(19 downto 16);
-					-- 23 downto 20 reserved
+				ADC_VOLUME_NEXT <= flash_do_slow(21 downto 20);
+				SIO_DATA_VOLUME_NEXT <= flash_do_slow(23 downto 22);
 				PSG_FREQ_NEXT <= flash_do_slow(25 downto 24);
 				PSG_STEREOMODE_NEXT <= flash_do_slow(27 downto 26);
 				PSG_ENVELOPE16_NEXT <= flash_do_slow(28);
@@ -1313,7 +1428,7 @@
 				SID_EXT1_NEXT <= flash_do_slow(17 downto 16);
 				SID_EXT2_NEXT <= flash_do_slow(19 downto 18);
 				SID_AUTO_NEXT <= flash_do_slow(20);
-				-- 24-28 reserved (used in pokeymax)
+				CHANNEL_EN_NEXT <= flash_do_slow(28 downto 24);
 			when others =>
 		end case;
 	elsif (CONFIG_WRITE_ENABLE='1') then
@@ -1331,10 +1446,12 @@
 				
 		if (addr_decoded4(3)='1') then			
 			GTIA_ENABLE_NEXT <= WRITE_DATA(3 downto 0);
+			ADC_VOLUME_NEXT <= WRITE_DATA(5 downto 4);
+			SIO_DATA_VOLUME_NEXT <= WRITE_DATA(7 downto 6);
 		end if;		
 
 		if (addr_decoded4(4)='1') then
-			VERSION_LOC_NEXT <= WRITE_DATA(2 downto 0);
+			VERSION_LOC_NEXT <= WRITE_DATA(3 downto 0);
 		end if;
 		
 		if (addr_decoded4(5)='1') then
@@ -1359,6 +1476,10 @@
 			SID_AUTO_NEXT <= WRITE_DATA(4);
 		end if;
 
+		if (addr_decoded4(9)='1') then
+			CHANNEL_EN_NEXT(4 downto 0) <= WRITE_DATA(4 downto 0);
+		end if;
+
 		if (addr_decoded4(12)='1') then
 			if (WRITE_DATA=x"3F") then
 				CONFIG_ENABLE_NEXT <= '1';
@@ -1408,6 +1529,7 @@
 CPU_FLASH_CFG_REG,CPU_FLASH_ADDR_REG,CPU_FLASH_DATA_REG,
 CPU_FLASH_REQUEST_REG, CPU_FLASH_WRITE_N_REG,
 RESTRICT_CAPABILITY_REG,
+CHANNEL_EN_REG,
 PAL_REG,
 SID_EXT1_REG,SID_EXT2_REG,SID_AUTO_REG
 )
@@ -1446,6 +1568,9 @@
 	end if;			
 	if (enable_sample=1) then
 		ACTUAL_CAPABILITY(5) := '1';
+		if sample_ram_size=65536 then
+			ACTUAL_CAPABILITY(7) := '1';
+		end if;
 	else
 		ACTUAL_CAPABILITY(5) := '0';
 	end if;					
@@ -1466,28 +1591,33 @@
 	if (addr_decoded4(3)='1') then
 		CONFIG_DO <= (others=>'0');
 		CONFIG_DO(3 downto 0) <= GTIA_ENABLE_REG;
-		--CONFIG_DO(7 downto 4) <= SIO_ENABLE_REG; -- if we implement
+		if (enable_adc=1) then -- Should allow optimiser to remove since nothing else reads it
+			CONFIG_DO(5 downto 4) <= ADC_VOLUME_REG;
+		end if;
+		CONFIG_DO(7 downto 6) <= SIO_DATA_VOLUME_REG;
 	end if;
 	
 	if (addr_decoded4(4)='1') then
 		-- version
-		case VERSION_LOC_REG(2 downto 0) is			
-			when "000" => 
+		case VERSION_LOC_REG(3 downto 0) is			
+			when "0000" => 
 				CONFIG_DO <= getByte(version,1);
-			when "001" =>
+			when "0001" =>
 				CONFIG_DO <= getByte(version,2);
-			when "010" =>
+			when "0010" =>
 				CONFIG_DO <= getByte(version,3);
-			when "011" =>
+			when "0011" =>
 				CONFIG_DO <= getByte(version,4);
-			when "100" => 
+			when "0100" => 
 				CONFIG_DO <= getByte(version,5);
-			when "101" =>
+			when "0101" =>
 				CONFIG_DO <= getByte(version,6);
-			when "110" =>
+			when "0110" =>
 				CONFIG_DO <= getByte(version,7);
-			when "111" =>
+			when "0111" =>
 				CONFIG_DO <= getByte(version,8);
+			when "1000" =>
+				CONFIG_DO <= std_logic_vector(to_unsigned(board/10,4))&std_logic_vector(to_unsigned(board mod 10,4));
 			when others =>
 		end case;		
 	end if;
@@ -1518,6 +1648,10 @@
 		CONFIG_DO(4) <= SID_AUTO_REG;
 	end if;
 
+	if (addr_decoded4(9)='1') then
+		CONFIG_DO(4 downto 0) <= CHANNEL_EN_REG(4 downto 0);
+	end if;
+
 	if (addr_decoded4(12)='1') then
 		CONFIG_DO <= x"01";
 	end if;		
@@ -1569,36 +1703,46 @@
 	POST_DIVIDE => POST_DIVIDE_REG,
 	DETECT_RIGHT => DETECT_RIGHT_REG,	
 	FANCY_ENABLE => FANCY_ENABLE,
-	GTIA_EN => GTIA_ENABLE_REG,
-	ADC_EN => "0000",
+	B_CH0_EN => "0000",
+	B_CH1_EN => "0000",
 
-	CH0 => POKEY_AUDIO_0,
-	CH1 => POKEY_AUDIO_1,
-	CH2 => POKEY_AUDIO_2,
-	CH3 => POKEY_AUDIO_3,
-	CH4 => unsigned(SAMPLE_AUDIO(0)),
-	CH5 => unsigned(SAMPLE_AUDIO(1)),
-	CH6 => unsigned(SID_AUDIO(0)),
-	CH7 => unsigned(SID_AUDIO(1)),	
-	CH8 => unsigned(PSG_AUDIO(0)),
-	CH9 => unsigned(PSG_AUDIO(1)),		
-	CHA(14 downto 0) => (others=>'0'),
-	CHA(15) => GTIA_AUDIO,			
-	CHB => (others=>'0'),
+	L_CH0 => unsigned_to_signed(POKEY_AUDIO_UNSIGNED(0)),
+	R_CH0 => unsigned_to_signed(POKEY_AUDIO_UNSIGNED(1)),
+	L_CH1 => unsigned_to_signed(POKEY_AUDIO_UNSIGNED(2)),
+	R_CH1 => unsigned_to_signed(POKEY_AUDIO_UNSIGNED(3)),
+	L_CH2 => SAMPLE_AUDIO_SIGNED(0),
+	R_CH2 => SAMPLE_AUDIO_SIGNED(1),
+	L_CH3 => SID_AUDIO_SIGNED(0),
+	R_CH3 => SID_AUDIO_SIGNED(1),	
+	L_CH4 => unsigned_to_signed(PSG_AUDIO_UNSIGNED(0)),
+	R_CH4 => unsigned_to_signed(PSG_AUDIO_UNSIGNED(1)),		
+	B_CH0 => (others=>'0'),
+	B_CH1 => (others=>'0'),
 	
-	AUDIO_0_UNSIGNED => AUDIO_0_UNSIGNED,
-	AUDIO_1_UNSIGNED => open,
-	AUDIO_2_UNSIGNED => AUDIO_2_UNSIGNED,
-	AUDIO_3_UNSIGNED => AUDIO_3_UNSIGNED
+	AUDIO_0_SIGNED => AUDIO_MIXED_SIGNED(0),
+	AUDIO_1_SIGNED => open,
+	AUDIO_2_SIGNED => AUDIO_MIXED_SIGNED(2),
+	AUDIO_3_SIGNED => AUDIO_MIXED_SIGNED(3)
 );
 
+dac_dithergen : entity work.sigmadelta_dither 
+port map
+(
+  reset_n => reset_n,
+  clk => clk,
+  ENABLE => ENABLE_CYCLE,
+  DITHER_OUT1 => SIGMADELTA_DITHER1,
+  DITHER_OUT2 => SIGMADELTA_DITHER2,
+  DITHER_OUT3 => SIGMADELTA_DITHER3,
+  DITHER_OUT4 => SIGMADELTA_DITHER4
+);
+
 --approx line level by using 5V/4 -> ok 1.25V, should be ok approx
 dac_0 : entity work.filtered_sigmadelta  --pin37
 GENERIC MAP
 (
-	IMPLEMENTATION => 4,
-	LOWPASS => lowpass,
-	LFSR_SEED => x"ACE2"
+	IMPLEMENTATION => sigmadelta_implementation,
+	LOWPASS => lowpass
 )
 port map
 (
@@ -1605,8 +1749,9 @@
   reset_n => reset_n,
   clk => clk,
   clk2 => CLK116,
-  ENABLE_179 => MHZ179_ENABLE,
-  audin => AUDIO_0_UNSIGNED,
+  ENABLE_179 => ENABLE_CYCLE,
+  DITHER_IN => SIGMADELTA_DITHER1,
+  audin => signed_to_unsigned(AUDIO_MIXED_SIGNED(0)),
   AUDOUT => AUDIO_0_SIGMADELTA
 );
 
@@ -1613,9 +1758,8 @@
 dac_2 : entity work.filtered_sigmadelta
 GENERIC MAP
 (
-	IMPLEMENTATION => 4,
-	LOWPASS => lowpass,
-	LFSR_SEED => x"BEEF"
+	IMPLEMENTATION => sigmadelta_implementation,
+	LOWPASS => lowpass
 )
 port map
 (
@@ -1622,8 +1766,9 @@
   reset_n => reset_n,
   clk => clk,
   clk2 => CLK116,
-  ENABLE_179 => MHZ179_ENABLE,
-  audin => AUDIO_2_UNSIGNED,
+  ENABLE_179 => ENABLE_CYCLE,
+  DITHER_IN => SIGMADELTA_DITHER3,
+  audin => signed_to_unsigned(AUDIO_MIXED_SIGNED(2)),
   AUDOUT => AUDIO_2_SIGMADELTA
 );
 
@@ -1630,9 +1775,8 @@
 dac_3 : entity work.filtered_sigmadelta
 GENERIC MAP
 (
-	IMPLEMENTATION => 4,
-	LOWPASS => lowpass,
-	LFSR_SEED => x"5A3C"
+	IMPLEMENTATION => sigmadelta_implementation,
+	LOWPASS => lowpass
 )
 port map
 (
@@ -1639,8 +1783,9 @@
   reset_n => reset_n,
   clk => clk,
   clk2 => CLK106,
-  ENABLE_179 => MHZ179_ENABLE,
-  audin => AUDIO_3_UNSIGNED,
+  ENABLE_179 => ENABLE_CYCLE,
+  DITHER_IN => SIGMADELTA_DITHER4,
+  audin => signed_to_unsigned(AUDIO_MIXED_SIGNED(3)),
   AUDOUT => AUDIO_3_SIGMADELTA
 );
 
@@ -1651,8 +1796,8 @@
 PORT MAP 
 ( 
 	CLK => clk,
-	AUDIO_IN => audio_2_unsigned,
-	SAMPLE_IN => MHZ179_ENABLE,
+	AUDIO_IN => signed_to_unsigned(AUDIO_MIXED_SIGNED(2)),
+	SAMPLE_IN => enable_cycle,
 	AUDIO_OUT => audio_2_filtered
 );
 
@@ -1660,12 +1805,12 @@
 PORT MAP 
 ( 
 	CLK => clk,
-	AUDIO_IN => audio_3_unsigned,
-	SAMPLE_IN => MHZ179_ENABLE,
+	AUDIO_IN => signed_to_unsigned(AUDIO_MIXED_SIGNED(3)),
+	SAMPLE_IN => enable_cycle,
 	AUDIO_OUT => audio_3_filtered
 );
 
--- todo: clock domain crossing!
+---- todo: clock domain crossing!
 spdif : entity work.spdif_transmitter
  port map(
   bit_clock => CLK6144, -- 128x Fsample (6.144MHz for 48K samplerate)
@@ -1678,15 +1823,15 @@
   spdif_out => spdif_out
  );
 
- EXT(SPDIF_BIT) <= spdif_out;
+ EXT(SPDIF_BIT) <= spdif_out when CHANNEL_EN_REG(4)='1' else 'Z';
 end generate spdif_on;
 
 --1->pin37
-AUDIO_INT <= AUDIO_0_SIGMADELTA;
+AUDIO_INT <= AUDIO_0_SIGMADELTA when CHANNEL_EN_REG(0)='1' else '0'; --L (internal)
 
 -- ext AUD pins:
-AUDIO_LEFT <= AUDIO_2_SIGMADELTA;
-AUDIO_RIGHT <= AUDIO_3_SIGMADELTA;
+AUDIO_LEFT <= AUDIO_2_SIGMADELTA when CHANNEL_EN_REG(2)='1' else '0'; --L
+AUDIO_RIGHT <= AUDIO_3_SIGMADELTA when CHANNEL_EN_REG(3)='1' else '0'; --R
 
 IRQ <= '0' when (IRQ_EN_REG='1' and (and_reduce(POKEY_IRQ)='0')) or (IRQ_EN_REG='0' and POKEY_IRQ(0)='0') or (SAMPLE_IRQ='1')  else 'Z';
 
@@ -1699,44 +1844,79 @@
 POTY_RESET <= 'Z' when SID_POT_RESET='0' else '0';
 
  -- Simple ADC for EXT_IN
-	 process(clk,reset_n)
-	 begin
-	   if (reset_n='0') then
-			count_reg <= (others=>'0');
-			toggle_reg <= (others=>'0');
-			sum_reg <= (others=>'0');
-			decimate_reg <= (others=>'0');
-			sample_reg <= (others=>'0');
-		elsif (clk'event and clk='1') then
-			count_reg <= count_next;
-			toggle_reg <= toggle_next;
-			sum_reg <= sum_next;
-			decimate_reg <= decimate_next;
-			sample_reg <= sample_next;
-		end if;
-	 end process;	
+	sdelta : sigma_delta_adc
+	port map(
+		clk=>CLK49152,
+		rst=>not(reset_n),
+
+		adc_lvds_pin => adc_lvds_pin,
+		adc_fb_pin => adc_fb_pin,
+		
+    		adc_output => adc_output,
+    		adc_valid => adc_valid
+	);
 	 
 	 lvds_tx0: lvds_tx
 	 port map(
-	 	tx_in(0) => toggle_reg(0),
+	 	tx_in(0) => adc_fb_pin,
 	 	tx_out(0) => ADC_TX_P
 	 );
-	-- ADC_TX <= toggle_reg(0);
 	
 	 lvds_rx0: lvds_rx
 	 port map(
-	 	data(0) => ext_in_p,
-	 	clock => CLK,
-	 	q(0) => toggle_next(0)
+	 	data(0) => EXT_IN_P,
+	 	clock => CLK49152,
+	 	q(0) => adc_lvds_pin
 	 );
---	 toggle_next(0) <= not(ext_in);
-	 toggle_next(255 downto 1) <= toggle_reg(254 downto 0);
+
+process(adc_reg,adc_output,adc_valid,ADC_VOLUME_REG)
+	variable adc_shrunk : signed(19 downto 0);
+begin
+	adc_next <= adc_reg;
+
+	if (adc_valid='1') then
+		adc_shrunk := (signed(not(adc_output(19)) & adc_output(18 downto 0)));
+		case ADC_VOLUME_REG is
+			when "01" =>
+				adc_next <= adc_shrunk(19 downto (19-16+1)); --*1
+			when "10" =>
+				adc_next <= adc_shrunk(18 downto (18-16+1)); --*2
+			when "11" =>
+				adc_next <= adc_shrunk(17 downto (17-16+1)); --*4
+			when others =>
+				adc_next <= (others=>'0');
+		end case;
+	end if;	
+end process;
+
+audio_detect_on : if adc_audio_detect=1 generate 
+audio_signal_detector1 : work.audio_signal_detector
+	port map(clk=>CLK49152,reset_n=>reset_n,audio=>adc_in_signed,sample=>adc_valid,volume=>adc_volume_reg,detect_out=>adc_enabled);
+end generate audio_detect_on;
+
+audio_detect_off : if adc_audio_detect=0 generate 
+	adc_enabled <= '1';
+end generate audio_detect_off;
+
+adc_out_signed <= adc_in_signed;
+
+process(adc_use_reg,adc_frozen_reg,adc_enabled,adc_out_signed)
+begin
+	adc_frozen_next <= adc_frozen_reg;	
+
+	adc_use_next <= adc_frozen_reg;
+		
+	if (adc_enabled='1') then
+		adc_frozen_next <= adc_out_signed;
+	end if;		
+	
+end process;
 	 
 adcfilter : entity work.simple_low_pass_filter
 PORT  MAP
 ( 
 	CLK => CLK,
-	AUDIO_IN => not(sample_reg(7)&sample_reg(6 downto 0))&"00000000",
+	AUDIO_IN => signed_to_unsigned(adc_use_reg),
 	SAMPLE_IN => MHZ179_ENABLE,
 	AUDIO_OUT => ADC_FILTERED1
 );
@@ -1750,22 +1930,6 @@
 	AUDIO_OUT => ADC_FILTERED2
 );
 
-process(count_reg,sum_reg,sample_reg,toggle_reg,decimate_reg)
-begin
-	count_next <= count_reg;
-	sum_next <= sum_reg;	
-	sample_next <= sample_reg;
-	decimate_next <= decimate_reg;
-
-	if (toggle_reg(255)='1' and toggle_reg(0)='0') then
-		sum_next <= sum_reg -1;
-	elsif (toggle_reg(255)='0' and toggle_reg(0)='1') then
-		sum_next <= sum_reg +1;
-	end if;	
-
-	sample_next <= sum_reg;
-end process;
-
 irq_on : if irq_bit>0 generate 
 	EXT(irq_bit) <= IRQ;
 end generate irq_on;