Index: common/a8core/address_decoder.vhdl
===================================================================
--- common/a8core/address_decoder.vhdl	(revision 177)
+++ common/a8core/address_decoder.vhdl	(revision 178)
@@ -835,9 +835,9 @@
 							end if;						
 					end if;																			
 
-					ROM_ADDR <= "000000"&"00"&ADDR_next(13 downto 0); -- x00000 based 16k
+					ROM_ADDR <= "000000"&"0000"&ADDR_next(11 downto 0); -- x00000 based 4k
 					SDRAM_ADDR <= SDRAM_OS_ROM_ADDR;
-					SDRAM_ADDR(13 downto 0) <= ADDR_next(13 downto 0);
+					SDRAM_ADDR(11 downto 0) <= ADDR_next(11 downto 0);
 
 				when
 					X"d0"|X"d1"|X"d2"|X"d3"|
Index: common/a8core/atari5200core.vhd
===================================================================
--- common/a8core/atari5200core.vhd	(revision 177)
+++ common/a8core/atari5200core.vhd	(revision 178)
@@ -155,7 +155,8 @@
 		-- Special config params
 		USE_SDRAM :  in STD_LOGIC;
 		ROM_IN_RAM : in std_logic;
-		HALT : in std_logic
+		HALT : in std_logic;
+		THROTTLE_COUNT_6502 : in STD_LOGIC_VECTOR(5 DOWNTO 0)
 	);
 END atari5200core;
 
@@ -246,7 +247,7 @@
 		 MEMORY_READY_ANTIC => MEMORY_READY_ANTIC,
 		 ANTIC_REFRESH => ANTIC_REFRESH_CYCLE,
 		 PAUSE_6502 => HALT,
-		 THROTTLE_COUNT_6502 => "000001",
+		 THROTTLE_COUNT_6502 => THROTTLE_COUNT_6502,
 		 ANTIC_ENABLE_179 => ANTIC_ENABLE_179,
 		 oldcpu_enable => ENABLE_179_MEMWAIT,
 		 CPU_ENABLE_OUT => CPU_SHARED_ENABLE);
@@ -345,7 +346,7 @@
 		 RAM_DATA => RAM_DO,
 		 ram_select => "000",
 		 ROM_DATA => ROM_DO,
-		 rom_select => "00001", 
+		 rom_select => "000001", 
 		 SDRAM_DATA => SDRAM_DO,
 		 DMA_ADDR => DMA_ADDR,
 		 DMA_WRITE_DATA => DMA_WRITE_DATA,
Index: common/a8core/atari5200core_simplesdram.vhd
===================================================================
--- common/a8core/atari5200core_simplesdram.vhd	(nonexistent)
+++ common/a8core/atari5200core_simplesdram.vhd	(revision 178)
@@ -0,0 +1,248 @@
+---------------------------------------------------------------------------
+-- (c) 2013 mark watson
+-- I am happy for anyone to use this for non-commercial use.
+-- If my vhdl files are used commercially or otherwise sold,
+-- please contact me for explicit permission at scrameta (gmail).
+-- This applies for source and binary form and derived works.
+---------------------------------------------------------------------------
+
+LIBRARY ieee;
+USE ieee.std_logic_1164.all; 
+use IEEE.STD_LOGIC_MISC.all;
+use ieee.numeric_std.all;
+
+LIBRARY work;
+-- Simple version that:
+-- i) needs: CLK(58 or 28MHZ) joystick,PS2 keyboard
+-- ii) provides: VIDEO,AUDIO,ROM,RAM
+
+-- example...
+-- KEEP THIS FILE SIMPLE!
+
+ENTITY atari5200core_simplesdram is
+	GENERIC
+	(
+		-- use CLK of 1.79*cycle_length
+		-- I've tested 16 and 32 only, but 4 and 8 might work...
+		cycle_length : integer := 16; -- or 32...
+
+		video_bits : integer := 8;
+	
+		internal_rom : integer :=4;
+		internal_ram : integer := 16384;  -- at start of memory map
+
+		palette : integer := 1
+	);
+	PORT
+	(
+		CLK :  IN  STD_LOGIC; -- cycle_length*1.79MHz
+		RESET_N : IN STD_LOGIC;
+
+		-- VIDEO OUT - PAL/NTSC, original Atari timings approx (may be higher res)
+		VIDEO_VS :  OUT  STD_LOGIC;
+		VIDEO_HS :  OUT  STD_LOGIC;
+		VIDEO_B :  OUT  STD_LOGIC_VECTOR(video_bits-1 DOWNTO 0);
+		VIDEO_G :  OUT  STD_LOGIC_VECTOR(video_bits-1 DOWNTO 0);
+		VIDEO_R :  OUT  STD_LOGIC_VECTOR(video_bits-1 DOWNTO 0);
+
+		-- AUDIO OUT - Pokey/GTIA 1-bit and Covox all mixed
+		-- TODO - choose stereo/mono pokey
+		AUDIO_L : OUT std_logic_vector(15 downto 0);
+		AUDIO_R : OUT std_logic_vector(15 downto 0);
+
+		SDRAM_REQUEST : OUT std_logic;
+		SDRAM_REQUEST_COMPLETE : IN std_logic;
+		SDRAM_READ_ENABLE : out STD_LOGIC;
+		SDRAM_WRITE_ENABLE : out std_logic;
+		SDRAM_ADDR : out STD_LOGIC_VECTOR(22 DOWNTO 0);
+		SDRAM_DO : in STD_LOGIC_VECTOR(31 DOWNTO 0);
+		SDRAM_DI : out STD_LOGIC_VECTOR(31 DOWNTO 0);
+		SDRAM_32BIT_WRITE_ENABLE : out std_logic;
+		SDRAM_16BIT_WRITE_ENABLE : out std_logic;
+		SDRAM_8BIT_WRITE_ENABLE : out std_logic;
+		SDRAM_REFRESH : out std_logic;
+
+		DMA_FETCH : in STD_LOGIC; -- we want to read/write
+		DMA_READ_ENABLE : in std_logic;
+		DMA_32BIT_WRITE_ENABLE : in std_logic;
+		DMA_16BIT_WRITE_ENABLE : in std_logic;
+		DMA_8BIT_WRITE_ENABLE : in std_logic;
+		DMA_ADDR : in std_logic_vector(23 downto 0);
+		DMA_WRITE_DATA : in std_logic_vector(31 downto 0);
+		MEMORY_READY_DMA : out std_logic; -- op complete
+		DMA_MEMORY_DATA : out std_logic_vector(31 downto 0);
+
+		HALT : in std_logic;
+		THROTTLE_COUNT_6502 : in std_logic_vector(5 downto 0) -- standard speed is cycle_length-1
+	
+		-- rename to simple_sdram...
+
+		-- JOYSTICK
+		--JOY1_n : IN std_logic_vector(4 downto 0); -- FRLDU, 0=pressed
+		--JOY2_n : IN std_logic_vector(4 downto 0); -- FRLDU, 0=pressed
+
+		-- KEYBOARD
+		--PS2_CLK : IN STD_LOGIC;
+		--PS2_DAT : IN STD_LOGIC;
+	);
+end atari5200core_simplesdram;
+
+ARCHITECTURE vhdl OF atari5200core_simplesdram IS 
+
+-- pokey keyboard
+SIGNAL KEYBOARD_SCAN : std_logic_vector(5 downto 0);
+SIGNAL KEYBOARD_RESPONSE : std_logic_vector(1 downto 0);
+
+-- PBI
+SIGNAL PBI_WRITE_DATA : std_logic_vector(31 downto 0);
+
+-- INTERNAL ROM/RAM
+SIGNAL	RAM_ADDR :  STD_LOGIC_VECTOR(18 DOWNTO 0);
+SIGNAL	RAM_DO :  STD_LOGIC_VECTOR(15 DOWNTO 0);
+SIGNAL	RAM_REQUEST :  STD_LOGIC;
+SIGNAL	RAM_REQUEST_COMPLETE :  STD_LOGIC;
+SIGNAL	RAM_WRITE_ENABLE :  STD_LOGIC;
+
+SIGNAL	ROM_ADDR :  STD_LOGIC_VECTOR(21 DOWNTO 0);
+SIGNAL	ROM_DO :  STD_LOGIC_VECTOR(7 DOWNTO 0);
+SIGNAL	ROM_REQUEST :  STD_LOGIC;
+SIGNAL	ROM_REQUEST_COMPLETE :  STD_LOGIC;
+
+-- CONFIG
+SIGNAL USE_SDRAM : STD_LOGIC;
+SIGNAL ROM_IN_RAM : STD_LOGIC;
+
+BEGIN
+
+-- PS2 to pokey
+KEYBOARD_RESPONSE <= "11";
+
+atari5200_simple_sdram1 : entity work.atari5200core
+	GENERIC MAP
+	(
+		cycle_length => cycle_length,
+		video_bits => video_bits,
+		palette => palette
+	)
+	PORT MAP
+	(
+		CLK => CLK,
+		RESET_N => RESET_N,
+
+		VIDEO_VS => VIDEO_VS,
+		VIDEO_HS => VIDEO_HS,
+		VIDEO_B => VIDEO_B,
+		VIDEO_G => VIDEO_G,
+		VIDEO_R => VIDEO_R,
+		VIDEO_BLANK => open,
+		VIDEO_BURST => open,
+		VIDEO_START_OF_FIELD => open,
+		VIDEO_ODD_LINE => open,
+
+		AUDIO_L => AUDIO_L,
+		AUDIO_R => AUDIO_R,
+
+		-- Pokey keyboard matrix
+		-- Standard component available to connect this to PS2
+		KEYBOARD_RESPONSE => KEYBOARD_RESPONSE, -- TODO controller
+		KEYBOARD_SCAN => KEYBOARD_SCAN,
+
+		-- Pokey pots
+		POT_IN => (others=>'1'), -- TODO analog controller
+		POT_RESET => open,
+		
+		-- PBI
+		PBI_ADDR => open,
+		PBI_WRITE_ENABLE => open,
+		PBI_SNOOP_DATA => DMA_MEMORY_DATA,
+		PBI_WRITE_DATA => PBI_WRITE_DATA,
+		PBI_WIDTH_8bit_ACCESS => SDRAM_8BIT_WRITE_ENABLE,
+		PBI_WIDTH_16bit_ACCESS => SDRAM_16BIT_WRITE_ENABLE,
+		PBI_WIDTH_32bit_ACCESS => SDRAM_32BIT_WRITE_ENABLE,
+
+		-- TODO - review this mechanism
+		-- Since this is intended for real carts, instead should use real timing, though perhaps that can be external...
+		PBI_ROM_DO => (others=>'1'),
+		PBI_REQUEST => open,
+		PBI_REQUEST_COMPLETE => '1',
+
+		-- SIO
+		SIO_RXD => '1',
+		SIO_TXD => open,
+
+		-- GTIA consol
+		CONSOL_OUT => open, -- TODO sound, pots(err, pokey?), 2bit controller keyboard select
+		CONSOL_IN => (others=>'1'),
+		GTIA_TRIG => (others=>'1'), -- triggers (4 ports...)
+
+		-- ANTIC 
+		ANTIC_REFRESH => SDRAM_REFRESH,
+		
+		-----------------------
+		SDRAM_REQUEST => SDRAM_REQUEST,
+		SDRAM_REQUEST_COMPLETE => SDRAM_REQUEST_COMPLETE,
+		SDRAM_READ_ENABLE => SDRAM_READ_ENABLE,
+		SDRAM_WRITE_ENABLE => SDRAM_WRITE_ENABLE,
+		SDRAM_ADDR => SDRAM_ADDR,
+		SDRAM_DO => SDRAM_DO,
+
+		RAM_ADDR => RAM_ADDR,
+		RAM_DO => RAM_DO,
+		RAM_REQUEST => RAM_REQUEST,
+		RAM_REQUEST_COMPLETE => RAM_REQUEST_COMPLETE,
+		RAM_WRITE_ENABLE => RAM_WRITE_ENABLE,
+		
+		ROM_ADDR => ROM_ADDR,
+		ROM_DO => ROM_DO,
+		ROM_REQUEST => ROM_REQUEST,
+		ROM_REQUEST_COMPLETE => ROM_REQUEST_COMPLETE,
+
+		-- DMA memory map differs
+		DMA_FETCH => DMA_FETCH,
+		DMA_READ_ENABLE => DMA_READ_ENABLE,
+		DMA_32BIT_WRITE_ENABLE => DMA_32BIT_WRITE_ENABLE,
+		DMA_16BIT_WRITE_ENABLE => DMA_16BIT_WRITE_ENABLE,
+		DMA_8BIT_WRITE_ENABLE => DMA_8BIT_WRITE_ENABLE,
+		DMA_ADDR => DMA_ADDR,
+		DMA_WRITE_DATA => DMA_WRITE_DATA,
+		MEMORY_READY_DMA => MEMORY_READY_DMA,
+
+		-- Special config params
+		USE_SDRAM => USE_SDRAM,
+		ROM_IN_RAM => ROM_IN_RAM,
+		THROTTLE_COUNT_6502 => THROTTLE_COUNT_6502,
+		HALT => HALT
+	);
+
+-- Since we're not exposing PBI, expose a few key parts needed for SDRAM
+SDRAM_DI <= PBI_WRITE_DATA;
+
+-- Internal rom/ram
+internalromram1 : entity work.internalromram
+	GENERIC MAP
+	(
+		internal_rom => internal_rom,
+		internal_ram => internal_ram
+	)
+	PORT MAP (
+ 		clock   => CLK,
+		reset_n => RESET_N,
+
+		ROM_ADDR => ROM_ADDR,
+		ROM_REQUEST_COMPLETE => ROM_REQUEST_COMPLETE,
+		ROM_REQUEST => ROM_REQUEST,
+		ROM_DATA => ROM_DO,
+		
+		RAM_ADDR => RAM_ADDR,
+		RAM_WR_ENABLE => RAM_WRITE_ENABLE,
+		RAM_DATA_IN => PBI_WRITE_DATA(7 downto 0),
+		RAM_REQUEST_COMPLETE => RAM_REQUEST_COMPLETE,
+		RAM_REQUEST => RAM_REQUEST,
+		RAM_DATA => RAM_DO(7 downto 0)
+	);
+
+	USE_SDRAM <= '1' when internal_ram=0 else '0';
+	ROM_IN_RAM <= '1' when internal_rom=0 else '0';
+
+end vhdl;
+
Index: common/a8core/internalromram.vhd
===================================================================
--- common/a8core/internalromram.vhd	(revision 177)
+++ common/a8core/internalromram.vhd	(revision 178)
@@ -48,6 +48,17 @@
 		end if;
 	end process;
 
+gen_internal_5200 : if internal_rom=4 generate
+	-- f000 to ffff (4k)
+	rom4 : entity work.os_5200
+	PORT MAP(clock => clock,
+			 address => rom_addr(10 downto 0),
+			 q => ROM_data
+			 );
+	rom_request_complete <= rom_request_reg;
+	
+end generate;
+
 gen_internal_os_b : if internal_rom=3 generate
 	-- d800 to dfff (2k)
 	rom2 : entity work.os2
Index: common/a8core/os_5200.vhdl
===================================================================
--- common/a8core/os_5200.vhdl	(nonexistent)
+++ common/a8core/os_5200.vhdl	(revision 178)
@@ -0,0 +1,2082 @@
+
+--
+--ROMsUsingBlockRAMResources.
+--VHDLcodeforaROMwithregisteredoutput(template2)
+--
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.std_logic_unsigned.all;
+
+entity os_5200 is
+port(
+        clock:in std_logic;
+        address:in std_logic_vector(10 downto 0);
+        q:out std_logic_vector(7 downto 0)
+);
+end os_5200;
+
+architecture syn of os_5200 is
+        type rom_type is array(0 to 2047) of std_logic_vector(7 downto 0);
+        signal ROM:rom_type:=
+(
+	X"00",
+X"00",
+X"00",
+X"00",
+X"00",
+X"00",
+X"00",
+X"00",
+X"00",
+X"18",
+X"18",
+X"18",
+X"18",
+X"00",
+X"18",
+X"00",
+X"00",
+X"66",
+X"66",
+X"66",
+X"00",
+X"00",
+X"00",
+X"00",
+X"00",
+X"66",
+X"ff",
+X"66",
+X"66",
+X"ff",
+X"66",
+X"00",
+X"18",
+X"3e",
+X"60",
+X"3c",
+X"06",
+X"7c",
+X"18",
+X"00",
+X"00",
+X"66",
+X"6c",
+X"18",
+X"30",
+X"66",
+X"46",
+X"00",
+X"1c",
+X"36",
+X"1c",
+X"38",
+X"6f",
+X"66",
+X"3b",
+X"00",
+X"00",
+X"18",
+X"18",
+X"18",
+X"00",
+X"00",
+X"00",
+X"00",
+X"00",
+X"0e",
+X"1c",
+X"18",
+X"18",
+X"1c",
+X"0e",
+X"00",
+X"00",
+X"70",
+X"38",
+X"18",
+X"18",
+X"38",
+X"70",
+X"00",
+X"00",
+X"66",
+X"3c",
+X"ff",
+X"3c",
+X"66",
+X"00",
+X"00",
+X"00",
+X"18",
+X"18",
+X"7e",
+X"18",
+X"18",
+X"00",
+X"00",
+X"00",
+X"00",
+X"00",
+X"00",
+X"00",
+X"18",
+X"18",
+X"30",
+X"00",
+X"00",
+X"00",
+X"7e",
+X"00",
+X"00",
+X"00",
+X"00",
+X"00",
+X"00",
+X"00",
+X"00",
+X"00",
+X"18",
+X"18",
+X"00",
+X"00",
+X"06",
+X"0c",
+X"18",
+X"30",
+X"60",
+X"40",
+X"00",
+X"00",
+X"3c",
+X"66",
+X"6e",
+X"76",
+X"66",
+X"3c",
+X"00",
+X"00",
+X"18",
+X"38",
+X"18",
+X"18",
+X"18",
+X"7e",
+X"00",
+X"00",
+X"3c",
+X"66",
+X"0c",
+X"18",
+X"30",
+X"7e",
+X"00",
+X"00",
+X"7e",
+X"0c",
+X"18",
+X"0c",
+X"66",
+X"3c",
+X"00",
+X"00",
+X"0c",
+X"1c",
+X"3c",
+X"6c",
+X"7e",
+X"0c",
+X"00",
+X"00",
+X"7e",
+X"60",
+X"7c",
+X"06",
+X"66",
+X"3c",
+X"00",
+X"00",
+X"3c",
+X"60",
+X"7c",
+X"66",
+X"66",
+X"3c",
+X"00",
+X"00",
+X"7e",
+X"06",
+X"0c",
+X"18",
+X"30",
+X"30",
+X"00",
+X"00",
+X"3c",
+X"66",
+X"3c",
+X"66",
+X"66",
+X"3c",
+X"00",
+X"00",
+X"3c",
+X"66",
+X"3e",
+X"06",
+X"0c",
+X"38",
+X"00",
+X"00",
+X"00",
+X"18",
+X"18",
+X"00",
+X"18",
+X"18",
+X"00",
+X"00",
+X"00",
+X"18",
+X"18",
+X"00",
+X"18",
+X"18",
+X"30",
+X"06",
+X"0c",
+X"18",
+X"30",
+X"18",
+X"0c",
+X"06",
+X"00",
+X"00",
+X"00",
+X"7e",
+X"00",
+X"00",
+X"7e",
+X"00",
+X"00",
+X"60",
+X"30",
+X"18",
+X"0c",
+X"18",
+X"30",
+X"60",
+X"00",
+X"00",
+X"3c",
+X"66",
+X"0c",
+X"18",
+X"00",
+X"18",
+X"00",
+X"00",
+X"3c",
+X"66",
+X"6e",
+X"6e",
+X"60",
+X"3e",
+X"00",
+X"00",
+X"18",
+X"3c",
+X"66",
+X"66",
+X"7e",
+X"66",
+X"00",
+X"00",
+X"7c",
+X"66",
+X"7c",
+X"66",
+X"66",
+X"7c",
+X"00",
+X"00",
+X"3c",
+X"66",
+X"60",
+X"60",
+X"66",
+X"3c",
+X"00",
+X"00",
+X"78",
+X"6c",
+X"66",
+X"66",
+X"6c",
+X"78",
+X"00",
+X"00",
+X"7e",
+X"60",
+X"7c",
+X"60",
+X"60",
+X"7e",
+X"00",
+X"00",
+X"7e",
+X"60",
+X"7c",
+X"60",
+X"60",
+X"60",
+X"00",
+X"00",
+X"3e",
+X"60",
+X"60",
+X"6e",
+X"66",
+X"3e",
+X"00",
+X"00",
+X"66",
+X"66",
+X"7e",
+X"66",
+X"66",
+X"66",
+X"00",
+X"00",
+X"7e",
+X"18",
+X"18",
+X"18",
+X"18",
+X"7e",
+X"00",
+X"00",
+X"06",
+X"06",
+X"06",
+X"06",
+X"66",
+X"3c",
+X"00",
+X"00",
+X"66",
+X"6c",
+X"78",
+X"78",
+X"6c",
+X"66",
+X"00",
+X"00",
+X"60",
+X"60",
+X"60",
+X"60",
+X"60",
+X"7e",
+X"00",
+X"00",
+X"63",
+X"77",
+X"7f",
+X"6b",
+X"63",
+X"63",
+X"00",
+X"00",
+X"66",
+X"76",
+X"7e",
+X"7e",
+X"6e",
+X"66",
+X"00",
+X"00",
+X"3c",
+X"66",
+X"66",
+X"66",
+X"66",
+X"3c",
+X"00",
+X"00",
+X"7c",
+X"66",
+X"66",
+X"7c",
+X"60",
+X"60",
+X"00",
+X"00",
+X"3c",
+X"66",
+X"66",
+X"66",
+X"6c",
+X"36",
+X"00",
+X"00",
+X"7c",
+X"66",
+X"66",
+X"7c",
+X"6c",
+X"66",
+X"00",
+X"00",
+X"3c",
+X"60",
+X"3c",
+X"06",
+X"06",
+X"3c",
+X"00",
+X"00",
+X"7e",
+X"18",
+X"18",
+X"18",
+X"18",
+X"18",
+X"00",
+X"00",
+X"66",
+X"66",
+X"66",
+X"66",
+X"66",
+X"7e",
+X"00",
+X"00",
+X"66",
+X"66",
+X"66",
+X"66",
+X"3c",
+X"18",
+X"00",
+X"00",
+X"63",
+X"63",
+X"6b",
+X"7f",
+X"77",
+X"63",
+X"00",
+X"00",
+X"66",
+X"66",
+X"3c",
+X"3c",
+X"66",
+X"66",
+X"00",
+X"00",
+X"66",
+X"66",
+X"3c",
+X"18",
+X"18",
+X"18",
+X"00",
+X"00",
+X"7e",
+X"0c",
+X"18",
+X"30",
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+X"00",
+X"fc"
+
+);
+        signal rdata:std_logic_vector(7 downto 0);
+begin
+        rdata<=ROM(conv_integer(address));
+
+        process(clock)
+        begin
+                if(clock'event and clock='1')then
+                	q<=rdata;
+                end if;
+        end process;
+end syn;
Index: common/a8core/pokey_keyboard_scanner.vhdl
===================================================================
--- common/a8core/pokey_keyboard_scanner.vhdl	(revision 177)
+++ common/a8core/pokey_keyboard_scanner.vhdl	(revision 178)
@@ -123,7 +123,7 @@
 				end if;
 				
 			when state_key_bounce =>
-				if (keyboard_response(0) = '0') then -- detected key press
+				if (keyboard_response(0) = '0' or debounce_disable='1') then -- detected key press
 					if (my_key = '1') then -- same key
 						keycode_latch_next <= compare_latch_reg;
 						irq_next <= '1';
Index: common/romgen/5200.rom
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream

Property changes on: common/romgen/5200.rom
___________________________________________________________________
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Index: common/romgen/createall
===================================================================
--- common/romgen/createall	(revision 177)
+++ common/romgen/createall	(revision 178)
@@ -2,6 +2,7 @@
 ./create_rom.pl 1 osborig_high.rom os8 > ../a8core/os8.vhdl
 ./create_rom.pl 1 osborig_low.rom os2 > ../a8core/os2.vhdl
 ./create_rom.pl 1 ATARIBAS.ROM basic > ../a8core/basic.vhdl
+./create_rom.pl 1 5200.rom os_5200 > ../a8core/os_5200.vhdl
 ./create_rom.pl 4 ../../firmware/MCC216.bin zpu_rom 12 > ../../mcc216/zpu_rom.vhdl
 ./create_rom.pl 4 ../../firmware/MIST.bin zpu_rom 12 > ../../mist/zpu_rom.vhdl
 ./create_rom.pl 4 ../../firmware/DE1.bin zpu_rom 12 > ../../de1/zpu_rom.vhdl
