Revision 21
Added by markw over 11 years ago
generic_ram_infer.vhdl | ||
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BEGIN
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IF (clock'event AND clock = '1') THEN
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IF (we_ram = '1') THEN
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ram_block(to_integer(to_01(unsigned(address)))) <= data;
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ram_block(to_integer(to_01(unsigned(address), '0'))) <= data;
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q_ram <= data;
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ELSE
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q_ram <= ram_block(to_integer(to_01(unsigned(address))));
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q_ram <= ram_block(to_integer(to_01(unsigned(address), '0')));
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END IF;
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END IF;
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END PROCESS;
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to_01 silenced sim, but caused build issues on Xilinx. If its invalid use 0