Index: mist_5200/atari800core.qpf
===================================================================
--- mist_5200/atari800core.qpf	(revision 232)
+++ mist_5200/atari800core.qpf	(nonexistent)
@@ -1,30 +0,0 @@
-# -------------------------------------------------------------------------- #
-#
-# Copyright (C) 1991-2012 Altera Corporation
-# Your use of Altera Corporation's design tools, logic functions 
-# and other software and tools, and its AMPP partner logic 
-# functions, and any output files from any of the foregoing 
-# (including device programming or simulation files), and any 
-# associated documentation or information are expressly subject 
-# to the terms and conditions of the Altera Program License 
-# Subscription Agreement, Altera MegaCore Function License 
-# Agreement, or other applicable license agreement, including, 
-# without limitation, that your use is for the sole purpose of 
-# programming logic devices manufactured by Altera and sold by 
-# Altera or its authorized distributors.  Please refer to the 
-# applicable agreement for further details.
-#
-# -------------------------------------------------------------------------- #
-#
-# Quartus II 64-Bit
-# Version 12.1 Build 243 01/31/2013 Service Pack 1 SJ Web Edition
-# Date created = 13:58:38  April 11, 2013
-#
-# -------------------------------------------------------------------------- #
-
-QUARTUS_VERSION = "12.1"
-DATE = "13:58:38  April 11, 2013"
-
-# Revisions
-
-PROJECT_REVISION = "atari800core"
Index: mist_5200/atari800core_mist.vhd
===================================================================
--- mist_5200/atari800core_mist.vhd	(revision 232)
+++ mist_5200/atari800core_mist.vhd	(nonexistent)
@@ -1,693 +0,0 @@
---------------------------------------------------------------------------- -- (c) 2013 mark watson
--- I am happy for anyone to use this for non-commercial use.
--- If my vhdl files are used commercially or otherwise sold,
--- please contact me for explicit permission at scrameta (gmail).
--- This applies for source and binary form and derived works.
----------------------------------------------------------------------------
-
-LIBRARY ieee;
-USE ieee.std_logic_1164.all; 
-use ieee.numeric_std.all;
-
-LIBRARY work;
-
-ENTITY atari800core_mist IS 
-	GENERIC
-	(
-		TV : integer;  -- 1 = PAL, 0=NTSC
-		VIDEO : integer; -- 1 = RGB, 2 = VGA
-		COMPOSITE_SYNC : integer; --0 = no, 1 = yes!
-		SCANDOUBLE : integer -- 1 = YES, 0=NO, (+ later scanlines etc)
-	);
-	PORT
-	(
-		CLOCK_27 :  IN  STD_LOGIC_VECTOR(1 downto 0);
-
-		VGA_VS :  OUT  STD_LOGIC;
-		VGA_HS :  OUT  STD_LOGIC;
-		VGA_B :  OUT  STD_LOGIC_VECTOR(5 DOWNTO 0);
-		VGA_G :  OUT  STD_LOGIC_VECTOR(5 DOWNTO 0);
-		VGA_R :  OUT  STD_LOGIC_VECTOR(5 DOWNTO 0);
-		
-		AUDIO_L : OUT std_logic;
-		AUDIO_R : OUT std_logic;
-
-		SDRAM_BA :  OUT  STD_LOGIC_VECTOR(1 downto 0);
-		SDRAM_nCS :  OUT  STD_LOGIC;
-		SDRAM_nRAS :  OUT  STD_LOGIC;
-		SDRAM_nCAS :  OUT  STD_LOGIC;
-		SDRAM_nWE :  OUT  STD_LOGIC;
-		SDRAM_DQMH :  OUT  STD_LOGIC;
-		SDRAM_DQML :  OUT  STD_LOGIC;
-		SDRAM_CLK :  OUT  STD_LOGIC;
-		SDRAM_CKE :  OUT  STD_LOGIC;
-		SDRAM_A :  OUT  STD_LOGIC_VECTOR(12 DOWNTO 0);
-		SDRAM_DQ :  INOUT  STD_LOGIC_VECTOR(15 DOWNTO 0);
-
-		LED : OUT std_logic;
-		
-		UART_TX :  OUT  STD_LOGIC;
-		UART_RX :  IN  STD_LOGIC;
-		
-		SPI_DO :  INOUT  STD_LOGIC;
-		SPI_DI :  IN  STD_LOGIC;
-		SPI_SCK :  IN  STD_LOGIC;
-		SPI_SS2 :  IN  STD_LOGIC;		
-		SPI_SS3 :  IN  STD_LOGIC;		
-		SPI_SS4 :  IN  STD_LOGIC;
-		CONF_DATA0 :  IN  STD_LOGIC -- AKA SPI_SS5
-	);
-END atari800core_mist;
-
-ARCHITECTURE vhdl OF atari800core_mist IS 
-
-component hq_dac
-port (
-  reset :in std_logic;
-  clk :in std_logic;
-  clk_ena : in std_logic;
-  pcm_in : in std_logic_vector(19 downto 0);
-  dac_out : out std_logic
-);
-end component;
-
-component user_io
-	GENERIC(
-		STRLEN : in integer := 0
-	);
-	PORT(
-		-- conf_str? how to do in vhdl...
-
-		-- mist spi to firmware
-		SPI_CLK : in std_logic;
-		SPI_SS_IO : in std_logic;
-		SPI_MISO : out std_logic;
-		SPI_MOSI : in std_logic;
-
-		-- joysticks
-		JOYSTICK_0 : out std_logic_vector(5 downto 0);
-		JOYSTICK_1 : out std_logic_vector(5 downto 0);
-		JOYSTICK_ANALOG_0 : out std_logic_vector(15 downto 0);
-		JOYSTICK_ANALOG_1 : out std_logic_vector(15 downto 0); -- x axis is top 8 bits, y axis is bottom 8 bits. signed.
-		BUTTONS : out std_logic_vector(1 downto 0);
-		SWITCHES : out std_logic_vector(1 downto 0);
-		STATUS : out std_logic_vector(7 downto 0); -- what is this?
-
-		-- ps2
-		PS2_CLK : in std_logic; --12-16khz
-		PS2_KBD_CLK : out std_logic;
-		PS2_KBD_DATA : out std_logic;
-
-		-- serial (one way?)
-		SERIAL_DATA : in std_logic_vector(7 downto 0);
-		SERIAL_STROBE : in std_logic;
-
-		-- connection to sd card emulation
-		sd_lba : in std_logic_vector(31 downto 0);
-		sd_rd : in std_logic;
-		sd_wr : in std_logic;
-		sd_ack : out std_logic;
-		sd_conf : in std_logic;
-		sd_sdhc : in std_logic;
-		sd_dout : out std_logic_vector(7 downto 0);
-		sd_dout_strobe : out std_logic;
-		sd_din : in std_logic_vector(7 downto 0);
-		sd_din_strobe : out std_logic
-	  );
-	end component;
-
-	component sd_card
-	PORT (
-		-- link to user_io for io controller
-		io_lba : out std_logic_vector(31 downto 0);
-		io_rd : out std_logic;
-		io_wr : out std_logic;
-		io_ack : in std_logic;
-		io_conf : out std_logic;
-		io_sdhc : out std_logic;
-		
-		-- data coming in from io controller
-		io_din : in std_logic_vector(7 downto 0);
-		io_din_strobe : in std_logic;
-		
-		-- data going out to io controller
-		io_dout : out std_logic_vector(7 downto 0);
-		io_dout_strobe : in std_logic;
-		
-		-- configuration input
-		allow_sdhc : in std_logic;
-	
-		sd_cs : in std_logic;
-		sd_sck : in std_logic;
-		sd_sdi : in std_logic;
-		sd_sdo : out std_logic
-	); 
-	end component;
-
-  signal AUDIO_L_PCM : std_logic_vector(15 downto 0);
-  signal AUDIO_R_PCM : std_logic_vector(15 downto 0);
-
-  signal VGA_VS_RAW : std_logic;
-  signal VGA_HS_RAW : std_logic;
-
-  signal RESET_n : std_logic;
-  signal PLL_LOCKED : std_logic;
-  signal CLK : std_logic;
-  signal CLK_SDRAM : std_logic;
-
-  signal CLK_PLL1 : std_logic; -- cascaded to get better pal clock
-  signal PLL1_LOCKED : std_logic;
-
-  SIGNAL PS2_CLK : std_logic;
-  SIGNAL PS2_DAT : std_logic;
-  SIGNAL FKEYS : std_logic_vector(11 downto 0);
-
-  signal capslock_pressed : std_logic;
-  signal capsheld_next : std_logic;
-  signal capsheld_reg : std_logic;
-  
-  signal spi_miso_io : std_logic;
-
-  signal mist_buttons : std_logic_vector(1 downto 0);
-  signal mist_switches : std_logic_vector(1 downto 0);
-
-  signal		JOY1 :  STD_LOGIC_VECTOR(5 DOWNTO 0);
-  signal		JOY2 :  STD_LOGIC_VECTOR(5 DOWNTO 0);
-  signal		JOY1X : std_logic_vector(7 downto 0);
-  signal		JOY1Y : std_logic_vector(7 downto 0);
-  signal		JOY2X : std_logic_vector(7 downto 0);
-  signal		JOY2Y : std_logic_vector(7 downto 0);
-  signal		JOY1_n :  STD_LOGIC_VECTOR(4 DOWNTO 0);
-  signal		JOY2_n :  STD_LOGIC_VECTOR(4 DOWNTO 0);
-  signal joy_still : std_logic;
-
-  SIGNAL	KEYBOARD_RESPONSE :  STD_LOGIC_VECTOR(1 DOWNTO 0);
-  SIGNAL	KEYBOARD_SCAN :  STD_LOGIC_VECTOR(5 DOWNTO 0);
-  signal controller_select : std_logic_vector(1 downto 0);
-
-  SIGNAL PAL : std_logic;
-  SIGNAL COMPOSITE_ON_HSYNC : std_logic;
-  SIGNAL VGA : std_logic;
-
-  signal SDRAM_REQUEST : std_logic;
-  signal SDRAM_REQUEST_COMPLETE : std_logic;
-  signal SDRAM_READ_ENABLE :  STD_LOGIC;
-  signal SDRAM_WRITE_ENABLE : std_logic;
-  signal SDRAM_ADDR : STD_LOGIC_VECTOR(22 DOWNTO 0);
-  signal SDRAM_DO : STD_LOGIC_VECTOR(31 DOWNTO 0);
-  signal SDRAM_DI : STD_LOGIC_VECTOR(31 DOWNTO 0);
-  signal SDRAM_WIDTH_8bit_ACCESS : std_logic;
-  signal SDRAM_WIDTH_16bit_ACCESS : std_logic;
-  signal SDRAM_WIDTH_32bit_ACCESS : std_logic;
-
-  signal SDRAM_REFRESH : std_logic;
-  
-  signal SDRAM_RESET_N : std_logic;
-
-	-- dma/virtual drive
-	signal DMA_ADDR_FETCH : std_logic_vector(23 downto 0);
-	signal DMA_WRITE_DATA : std_logic_vector(31 downto 0);
-	signal DMA_FETCH : std_logic;
-	signal DMA_32BIT_WRITE_ENABLE : std_logic;
-	signal DMA_16BIT_WRITE_ENABLE : std_logic;
-	signal DMA_8BIT_WRITE_ENABLE : std_logic;
-	signal DMA_READ_ENABLE : std_logic;
-	signal DMA_MEMORY_READY : std_logic;
-	signal DMA_MEMORY_DATA : std_logic_vector(31 downto 0);
-
-	signal ZPU_ADDR_ROM : std_logic_vector(15 downto 0);
-	signal ZPU_ROM_DATA :  std_logic_vector(31 downto 0);
-
-	signal ZPU_OUT1 : std_logic_vector(31 downto 0);
-	signal ZPU_OUT2 : std_logic_vector(31 downto 0);
-	signal ZPU_OUT3 : std_logic_vector(31 downto 0);
-	signal ZPU_OUT4 : std_logic_vector(31 downto 0);
-
-	signal zpu_pokey_enable : std_logic;
-	signal zpu_sio_txd : std_logic;
-	signal zpu_sio_rxd : std_logic;
-	signal zpu_sio_command : std_logic;
-
-	-- system control from zpu
-	signal ram_select : std_logic_vector(2 downto 0);
-	signal rom_select : std_logic_vector(5 downto 0);
-	signal reset_atari : std_logic;
-	signal pause_atari : std_logic;
-	SIGNAL speed_6502 : std_logic_vector(5 downto 0);
-
-	-- connection to sd card emulation
-	signal sd_lba : std_logic_vector(31 downto 0);
-	signal sd_rd : std_logic;
-	signal sd_wr : std_logic;
-	signal sd_ack : std_logic;
-	signal sd_conf : std_logic;
-	signal sd_sdhc : std_logic;
-	signal sd_dout : std_logic_vector(7 downto 0);
-	signal sd_dout_strobe : std_logic;
-	signal sd_din : std_logic_vector(7 downto 0);
-	signal sd_din_strobe : std_logic;
-
-	signal mist_sd_sdo : std_logic;
-	signal mist_sd_sck : std_logic;
-	signal mist_sd_sdi : std_logic;
-	signal mist_sd_cs : std_logic;
-
-	-- ps2
-	signal SLOW_PS2_CLK : std_logic; -- around 16KHz
-
-	-- scandoubler
-	signal half_scandouble_enable_reg : std_logic;
-	signal half_scandouble_enable_next : std_logic;
-	signal VIDEO_B : std_logic_vector(7 downto 0);
-
-BEGIN 
-pal <= '1' when tv=1 else '0';
-vga <= '1' when video=2 else '0';
-composite_on_hsync <= '1' when composite_sync=1 else '0';
-
--- mist spi io
-	spi_do <= spi_miso_io when CONF_DATA0 ='0' else 'Z';
-
-my_user_io : user_io
-	PORT map(
-	   SPI_CLK => SPI_SCK,
-	   SPI_SS_IO => CONF_DATA0,
-	   SPI_MISO => SPI_miso_io,
-	   SPI_MOSI => SPI_DI,
-		JOYSTICK_0 => joy2,
-		JOYSTICK_1 => joy1,
-		JOYSTICK_ANALOG_0(15 downto 8) => joy2x,
-		JOYSTICK_ANALOG_0(7 downto 0) => joy2y,
-		JOYSTICK_ANALOG_1(15 downto 8) => joy1x,
-		JOYSTICK_ANALOG_1(7 downto 0) => joy1y,
-		BUTTONS => mist_buttons,
-		SWITCHES => mist_switches,
-		STATUS => open,
-
-		PS2_CLK => SLOW_PS2_CLK,
-		PS2_KBD_CLK => ps2_clk,
-		PS2_KBD_DATA => ps2_dat,
-	
-		SERIAL_DATA => (others=>'0'),
-		SERIAL_STROBE => '0',
-
-		sd_lba => sd_lba,
-		sd_rd => sd_rd,
-		sd_wr => sd_wr,
-		sd_ack => sd_ack,
-		sd_conf => sd_conf,
-		sd_sdhc => sd_sdhc,
-		sd_dout => sd_dout,
-		sd_dout_strobe => sd_dout_strobe,
-		sd_din => sd_din,
-		sd_din_strobe => sd_din_strobe
-	  );
-
-my_sd_card : sd_card
-	PORT map (
-		io_lba => sd_lba,
-		io_rd => sd_rd,
-		io_wr => sd_wr,
-		io_ack => sd_ack,
-		io_conf => sd_conf,
-		io_sdhc => sd_sdhc,
-		
-		io_din => sd_dout,
-		io_din_strobe => sd_dout_strobe,
-		
-		io_dout => sd_din,
-		io_dout_strobe => sd_din_strobe,
-		
-		allow_sdhc => '1',
-	
-		sd_cs => mist_sd_cs,
-		sd_sck => mist_sd_sck,
-		sd_sdi => mist_sd_sdi,
-		sd_sdo => mist_sd_sdo
-	); 
-	  
-	 joy1_n <= not(joy1(5)&joy1(3 downto 0));
-	 joy2_n <= not(joy2(5)&joy2(3 downto 0));
-
--- PS2 to pokey
-keyboard_map1 : entity work.ps2_to_atari5200
-	PORT MAP
-	( 
-		CLK => clk,
-		RESET_N => reset_n,
-		PS2_CLK => ps2_clk,
-		PS2_DAT => ps2_dat,
-
-		FIRE2 => '0'&'0'&joy2(4)&joy1(4),
-		CONTROLLER_SELECT => CONTROLLER_SELECT, -- selected stick keyboard/shift button
-		
-		KEYBOARD_SCAN => KEYBOARD_SCAN,
-		KEYBOARD_RESPONSE => KEYBOARD_RESPONSE,
-
-		FKEYS => FKEYS
-	);
--- stick 0: consol(1 downto 0)="00"
-
-joy_still <= joy1_n(3) and joy1_n(2) and joy1_n(1) and joy1_n(0); -- TODO, need something better here I think! e.g. keypad? 5200 not centreing
-	 
-dac_left : hq_dac
-port map
-(
-  reset => not(reset_n),
-  clk => clk,
-  clk_ena => '1',
-  pcm_in => AUDIO_L_PCM&"0000",
-  dac_out => audio_l
-);
-
-dac_right : hq_dac
-port map
-(
-  reset => not(reset_n),
-  clk => clk,
-  clk_ena => '1',
-  pcm_in => AUDIO_R_PCM&"0000",
-  dac_out => audio_r
-);
-
-gen_ntsc_pll : if tv=0 generate
-mist_pll : entity work.pll_ntsc
-PORT MAP(inclk0 => CLOCK_27(0),
-		 c0 => CLK_SDRAM,
-		 c1 => CLK,
-		 c2 => SDRAM_CLK,
-		 c3 => SLOW_PS2_CLK,
-		 locked => PLL_LOCKED);
-end generate;
-
-gen_pal_pll : if tv=1 generate
-mist_pll : entity work.pll_pal_pre
-PORT MAP(inclk0 => CLOCK_27(0),
-		 c0 => CLK_PLL1,
-		 locked => PLL1_LOCKED);
-mist_pll2 : entity work.pll_pal_post
-PORT MAP(inclk0 => CLK_PLL1,
-		 c0 => CLK_SDRAM,
-		 c1 => CLK,
-		 c2 => SDRAM_CLK,
-		 c3 => SLOW_PS2_CLK,
-		 areset => not(PLL1_LOCKED),
-		 locked => PLL_LOCKED);
-end generate;
-
-reset_n <= PLL_LOCKED;
-
-atari5200_test : entity work.atari5200core_simplesdram
-	GENERIC MAP
-	(
-		cycle_length => 32,
-		--internal_rom => 4, --5200 rom...
-		internal_rom => 0, --5200 rom...
-		internal_ram => 0, -- only 1 option for 5200...
-		video_bits => 8,
-		palette => 0
-	)
-	PORT MAP
-	(
-		CLK => CLK,
-		RESET_N => RESET_N and SDRAM_RESET_N and not(reset_atari),
-
-		VIDEO_VS => VGA_VS_RAW,
-		VIDEO_HS => VGA_HS_RAW,
-		VIDEO_B => VIDEO_B,
-		VIDEO_G => open,
-		VIDEO_R => open,
-
-		AUDIO_L => AUDIO_L_PCM,
-		AUDIO_R => AUDIO_R_PCM,
-
-		SDRAM_REQUEST => SDRAM_REQUEST,
-		SDRAM_REQUEST_COMPLETE => SDRAM_REQUEST_COMPLETE,
-		SDRAM_READ_ENABLE => SDRAM_READ_ENABLE,
-		SDRAM_WRITE_ENABLE => SDRAM_WRITE_ENABLE,
-		SDRAM_ADDR => SDRAM_ADDR,
-		SDRAM_DO => SDRAM_DO,
-		SDRAM_DI => SDRAM_DI,
-		SDRAM_32BIT_WRITE_ENABLE => SDRAM_WIDTH_32bit_ACCESS,
-		SDRAM_16BIT_WRITE_ENABLE => SDRAM_WIDTH_16bit_ACCESS,
-		SDRAM_8BIT_WRITE_ENABLE => SDRAM_WIDTH_8bit_ACCESS,
-		SDRAM_REFRESH => SDRAM_REFRESH,
-
-		DMA_FETCH => dma_fetch,
-		DMA_READ_ENABLE => dma_read_enable,
-		DMA_32BIT_WRITE_ENABLE => dma_32bit_write_enable,
-		DMA_16BIT_WRITE_ENABLE => dma_16bit_write_enable,
-		DMA_8BIT_WRITE_ENABLE => dma_8bit_write_enable,
-		DMA_ADDR => dma_addr_fetch,
-		DMA_WRITE_DATA => dma_write_data,
-		MEMORY_READY_DMA => dma_memory_ready,
-		DMA_MEMORY_DATA => dma_memory_data, 
-
-		THROTTLE_COUNT_6502 => speed_6502,
-		HALT => pause_atari,
-
-		-- JOYSTICK
-		JOY1_X => signed(joy1x),
-		JOY1_Y => signed(joy1y),
-		JOY1_BUTTON => joy1_n(4),
-		JOY2_X => signed(joy2x),
-		JOY2_Y => signed(joy2y),
-		JOY2_BUTTON => joy2_n(4),
-
-		-- Pokey keyboard matrix
-		-- Standard component available to connect this to PS2
-		KEYBOARD_RESPONSE => KEYBOARD_RESPONSE,
-		KEYBOARD_SCAN => KEYBOARD_SCAN,
-		CONTROLLER_SELECT => CONTROLLER_SELECT
-	);
-
---atarixl_simple_sdram1 : entity work.atari800core_simple_sdram
---	GENERIC MAP
---	(
---		cycle_length => 32,
---		internal_rom => 0,
---		internal_ram => 0,
---		video_bits => 8,
---		palette => 0
---	)
---	PORT MAP
---	(
---		CLK => CLK,
---		RESET_N => RESET_N and SDRAM_RESET_N and not(reset_atari),
---
---		VIDEO_VS => VGA_VS_RAW,
---		VIDEO_HS => VGA_HS_RAW,
---		VIDEO_B => VIDEO_B,
---		VIDEO_G => open,
---		VIDEO_R => open,
---
---		AUDIO_L => AUDIO_L_PCM,
---		AUDIO_R => AUDIO_R_PCM,
---
---		JOY1_n => JOY1_n(4)&JOY1_n(0)&JOY1_n(1)&JOY1_n(2)&JOY1_n(3),
---		JOY2_n => JOY2_n(4)&JOY2_n(0)&JOY2_n(1)&JOY2_n(2)&JOY2_n(3),
---
---		KEYBOARD_RESPONSE => KEYBOARD_RESPONSE,
---		KEYBOARD_SCAN => KEYBOARD_SCAN,
---
---		SIO_COMMAND => zpu_sio_command,
---		SIO_RXD => zpu_sio_txd,
---		SIO_TXD => zpu_sio_rxd,
---
---		CONSOL_OPTION => CONSOL_OPTION,
---		CONSOL_SELECT => CONSOL_SELECT,
---		CONSOL_START => CONSOL_START,
---
---		SDRAM_REQUEST => SDRAM_REQUEST,
---		SDRAM_REQUEST_COMPLETE => SDRAM_REQUEST_COMPLETE,
---		SDRAM_READ_ENABLE => SDRAM_READ_ENABLE,
---		SDRAM_WRITE_ENABLE => SDRAM_WRITE_ENABLE,
---		SDRAM_ADDR => SDRAM_ADDR,
---		SDRAM_DO => SDRAM_DO,
---		SDRAM_DI => SDRAM_DI,
---		SDRAM_32BIT_WRITE_ENABLE => SDRAM_WIDTH_32bit_ACCESS,
---		SDRAM_16BIT_WRITE_ENABLE => SDRAM_WIDTH_16bit_ACCESS,
---		SDRAM_8BIT_WRITE_ENABLE => SDRAM_WIDTH_8bit_ACCESS,
---		SDRAM_REFRESH => SDRAM_REFRESH,
---
---		DMA_FETCH => dma_fetch,
---		DMA_READ_ENABLE => dma_read_enable,
---		DMA_32BIT_WRITE_ENABLE => dma_32bit_write_enable,
---		DMA_16BIT_WRITE_ENABLE => dma_16bit_write_enable,
---		DMA_8BIT_WRITE_ENABLE => dma_8bit_write_enable,
---		DMA_ADDR => dma_addr_fetch,
---		DMA_WRITE_DATA => dma_write_data,
---		MEMORY_READY_DMA => dma_memory_ready,
---		DMA_MEMORY_DATA => dma_memory_data, 
---
---   		RAM_SELECT => ram_select,
---    		ROM_SELECT => rom_select,
---		PAL => PAL,
---		HALT => pause_atari,
---		THROTTLE_COUNT_6502 => speed_6502
---	);
-
-sdram_adaptor : entity work.sdram_statemachine
-GENERIC MAP(ADDRESS_WIDTH => 22,
-			AP_BIT => 10,
-			COLUMN_WIDTH => 8,
-			ROW_WIDTH => 12
-			)
-PORT MAP(CLK_SYSTEM => CLK,
-		 CLK_SDRAM => CLK_SDRAM,
-		 RESET_N =>  RESET_N,
-		 READ_EN => SDRAM_READ_ENABLE,
-		 WRITE_EN => SDRAM_WRITE_ENABLE,
-		 REQUEST => SDRAM_REQUEST,
-		 BYTE_ACCESS => SDRAM_WIDTH_8BIT_ACCESS,
-		 WORD_ACCESS => SDRAM_WIDTH_16BIT_ACCESS,
-		 LONGWORD_ACCESS => SDRAM_WIDTH_32BIT_ACCESS,
-		 REFRESH => SDRAM_REFRESH,
-		 ADDRESS_IN => SDRAM_ADDR,
-		 DATA_IN => SDRAM_DI,
-		 SDRAM_DQ => SDRAM_DQ,
-		 COMPLETE => SDRAM_REQUEST_COMPLETE,
-		 SDRAM_BA0 => SDRAM_BA(0),
-		 SDRAM_BA1 => SDRAM_BA(1),
-		 SDRAM_CKE => SDRAM_CKE,
-		 SDRAM_CS_N => SDRAM_nCS,
-		 SDRAM_RAS_N => SDRAM_nRAS,
-		 SDRAM_CAS_N => SDRAM_nCAS,
-		 SDRAM_WE_N => SDRAM_nWE,
-		 SDRAM_ldqm => SDRAM_DQML,
-		 SDRAM_udqm => SDRAM_DQMH,
-		 DATA_OUT => SDRAM_DO,
-		 SDRAM_ADDR => SDRAM_A(11 downto 0),
-		 reset_client_n => SDRAM_RESET_N
-		 );
-		 
-SDRAM_A(12) <= '0';
---SDRAM_REFRESH <= '0'; -- TODO
-
--- Until SDRAM enabled... TODO
---SDRAM_nCS <= '1';
---SDRAM_DQ <= (others=>'Z');
-
---SDRAM_CKE <= '1';		 
-LED <= zpu_sio_rxd;
-
---VGA_HS <= not(VGA_HS_RAW xor VGA_VS_RAW);
---VGA_VS <= not(VGA_VS_RAW);
-
-	process(clk,RESET_N,SDRAM_RESET_N,reset_atari)
-	begin
-		if ((RESET_N and SDRAM_RESET_N and not(reset_atari))='0') then
-			half_scandouble_enable_reg <= '0';
-		elsif (clk'event and clk='1') then
-			half_scandouble_enable_reg <= half_scandouble_enable_next;
-		end if;
-	end process;
-
-	half_scandouble_enable_next <= not(half_scandouble_enable_reg);
-
-	scandoubler1: entity work.scandoubler
-	GENERIC MAP
-	(
-		video_bits=>6
-	)
-	PORT MAP
-	( 
-		CLK => CLK,
-		RESET_N => RESET_N and SDRAM_RESET_N and not(reset_atari),
-		
-		VGA => vga,
-		COMPOSITE_ON_HSYNC => composite_on_hsync,
-
-		colour_enable => half_scandouble_enable_reg,
-		doubled_enable => '1',
-		scanlines_on => mist_switches(1),
-		
-		-- GTIA interface
-		colour_in => VIDEO_B,
-		vsync_in => VGA_VS_RAW,
-		hsync_in => VGA_HS_RAW,
-		
-		-- TO TV...
-		R => VGA_R,
-		G => VGA_G,
-		B => VGA_B,
-		
-		VSYNC => VGA_VS,
-		HSYNC => VGA_HS
-	);
-
-zpu: entity work.zpucore
-	GENERIC MAP
-	(
-		platform => 1,
-		spi_clock_div => 16 -- 28MHz/2. Max for SD cards is 25MHz...
-	)
-	PORT MAP
-	(
-		-- standard...
-		CLK => CLK,
-		RESET_N => RESET_N and sdram_reset_n,
-
-		-- dma bus master (with many waitstates...)
-		ZPU_ADDR_FETCH => dma_addr_fetch,
-		ZPU_DATA_OUT => dma_write_data,
-		ZPU_FETCH => dma_fetch,
-		ZPU_32BIT_WRITE_ENABLE => dma_32bit_write_enable,
-		ZPU_16BIT_WRITE_ENABLE => dma_16bit_write_enable,
-		ZPU_8BIT_WRITE_ENABLE => dma_8bit_write_enable,
-		ZPU_READ_ENABLE => dma_read_enable,
-		ZPU_MEMORY_READY => dma_memory_ready,
-		ZPU_MEMORY_DATA => dma_memory_data, 
-
-		-- rom bus master
-		-- data on next cycle after addr
-		ZPU_ADDR_ROM => zpu_addr_rom,
-		ZPU_ROM_DATA => zpu_rom_data,
-	
-		ZPU_ROM_WREN => open,
-
-		-- spi master
-		ZPU_SD_DAT0 => mist_sd_sdo,
-		ZPU_SD_CLK => mist_sd_sck,
-		ZPU_SD_CMD => mist_sd_sdi,
-		ZPU_SD_DAT3 => mist_sd_cs,
-
-		-- SIO
-		-- Ditto for speaking to Atari, we have a built in Pokey
-		ZPU_POKEY_ENABLE => zpu_pokey_enable,
-		ZPU_SIO_TXD => zpu_sio_txd,
-		ZPU_SIO_RXD => zpu_sio_rxd,
-		ZPU_SIO_COMMAND => zpu_sio_command,
-
-		-- external control
-		-- switches etc. sector DMA blah blah.
-		ZPU_IN1 => X"00000"&(FKEYS(11) or (mist_buttons(0) and not(joy1_n(4))))&(FKEYS(10) or (mist_buttons(0) and joy1_n(4) and joy_still))&(FKEYS(9) or (mist_buttons(0) and joy1_n(4) and not(joy_still)))&FKEYS(8 downto 0),
-		ZPU_IN2 => X"00000000",
-		ZPU_IN3 => X"00000000",
-		ZPU_IN4 => X"00000000",
-
-		-- ouputs - e.g. Atari system control, halt, throttle, rom select
-		ZPU_OUT1 => zpu_out1,
-		ZPU_OUT2 => zpu_out2,
-		ZPU_OUT3 => zpu_out3,
-		ZPU_OUT4 => zpu_out4
-	);
-
-	pause_atari <= zpu_out1(0);
-	reset_atari <= zpu_out1(1);
-	speed_6502 <= zpu_out1(7 downto 2);
-	ram_select <= zpu_out1(10 downto 8);
-	rom_select <= zpu_out1(16 downto 11);
-
-zpu_rom1: entity work.zpu_rom
-	port map(
-	        clock => clk,
-	        address => zpu_addr_rom(13 downto 2),
-	        q => zpu_rom_data
-	);
-
-enable_179_clock_div_zpu_pokey : entity work.enable_divider
-	generic map (COUNT=>32) -- cycle_length
-	port map(clk=>clk,reset_n=>reset_n,enable_in=>'1',enable_out=>zpu_pokey_enable);
-
-END vhdl;
Index: mist_5200/atari800core.qsf
===================================================================
--- mist_5200/atari800core.qsf	(revision 232)
+++ mist_5200/atari800core.qsf	(nonexistent)
@@ -1,320 +0,0 @@
-# Copyright (C) 1991-2007 Altera Corporation
-# Your use of Altera Corporation's design tools, logic functions 
-# and other software and tools, and its AMPP partner logic 
-# functions, and any output files from any of the foregoing 
-# (including device programming or simulation files), and any 
-# associated documentation or information are expressly subject 
-# to the terms and conditions of the Altera Program License 
-# Subscription Agreement, Altera MegaCore Function License 
-# Agreement, or other applicable license agreement, including, 
-# without limitation, that your use is for the sole purpose of 
-# programming logic devices manufactured by Altera and sold by 
-# Altera or its authorized distributors.  Please refer to the 
-# applicable agreement for further details.
-
-
-# The default values for assignments are stored in the file
-#		minimig_de1_assignment_defaults.qdf
-# If this file doesn't exist, and for assignments not listed, see file
-#		assignment_defaults.qdf
-
-# Altera recommends that you do not modify this file. This
-# file is updated automatically by the Quartus II software
-# and any changes you make may be lost or overwritten.
-
-
-set_global_assignment -name FAMILY "Cyclone III"
-set_global_assignment -name DEVICE EP3C25E144C8
-set_global_assignment -name TOP_LEVEL_ENTITY atari800core_mist
-set_global_assignment -name ORIGINAL_QUARTUS_VERSION 7.2
-set_global_assignment -name PROJECT_CREATION_TIME_DATE "22:27:29  OCTOBER 30, 2007"
-set_global_assignment -name LAST_QUARTUS_VERSION "12.1 SP1.33"
-set_global_assignment -name USE_GENERATED_PHYSICAL_CONSTRAINTS OFF -section_id eda_palace
-set_global_assignment -name DEVICE_FILTER_PIN_COUNT 144
-set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "NO HEAT SINK WITH STILL AIR"
-set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
-set_global_assignment -name OPTIMIZE_HOLD_TIMING "ALL PATHS"
-set_global_assignment -name FITTER_EFFORT "AUTO FIT"
-set_global_assignment -name STRATIX_CONFIGURATION_DEVICE EPCS4
-set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "USE AS REGULAR IO"
-set_global_assignment -name RESERVE_ASDO_AFTER_CONFIGURATION "AS INPUT TRI-STATED"
-set_global_assignment -name CYCLONEIII_CONFIGURATION_SCHEME "PASSIVE SERIAL"
-set_global_assignment -name GENERATE_RBF_FILE ON
-set_global_assignment -name FORCE_CONFIGURATION_VCCIO ON
-set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL"
-
-set_location_assignment PIN_7 -to LED
-set_location_assignment PIN_22 -to CLOCK_50[0]
-set_location_assignment PIN_23 -to CLOCK_50[1]
-set_location_assignment PIN_128 -to CLOCK_32[0]
-set_location_assignment PIN_129 -to CLOCK_32[1]
-set_location_assignment PIN_54 -to CLOCK_27[0]
-set_location_assignment PIN_55 -to CLOCK_27[1]
-set_location_assignment PIN_144 -to VGA_R[5]
-set_location_assignment PIN_143 -to VGA_R[4]
-set_location_assignment PIN_142 -to VGA_R[3]
-set_location_assignment PIN_141 -to VGA_R[2]
-set_location_assignment PIN_137 -to VGA_R[1]
-set_location_assignment PIN_135 -to VGA_R[0]
-set_location_assignment PIN_133 -to VGA_B[5]
-set_location_assignment PIN_132 -to VGA_B[4]
-set_location_assignment PIN_125 -to VGA_B[3]
-set_location_assignment PIN_121 -to VGA_B[2]
-set_location_assignment PIN_120 -to VGA_B[1]
-set_location_assignment PIN_115 -to VGA_B[0]
-set_location_assignment PIN_114 -to VGA_G[5]
-set_location_assignment PIN_113 -to VGA_G[4]
-set_location_assignment PIN_112 -to VGA_G[3]
-set_location_assignment PIN_111 -to VGA_G[2]
-set_location_assignment PIN_110 -to VGA_G[1]
-set_location_assignment PIN_106 -to VGA_G[0]
-set_location_assignment PIN_136 -to VGA_VS
-set_location_assignment PIN_119 -to VGA_HS
-set_location_assignment PIN_65 -to AUDIO_L
-set_location_assignment PIN_80 -to AUDIO_R
-set_location_assignment PIN_46 -to UART_TX
-set_location_assignment PIN_31 -to UART_RX
-set_location_assignment PIN_105 -to SPI_DO
-set_location_assignment PIN_88 -to SPI_DI
-set_location_assignment PIN_126 -to SPI_SCK
-set_location_assignment PIN_127 -to SPI_SS2
-set_location_assignment PIN_91 -to SPI_SS3
-set_location_assignment PIN_90 -to SPI_SS4
-set_location_assignment PIN_13 -to CONF_DATA0
-
-set_location_assignment PIN_49 -to SDRAM_A[0]
-set_location_assignment PIN_44 -to SDRAM_A[1]
-set_location_assignment PIN_42 -to SDRAM_A[2]
-set_location_assignment PIN_39 -to SDRAM_A[3]
-set_location_assignment PIN_4 -to SDRAM_A[4]
-set_location_assignment PIN_6 -to SDRAM_A[5]
-set_location_assignment PIN_8 -to SDRAM_A[6]
-set_location_assignment PIN_10 -to SDRAM_A[7]
-set_location_assignment PIN_11 -to SDRAM_A[8]
-set_location_assignment PIN_28 -to SDRAM_A[9]
-set_location_assignment PIN_50 -to SDRAM_A[10]
-set_location_assignment PIN_30 -to SDRAM_A[11]
-set_location_assignment PIN_32 -to SDRAM_A[12]
-set_location_assignment PIN_83 -to SDRAM_DQ[0]
-set_location_assignment PIN_79 -to SDRAM_DQ[1]
-set_location_assignment PIN_77 -to SDRAM_DQ[2]
-set_location_assignment PIN_76 -to SDRAM_DQ[3]
-set_location_assignment PIN_72 -to SDRAM_DQ[4]
-set_location_assignment PIN_71 -to SDRAM_DQ[5]
-set_location_assignment PIN_69 -to SDRAM_DQ[6]
-set_location_assignment PIN_68 -to SDRAM_DQ[7]
-set_location_assignment PIN_86 -to SDRAM_DQ[8]
-set_location_assignment PIN_87 -to SDRAM_DQ[9]
-set_location_assignment PIN_98 -to SDRAM_DQ[10]
-set_location_assignment PIN_99 -to SDRAM_DQ[11]
-set_location_assignment PIN_100 -to SDRAM_DQ[12]
-set_location_assignment PIN_101 -to SDRAM_DQ[13]
-set_location_assignment PIN_103 -to SDRAM_DQ[14]
-set_location_assignment PIN_104 -to SDRAM_DQ[15]
-set_location_assignment PIN_58 -to SDRAM_BA[0]
-set_location_assignment PIN_51 -to SDRAM_BA[1]
-set_location_assignment PIN_85 -to SDRAM_DQMH
-set_location_assignment PIN_67 -to SDRAM_DQML
-set_location_assignment PIN_60 -to SDRAM_nRAS
-set_location_assignment PIN_64 -to SDRAM_nCAS
-set_location_assignment PIN_66 -to SDRAM_nWE
-set_location_assignment PIN_59 -to SDRAM_nCS
-set_location_assignment PIN_33 -to SDRAM_CKE
-set_location_assignment PIN_43 -to SDRAM_CLK
-
-set_global_assignment -name CYCLONEII_OPTIMIZATION_TECHNIQUE BALANCED
-set_global_assignment -name SMART_RECOMPILE ON
-set_global_assignment -name ENABLE_SIGNALTAP ON
-set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC ON
-set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION ON
-set_global_assignment -name PHYSICAL_SYNTHESIS_EFFORT NORMAL
-set_global_assignment -name FMAX_REQUIREMENT "114 MHz"
-set_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING OFF
-set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
-set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
-set_global_assignment -name USE_CONFIGURATION_DEVICE ON
-set_global_assignment -name TPD_REQUIREMENT "2 ns"
-set_global_assignment -name TSU_REQUIREMENT "2 ns"
-set_global_assignment -name TCO_REQUIREMENT "2 ns"
-set_global_assignment -name ALLOW_POWER_UP_DONT_CARE OFF
-set_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS OFF
-set_global_assignment -name AUTO_RAM_TO_LCELL_CONVERSION OFF
-set_global_assignment -name AUTO_RAM_RECOGNITION ON
-set_global_assignment -name AUTO_ROM_RECOGNITION ON
-set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING ON
-set_global_assignment -name LL_ROOT_REGION ON -section_id "Root Region"
-set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id "Root Region"
-set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
-set_global_assignment -name PARTITION_COLOR 2147039 -section_id Top
-set_global_assignment -name MISC_FILE atari800core.dpf
-set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
-
-set_global_assignment -name PHYSICAL_SYNTHESIS_ASYNCHRONOUS_SIGNAL_PIPELINING ON
-set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC_FOR_AREA OFF
-set_global_assignment -name PHYSICAL_SYNTHESIS_MAP_LOGIC_TO_MEMORY_FOR_AREA OFF
-
-set_global_assignment -name PROJECT_OUTPUT_DIRECTORY out
-set_global_assignment -name PLACEMENT_EFFORT_MULTIPLIER 4.0
-set_global_assignment -name ROUTER_EFFORT_MULTIPLIER 4.0
-set_global_assignment -name CYCLONEII_M4K_COMPATIBILITY OFF
-
-#set_parameter -name ENABLE_RUNTIME_MOD YES -to "Minimig1:minimig|amiga_boot:BOOTROM1|altsyncram:Ram0_rtl_10"
-#set_parameter -name INSTANCE_NAME mig -to "Minimig1:minimig|amiga_boot:BOOTROM1|altsyncram:Ram0_rtl_10"
-
-set_global_assignment -name CRC_ERROR_OPEN_DRAIN OFF
-set_global_assignment -name RESERVE_DATA0_AFTER_CONFIGURATION "USE AS REGULAR IO"
-set_global_assignment -name RESERVE_DATA1_AFTER_CONFIGURATION "USE AS REGULAR IO"
-set_global_assignment -name RESERVE_FLASH_NCE_AFTER_CONFIGURATION "USE AS REGULAR IO"
-set_global_assignment -name RESERVE_DCLK_AFTER_CONFIGURATION "USE AS REGULAR IO"
-set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -rise
-set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -fall
-set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -rise
-set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -fall
-
-
-
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[0]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[1]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[2]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[3]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[4]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[5]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[6]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[7]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[8]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[9]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[10]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[11]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[12]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[13]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[14]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[15]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A[0]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A[1]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A[2]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A[3]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A[4]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A[5]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A[6]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A[7]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A[8]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A[9]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A[10]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A[11]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A[12]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_BA[0]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_BA[1]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQMH
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQML
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_nRAS
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_nCAS
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_nWE
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_nCS
-
-set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[0]
-set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[1]
-set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[2]
-set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[3]
-set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[4]
-set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[5]
-set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[6]
-set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[7]
-set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[8]
-set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[9]
-set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[10]
-set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[11]
-set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[12]
-set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[13]
-set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[14]
-set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[15]
-
-set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[0]
-set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[1]
-set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[2]
-set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[3]
-set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[4]
-set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[5]
-set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[6]
-set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[7]
-set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[8]
-set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[9]
-set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[10]
-set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[11]
-set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[12]
-set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[13]
-set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[14]
-set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[15]
-
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[0]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[1]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[2]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[3]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[4]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[5]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[6]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[7]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[8]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[9]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[10]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[11]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[12]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[0]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[1]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[2]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[3]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[4]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[5]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[6]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[7]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[8]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[9]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[10]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[11]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[12]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[13]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[14]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[15]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_BA[0]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_BA[1]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQML
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQMH
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_nRAS
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_nCAS
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_nWE
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_nCS
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_CKE
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_CLK
-
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_R[5]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_R[4]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_R[3]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_R[2]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_R[1]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_R[0]
-
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_G[5]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_G[4]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_G[3]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_G[2]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_G[1]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_G[0]
-
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_B[5]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_B[4]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_B[3]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_B[2]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_B[1]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_B[0]
-
-set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
-
-set_global_assignment -name VHDL_FILE zpu_rom.vhdl
-set_global_assignment -name SDC_FILE atari800core.sdc
-set_global_assignment -name QIP_FILE mist_sector_buffer.qip
-set_global_assignment -name VHDL_FILE atari800core_mist.vhd
-set_global_assignment -name VERILOG_FILE sd_card.v
-set_global_assignment -name VERILOG_FILE user_io.v
-set_global_assignment -name QIP_FILE pll_pal_pre.qip
-set_global_assignment -name QIP_FILE pll_pal_post.qip
-set_global_assignment -name QIP_FILE pll_ntsc.qip
-
Index: mist_5200/atari800core.jdi
===================================================================
--- mist_5200/atari800core.jdi	(revision 232)
+++ mist_5200/atari800core.jdi	(nonexistent)
@@ -1,62 +0,0 @@
-<sld_project_info>
-  <project>
-    <hash md5_digest_80b="7d0f11bf891bc55d775e"/>
-  </project>
-  <file_info/>
-  <hub_info ir_width="8" node_count="1"/>
-  <node_info>
-    <node hpath="sld_signaltap:auto_signaltap_0" instance_id="0" mfg_id="110" node_id="0" sld_node_info="0x30006E00" version="6">
-      <parameters>
-        <parameter name="lpm_type" type="string" value="sld_signaltap"/>
-        <parameter name="sld_node_info" type="unknown" value="805334528"/>
-        <parameter name="SLD_IP_VERSION" type="dec" value="6"/>
-        <parameter name="SLD_IP_MINOR_VERSION" type="dec" value="0"/>
-        <parameter name="SLD_COMMON_IP_VERSION" type="dec" value="0"/>
-        <parameter name="sld_data_bits" type="unknown" value="119"/>
-        <parameter name="sld_trigger_bits" type="unknown" value="119"/>
-        <parameter name="SLD_NODE_CRC_BITS" type="dec" value="32"/>
-        <parameter name="sld_node_crc_hiword" type="unknown" value="37736"/>
-        <parameter name="sld_node_crc_loword" type="unknown" value="25945"/>
-        <parameter name="SLD_INCREMENTAL_ROUTING" type="dec" value="0"/>
-        <parameter name="sld_sample_depth" type="unknown" value="2048"/>
-        <parameter name="sld_segment_size" type="unknown" value="2048"/>
-        <parameter name="SLD_RAM_BLOCK_TYPE" type="string" value="AUTO"/>
-        <parameter name="sld_state_bits" type="unknown" value="11"/>
-        <parameter name="sld_buffer_full_stop" type="unknown" value="1"/>
-        <parameter name="SLD_MEM_ADDRESS_BITS" type="dec" value="7"/>
-        <parameter name="SLD_DATA_BIT_CNTR_BITS" type="dec" value="4"/>
-        <parameter name="sld_trigger_level" type="unknown" value="1"/>
-        <parameter name="sld_trigger_in_enabled" type="unknown" value="0"/>
-        <parameter name="sld_advanced_trigger_entity" type="unknown" value="basic,1,"/>
-        <parameter name="sld_trigger_level_pipeline" type="unknown" value="1"/>
-        <parameter name="sld_enable_advanced_trigger" type="unknown" value="0"/>
-        <parameter name="SLD_ADVANCED_TRIGGER_1" type="string" value="NONE"/>
-        <parameter name="SLD_ADVANCED_TRIGGER_2" type="string" value="NONE"/>
-        <parameter name="SLD_ADVANCED_TRIGGER_3" type="string" value="NONE"/>
-        <parameter name="SLD_ADVANCED_TRIGGER_4" type="string" value="NONE"/>
-        <parameter name="SLD_ADVANCED_TRIGGER_5" type="string" value="NONE"/>
-        <parameter name="SLD_ADVANCED_TRIGGER_6" type="string" value="NONE"/>
-        <parameter name="SLD_ADVANCED_TRIGGER_7" type="string" value="NONE"/>
-        <parameter name="SLD_ADVANCED_TRIGGER_8" type="string" value="NONE"/>
-        <parameter name="SLD_ADVANCED_TRIGGER_9" type="string" value="NONE"/>
-        <parameter name="SLD_ADVANCED_TRIGGER_10" type="string" value="NONE"/>
-        <parameter name="sld_inversion_mask_length" type="unknown" value="382"/>
-        <parameter name="sld_inversion_mask" type="unknown" value="0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000"/>
-        <parameter name="sld_power_up_trigger" type="unknown" value="0"/>
-        <parameter name="SLD_STATE_FLOW_MGR_ENTITY" type="string" value="state_flow_mgr_entity.vhd"/>
-        <parameter name="sld_state_flow_use_generated" type="unknown" value="0"/>
-        <parameter name="sld_current_resource_width" type="unknown" value="1"/>
-        <parameter name="sld_attribute_mem_mode" type="unknown" value="OFF"/>
-        <parameter name="SLD_STORAGE_QUALIFIER_BITS" type="dec" value="1"/>
-        <parameter name="SLD_STORAGE_QUALIFIER_GAP_RECORD" type="dec" value="0"/>
-        <parameter name="SLD_STORAGE_QUALIFIER_MODE" type="string" value="OFF"/>
-        <parameter name="SLD_STORAGE_QUALIFIER_ENABLE_ADVANCED_CONDITION" type="dec" value="0"/>
-        <parameter name="sld_storage_qualifier_inversion_mask_length" type="unknown" value="0"/>
-        <parameter name="SLD_STORAGE_QUALIFIER_ADVANCED_CONDITION_ENTITY" type="string" value="basic"/>
-        <parameter name="SLD_STORAGE_QUALIFIER_PIPELINE" type="dec" value="0"/>
-      </parameters>
-      <inputs/>
-      <outputs/>
-    </node>
-  </node_info>
-</sld_project_info>
Index: mist_5200/atari800core.sdc
===================================================================
--- mist_5200/atari800core.sdc	(revision 232)
+++ mist_5200/atari800core.sdc	(nonexistent)
@@ -1,9 +0,0 @@
-create_clock -period 27MHz [get_ports CLOCK_27[0]]
-derive_pll_clocks
-create_generated_clock -name sdclk_pin -source [get_pins {clock|altpll_component|auto_generated|pll1|clk[2]}] [get_ports {SDRAM_CLK}]
-derive_clock_uncertainty
-set_input_delay -clock sdclk_pin -max 6.4 [get_ports SDRAM_DQ*]
-set_input_delay -clock sdclk_pin -min 3.2 [get_ports SDRAM_DQ*]
-set_output_delay -clock sdclk_pin -max 1.5 [get_ports SDRAM_*]
-set_output_delay -clock sdclk_pin -min -0.8 [get_ports SDRAM_*]
-set_multicycle_path -from [get_clocks {sdclk_pin}] -to [get_clocks {clock|altpll_component|auto_generated|pll1|clk[0]}] -setup -end 2
Index: mist_5200/atari800core.qws
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream

Property changes on: mist_5200/atari800core.qws
___________________________________________________________________
Deleted: svn:mime-type
## -1 +0,0 ##
-application/octet-stream
\ No newline at end of property
Index: mist_5200/atari5200.qws
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream

Property changes on: mist_5200/atari5200.qws
___________________________________________________________________
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Index: mist_5200/atari5200core.jdi
===================================================================
--- mist_5200/atari5200core.jdi	(nonexistent)
+++ mist_5200/atari5200core.jdi	(revision 233)
@@ -0,0 +1,62 @@
+<sld_project_info>
+  <project>
+    <hash md5_digest_80b="7d0f11bf891bc55d775e"/>
+  </project>
+  <file_info/>
+  <hub_info ir_width="8" node_count="1"/>
+  <node_info>
+    <node hpath="sld_signaltap:auto_signaltap_0" instance_id="0" mfg_id="110" node_id="0" sld_node_info="0x30006E00" version="6">
+      <parameters>
+        <parameter name="lpm_type" type="string" value="sld_signaltap"/>
+        <parameter name="sld_node_info" type="unknown" value="805334528"/>
+        <parameter name="SLD_IP_VERSION" type="dec" value="6"/>
+        <parameter name="SLD_IP_MINOR_VERSION" type="dec" value="0"/>
+        <parameter name="SLD_COMMON_IP_VERSION" type="dec" value="0"/>
+        <parameter name="sld_data_bits" type="unknown" value="119"/>
+        <parameter name="sld_trigger_bits" type="unknown" value="119"/>
+        <parameter name="SLD_NODE_CRC_BITS" type="dec" value="32"/>
+        <parameter name="sld_node_crc_hiword" type="unknown" value="37736"/>
+        <parameter name="sld_node_crc_loword" type="unknown" value="25945"/>
+        <parameter name="SLD_INCREMENTAL_ROUTING" type="dec" value="0"/>
+        <parameter name="sld_sample_depth" type="unknown" value="2048"/>
+        <parameter name="sld_segment_size" type="unknown" value="2048"/>
+        <parameter name="SLD_RAM_BLOCK_TYPE" type="string" value="AUTO"/>
+        <parameter name="sld_state_bits" type="unknown" value="11"/>
+        <parameter name="sld_buffer_full_stop" type="unknown" value="1"/>
+        <parameter name="SLD_MEM_ADDRESS_BITS" type="dec" value="7"/>
+        <parameter name="SLD_DATA_BIT_CNTR_BITS" type="dec" value="4"/>
+        <parameter name="sld_trigger_level" type="unknown" value="1"/>
+        <parameter name="sld_trigger_in_enabled" type="unknown" value="0"/>
+        <parameter name="sld_advanced_trigger_entity" type="unknown" value="basic,1,"/>
+        <parameter name="sld_trigger_level_pipeline" type="unknown" value="1"/>
+        <parameter name="sld_enable_advanced_trigger" type="unknown" value="0"/>
+        <parameter name="SLD_ADVANCED_TRIGGER_1" type="string" value="NONE"/>
+        <parameter name="SLD_ADVANCED_TRIGGER_2" type="string" value="NONE"/>
+        <parameter name="SLD_ADVANCED_TRIGGER_3" type="string" value="NONE"/>
+        <parameter name="SLD_ADVANCED_TRIGGER_4" type="string" value="NONE"/>
+        <parameter name="SLD_ADVANCED_TRIGGER_5" type="string" value="NONE"/>
+        <parameter name="SLD_ADVANCED_TRIGGER_6" type="string" value="NONE"/>
+        <parameter name="SLD_ADVANCED_TRIGGER_7" type="string" value="NONE"/>
+        <parameter name="SLD_ADVANCED_TRIGGER_8" type="string" value="NONE"/>
+        <parameter name="SLD_ADVANCED_TRIGGER_9" type="string" value="NONE"/>
+        <parameter name="SLD_ADVANCED_TRIGGER_10" type="string" value="NONE"/>
+        <parameter name="sld_inversion_mask_length" type="unknown" value="382"/>
+        <parameter name="sld_inversion_mask" type="unknown" value="0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000"/>
+        <parameter name="sld_power_up_trigger" type="unknown" value="0"/>
+        <parameter name="SLD_STATE_FLOW_MGR_ENTITY" type="string" value="state_flow_mgr_entity.vhd"/>
+        <parameter name="sld_state_flow_use_generated" type="unknown" value="0"/>
+        <parameter name="sld_current_resource_width" type="unknown" value="1"/>
+        <parameter name="sld_attribute_mem_mode" type="unknown" value="OFF"/>
+        <parameter name="SLD_STORAGE_QUALIFIER_BITS" type="dec" value="1"/>
+        <parameter name="SLD_STORAGE_QUALIFIER_GAP_RECORD" type="dec" value="0"/>
+        <parameter name="SLD_STORAGE_QUALIFIER_MODE" type="string" value="OFF"/>
+        <parameter name="SLD_STORAGE_QUALIFIER_ENABLE_ADVANCED_CONDITION" type="dec" value="0"/>
+        <parameter name="sld_storage_qualifier_inversion_mask_length" type="unknown" value="0"/>
+        <parameter name="SLD_STORAGE_QUALIFIER_ADVANCED_CONDITION_ENTITY" type="string" value="basic"/>
+        <parameter name="SLD_STORAGE_QUALIFIER_PIPELINE" type="dec" value="0"/>
+      </parameters>
+      <inputs/>
+      <outputs/>
+    </node>
+  </node_info>
+</sld_project_info>
Index: mist_5200/atari5200core.qpf
===================================================================
--- mist_5200/atari5200core.qpf	(nonexistent)
+++ mist_5200/atari5200core.qpf	(revision 233)
@@ -0,0 +1,30 @@
+# -------------------------------------------------------------------------- #
+#
+# Copyright (C) 1991-2012 Altera Corporation
+# Your use of Altera Corporation's design tools, logic functions 
+# and other software and tools, and its AMPP partner logic 
+# functions, and any output files from any of the foregoing 
+# (including device programming or simulation files), and any 
+# associated documentation or information are expressly subject 
+# to the terms and conditions of the Altera Program License 
+# Subscription Agreement, Altera MegaCore Function License 
+# Agreement, or other applicable license agreement, including, 
+# without limitation, that your use is for the sole purpose of 
+# programming logic devices manufactured by Altera and sold by 
+# Altera or its authorized distributors.  Please refer to the 
+# applicable agreement for further details.
+#
+# -------------------------------------------------------------------------- #
+#
+# Quartus II 64-Bit
+# Version 12.1 Build 243 01/31/2013 Service Pack 1 SJ Web Edition
+# Date created = 13:58:38  April 11, 2013
+#
+# -------------------------------------------------------------------------- #
+
+QUARTUS_VERSION = "12.1"
+DATE = "13:58:38  April 11, 2013"
+
+# Revisions
+
+PROJECT_REVISION = "atari5200core"
Index: mist_5200/atari5200core.qsf
===================================================================
--- mist_5200/atari5200core.qsf	(nonexistent)
+++ mist_5200/atari5200core.qsf	(revision 233)
@@ -0,0 +1,320 @@
+# Copyright (C) 1991-2007 Altera Corporation
+# Your use of Altera Corporation's design tools, logic functions 
+# and other software and tools, and its AMPP partner logic 
+# functions, and any output files from any of the foregoing 
+# (including device programming or simulation files), and any 
+# associated documentation or information are expressly subject 
+# to the terms and conditions of the Altera Program License 
+# Subscription Agreement, Altera MegaCore Function License 
+# Agreement, or other applicable license agreement, including, 
+# without limitation, that your use is for the sole purpose of 
+# programming logic devices manufactured by Altera and sold by 
+# Altera or its authorized distributors.  Please refer to the 
+# applicable agreement for further details.
+
+
+# The default values for assignments are stored in the file
+#		minimig_de1_assignment_defaults.qdf
+# If this file doesn't exist, and for assignments not listed, see file
+#		assignment_defaults.qdf
+
+# Altera recommends that you do not modify this file. This
+# file is updated automatically by the Quartus II software
+# and any changes you make may be lost or overwritten.
+
+
+set_global_assignment -name FAMILY "Cyclone III"
+set_global_assignment -name DEVICE EP3C25E144C8
+set_global_assignment -name TOP_LEVEL_ENTITY atari5200core_mist
+set_global_assignment -name ORIGINAL_QUARTUS_VERSION 7.2
+set_global_assignment -name PROJECT_CREATION_TIME_DATE "22:27:29  OCTOBER 30, 2007"
+set_global_assignment -name LAST_QUARTUS_VERSION "12.1 SP1.33"
+set_global_assignment -name USE_GENERATED_PHYSICAL_CONSTRAINTS OFF -section_id eda_palace
+set_global_assignment -name DEVICE_FILTER_PIN_COUNT 144
+set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "NO HEAT SINK WITH STILL AIR"
+set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
+set_global_assignment -name OPTIMIZE_HOLD_TIMING "ALL PATHS"
+set_global_assignment -name FITTER_EFFORT "AUTO FIT"
+set_global_assignment -name STRATIX_CONFIGURATION_DEVICE EPCS4
+set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "USE AS REGULAR IO"
+set_global_assignment -name RESERVE_ASDO_AFTER_CONFIGURATION "AS INPUT TRI-STATED"
+set_global_assignment -name CYCLONEIII_CONFIGURATION_SCHEME "PASSIVE SERIAL"
+set_global_assignment -name GENERATE_RBF_FILE ON
+set_global_assignment -name FORCE_CONFIGURATION_VCCIO ON
+set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL"
+
+set_location_assignment PIN_7 -to LED
+set_location_assignment PIN_22 -to CLOCK_50[0]
+set_location_assignment PIN_23 -to CLOCK_50[1]
+set_location_assignment PIN_128 -to CLOCK_32[0]
+set_location_assignment PIN_129 -to CLOCK_32[1]
+set_location_assignment PIN_54 -to CLOCK_27[0]
+set_location_assignment PIN_55 -to CLOCK_27[1]
+set_location_assignment PIN_144 -to VGA_R[5]
+set_location_assignment PIN_143 -to VGA_R[4]
+set_location_assignment PIN_142 -to VGA_R[3]
+set_location_assignment PIN_141 -to VGA_R[2]
+set_location_assignment PIN_137 -to VGA_R[1]
+set_location_assignment PIN_135 -to VGA_R[0]
+set_location_assignment PIN_133 -to VGA_B[5]
+set_location_assignment PIN_132 -to VGA_B[4]
+set_location_assignment PIN_125 -to VGA_B[3]
+set_location_assignment PIN_121 -to VGA_B[2]
+set_location_assignment PIN_120 -to VGA_B[1]
+set_location_assignment PIN_115 -to VGA_B[0]
+set_location_assignment PIN_114 -to VGA_G[5]
+set_location_assignment PIN_113 -to VGA_G[4]
+set_location_assignment PIN_112 -to VGA_G[3]
+set_location_assignment PIN_111 -to VGA_G[2]
+set_location_assignment PIN_110 -to VGA_G[1]
+set_location_assignment PIN_106 -to VGA_G[0]
+set_location_assignment PIN_136 -to VGA_VS
+set_location_assignment PIN_119 -to VGA_HS
+set_location_assignment PIN_65 -to AUDIO_L
+set_location_assignment PIN_80 -to AUDIO_R
+set_location_assignment PIN_46 -to UART_TX
+set_location_assignment PIN_31 -to UART_RX
+set_location_assignment PIN_105 -to SPI_DO
+set_location_assignment PIN_88 -to SPI_DI
+set_location_assignment PIN_126 -to SPI_SCK
+set_location_assignment PIN_127 -to SPI_SS2
+set_location_assignment PIN_91 -to SPI_SS3
+set_location_assignment PIN_90 -to SPI_SS4
+set_location_assignment PIN_13 -to CONF_DATA0
+
+set_location_assignment PIN_49 -to SDRAM_A[0]
+set_location_assignment PIN_44 -to SDRAM_A[1]
+set_location_assignment PIN_42 -to SDRAM_A[2]
+set_location_assignment PIN_39 -to SDRAM_A[3]
+set_location_assignment PIN_4 -to SDRAM_A[4]
+set_location_assignment PIN_6 -to SDRAM_A[5]
+set_location_assignment PIN_8 -to SDRAM_A[6]
+set_location_assignment PIN_10 -to SDRAM_A[7]
+set_location_assignment PIN_11 -to SDRAM_A[8]
+set_location_assignment PIN_28 -to SDRAM_A[9]
+set_location_assignment PIN_50 -to SDRAM_A[10]
+set_location_assignment PIN_30 -to SDRAM_A[11]
+set_location_assignment PIN_32 -to SDRAM_A[12]
+set_location_assignment PIN_83 -to SDRAM_DQ[0]
+set_location_assignment PIN_79 -to SDRAM_DQ[1]
+set_location_assignment PIN_77 -to SDRAM_DQ[2]
+set_location_assignment PIN_76 -to SDRAM_DQ[3]
+set_location_assignment PIN_72 -to SDRAM_DQ[4]
+set_location_assignment PIN_71 -to SDRAM_DQ[5]
+set_location_assignment PIN_69 -to SDRAM_DQ[6]
+set_location_assignment PIN_68 -to SDRAM_DQ[7]
+set_location_assignment PIN_86 -to SDRAM_DQ[8]
+set_location_assignment PIN_87 -to SDRAM_DQ[9]
+set_location_assignment PIN_98 -to SDRAM_DQ[10]
+set_location_assignment PIN_99 -to SDRAM_DQ[11]
+set_location_assignment PIN_100 -to SDRAM_DQ[12]
+set_location_assignment PIN_101 -to SDRAM_DQ[13]
+set_location_assignment PIN_103 -to SDRAM_DQ[14]
+set_location_assignment PIN_104 -to SDRAM_DQ[15]
+set_location_assignment PIN_58 -to SDRAM_BA[0]
+set_location_assignment PIN_51 -to SDRAM_BA[1]
+set_location_assignment PIN_85 -to SDRAM_DQMH
+set_location_assignment PIN_67 -to SDRAM_DQML
+set_location_assignment PIN_60 -to SDRAM_nRAS
+set_location_assignment PIN_64 -to SDRAM_nCAS
+set_location_assignment PIN_66 -to SDRAM_nWE
+set_location_assignment PIN_59 -to SDRAM_nCS
+set_location_assignment PIN_33 -to SDRAM_CKE
+set_location_assignment PIN_43 -to SDRAM_CLK
+
+set_global_assignment -name CYCLONEII_OPTIMIZATION_TECHNIQUE BALANCED
+set_global_assignment -name SMART_RECOMPILE ON
+set_global_assignment -name ENABLE_SIGNALTAP ON
+set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC ON
+set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION ON
+set_global_assignment -name PHYSICAL_SYNTHESIS_EFFORT NORMAL
+set_global_assignment -name FMAX_REQUIREMENT "114 MHz"
+set_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING OFF
+set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
+set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
+set_global_assignment -name USE_CONFIGURATION_DEVICE ON
+set_global_assignment -name TPD_REQUIREMENT "2 ns"
+set_global_assignment -name TSU_REQUIREMENT "2 ns"
+set_global_assignment -name TCO_REQUIREMENT "2 ns"
+set_global_assignment -name ALLOW_POWER_UP_DONT_CARE OFF
+set_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS OFF
+set_global_assignment -name AUTO_RAM_TO_LCELL_CONVERSION OFF
+set_global_assignment -name AUTO_RAM_RECOGNITION ON
+set_global_assignment -name AUTO_ROM_RECOGNITION ON
+set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING ON
+set_global_assignment -name LL_ROOT_REGION ON -section_id "Root Region"
+set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id "Root Region"
+set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
+set_global_assignment -name PARTITION_COLOR 2147039 -section_id Top
+set_global_assignment -name MISC_FILE atari5200core.dpf
+set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
+
+set_global_assignment -name PHYSICAL_SYNTHESIS_ASYNCHRONOUS_SIGNAL_PIPELINING ON
+set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC_FOR_AREA OFF
+set_global_assignment -name PHYSICAL_SYNTHESIS_MAP_LOGIC_TO_MEMORY_FOR_AREA OFF
+
+set_global_assignment -name PROJECT_OUTPUT_DIRECTORY out
+set_global_assignment -name PLACEMENT_EFFORT_MULTIPLIER 4.0
+set_global_assignment -name ROUTER_EFFORT_MULTIPLIER 4.0
+set_global_assignment -name CYCLONEII_M4K_COMPATIBILITY OFF
+
+#set_parameter -name ENABLE_RUNTIME_MOD YES -to "Minimig1:minimig|amiga_boot:BOOTROM1|altsyncram:Ram0_rtl_10"
+#set_parameter -name INSTANCE_NAME mig -to "Minimig1:minimig|amiga_boot:BOOTROM1|altsyncram:Ram0_rtl_10"
+
+set_global_assignment -name CRC_ERROR_OPEN_DRAIN OFF
+set_global_assignment -name RESERVE_DATA0_AFTER_CONFIGURATION "USE AS REGULAR IO"
+set_global_assignment -name RESERVE_DATA1_AFTER_CONFIGURATION "USE AS REGULAR IO"
+set_global_assignment -name RESERVE_FLASH_NCE_AFTER_CONFIGURATION "USE AS REGULAR IO"
+set_global_assignment -name RESERVE_DCLK_AFTER_CONFIGURATION "USE AS REGULAR IO"
+set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -rise
+set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -fall
+set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -rise
+set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -fall
+
+
+
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[0]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[1]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[2]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[3]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[4]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[5]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[6]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[7]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[8]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[9]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[10]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[11]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[12]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[13]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[14]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[15]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A[0]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A[1]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A[2]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A[3]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A[4]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A[5]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A[6]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A[7]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A[8]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A[9]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A[10]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A[11]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A[12]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_BA[0]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_BA[1]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQMH
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQML
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_nRAS
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_nCAS
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_nWE
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_nCS
+
+set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[0]
+set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[1]
+set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[2]
+set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[3]
+set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[4]
+set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[5]
+set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[6]
+set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[7]
+set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[8]
+set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[9]
+set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[10]
+set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[11]
+set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[12]
+set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[13]
+set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[14]
+set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[15]
+
+set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[0]
+set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[1]
+set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[2]
+set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[3]
+set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[4]
+set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[5]
+set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[6]
+set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[7]
+set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[8]
+set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[9]
+set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[10]
+set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[11]
+set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[12]
+set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[13]
+set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[14]
+set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[15]
+
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[0]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[1]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[2]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[3]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[4]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[5]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[6]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[7]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[8]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[9]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[10]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[11]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[12]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[0]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[1]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[2]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[3]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[4]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[5]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[6]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[7]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[8]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[9]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[10]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[11]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[12]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[13]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[14]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[15]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_BA[0]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_BA[1]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQML
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQMH
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_nRAS
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_nCAS
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_nWE
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_nCS
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_CKE
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_CLK
+
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_R[5]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_R[4]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_R[3]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_R[2]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_R[1]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_R[0]
+
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_G[5]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_G[4]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_G[3]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_G[2]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_G[1]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_G[0]
+
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_B[5]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_B[4]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_B[3]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_B[2]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_B[1]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_B[0]
+
+set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
+
+set_global_assignment -name VHDL_FILE zpu_rom.vhdl
+set_global_assignment -name SDC_FILE atari5200core.sdc
+set_global_assignment -name QIP_FILE mist_sector_buffer.qip
+set_global_assignment -name VHDL_FILE atari5200core_mist.vhd
+set_global_assignment -name VERILOG_FILE sd_card.v
+set_global_assignment -name VERILOG_FILE user_io.v
+set_global_assignment -name QIP_FILE pll_pal_pre.qip
+set_global_assignment -name QIP_FILE pll_pal_post.qip
+set_global_assignment -name QIP_FILE pll_ntsc.qip
+
Index: mist_5200/atari5200core.sdc
===================================================================
--- mist_5200/atari5200core.sdc	(nonexistent)
+++ mist_5200/atari5200core.sdc	(revision 233)
@@ -0,0 +1,9 @@
+create_clock -period 27MHz [get_ports CLOCK_27[0]]
+derive_pll_clocks
+create_generated_clock -name sdclk_pin -source [get_pins {clock|altpll_component|auto_generated|pll1|clk[2]}] [get_ports {SDRAM_CLK}]
+derive_clock_uncertainty
+set_input_delay -clock sdclk_pin -max 6.4 [get_ports SDRAM_DQ*]
+set_input_delay -clock sdclk_pin -min 3.2 [get_ports SDRAM_DQ*]
+set_output_delay -clock sdclk_pin -max 1.5 [get_ports SDRAM_*]
+set_output_delay -clock sdclk_pin -min -0.8 [get_ports SDRAM_*]
+set_multicycle_path -from [get_clocks {sdclk_pin}] -to [get_clocks {clock|altpll_component|auto_generated|pll1|clk[0]}] -setup -end 2
Index: mist_5200/atari5200core_mist.vhd
===================================================================
--- mist_5200/atari5200core_mist.vhd	(nonexistent)
+++ mist_5200/atari5200core_mist.vhd	(revision 233)
@@ -0,0 +1,627 @@
+--------------------------------------------------------------------------- -- (c) 2013 mark watson
+-- I am happy for anyone to use this for non-commercial use.
+-- If my vhdl files are used commercially or otherwise sold,
+-- please contact me for explicit permission at scrameta (gmail).
+-- This applies for source and binary form and derived works.
+---------------------------------------------------------------------------
+
+LIBRARY ieee;
+USE ieee.std_logic_1164.all; 
+use ieee.numeric_std.all;
+
+LIBRARY work;
+
+ENTITY atari5200core_mist IS 
+	GENERIC
+	(
+		TV : integer;  -- 1 = PAL, 0=NTSC
+		VIDEO : integer; -- 1 = RGB, 2 = VGA
+		COMPOSITE_SYNC : integer; --0 = no, 1 = yes!
+		SCANDOUBLE : integer -- 1 = YES, 0=NO, (+ later scanlines etc)
+	);
+	PORT
+	(
+		CLOCK_27 :  IN  STD_LOGIC_VECTOR(1 downto 0);
+
+		VGA_VS :  OUT  STD_LOGIC;
+		VGA_HS :  OUT  STD_LOGIC;
+		VGA_B :  OUT  STD_LOGIC_VECTOR(5 DOWNTO 0);
+		VGA_G :  OUT  STD_LOGIC_VECTOR(5 DOWNTO 0);
+		VGA_R :  OUT  STD_LOGIC_VECTOR(5 DOWNTO 0);
+		
+		AUDIO_L : OUT std_logic;
+		AUDIO_R : OUT std_logic;
+
+		SDRAM_BA :  OUT  STD_LOGIC_VECTOR(1 downto 0);
+		SDRAM_nCS :  OUT  STD_LOGIC;
+		SDRAM_nRAS :  OUT  STD_LOGIC;
+		SDRAM_nCAS :  OUT  STD_LOGIC;
+		SDRAM_nWE :  OUT  STD_LOGIC;
+		SDRAM_DQMH :  OUT  STD_LOGIC;
+		SDRAM_DQML :  OUT  STD_LOGIC;
+		SDRAM_CLK :  OUT  STD_LOGIC;
+		SDRAM_CKE :  OUT  STD_LOGIC;
+		SDRAM_A :  OUT  STD_LOGIC_VECTOR(12 DOWNTO 0);
+		SDRAM_DQ :  INOUT  STD_LOGIC_VECTOR(15 DOWNTO 0);
+
+		LED : OUT std_logic;
+		
+		UART_TX :  OUT  STD_LOGIC;
+		UART_RX :  IN  STD_LOGIC;
+		
+		SPI_DO :  INOUT  STD_LOGIC;
+		SPI_DI :  IN  STD_LOGIC;
+		SPI_SCK :  IN  STD_LOGIC;
+		SPI_SS2 :  IN  STD_LOGIC;		
+		SPI_SS3 :  IN  STD_LOGIC;		
+		SPI_SS4 :  IN  STD_LOGIC;
+		CONF_DATA0 :  IN  STD_LOGIC -- AKA SPI_SS5
+	);
+END atari5200core_mist;
+
+ARCHITECTURE vhdl OF atari5200core_mist IS 
+
+component hq_dac
+port (
+  reset :in std_logic;
+  clk :in std_logic;
+  clk_ena : in std_logic;
+  pcm_in : in std_logic_vector(19 downto 0);
+  dac_out : out std_logic
+);
+end component;
+
+component user_io
+	GENERIC(
+		STRLEN : in integer := 0
+	);
+	PORT(
+		-- conf_str? how to do in vhdl...
+
+		-- mist spi to firmware
+		SPI_CLK : in std_logic;
+		SPI_SS_IO : in std_logic;
+		SPI_MISO : out std_logic;
+		SPI_MOSI : in std_logic;
+
+		-- joysticks
+		JOYSTICK_0 : out std_logic_vector(5 downto 0);
+		JOYSTICK_1 : out std_logic_vector(5 downto 0);
+		JOYSTICK_ANALOG_0 : out std_logic_vector(15 downto 0);
+		JOYSTICK_ANALOG_1 : out std_logic_vector(15 downto 0); -- x axis is top 8 bits, y axis is bottom 8 bits. signed.
+		BUTTONS : out std_logic_vector(1 downto 0);
+		SWITCHES : out std_logic_vector(1 downto 0);
+		STATUS : out std_logic_vector(7 downto 0); -- what is this?
+
+		-- ps2
+		PS2_CLK : in std_logic; --12-16khz
+		PS2_KBD_CLK : out std_logic;
+		PS2_KBD_DATA : out std_logic;
+
+		-- serial (one way?)
+		SERIAL_DATA : in std_logic_vector(7 downto 0);
+		SERIAL_STROBE : in std_logic;
+
+		-- connection to sd card emulation
+		sd_lba : in std_logic_vector(31 downto 0);
+		sd_rd : in std_logic;
+		sd_wr : in std_logic;
+		sd_ack : out std_logic;
+		sd_conf : in std_logic;
+		sd_sdhc : in std_logic;
+		sd_dout : out std_logic_vector(7 downto 0);
+		sd_dout_strobe : out std_logic;
+		sd_din : in std_logic_vector(7 downto 0);
+		sd_din_strobe : out std_logic
+	  );
+	end component;
+
+	component sd_card
+	PORT (
+		-- link to user_io for io controller
+		io_lba : out std_logic_vector(31 downto 0);
+		io_rd : out std_logic;
+		io_wr : out std_logic;
+		io_ack : in std_logic;
+		io_conf : out std_logic;
+		io_sdhc : out std_logic;
+		
+		-- data coming in from io controller
+		io_din : in std_logic_vector(7 downto 0);
+		io_din_strobe : in std_logic;
+		
+		-- data going out to io controller
+		io_dout : out std_logic_vector(7 downto 0);
+		io_dout_strobe : in std_logic;
+		
+		-- configuration input
+		allow_sdhc : in std_logic;
+	
+		sd_cs : in std_logic;
+		sd_sck : in std_logic;
+		sd_sdi : in std_logic;
+		sd_sdo : out std_logic
+	); 
+	end component;
+
+  signal AUDIO_L_PCM : std_logic_vector(15 downto 0);
+  signal AUDIO_R_PCM : std_logic_vector(15 downto 0);
+
+  signal VGA_VS_RAW : std_logic;
+  signal VGA_HS_RAW : std_logic;
+
+  signal RESET_n : std_logic;
+  signal PLL_LOCKED : std_logic;
+  signal CLK : std_logic;
+  signal CLK_SDRAM : std_logic;
+
+  signal CLK_PLL1 : std_logic; -- cascaded to get better pal clock
+  signal PLL1_LOCKED : std_logic;
+
+  SIGNAL PS2_CLK : std_logic;
+  SIGNAL PS2_DAT : std_logic;
+  SIGNAL FKEYS : std_logic_vector(11 downto 0);
+
+  signal capslock_pressed : std_logic;
+  signal capsheld_next : std_logic;
+  signal capsheld_reg : std_logic;
+  
+  signal spi_miso_io : std_logic;
+
+  signal mist_buttons : std_logic_vector(1 downto 0);
+  signal mist_switches : std_logic_vector(1 downto 0);
+
+  signal		JOY1 :  STD_LOGIC_VECTOR(5 DOWNTO 0);
+  signal		JOY2 :  STD_LOGIC_VECTOR(5 DOWNTO 0);
+  signal		JOY1X : std_logic_vector(7 downto 0);
+  signal		JOY1Y : std_logic_vector(7 downto 0);
+  signal		JOY2X : std_logic_vector(7 downto 0);
+  signal		JOY2Y : std_logic_vector(7 downto 0);
+  signal		JOY1_n :  STD_LOGIC_VECTOR(4 DOWNTO 0);
+  signal		JOY2_n :  STD_LOGIC_VECTOR(4 DOWNTO 0);
+  signal joy_still : std_logic;
+
+  SIGNAL	KEYBOARD_RESPONSE :  STD_LOGIC_VECTOR(1 DOWNTO 0);
+  SIGNAL	KEYBOARD_SCAN :  STD_LOGIC_VECTOR(5 DOWNTO 0);
+  signal controller_select : std_logic_vector(1 downto 0);
+
+  SIGNAL PAL : std_logic;
+  SIGNAL COMPOSITE_ON_HSYNC : std_logic;
+  SIGNAL VGA : std_logic;
+
+  signal SDRAM_REQUEST : std_logic;
+  signal SDRAM_REQUEST_COMPLETE : std_logic;
+  signal SDRAM_READ_ENABLE :  STD_LOGIC;
+  signal SDRAM_WRITE_ENABLE : std_logic;
+  signal SDRAM_ADDR : STD_LOGIC_VECTOR(22 DOWNTO 0);
+  signal SDRAM_DO : STD_LOGIC_VECTOR(31 DOWNTO 0);
+  signal SDRAM_DI : STD_LOGIC_VECTOR(31 DOWNTO 0);
+  signal SDRAM_WIDTH_8bit_ACCESS : std_logic;
+  signal SDRAM_WIDTH_16bit_ACCESS : std_logic;
+  signal SDRAM_WIDTH_32bit_ACCESS : std_logic;
+
+  signal SDRAM_REFRESH : std_logic;
+  
+  signal SDRAM_RESET_N : std_logic;
+
+	-- dma/virtual drive
+	signal DMA_ADDR_FETCH : std_logic_vector(23 downto 0);
+	signal DMA_WRITE_DATA : std_logic_vector(31 downto 0);
+	signal DMA_FETCH : std_logic;
+	signal DMA_32BIT_WRITE_ENABLE : std_logic;
+	signal DMA_16BIT_WRITE_ENABLE : std_logic;
+	signal DMA_8BIT_WRITE_ENABLE : std_logic;
+	signal DMA_READ_ENABLE : std_logic;
+	signal DMA_MEMORY_READY : std_logic;
+	signal DMA_MEMORY_DATA : std_logic_vector(31 downto 0);
+
+	signal ZPU_ADDR_ROM : std_logic_vector(15 downto 0);
+	signal ZPU_ROM_DATA :  std_logic_vector(31 downto 0);
+
+	signal ZPU_OUT1 : std_logic_vector(31 downto 0);
+	signal ZPU_OUT2 : std_logic_vector(31 downto 0);
+	signal ZPU_OUT3 : std_logic_vector(31 downto 0);
+	signal ZPU_OUT4 : std_logic_vector(31 downto 0);
+
+	signal zpu_pokey_enable : std_logic;
+	signal zpu_sio_txd : std_logic;
+	signal zpu_sio_rxd : std_logic;
+	signal zpu_sio_command : std_logic;
+
+	-- system control from zpu
+	signal ram_select : std_logic_vector(2 downto 0);
+	signal rom_select : std_logic_vector(5 downto 0);
+	signal reset_atari : std_logic;
+	signal pause_atari : std_logic;
+	SIGNAL speed_6502 : std_logic_vector(5 downto 0);
+
+	-- connection to sd card emulation
+	signal sd_lba : std_logic_vector(31 downto 0);
+	signal sd_rd : std_logic;
+	signal sd_wr : std_logic;
+	signal sd_ack : std_logic;
+	signal sd_conf : std_logic;
+	signal sd_sdhc : std_logic;
+	signal sd_dout : std_logic_vector(7 downto 0);
+	signal sd_dout_strobe : std_logic;
+	signal sd_din : std_logic_vector(7 downto 0);
+	signal sd_din_strobe : std_logic;
+
+	signal mist_sd_sdo : std_logic;
+	signal mist_sd_sck : std_logic;
+	signal mist_sd_sdi : std_logic;
+	signal mist_sd_cs : std_logic;
+
+	-- ps2
+	signal SLOW_PS2_CLK : std_logic; -- around 16KHz
+
+	-- scandoubler
+	signal half_scandouble_enable_reg : std_logic;
+	signal half_scandouble_enable_next : std_logic;
+	signal VIDEO_B : std_logic_vector(7 downto 0);
+
+BEGIN 
+pal <= '1' when tv=1 else '0';
+vga <= '1' when video=2 else '0';
+composite_on_hsync <= '1' when composite_sync=1 else '0';
+
+-- mist spi io
+	spi_do <= spi_miso_io when CONF_DATA0 ='0' else 'Z';
+
+my_user_io : user_io
+	PORT map(
+	   SPI_CLK => SPI_SCK,
+	   SPI_SS_IO => CONF_DATA0,
+	   SPI_MISO => SPI_miso_io,
+	   SPI_MOSI => SPI_DI,
+		JOYSTICK_0 => joy2,
+		JOYSTICK_1 => joy1,
+		JOYSTICK_ANALOG_0(15 downto 8) => joy2x,
+		JOYSTICK_ANALOG_0(7 downto 0) => joy2y,
+		JOYSTICK_ANALOG_1(15 downto 8) => joy1x,
+		JOYSTICK_ANALOG_1(7 downto 0) => joy1y,
+		BUTTONS => mist_buttons,
+		SWITCHES => mist_switches,
+		STATUS => open,
+
+		PS2_CLK => SLOW_PS2_CLK,
+		PS2_KBD_CLK => ps2_clk,
+		PS2_KBD_DATA => ps2_dat,
+	
+		SERIAL_DATA => (others=>'0'),
+		SERIAL_STROBE => '0',
+
+		sd_lba => sd_lba,
+		sd_rd => sd_rd,
+		sd_wr => sd_wr,
+		sd_ack => sd_ack,
+		sd_conf => sd_conf,
+		sd_sdhc => sd_sdhc,
+		sd_dout => sd_dout,
+		sd_dout_strobe => sd_dout_strobe,
+		sd_din => sd_din,
+		sd_din_strobe => sd_din_strobe
+	  );
+
+my_sd_card : sd_card
+	PORT map (
+		io_lba => sd_lba,
+		io_rd => sd_rd,
+		io_wr => sd_wr,
+		io_ack => sd_ack,
+		io_conf => sd_conf,
+		io_sdhc => sd_sdhc,
+		
+		io_din => sd_dout,
+		io_din_strobe => sd_dout_strobe,
+		
+		io_dout => sd_din,
+		io_dout_strobe => sd_din_strobe,
+		
+		allow_sdhc => '1',
+	
+		sd_cs => mist_sd_cs,
+		sd_sck => mist_sd_sck,
+		sd_sdi => mist_sd_sdi,
+		sd_sdo => mist_sd_sdo
+	); 
+	  
+	 joy1_n <= not(joy1(5)&joy1(3 downto 0));
+	 joy2_n <= not(joy2(5)&joy2(3 downto 0));
+
+-- PS2 to pokey
+keyboard_map1 : entity work.ps2_to_atari5200
+	PORT MAP
+	( 
+		CLK => clk,
+		RESET_N => reset_n,
+		PS2_CLK => ps2_clk,
+		PS2_DAT => ps2_dat,
+
+		FIRE2 => '0'&'0'&joy2(4)&joy1(4),
+		CONTROLLER_SELECT => CONTROLLER_SELECT, -- selected stick keyboard/shift button
+		
+		KEYBOARD_SCAN => KEYBOARD_SCAN,
+		KEYBOARD_RESPONSE => KEYBOARD_RESPONSE,
+
+		FKEYS => FKEYS
+	);
+-- stick 0: consol(1 downto 0)="00"
+
+joy_still <= joy1_n(3) and joy1_n(2) and joy1_n(1) and joy1_n(0); -- TODO, need something better here I think! e.g. keypad? 5200 not centreing
+	 
+dac_left : hq_dac
+port map
+(
+  reset => not(reset_n),
+  clk => clk,
+  clk_ena => '1',
+  pcm_in => AUDIO_L_PCM&"0000",
+  dac_out => audio_l
+);
+
+dac_right : hq_dac
+port map
+(
+  reset => not(reset_n),
+  clk => clk,
+  clk_ena => '1',
+  pcm_in => AUDIO_R_PCM&"0000",
+  dac_out => audio_r
+);
+
+gen_ntsc_pll : if tv=0 generate
+mist_pll : entity work.pll_ntsc
+PORT MAP(inclk0 => CLOCK_27(0),
+		 c0 => CLK_SDRAM,
+		 c1 => CLK,
+		 c2 => SDRAM_CLK,
+		 c3 => SLOW_PS2_CLK,
+		 locked => PLL_LOCKED);
+end generate;
+
+gen_pal_pll : if tv=1 generate
+mist_pll : entity work.pll_pal_pre
+PORT MAP(inclk0 => CLOCK_27(0),
+		 c0 => CLK_PLL1,
+		 locked => PLL1_LOCKED);
+mist_pll2 : entity work.pll_pal_post
+PORT MAP(inclk0 => CLK_PLL1,
+		 c0 => CLK_SDRAM,
+		 c1 => CLK,
+		 c2 => SDRAM_CLK,
+		 c3 => SLOW_PS2_CLK,
+		 areset => not(PLL1_LOCKED),
+		 locked => PLL_LOCKED);
+end generate;
+
+reset_n <= PLL_LOCKED;
+
+atari5200_test : entity work.atari5200core_simplesdram
+	GENERIC MAP
+	(
+		cycle_length => 32,
+		--internal_rom => 4, --5200 rom...
+		internal_rom => 0, --5200 rom...
+		internal_ram => 0, -- only 1 option for 5200...
+		video_bits => 8,
+		palette => 0
+	)
+	PORT MAP
+	(
+		CLK => CLK,
+		RESET_N => RESET_N and SDRAM_RESET_N and not(reset_atari),
+
+		VIDEO_VS => VGA_VS_RAW,
+		VIDEO_HS => VGA_HS_RAW,
+		VIDEO_B => VIDEO_B,
+		VIDEO_G => open,
+		VIDEO_R => open,
+
+		AUDIO_L => AUDIO_L_PCM,
+		AUDIO_R => AUDIO_R_PCM,
+
+		SDRAM_REQUEST => SDRAM_REQUEST,
+		SDRAM_REQUEST_COMPLETE => SDRAM_REQUEST_COMPLETE,
+		SDRAM_READ_ENABLE => SDRAM_READ_ENABLE,
+		SDRAM_WRITE_ENABLE => SDRAM_WRITE_ENABLE,
+		SDRAM_ADDR => SDRAM_ADDR,
+		SDRAM_DO => SDRAM_DO,
+		SDRAM_DI => SDRAM_DI,
+		SDRAM_32BIT_WRITE_ENABLE => SDRAM_WIDTH_32bit_ACCESS,
+		SDRAM_16BIT_WRITE_ENABLE => SDRAM_WIDTH_16bit_ACCESS,
+		SDRAM_8BIT_WRITE_ENABLE => SDRAM_WIDTH_8bit_ACCESS,
+		SDRAM_REFRESH => SDRAM_REFRESH,
+
+		DMA_FETCH => dma_fetch,
+		DMA_READ_ENABLE => dma_read_enable,
+		DMA_32BIT_WRITE_ENABLE => dma_32bit_write_enable,
+		DMA_16BIT_WRITE_ENABLE => dma_16bit_write_enable,
+		DMA_8BIT_WRITE_ENABLE => dma_8bit_write_enable,
+		DMA_ADDR => dma_addr_fetch,
+		DMA_WRITE_DATA => dma_write_data,
+		MEMORY_READY_DMA => dma_memory_ready,
+		DMA_MEMORY_DATA => dma_memory_data, 
+
+		THROTTLE_COUNT_6502 => speed_6502,
+		HALT => pause_atari,
+
+		-- JOYSTICK
+		JOY1_X => signed(joy1x),
+		JOY1_Y => signed(joy1y),
+		JOY1_BUTTON => joy1_n(4),
+		JOY2_X => signed(joy2x),
+		JOY2_Y => signed(joy2y),
+		JOY2_BUTTON => joy2_n(4),
+
+		-- Pokey keyboard matrix
+		-- Standard component available to connect this to PS2
+		KEYBOARD_RESPONSE => KEYBOARD_RESPONSE,
+		KEYBOARD_SCAN => KEYBOARD_SCAN,
+		CONTROLLER_SELECT => CONTROLLER_SELECT
+	);
+
+sdram_adaptor : entity work.sdram_statemachine
+GENERIC MAP(ADDRESS_WIDTH => 22,
+			AP_BIT => 10,
+			COLUMN_WIDTH => 8,
+			ROW_WIDTH => 12
+			)
+PORT MAP(CLK_SYSTEM => CLK,
+		 CLK_SDRAM => CLK_SDRAM,
+		 RESET_N =>  RESET_N,
+		 READ_EN => SDRAM_READ_ENABLE,
+		 WRITE_EN => SDRAM_WRITE_ENABLE,
+		 REQUEST => SDRAM_REQUEST,
+		 BYTE_ACCESS => SDRAM_WIDTH_8BIT_ACCESS,
+		 WORD_ACCESS => SDRAM_WIDTH_16BIT_ACCESS,
+		 LONGWORD_ACCESS => SDRAM_WIDTH_32BIT_ACCESS,
+		 REFRESH => SDRAM_REFRESH,
+		 ADDRESS_IN => SDRAM_ADDR,
+		 DATA_IN => SDRAM_DI,
+		 SDRAM_DQ => SDRAM_DQ,
+		 COMPLETE => SDRAM_REQUEST_COMPLETE,
+		 SDRAM_BA0 => SDRAM_BA(0),
+		 SDRAM_BA1 => SDRAM_BA(1),
+		 SDRAM_CKE => SDRAM_CKE,
+		 SDRAM_CS_N => SDRAM_nCS,
+		 SDRAM_RAS_N => SDRAM_nRAS,
+		 SDRAM_CAS_N => SDRAM_nCAS,
+		 SDRAM_WE_N => SDRAM_nWE,
+		 SDRAM_ldqm => SDRAM_DQML,
+		 SDRAM_udqm => SDRAM_DQMH,
+		 DATA_OUT => SDRAM_DO,
+		 SDRAM_ADDR => SDRAM_A(11 downto 0),
+		 reset_client_n => SDRAM_RESET_N
+		 );
+		 
+SDRAM_A(12) <= '0';
+--SDRAM_REFRESH <= '0'; -- TODO
+
+-- Until SDRAM enabled... TODO
+--SDRAM_nCS <= '1';
+--SDRAM_DQ <= (others=>'Z');
+
+--SDRAM_CKE <= '1';		 
+LED <= zpu_sio_rxd;
+
+--VGA_HS <= not(VGA_HS_RAW xor VGA_VS_RAW);
+--VGA_VS <= not(VGA_VS_RAW);
+
+	process(clk,RESET_N,SDRAM_RESET_N,reset_atari)
+	begin
+		if ((RESET_N and SDRAM_RESET_N and not(reset_atari))='0') then
+			half_scandouble_enable_reg <= '0';
+		elsif (clk'event and clk='1') then
+			half_scandouble_enable_reg <= half_scandouble_enable_next;
+		end if;
+	end process;
+
+	half_scandouble_enable_next <= not(half_scandouble_enable_reg);
+
+	scandoubler1: entity work.scandoubler
+	GENERIC MAP
+	(
+		video_bits=>6
+	)
+	PORT MAP
+	( 
+		CLK => CLK,
+		RESET_N => RESET_N and SDRAM_RESET_N and not(reset_atari),
+		
+		VGA => vga,
+		COMPOSITE_ON_HSYNC => composite_on_hsync,
+
+		colour_enable => half_scandouble_enable_reg,
+		doubled_enable => '1',
+		scanlines_on => mist_switches(1),
+		
+		-- GTIA interface
+		colour_in => VIDEO_B,
+		vsync_in => VGA_VS_RAW,
+		hsync_in => VGA_HS_RAW,
+		
+		-- TO TV...
+		R => VGA_R,
+		G => VGA_G,
+		B => VGA_B,
+		
+		VSYNC => VGA_VS,
+		HSYNC => VGA_HS
+	);
+
+zpu: entity work.zpucore
+	GENERIC MAP
+	(
+		platform => 1,
+		spi_clock_div => 16 -- 28MHz/2. Max for SD cards is 25MHz...
+	)
+	PORT MAP
+	(
+		-- standard...
+		CLK => CLK,
+		RESET_N => RESET_N and sdram_reset_n,
+
+		-- dma bus master (with many waitstates...)
+		ZPU_ADDR_FETCH => dma_addr_fetch,
+		ZPU_DATA_OUT => dma_write_data,
+		ZPU_FETCH => dma_fetch,
+		ZPU_32BIT_WRITE_ENABLE => dma_32bit_write_enable,
+		ZPU_16BIT_WRITE_ENABLE => dma_16bit_write_enable,
+		ZPU_8BIT_WRITE_ENABLE => dma_8bit_write_enable,
+		ZPU_READ_ENABLE => dma_read_enable,
+		ZPU_MEMORY_READY => dma_memory_ready,
+		ZPU_MEMORY_DATA => dma_memory_data, 
+
+		-- rom bus master
+		-- data on next cycle after addr
+		ZPU_ADDR_ROM => zpu_addr_rom,
+		ZPU_ROM_DATA => zpu_rom_data,
+	
+		ZPU_ROM_WREN => open,
+
+		-- spi master
+		ZPU_SD_DAT0 => mist_sd_sdo,
+		ZPU_SD_CLK => mist_sd_sck,
+		ZPU_SD_CMD => mist_sd_sdi,
+		ZPU_SD_DAT3 => mist_sd_cs,
+
+		-- SIO
+		-- Ditto for speaking to Atari, we have a built in Pokey
+		ZPU_POKEY_ENABLE => zpu_pokey_enable,
+		ZPU_SIO_TXD => zpu_sio_txd,
+		ZPU_SIO_RXD => zpu_sio_rxd,
+		ZPU_SIO_COMMAND => zpu_sio_command,
+
+		-- external control
+		-- switches etc. sector DMA blah blah.
+		ZPU_IN1 => X"00000"&(FKEYS(11) or (mist_buttons(0) and not(joy1_n(4))))&(FKEYS(10) or (mist_buttons(0) and joy1_n(4) and joy_still))&(FKEYS(9) or (mist_buttons(0) and joy1_n(4) and not(joy_still)))&FKEYS(8 downto 0),
+		ZPU_IN2 => X"00000000",
+		ZPU_IN3 => X"00000000",
+		ZPU_IN4 => X"00000000",
+
+		-- ouputs - e.g. Atari system control, halt, throttle, rom select
+		ZPU_OUT1 => zpu_out1,
+		ZPU_OUT2 => zpu_out2,
+		ZPU_OUT3 => zpu_out3,
+		ZPU_OUT4 => zpu_out4
+	);
+
+	pause_atari <= zpu_out1(0);
+	reset_atari <= zpu_out1(1);
+	speed_6502 <= zpu_out1(7 downto 2);
+	ram_select <= zpu_out1(10 downto 8);
+	rom_select <= zpu_out1(16 downto 11);
+
+zpu_rom1: entity work.zpu_rom
+	port map(
+	        clock => clk,
+	        address => zpu_addr_rom(13 downto 2),
+	        q => zpu_rom_data
+	);
+
+enable_179_clock_div_zpu_pokey : entity work.enable_divider
+	generic map (COUNT=>32) -- cycle_length
+	port map(clk=>clk,reset_n=>reset_n,enable_in=>'1',enable_out=>zpu_pokey_enable);
+
+END vhdl;
Index: mist_5200/build.sh
===================================================================
--- mist_5200/build.sh	(revision 232)
+++ mist_5200/build.sh	(revision 233)
@@ -50,13 +50,13 @@
 	my $dir = "build_$variant";
 	`rm -rf $dir`;
 	mkdir $dir;
-	`cp atari800core_mist.vhd $dir`;
+	`cp atari5200core_mist.vhd $dir`;
 	`cp *pll*.* $dir`;
 	`cp *mist_sector*.* $dir`;
 	`cp *.v $dir`;
 	`cp *.vhdl $dir`;
 	`cp zpu_rom.vhdl $dir`;
-	`cp atari800core.sdc $dir`;
+	`cp atari5200core.sdc $dir`;
 	`mkdir $dir/common`;
 	`mkdir $dir/common/a8core`;
 	`mkdir $dir/common/components`;
@@ -66,15 +66,15 @@
 	`cp ../common/zpu/* ./$dir/common/zpu`;
 
 	chdir $dir;
-	`../makeqsf ../atari800core.qsf ./common/a8core ./common/components ./common/zpu`;
+	`../makeqsf ../atari5200core.qsf ./common/a8core ./common/components ./common/zpu`;
 
 	foreach my $key (sort keys %{$variants{$variant}})
 	{
 		my $val = $variants{$variant}->{$key};
-		`echo set_parameter -name $key $val >> atari800core.qsf`;
+		`echo set_parameter -name $key $val >> atari5200core.qsf`;
 	}
 
-	`quartus_sh --flow compile atari800core > build.log 2> build.err`;
+	`quartus_sh --flow compile atari5200core > build.log 2> build.err`;
 
 	`quartus_cpf --convert ../output_file.cof`;
 	
Index: mist_5200/output_file.cof
===================================================================
--- mist_5200/output_file.cof	(revision 232)
+++ mist_5200/output_file.cof	(revision 233)
@@ -1,7 +1,7 @@
 <?xml version="1.0" encoding="US-ASCII" standalone="yes"?>
 <cof>
 	<eprom_name>CFI_128Mb</eprom_name>
-	<output_filename>output_files/atari800core.rbf</output_filename>
+	<output_filename>output_files/atari5200core.rbf</output_filename>
 	<n_pages>1</n_pages>
 	<width>1</width>
 	<mode>0</mode>
@@ -9,7 +9,7 @@
 		<user_name>Page_0</user_name>
 		<page_flags>1</page_flags>
 		<bit0>
-			<sof_filename>output_files/atari800core.sof<compress_bitstream>1</compress_bitstream></sof_filename>
+			<sof_filename>output_files/atari5200core.sof<compress_bitstream>1</compress_bitstream></sof_filename>
 		</bit0>
 	</sof_data>
 	<version>5</version>
