EclaireXL

Run 2 jobs at once

Split the concept of hsync, vsync and composite sync. When composite sync used tie vsync high. The offset hsync pulse of pal/hsync is only present for 15khz composite sync. Remove rom selection since its unused.

fix sockit path

Scanlines were broken by last change (were alternating each frame)

Do not background - not got enough ram here

Added RGBHV

Latest firmware and added papilio duo to build scripts

Add weak pull-ups on data lines for cartridge/pbi

Allow 64k carts to work. Switch keyboard to PS2 port 2.

Changed mem addresses

The banks have a hole from 64k-256k, use this for the os rom, freeze and directory cache

papilio duo support

Switched DAC

Aded papilio duo

Added low memory type 2 - for papilio and its 512k

Resync output to input hsync

Added multiple build types

Added 32 bit sram access to make zpu work

fixed ucf use

sram works, boots, keyboard works

Fixed PLL to more appropriate for PAL/NTSC with he 32MHz input clock. Should work now, although no ZPU yet!

replacing with pal/ntsc plls of correct input frequency

First cut of papilio duo support. NB: This does not work yet, notably PLL needs changing. Then sram needs wiring up to allow zpu to run.

Added inferred multiplier

EDBLL apparently works with lower drive strength - there are some crosstalk issues I read. Added GPIO lower drive strength. Removed 25ohm resistors.