Project

General

Profile

Revision:

Revisions

# Date Author Comment
45 05/07/2014 09:02 PM markw

Added zpu. Fix sdram 32-bit mode.

44 05/07/2014 08:58 PM markw

Added missing spi component! Fix pokey instantiation. Fix pause.

43 05/07/2014 08:57 PM markw

Connect up snoop to allow ZPU to see the data it requested

42 05/07/2014 08:56 PM markw

Always complete sram request if we have no sram

41 05/03/2014 08:06 PM markw

Moved ram complete back 1 Atari cycle - now runs fine at 4x speed. Some video glitches when running faster, need to investigate...

40 05/03/2014 10:36 AM markw

Fixed turbo

39 05/03/2014 10:34 AM markw

No need for mmu to deal with refresh at all

38 04/30/2014 10:09 PM markw

Cascaded pll in order to get exact SVIDEO frequencies

37 04/30/2014 08:03 PM markw

First cut with svideo, all versions from generic

36 04/26/2014 07:57 PM markw

Added os16_loop

35 04/26/2014 07:49 PM markw

First version that boots with sdram

34 04/26/2014 07:46 PM markw

Add an additional internal rom option - internal_rom=2, which for now just loops reading/writing 4 bytes. e.g. for testing new RAM setups

33 04/22/2014 09:55 PM markw

Final step of mcc216 build process - Windows only, appears to run in wine

32 04/22/2014 09:54 PM markw

svideo code provided by the mcc216 team

31 04/22/2014 08:37 PM markw

Re-connected SDRAM to DE1

30 04/16/2014 10:19 PM markw

Pass through video bigs

29 04/16/2014 10:12 PM markw

Build all targets...

28 04/16/2014 10:10 PM markw

Should never have been committed...

27 04/16/2014 10:10 PM markw

Use video bits generic

26 04/16/2014 10:10 PM markw

Use video bits generic

25 04/16/2014 10:09 PM markw

Added video bits to generic, since I am having to adjust this everywhere.

24 04/16/2014 10:07 PM markw

DE1 working with SRAM against common core. Plenty of features lost!

23 04/16/2014 07:51 AM markw

Adjusted this based on mist settings - in the hope this will mean I need to tweak the phase offset less...

22 04/16/2014 07:22 AM markw

Connected up SDRAM. Make 800XL core wait for SDRAM reset to complete. Also had to adjust phase offset to make it work - need to get a proper setup for mist

21 04/15/2014 08:11 PM markw

to_01 silenced sim, but caused build issues on Xilinx. If its invalid use 0

(626-650/670) Per page: 25, 50, 100

Also available in: Atom