Flashing overview¶

The FPGA device is a bunch of logic gates that can be reconfigured.

To make it into an Atari it needs to load a core, which is basically a low-level definition of how the gates are to be connected up. Since it may be reconfigured its possible to upgrade the system by writing a new definition of some logic, as long as there are spare gates available. We have a lot spare!

The cores are made by the Quartus II software. There is a free (as in beer) version available. Basically I write a high-level definition of the circuit in VHDL or Verilog. This is then loaded into Quartus II which computes the low-level gate layouts, known as synthesizing a core.

The core files created by Quartus II are proprietary files that only Altera/Intel understand (sadly).

The main types used in this project are:

1. sof files
2. jic files
3. rpd files

SOF files¶

This is the primary core file created when synthesizing a core in Quartus. These are used for a one-of program of the FPGA. It only lasts until power off. It is programmed using the JTAG port via a piece of hardware called a USB blaster. I advise everyone owning an EclaireXL to get one, they cost only about 10USD for a compatible one.

The sof files may be used to create the other two files, but I tend to publish all three types together.

JIC files¶

Typically you don't just want the core to last until powering off the board, so we need a way of configuring the board each time we turn it on. Fortunately Altera thought of this. Its possible to connect an SPI flash chip and have the FPGA load that each time it starts up. On the EclaireXL we have a 128MBit flash chip, which also allows us to store other things on it, such as the OS.

Anyway I create a jic file containing:

• flash loader
• sof file (the core)
• os/basic rom
• default settings

When it is programmed via the USB blaster it loads a special flash loader core to the FPGA. This then in turn writes the sof file and the rom/settings to the flash chip.

RPD files¶

There are very similar to the sof files. Essentially it is the same thing, in a slightly different format.

They are not programmed using the USB blaster though. They are loaded by the firmware in the EclaireXL, which then writes them to the flash chip. Making SD card core upgrades possible.

For now they contain only the core itself, so the os/basic rom and settings are left untouched.

JTAG and USB blaster¶

So what is this USB blaster I keep mentioning. Many chips/integrated circuits contain a special test port called a JTAG. Altera makes it possible to use this test port to program the FPGA. They have a device called the USB blaster, which is basically there JTAG adaptor. There are many cheap clone ones available that work fine. I suggest buying one from ebay.