Pinouts » History » Version 1
foft, 04/15/2018 07:23 PM
| 1 | 1 | foft | h1. Pinouts |
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| 2 | h2. v1 |
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| 3 | h2. v2 |
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| 4 | h3. Use in core |
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| 5 | |||
| 6 | h3. By connection to FPGA |
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| 7 | GPIO: |
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| 8 | 1-17: direct to FPGA |
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| 9 | 18: SDA (i2c) - clock gen also on here |
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| 10 | 19: SCL (i2c) - clock gen also on here |
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| 11 | 20-22: GND |
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| 12 | 23-34: 3.3V |
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| 13 | 25-26: 5.0V |
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| 14 | |||
| 15 | Interface 1: |
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| 16 | All level shifted to 3.3V. |
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| 17 | Special pins: |
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| 18 | 37:RD4: 10k pulldown |
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| 19 | 40:RD5: 10k pulldown |
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| 20 | 34:MPD_N: 4.7k pullup to 5V |
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| 21 | 28:IRQ_N: 4.7k pullup to 5V |
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| 22 | 32:REF_N: 2k pullup to 5V |
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| 23 | |||
| 24 | Interface 2: |
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| 25 | 1-3: USB to FTDI |
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| 26 | 4: GND |
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| 27 | 5,6: 5V |
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| 28 | 7-10: Charge cap, FPGA compares with ref voltage |
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| 29 | 11-30: level shifted to 3.3V. 4.7k pullup to 5V. Direction pins have extra 220 ohm resistance (needed?) |
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| 30 | 31: GND |
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| 31 | 32-33: level shifted to 3.3V. 4.7k pullup to 5V |
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| 32 | 34: 5V transistor drive (for tape motor) |
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| 33 | 35-49: level shifted to 3.3V. 4.7k pullup o 5V |
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| 34 | 40: EXTSEL_N: level shifted to 3.3V. 4.7k pullup to 5V |