Analysis & Synthesis report for pokeymax
Fri Jun 19 21:53:51 2026
Quartus Prime Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition


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; Table of Contents ;
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  1. Legal Notice
  2. Analysis & Synthesis Summary
  3. Analysis & Synthesis Settings
  4. Analysis & Synthesis Default Parameter Settings
  5. Parallel Compilation
  6. Analysis & Synthesis Source Files Read
  7. Analysis & Synthesis Resource Usage Summary
  8. Analysis & Synthesis Resource Utilization by Entity
  9. Analysis & Synthesis RAM Summary
 10. Analysis & Synthesis DSP Block Usage Summary
 11. Analysis & Synthesis IP Cores Summary
 12. State Machine - |pokeymax|i2c_master:\iox_on:i2c_master0|state
 13. State Machine - |pokeymax|flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|avmm_read_valid_state
 14. State Machine - |pokeymax|flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|read_state
 15. State Machine - |pokeymax|flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|erase_state
 16. State Machine - |pokeymax|flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|write_state
 17. Registers Protected by Synthesis
 18. Registers Removed During Synthesis
 19. Removed Registers Triggering Further Register Optimizations
 20. General Register Statistics
 21. Inverted Register Statistics
 22. Registers Packed Into Inferred Megafunctions
 23. Multiplexer Restructuring Statistics (Restructuring Performed)
 24. Source assignments for flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|altera_std_synchronizer:stdsync_busy
 25. Source assignments for flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|altera_std_synchronizer:stdsync_busy_clear
 26. Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:2:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated
 27. Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:10:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated
 28. Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:18:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated
 29. Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:26:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated
 30. Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:34:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated
 31. Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:42:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated
 32. Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:50:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated
 33. Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:56:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated
 34. Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:0:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated
 35. Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:1:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated
 36. Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:3:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated
 37. Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:4:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated
 38. Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:5:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated
 39. Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:6:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated
 40. Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:7:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated
 41. Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:8:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated
 42. Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:9:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated
 43. Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:11:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated
 44. Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:12:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated
 45. Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:13:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated
 46. Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:14:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated
 47. Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:15:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated
 48. Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:16:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated
 49. Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:17:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated
 50. Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:19:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated
 51. Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:20:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated
 52. Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:21:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated
 53. Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:22:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated
 54. Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:23:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated
 55. Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:24:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated
 56. Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:25:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated
 57. Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:27:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated
 58. Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:28:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated
 59. Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:29:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated
 60. Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:30:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated
 61. Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:31:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated
 62. Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:32:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated
 63. Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:33:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated
 64. Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:35:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated
 65. Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:36:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated
 66. Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:37:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated
 67. Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:38:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated
 68. Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:39:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated
 69. Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:40:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated
 70. Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:41:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated
 71. Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:43:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated
 72. Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:44:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated
 73. Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:45:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated
 74. Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:46:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated
 75. Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:47:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated
 76. Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:48:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated
 77. Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:49:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated
 78. Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:51:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated
 79. Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:52:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated
 80. Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:53:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated
 81. Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:54:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated
 82. Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:55:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated
 83. Source assignments for SID_top:\sid_on:sid2|SID_envelope:envelope_a|altshift_taps:attack_del1_reg_rtl_0|shift_taps_jgm:auto_generated|altsyncram_rj51:altsyncram4
 84. Parameter Settings for User Entity Instance: Top-level Entity: |pokeymax
 85. Parameter Settings for User Entity Instance: int_osc:oscillator|altera_int_osc:int_osc_0
 86. Parameter Settings for User Entity Instance: flash_controller:\flash_on:flash_controller_inst
 87. Parameter Settings for User Entity Instance: flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0
 88. Parameter Settings for User Entity Instance: flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_csr_controller:avmm_csr_controller
 89. Parameter Settings for User Entity Instance: flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller
 90. Parameter Settings for User Entity Instance: flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|altera_std_synchronizer:stdsync_busy
 91. Parameter Settings for User Entity Instance: flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|altera_std_synchronizer:stdsync_busy_clear
 92. Parameter Settings for User Entity Instance: flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|lpm_shiftreg:ufm_data_shiftreg
 93. Parameter Settings for User Entity Instance: flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|altera_onchip_flash_address_range_check:address_range_checker
 94. Parameter Settings for User Entity Instance: flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|altera_onchip_flash_convert_address:address_convertor
 95. Parameter Settings for User Entity Instance: flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|altera_onchip_flash_a_address_write_protection_check:access_address_write_protection_checker
 96. Parameter Settings for User Entity Instance: flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|altera_onchip_flash_convert_sector:sector_convertor
 97. Parameter Settings for User Entity Instance: pllv3:\pll_v3_inst:pll_inst|altpll:altpll_component
 98. Parameter Settings for User Entity Instance: pll_reset_sync:pll_sync
 99. Parameter Settings for User Entity Instance: slave_timing_6502:bus_adapt
100. Parameter Settings for User Entity Instance: pokey:pokey1
101. Parameter Settings for User Entity Instance: pokey:pokey1|complete_address_decoder:decode_addr1
102. Parameter Settings for User Entity Instance: pokey:pokey1|wide_delay_line:audf0_delay
103. Parameter Settings for User Entity Instance: pokey:pokey1|wide_delay_line:audf1_delay
104. Parameter Settings for User Entity Instance: pokey:pokey1|wide_delay_line:audf2_delay
105. Parameter Settings for User Entity Instance: pokey:pokey1|wide_delay_line:audf3_delay
106. Parameter Settings for User Entity Instance: pokey:pokey1|wide_delay_line:audctl_delay
107. Parameter Settings for User Entity Instance: pokey:pokey1|pokey_countdown_timer:timer0
108. Parameter Settings for User Entity Instance: pokey:pokey1|pokey_countdown_timer:timer0|delay_line:underflow0_delay
109. Parameter Settings for User Entity Instance: pokey:pokey1|pokey_countdown_timer:timer1
110. Parameter Settings for User Entity Instance: pokey:pokey1|pokey_countdown_timer:timer1|delay_line:underflow0_delay
111. Parameter Settings for User Entity Instance: pokey:pokey1|pokey_countdown_timer:timer2
112. Parameter Settings for User Entity Instance: pokey:pokey1|pokey_countdown_timer:timer2|delay_line:underflow0_delay
113. Parameter Settings for User Entity Instance: pokey:pokey1|pokey_countdown_timer:timer3
114. Parameter Settings for User Entity Instance: pokey:pokey1|pokey_countdown_timer:timer3|delay_line:underflow0_delay
115. Parameter Settings for User Entity Instance: pokey:pokey1|latch_delay_line:twotone_del
116. Parameter Settings for User Entity Instance: pokey:pokey1|latch_delay_line:stimer_delay
117. Parameter Settings for User Entity Instance: pokey:pokey1|syncreset_enable_divider:enable_64_div
118. Parameter Settings for User Entity Instance: pokey:pokey1|syncreset_enable_divider:enable_15_div
119. Parameter Settings for User Entity Instance: pokey:pokey1|delay_line:serout_clock_delay
120. Parameter Settings for User Entity Instance: pokey:pokey1|delay_line:serin_clock_delay
121. Parameter Settings for User Entity Instance: dc_blocker:pokey1_dc_blocker
122. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:1:pokeyx
123. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:1:pokeyx|complete_address_decoder:decode_addr1
124. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:1:pokeyx|wide_delay_line:audf0_delay
125. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:1:pokeyx|wide_delay_line:audf1_delay
126. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:1:pokeyx|wide_delay_line:audf2_delay
127. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:1:pokeyx|wide_delay_line:audf3_delay
128. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:1:pokeyx|wide_delay_line:audctl_delay
129. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:1:pokeyx|pokey_countdown_timer:timer0
130. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:1:pokeyx|pokey_countdown_timer:timer0|delay_line:underflow0_delay
131. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:1:pokeyx|pokey_countdown_timer:timer1
132. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:1:pokeyx|pokey_countdown_timer:timer1|delay_line:underflow0_delay
133. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:1:pokeyx|pokey_countdown_timer:timer2
134. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:1:pokeyx|pokey_countdown_timer:timer2|delay_line:underflow0_delay
135. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:1:pokeyx|pokey_countdown_timer:timer3
136. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:1:pokeyx|pokey_countdown_timer:timer3|delay_line:underflow0_delay
137. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:1:pokeyx|latch_delay_line:twotone_del
138. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:1:pokeyx|latch_delay_line:stimer_delay
139. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:1:pokeyx|syncreset_enable_divider:enable_64_div
140. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:1:pokeyx|syncreset_enable_divider:enable_15_div
141. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:1:pokeyx|delay_line:serout_clock_delay
142. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:1:pokeyx|delay_line:serin_clock_delay
143. Parameter Settings for User Entity Instance: dc_blocker:\POKEY_ON:1:pokey_dc_blockerx
144. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:2:pokeyx
145. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:2:pokeyx|complete_address_decoder:decode_addr1
146. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:2:pokeyx|wide_delay_line:audf0_delay
147. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:2:pokeyx|wide_delay_line:audf1_delay
148. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:2:pokeyx|wide_delay_line:audf2_delay
149. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:2:pokeyx|wide_delay_line:audf3_delay
150. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:2:pokeyx|wide_delay_line:audctl_delay
151. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:2:pokeyx|pokey_countdown_timer:timer0
152. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:2:pokeyx|pokey_countdown_timer:timer0|delay_line:underflow0_delay
153. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:2:pokeyx|pokey_countdown_timer:timer1
154. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:2:pokeyx|pokey_countdown_timer:timer1|delay_line:underflow0_delay
155. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:2:pokeyx|pokey_countdown_timer:timer2
156. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:2:pokeyx|pokey_countdown_timer:timer2|delay_line:underflow0_delay
157. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:2:pokeyx|pokey_countdown_timer:timer3
158. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:2:pokeyx|pokey_countdown_timer:timer3|delay_line:underflow0_delay
159. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:2:pokeyx|latch_delay_line:twotone_del
160. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:2:pokeyx|latch_delay_line:stimer_delay
161. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:2:pokeyx|syncreset_enable_divider:enable_64_div
162. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:2:pokeyx|syncreset_enable_divider:enable_15_div
163. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:2:pokeyx|delay_line:serout_clock_delay
164. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:2:pokeyx|delay_line:serin_clock_delay
165. Parameter Settings for User Entity Instance: dc_blocker:\POKEY_ON:2:pokey_dc_blockerx
166. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:3:pokeyx
167. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:3:pokeyx|complete_address_decoder:decode_addr1
168. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:3:pokeyx|wide_delay_line:audf0_delay
169. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:3:pokeyx|wide_delay_line:audf1_delay
170. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:3:pokeyx|wide_delay_line:audf2_delay
171. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:3:pokeyx|wide_delay_line:audf3_delay
172. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:3:pokeyx|wide_delay_line:audctl_delay
173. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:3:pokeyx|pokey_countdown_timer:timer0
174. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:3:pokeyx|pokey_countdown_timer:timer0|delay_line:underflow0_delay
175. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:3:pokeyx|pokey_countdown_timer:timer1
176. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:3:pokeyx|pokey_countdown_timer:timer1|delay_line:underflow0_delay
177. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:3:pokeyx|pokey_countdown_timer:timer2
178. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:3:pokeyx|pokey_countdown_timer:timer2|delay_line:underflow0_delay
179. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:3:pokeyx|pokey_countdown_timer:timer3
180. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:3:pokeyx|pokey_countdown_timer:timer3|delay_line:underflow0_delay
181. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:3:pokeyx|latch_delay_line:twotone_del
182. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:3:pokeyx|latch_delay_line:stimer_delay
183. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:3:pokeyx|syncreset_enable_divider:enable_64_div
184. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:3:pokeyx|syncreset_enable_divider:enable_15_div
185. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:3:pokeyx|delay_line:serout_clock_delay
186. Parameter Settings for User Entity Instance: pokey:\POKEY_ON:3:pokeyx|delay_line:serin_clock_delay
187. Parameter Settings for User Entity Instance: dc_blocker:\POKEY_ON:3:pokey_dc_blockerx
188. Parameter Settings for User Entity Instance: SID_top:\sid_on:sid1
189. Parameter Settings for User Entity Instance: SID_top:\sid_on:sid1|complete_address_decoder:decode_addr1
190. Parameter Settings for User Entity Instance: SID_top:\sid_on:sid2
191. Parameter Settings for User Entity Instance: SID_top:\sid_on:sid2|complete_address_decoder:decode_addr1
192. Parameter Settings for User Entity Instance: PSG_top:\psg_on:PSG_1|complete_address_decoder:decode_addr1
193. Parameter Settings for User Entity Instance: PSG_top:\psg_on:PSG_1|PSG_freqdiv:core_ticker
194. Parameter Settings for User Entity Instance: PSG_top:\psg_on:PSG_1|PSG_freqdiv:channel_a_ticker
195. Parameter Settings for User Entity Instance: PSG_top:\psg_on:PSG_1|PSG_freqdiv:channel_b_ticker
196. Parameter Settings for User Entity Instance: PSG_top:\psg_on:PSG_1|PSG_freqdiv:channel_c_ticker
197. Parameter Settings for User Entity Instance: PSG_top:\psg_on:PSG_1|PSG_freqdiv:noise_preticker
198. Parameter Settings for User Entity Instance: PSG_top:\psg_on:PSG_1|PSG_freqdiv:noise_ticker
199. Parameter Settings for User Entity Instance: PSG_top:\psg_on:PSG_1|PSG_envelope:envelope|PSG_freqdiv:envelope_ticker
200. Parameter Settings for User Entity Instance: PSG_top:\psg_on:PSG_2|complete_address_decoder:decode_addr1
201. Parameter Settings for User Entity Instance: PSG_top:\psg_on:PSG_2|PSG_freqdiv:core_ticker
202. Parameter Settings for User Entity Instance: PSG_top:\psg_on:PSG_2|PSG_freqdiv:channel_a_ticker
203. Parameter Settings for User Entity Instance: PSG_top:\psg_on:PSG_2|PSG_freqdiv:channel_b_ticker
204. Parameter Settings for User Entity Instance: PSG_top:\psg_on:PSG_2|PSG_freqdiv:channel_c_ticker
205. Parameter Settings for User Entity Instance: PSG_top:\psg_on:PSG_2|PSG_freqdiv:noise_preticker
206. Parameter Settings for User Entity Instance: PSG_top:\psg_on:PSG_2|PSG_freqdiv:noise_ticker
207. Parameter Settings for User Entity Instance: PSG_top:\psg_on:PSG_2|PSG_envelope:envelope|PSG_freqdiv:envelope_ticker
208. Parameter Settings for User Entity Instance: dc_blocker:\psg_on:psg1_dc_blocker
209. Parameter Settings for User Entity Instance: dc_blocker:\psg_on:psg2_dc_blocker
210. Parameter Settings for User Entity Instance: sample_top:\sample_on:sample1
211. Parameter Settings for User Entity Instance: sample_top:\sample_on:sample1|complete_address_decoder:decode_addr2
212. Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst
213. Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:0:sample_ram_inst
214. Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:1:sample_ram_inst
215. Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:2:sample_ram_inst
216. Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:3:sample_ram_inst
217. Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:4:sample_ram_inst
218. Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:5:sample_ram_inst
219. Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:6:sample_ram_inst
220. Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:7:sample_ram_inst
221. Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:8:sample_ram_inst
222. Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:9:sample_ram_inst
223. Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:10:sample_ram_inst
224. Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:11:sample_ram_inst
225. Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:12:sample_ram_inst
226. Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:13:sample_ram_inst
227. Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:14:sample_ram_inst
228. Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:15:sample_ram_inst
229. Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:16:sample_ram_inst
230. Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:17:sample_ram_inst
231. Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:18:sample_ram_inst
232. Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:19:sample_ram_inst
233. Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:20:sample_ram_inst
234. Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:21:sample_ram_inst
235. Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:22:sample_ram_inst
236. Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:23:sample_ram_inst
237. Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:24:sample_ram_inst
238. Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:25:sample_ram_inst
239. Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:26:sample_ram_inst
240. Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:27:sample_ram_inst
241. Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:28:sample_ram_inst
242. Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:29:sample_ram_inst
243. Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:30:sample_ram_inst
244. Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:31:sample_ram_inst
245. Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:32:sample_ram_inst
246. Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:33:sample_ram_inst
247. Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:34:sample_ram_inst
248. Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:35:sample_ram_inst
249. Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:36:sample_ram_inst
250. Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:37:sample_ram_inst
251. Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:38:sample_ram_inst
252. Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:39:sample_ram_inst
253. Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:40:sample_ram_inst
254. Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:41:sample_ram_inst
255. Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:42:sample_ram_inst
256. Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:43:sample_ram_inst
257. Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:44:sample_ram_inst
258. Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:45:sample_ram_inst
259. Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:46:sample_ram_inst
260. Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:47:sample_ram_inst
261. Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:48:sample_ram_inst
262. Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:49:sample_ram_inst
263. Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:50:sample_ram_inst
264. Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:51:sample_ram_inst
265. Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:52:sample_ram_inst
266. Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:53:sample_ram_inst
267. Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:54:sample_ram_inst
268. Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:55:sample_ram_inst
269. Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:56:sample_ram_inst
270. Parameter Settings for User Entity Instance: complete_address_decoder:\gen_config:decode_addr1
271. Parameter Settings for User Entity Instance: sigmadelta_dither:dac_dithergen
272. Parameter Settings for User Entity Instance: filtered_sigmadelta:dac_0
273. Parameter Settings for User Entity Instance: filtered_sigmadelta:\audout2_on:dac_1
274. Parameter Settings for User Entity Instance: filtered_sigmadelta:dac_2
275. Parameter Settings for User Entity Instance: filtered_sigmadelta:dac_3
276. Parameter Settings for User Entity Instance: i2c_master:\iox_on:i2c_master0
277. Parameter Settings for User Entity Instance: ps2_to_atari800:\ps2_on:keyboard_map1
278. Parameter Settings for User Entity Instance: ps2_to_atari800:\ps2_on:keyboard_map1|ps2_keyboard:\gen_ps2_on:keyboard1|enable_divider:enable_div
279. Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:2:sample_ram_inst|altsyncram:ram_block_rtl_0
280. Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:10:sample_ram_inst|altsyncram:ram_block_rtl_0
281. Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:18:sample_ram_inst|altsyncram:ram_block_rtl_0
282. Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:26:sample_ram_inst|altsyncram:ram_block_rtl_0
283. Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:34:sample_ram_inst|altsyncram:ram_block_rtl_0
284. Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:42:sample_ram_inst|altsyncram:ram_block_rtl_0
285. Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:50:sample_ram_inst|altsyncram:ram_block_rtl_0
286. Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:56:sample_ram_inst|altsyncram:ram_block_rtl_0
287. Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:0:sample_ram_inst|altsyncram:ram_block_rtl_0
288. Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:1:sample_ram_inst|altsyncram:ram_block_rtl_0
289. Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:3:sample_ram_inst|altsyncram:ram_block_rtl_0
290. Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:4:sample_ram_inst|altsyncram:ram_block_rtl_0
291. Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:5:sample_ram_inst|altsyncram:ram_block_rtl_0
292. Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:6:sample_ram_inst|altsyncram:ram_block_rtl_0
293. Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:7:sample_ram_inst|altsyncram:ram_block_rtl_0
294. Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:8:sample_ram_inst|altsyncram:ram_block_rtl_0
295. Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:9:sample_ram_inst|altsyncram:ram_block_rtl_0
296. Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:11:sample_ram_inst|altsyncram:ram_block_rtl_0
297. Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:12:sample_ram_inst|altsyncram:ram_block_rtl_0
298. Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:13:sample_ram_inst|altsyncram:ram_block_rtl_0
299. Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:14:sample_ram_inst|altsyncram:ram_block_rtl_0
300. Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:15:sample_ram_inst|altsyncram:ram_block_rtl_0
301. Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:16:sample_ram_inst|altsyncram:ram_block_rtl_0
302. Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:17:sample_ram_inst|altsyncram:ram_block_rtl_0
303. Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:19:sample_ram_inst|altsyncram:ram_block_rtl_0
304. Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:20:sample_ram_inst|altsyncram:ram_block_rtl_0
305. Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:21:sample_ram_inst|altsyncram:ram_block_rtl_0
306. Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:22:sample_ram_inst|altsyncram:ram_block_rtl_0
307. Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:23:sample_ram_inst|altsyncram:ram_block_rtl_0
308. Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:24:sample_ram_inst|altsyncram:ram_block_rtl_0
309. Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:25:sample_ram_inst|altsyncram:ram_block_rtl_0
310. Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:27:sample_ram_inst|altsyncram:ram_block_rtl_0
311. Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:28:sample_ram_inst|altsyncram:ram_block_rtl_0
312. Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:29:sample_ram_inst|altsyncram:ram_block_rtl_0
313. Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:30:sample_ram_inst|altsyncram:ram_block_rtl_0
314. Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:31:sample_ram_inst|altsyncram:ram_block_rtl_0
315. Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:32:sample_ram_inst|altsyncram:ram_block_rtl_0
316. Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:33:sample_ram_inst|altsyncram:ram_block_rtl_0
317. Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:35:sample_ram_inst|altsyncram:ram_block_rtl_0
318. Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:36:sample_ram_inst|altsyncram:ram_block_rtl_0
319. Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:37:sample_ram_inst|altsyncram:ram_block_rtl_0
320. Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:38:sample_ram_inst|altsyncram:ram_block_rtl_0
321. Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:39:sample_ram_inst|altsyncram:ram_block_rtl_0
322. Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:40:sample_ram_inst|altsyncram:ram_block_rtl_0
323. Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:41:sample_ram_inst|altsyncram:ram_block_rtl_0
324. Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:43:sample_ram_inst|altsyncram:ram_block_rtl_0
325. Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:44:sample_ram_inst|altsyncram:ram_block_rtl_0
326. Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:45:sample_ram_inst|altsyncram:ram_block_rtl_0
327. Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:46:sample_ram_inst|altsyncram:ram_block_rtl_0
328. Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:47:sample_ram_inst|altsyncram:ram_block_rtl_0
329. Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:48:sample_ram_inst|altsyncram:ram_block_rtl_0
330. Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:49:sample_ram_inst|altsyncram:ram_block_rtl_0
331. Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:51:sample_ram_inst|altsyncram:ram_block_rtl_0
332. Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:52:sample_ram_inst|altsyncram:ram_block_rtl_0
333. Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:53:sample_ram_inst|altsyncram:ram_block_rtl_0
334. Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:54:sample_ram_inst|altsyncram:ram_block_rtl_0
335. Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:55:sample_ram_inst|altsyncram:ram_block_rtl_0
336. Parameter Settings for Inferred Entity Instance: SID_top:\sid_on:sid2|SID_envelope:envelope_a|altshift_taps:attack_del1_reg_rtl_0
337. Parameter Settings for Inferred Entity Instance: clockgen:\sidpsg_on:clockgen1|lpm_mult:Mult0
338. Parameter Settings for Inferred Entity Instance: sample_top:\sample_on:sample1|lpm_mult:Mult3
339. Parameter Settings for Inferred Entity Instance: sample_top:\sample_on:sample1|lpm_mult:Mult2
340. Parameter Settings for Inferred Entity Instance: SID_top:\sid_on:sid1|SID_postFilterSum:postfilter|lpm_mult:Mult0
341. Parameter Settings for Inferred Entity Instance: sample_top:\sample_on:sample1|lpm_mult:Mult1
342. Parameter Settings for Inferred Entity Instance: sample_top:\sample_on:sample1|lpm_mult:Mult0
343. Parameter Settings for Inferred Entity Instance: SID_top:\sid_on:sid2|SID_postFilterSum:postfilter|lpm_mult:Mult0
344. Parameter Settings for Inferred Entity Instance: sample_top:\sample_on:sample1|sample_adpcm:adpcm_decoder|lpm_mult:Mult0
345. Parameter Settings for Inferred Entity Instance: SID_top:\sid_on:sid1|SID_amplitudeModulator:vol_abc|lpm_mult:Mult0
346. Parameter Settings for Inferred Entity Instance: SID_top:\sid_on:sid1|SID_filter:variable_state_filter|lpm_mult:Mult4
347. Parameter Settings for Inferred Entity Instance: SID_top:\sid_on:sid2|SID_amplitudeModulator:vol_abc|lpm_mult:Mult0
348. Parameter Settings for Inferred Entity Instance: SID_top:\sid_on:sid2|SID_filter:variable_state_filter|lpm_mult:Mult4
349. Parameter Settings for Inferred Entity Instance: SID_top:\sid_on:sid1|SID_filter:variable_state_filter|lpm_mult:Mult3
350. Parameter Settings for Inferred Entity Instance: SID_top:\sid_on:sid2|SID_filter:variable_state_filter|lpm_mult:Mult3
351. Parameter Settings for Inferred Entity Instance: SID_top:\sid_on:sid1|SID_filter:variable_state_filter|lpm_mult:Mult0
352. Parameter Settings for Inferred Entity Instance: SID_top:\sid_on:sid2|SID_filter:variable_state_filter|lpm_mult:Mult0
353. Parameter Settings for Inferred Entity Instance: SID_f_distortion_mux:\sid_on:f_distortion_mux|SID_f_distortion:f_distortion|lpm_mult:Mult0
354. lpm_shiftreg Parameter Settings by Entity Instance
355. altshift_taps Parameter Settings by Entity Instance
356. altpll Parameter Settings by Entity Instance
357. altsyncram Parameter Settings by Entity Instance
358. lpm_mult Parameter Settings by Entity Instance
359. Port Connectivity Checks: "synchronizer:synchronizer_SIO"
360. Port Connectivity Checks: "ps2_to_atari800:\ps2_on:keyboard_map1|ps2_keyboard:\gen_ps2_on:keyboard1|enable_divider:enable_div"
361. Port Connectivity Checks: "ps2_to_atari800:\ps2_on:keyboard_map1"
362. Port Connectivity Checks: "spdif_transmitter:\spdif_on:spdif"
363. Port Connectivity Checks: "filtered_sigmadelta:dac_0|sigmadelta_2ndorder:\gen_2ndorder_on:dac_2nd"
364. Port Connectivity Checks: "mixer:mixer1"
365. Port Connectivity Checks: "complete_address_decoder:\gen_config:decode_addr1"
366. Port Connectivity Checks: "sample_top:\sample_on:sample1|sample_adpcm:adpcm_decoder"
367. Port Connectivity Checks: "sample_top:\sample_on:sample1|complete_address_decoder:decode_addr2"
368. Port Connectivity Checks: "sample_top:\sample_on:sample1"
369. Port Connectivity Checks: "PSG_volume_profile:\psg_on:vol_profile1"
370. Port Connectivity Checks: "PSG_top:\psg_on:PSG_2"
371. Port Connectivity Checks: "PSG_top:\psg_on:PSG_1|PSG_freqdiv:noise_ticker"
372. Port Connectivity Checks: "PSG_top:\psg_on:PSG_1|PSG_freqdiv:noise_preticker"
373. Port Connectivity Checks: "PSG_top:\psg_on:PSG_1|PSG_freqdiv:channel_c_ticker"
374. Port Connectivity Checks: "PSG_top:\psg_on:PSG_1|PSG_freqdiv:channel_b_ticker"
375. Port Connectivity Checks: "PSG_top:\psg_on:PSG_1|PSG_freqdiv:channel_a_ticker"
376. Port Connectivity Checks: "PSG_top:\psg_on:PSG_1|PSG_freqdiv:core_ticker"
377. Port Connectivity Checks: "PSG_top:\psg_on:PSG_1"
378. Port Connectivity Checks: "SID_top:\sid_on:sid2"
379. Port Connectivity Checks: "SID_top:\sid_on:sid1|complete_address_decoder:decode_addr1"
380. Port Connectivity Checks: "SID_top:\sid_on:sid1"
381. Port Connectivity Checks: "pokey:\POKEY_ON:3:pokeyx"
382. Port Connectivity Checks: "pokey:\POKEY_ON:2:pokeyx"
383. Port Connectivity Checks: "pokey:\POKEY_ON:1:pokeyx|latch_delay_line:stimer_delay"
384. Port Connectivity Checks: "pokey:\POKEY_ON:1:pokeyx|latch_delay_line:twotone_del"
385. Port Connectivity Checks: "pokey:\POKEY_ON:1:pokeyx|wide_delay_line:audctl_delay"
386. Port Connectivity Checks: "pokey:\POKEY_ON:1:pokeyx|wide_delay_line:audf3_delay"
387. Port Connectivity Checks: "pokey:\POKEY_ON:1:pokeyx|wide_delay_line:audf2_delay"
388. Port Connectivity Checks: "pokey:\POKEY_ON:1:pokeyx|wide_delay_line:audf1_delay"
389. Port Connectivity Checks: "pokey:\POKEY_ON:1:pokeyx|wide_delay_line:audf0_delay"
390. Port Connectivity Checks: "pokey:\POKEY_ON:1:pokeyx|complete_address_decoder:decode_addr1"
391. Port Connectivity Checks: "pokey:\POKEY_ON:1:pokeyx"
392. Port Connectivity Checks: "pokey:pokey1|latch_delay_line:stimer_delay"
393. Port Connectivity Checks: "pokey:pokey1|latch_delay_line:twotone_del"
394. Port Connectivity Checks: "pokey:pokey1|wide_delay_line:audctl_delay"
395. Port Connectivity Checks: "pokey:pokey1|wide_delay_line:audf3_delay"
396. Port Connectivity Checks: "pokey:pokey1|wide_delay_line:audf2_delay"
397. Port Connectivity Checks: "pokey:pokey1|wide_delay_line:audf1_delay"
398. Port Connectivity Checks: "pokey:pokey1|wide_delay_line:audf0_delay"
399. Port Connectivity Checks: "pokey:pokey1|complete_address_decoder:decode_addr1"
400. Port Connectivity Checks: "pokey:pokey1"
401. Port Connectivity Checks: "slave_timing_6502:bus_adapt"
402. Port Connectivity Checks: "synchronizer:synchronizer_fancy_enable"
403. Port Connectivity Checks: "flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_block:altera_onchip_flash_block"
404. Port Connectivity Checks: "flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|altera_onchip_flash_address_range_check:address_range_checker"
405. Port Connectivity Checks: "flash_controller:\flash_on:flash_controller_inst|flash:flash1"
406. Port Connectivity Checks: "flash_controller:\flash_on:flash_controller_inst"
407. Port Connectivity Checks: "int_osc:oscillator"
408. Post-Synthesis Netlist Statistics for Top Partition
409. Elapsed Time Per Partition
410. Analysis & Synthesis Messages



----------------
; Legal Notice ;
----------------
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on the Quartus Prime software download page.



+--------------------------------------------------------------------------------------+
; Analysis & Synthesis Summary                                                         ;
+------------------------------------+-------------------------------------------------+
; Analysis & Synthesis Status        ; Successful - Fri Jun 19 21:53:51 2026           ;
; Quartus Prime Version              ; 25.1std.0 Build 1129 10/21/2025 SC Lite Edition ;
; Revision Name                      ; pokeymax                                        ;
; Top-level Entity Name              ; pokeymax                                        ;
; Family                             ; MAX 10                                          ;
; Total logic elements               ; 12,752                                          ;
;     Total combinational functions  ; 10,384                                          ;
;     Dedicated logic registers      ; 6,162                                           ;
; Total registers                    ; 6162                                            ;
; Total pins                         ; 57                                              ;
; Total virtual pins                 ; 0                                               ;
; Total memory bits                  ; 525,528                                         ;
; Embedded Multiplier 9-bit elements ; 45                                              ;
; Total PLLs                         ; 1                                               ;
; UFM blocks                         ; 1                                               ;
; ADC blocks                         ; 0                                               ;
+------------------------------------+-------------------------------------------------+


+------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Settings                                                                              ;
+------------------------------------------------------------------+--------------------+--------------------+
; Option                                                           ; Setting            ; Default Value      ;
+------------------------------------------------------------------+--------------------+--------------------+
; Device                                                           ; 10M16SCU169C8G     ;                    ;
; Top-level entity name                                            ; pokeymax           ; pokeymax           ;
; Family name                                                      ; MAX 10             ; Cyclone V          ;
; Use smart compilation                                            ; Off                ; Off                ;
; Enable parallel Assembler and Timing Analyzer during compilation ; On                 ; On                 ;
; Enable compact report table                                      ; Off                ; Off                ;
; Restructure Multiplexers                                         ; Auto               ; Auto               ;
; Create Debugging Nodes for IP Cores                              ; Off                ; Off                ;
; Preserve fewer node names                                        ; On                 ; On                 ;
; Intel FPGA IP Evaluation Mode                                    ; Enable             ; Enable             ;
; Verilog Version                                                  ; Verilog_2001       ; Verilog_2001       ;
; VHDL Version                                                     ; VHDL_1993          ; VHDL_1993          ;
; State Machine Processing                                         ; Auto               ; Auto               ;
; Safe State Machine                                               ; Off                ; Off                ;
; Extract Verilog State Machines                                   ; On                 ; On                 ;
; Extract VHDL State Machines                                      ; On                 ; On                 ;
; Ignore Verilog initial constructs                                ; Off                ; Off                ;
; Iteration limit for constant Verilog loops                       ; 5000               ; 5000               ;
; Iteration limit for non-constant Verilog loops                   ; 250                ; 250                ;
; Add Pass-Through Logic to Inferred RAMs                          ; On                 ; On                 ;
; Infer RAMs from Raw Logic                                        ; On                 ; On                 ;
; Parallel Synthesis                                               ; On                 ; On                 ;
; DSP Block Balancing                                              ; Auto               ; Auto               ;
; NOT Gate Push-Back                                               ; On                 ; On                 ;
; Power-Up Don't Care                                              ; On                 ; On                 ;
; Remove Redundant Logic Cells                                     ; Off                ; Off                ;
; Remove Duplicate Registers                                       ; On                 ; On                 ;
; Ignore CARRY Buffers                                             ; Off                ; Off                ;
; Ignore CASCADE Buffers                                           ; Off                ; Off                ;
; Ignore GLOBAL Buffers                                            ; Off                ; Off                ;
; Ignore ROW GLOBAL Buffers                                        ; Off                ; Off                ;
; Ignore LCELL Buffers                                             ; Off                ; Off                ;
; Ignore SOFT Buffers                                              ; On                 ; On                 ;
; Limit AHDL Integers to 32 Bits                                   ; Off                ; Off                ;
; Optimization Technique                                           ; Balanced           ; Balanced           ;
; Carry Chain Length                                               ; 70                 ; 70                 ;
; Auto Carry Chains                                                ; On                 ; On                 ;
; Auto Open-Drain Pins                                             ; On                 ; On                 ;
; Perform WYSIWYG Primitive Resynthesis                            ; Off                ; Off                ;
; Auto ROM Replacement                                             ; On                 ; On                 ;
; Auto RAM Replacement                                             ; On                 ; On                 ;
; Auto DSP Block Replacement                                       ; On                 ; On                 ;
; Auto Shift Register Replacement                                  ; Auto               ; Auto               ;
; Allow Shift Register Merging across Hierarchies                  ; Auto               ; Auto               ;
; Auto Clock Enable Replacement                                    ; On                 ; On                 ;
; Strict RAM Replacement                                           ; Off                ; Off                ;
; Allow Synchronous Control Signals                                ; On                 ; On                 ;
; Force Use of Synchronous Clear Signals                           ; Off                ; Off                ;
; Auto RAM Block Balancing                                         ; On                 ; On                 ;
; Auto RAM to Logic Cell Conversion                                ; Off                ; Off                ;
; Auto Resource Sharing                                            ; Off                ; Off                ;
; Allow Any RAM Size For Recognition                               ; Off                ; Off                ;
; Allow Any ROM Size For Recognition                               ; Off                ; Off                ;
; Allow Any Shift Register Size For Recognition                    ; Off                ; Off                ;
; Use LogicLock Constraints during Resource Balancing              ; On                 ; On                 ;
; Ignore translate_off and synthesis_off directives                ; Off                ; Off                ;
; Timing-Driven Synthesis                                          ; On                 ; On                 ;
; Report Parameter Settings                                        ; On                 ; On                 ;
; Report Source Assignments                                        ; On                 ; On                 ;
; Report Connectivity Checks                                       ; On                 ; On                 ;
; Ignore Maximum Fan-Out Assignments                               ; Off                ; Off                ;
; Synchronization Register Chain Length                            ; 2                  ; 2                  ;
; Power Optimization During Synthesis                              ; Normal compilation ; Normal compilation ;
; HDL message level                                                ; Level2             ; Level2             ;
; Suppress Register Optimization Related Messages                  ; Off                ; Off                ;
; Number of Removed Registers Reported in Synthesis Report         ; 5000               ; 5000               ;
; Number of Swept Nodes Reported in Synthesis Report               ; 5000               ; 5000               ;
; Number of Inverted Registers Reported in Synthesis Report        ; 100                ; 100                ;
; Clock MUX Protection                                             ; On                 ; On                 ;
; Auto Gated Clock Conversion                                      ; Off                ; Off                ;
; Block Design Naming                                              ; Auto               ; Auto               ;
; SDC constraint protection                                        ; Off                ; Off                ;
; Synthesis Effort                                                 ; Auto               ; Auto               ;
; Shift Register Replacement - Allow Asynchronous Clear Signal     ; On                 ; On                 ;
; Pre-Mapping Resynthesis Optimization                             ; Off                ; Off                ;
; Analysis & Synthesis Message Level                               ; Medium             ; Medium             ;
; Disable Register Merging Across Hierarchies                      ; Auto               ; Auto               ;
; Resource Aware Inference For Block RAM                           ; On                 ; On                 ;
+------------------------------------------------------------------+--------------------+--------------------+


+-------------------------------------------------+
; Analysis & Synthesis Default Parameter Settings ;
+--------------------+----------------------------+
; Name               ; Setting                    ;
+--------------------+----------------------------+
; a4_bit             ; 1                          ;
; a5_bit             ; 2                          ;
; a6_bit             ; 3                          ;
; a7_bit             ; 4                          ;
; cs1_bit            ; 20                         ;
; enable_auto_stereo ; 1                          ;
; enable_covox       ; 1                          ;
; enable_flash       ; 1                          ;
; enable_ps2         ; 1                          ;
; enable_psg         ; 1                          ;
; enable_sample      ; 1                          ;
; enable_sid         ; 1                          ;
; enable_spdif       ; 1                          ;
; ext_bits           ; 11                         ;
; flash_addr_bits    ; 17                         ;
; fpga               ; 10M16SCU169C8G             ;
; gtia_audio_bit     ; 5                          ;
; pll_v2             ; 0                          ;
; pokeys             ; 4                          ;
; ps2clk_bit         ; 7                          ;
; ps2dat_bit         ; 8                          ;
; sample_ram_size    ; 65536                      ;
; sid_wave_base      ; 79872                      ;
; spdif_bit          ; 6                          ;
; version            ; 313016QF                   ;
+--------------------+----------------------------+


+------------------------------------------+
; Parallel Compilation                     ;
+----------------------------+-------------+
; Processors                 ; Number      ;
+----------------------------+-------------+
; Number detected on machine ; 32          ;
; Maximum allowed            ; 16          ;
;                            ;             ;
; Average used               ; 1.01        ;
; Maximum used               ; 16          ;
;                            ;             ;
; Usage by Processor         ; % Time Used ;
;     Processor 1            ; 100.0%      ;
;     Processor 2            ;   0.1%      ;
;     Processor 3            ;   0.1%      ;
;     Processor 4            ;   0.1%      ;
;     Processor 5            ;   0.1%      ;
;     Processor 6            ;   0.1%      ;
;     Processor 7            ;   0.1%      ;
;     Processor 8            ;   0.1%      ;
;     Processors 9-16        ;   0.1%      ;
+----------------------------+-------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Source Files Read                                                                                                                                                                                                                                                                                ;
+-----------------------------------------------------------------------+-----------------+-----------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------+
; File Name with User-Entered Path                                      ; Used in Netlist ; File Type                         ; File Name with Absolute Path                                                                                                                                                  ; Library ;
+-----------------------------------------------------------------------+-----------------+-----------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------+
; audio_signal_detector.vhd                                             ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/audio_signal_detector.vhd                                             ;         ;
; flash_controller.vhd                                                  ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/flash_controller.vhd                                                  ;         ;
; stereo_detect.vhd                                                     ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/stereo_detect.vhd                                                     ;         ;
; iox_glue.vhdl                                                         ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/iox_glue.vhdl                                                         ;         ;
; i2c_master.vhd                                                        ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/i2c_master.vhd                                                        ;         ;
; slave_timing_6502.vhd                                                 ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/slave_timing_6502.vhd                                                 ;         ;
; pll_reset_sync.vhdl                                                   ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pll_reset_sync.vhdl                                                   ;         ;
; complete_address_decoder.vhdl                                         ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/complete_address_decoder.vhdl                                         ;         ;
; syncreset_enable_divider.vhd                                          ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/syncreset_enable_divider.vhd                                          ;         ;
; enable_divider.vhdl                                                   ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/enable_divider.vhdl                                                   ;         ;
; delay_line.vhdl                                                       ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/delay_line.vhdl                                                       ;         ;
; wide_delay_line.vhdl                                                  ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/wide_delay_line.vhdl                                                  ;         ;
; latch_delay_line.vhdl                                                 ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/latch_delay_line.vhdl                                                 ;         ;
; sigmadelta_1storder.vhd                                               ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/sigmadelta_1storder.vhd                                               ;         ;
; sigmadelta_2ndorder.vhd                                               ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/sigmadelta_2ndorder.vhd                                               ;         ;
; sigmadelta_dither.vhd                                                 ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/sigmadelta_dither.vhd                                                 ;         ;
; sigmadelta_2ndorder_dither.vhd                                        ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/sigmadelta_2ndorder_dither.vhd                                        ;         ;
; filtered_sigmadelta.vhd                                               ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/filtered_sigmadelta.vhd                                               ;         ;
; fir_filter.vhdl                                                       ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/fir_filter.vhdl                                                       ;         ;
; generic_ram_infer.vhdl                                                ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/generic_ram_infer.vhdl                                                ;         ;
; m9k_grouped.vhdl                                                      ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/m9k_grouped.vhdl                                                      ;         ;
; simple_low_pass_filter.vhdl                                           ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/simple_low_pass_filter.vhdl                                           ;         ;
; pokey/pokey_poly_17_9.vhdl                                            ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokey/pokey_poly_17_9.vhdl                                            ;         ;
; pokey/pokey_poly_5.vhdl                                               ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokey/pokey_poly_5.vhdl                                               ;         ;
; pokey/pokey_poly_4.vhdl                                               ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokey/pokey_poly_4.vhdl                                               ;         ;
; pokey/pokey_noise_filter.vhdl                                         ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokey/pokey_noise_filter.vhdl                                         ;         ;
; pokey/pokey_mixer_mux.vhdl                                            ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokey/pokey_mixer_mux.vhdl                                            ;         ;
; pokey/pokey_mixer.vhdl                                                ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokey/pokey_mixer.vhdl                                                ;         ;
; pokey/pokey_keyboard_scanner.vhdl                                     ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokey/pokey_keyboard_scanner.vhdl                                     ;         ;
; pokey/pokey_countdown_timer.vhdl                                      ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokey/pokey_countdown_timer.vhdl                                      ;         ;
; pokey/pokey.vhdl                                                      ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokey/pokey.vhdl                                                      ;         ;
; synchronizer.vhdl                                                     ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/synchronizer.vhdl                                                     ;         ;
; audiotypes.vhdl                                                       ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/audiotypes.vhdl                                                       ;         ;
; dc_blocker.vhdl                                                       ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/dc_blocker.vhdl                                                       ;         ;
; mixer.vhdl                                                            ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/mixer.vhdl                                                            ;         ;
; clockgen.vhd                                                          ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/clockgen.vhd                                                          ;         ;
; spdif_transmitter.vhdl                                                ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/spdif_transmitter.vhdl                                                ;         ;
; ps2_keyboard.vhdl                                                     ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/ps2_keyboard.vhdl                                                     ;         ;
; ps2_to_atari800.vhdl                                                  ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/ps2_to_atari800.vhdl                                                  ;         ;
; pokeymax.vhd                                                          ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd                                                          ;         ;
; PSG/envelope.vhdl                                                     ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/PSG/envelope.vhdl                                                     ;         ;
; PSG/noise.vhdl                                                        ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/PSG/noise.vhdl                                                        ;         ;
; PSG/top.vhdl                                                          ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/PSG/top.vhdl                                                          ;         ;
; PSG/freqdiv.vhdl                                                      ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/PSG/freqdiv.vhdl                                                      ;         ;
; PSG/mixer.vhdl                                                        ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/PSG/mixer.vhdl                                                        ;         ;
; PSG/volume.vhdl                                                       ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/PSG/volume.vhdl                                                       ;         ;
; PSG/volume_profile.vhdl                                               ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/PSG/volume_profile.vhdl                                               ;         ;
; SID/top.vhdl                                                          ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/top.vhdl                                                          ;         ;
; SID/oscillator.vhdl                                                   ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/oscillator.vhdl                                                   ;         ;
; SID/wavegen.vhdl                                                      ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/wavegen.vhdl                                                      ;         ;
; SID/envelope.vhdl                                                     ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/envelope.vhdl                                                     ;         ;
; SID/envelope_tapmatch.vhdl                                            ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/envelope_tapmatch.vhdl                                            ;         ;
; SID/amplitudeModulator.vhdl                                           ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/amplitudeModulator.vhdl                                           ;         ;
; SID/preFilterSum.vhdl                                                 ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/preFilterSum.vhdl                                                 ;         ;
; SID/filter.vhdl                                                       ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/filter.vhdl                                                       ;         ;
; SID/f_distortion.vhdl                                                 ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/f_distortion.vhdl                                                 ;         ;
; SID/f_distortion_mux.vhdl                                             ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/f_distortion_mux.vhdl                                             ;         ;
; SID/postFilterSum.vhdl                                                ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/postFilterSum.vhdl                                                ;         ;
; sample/channel.vhdl                                                   ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/sample/channel.vhdl                                                   ;         ;
; sample/adpcm.vhdl                                                     ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/sample/adpcm.vhdl                                                     ;         ;
; sample/top.vhdl                                                       ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/sample/top.vhdl                                                       ;         ;
; covox/top.vhdl                                                        ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/covox/top.vhdl                                                        ;         ;
; int_osc/synthesis/int_osc.vhd                                         ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/int_osc/synthesis/int_osc.vhd                                         ; int_osc ;
; int_osc/synthesis/submodules/altera_int_osc.v                         ; yes             ; User Verilog HDL File             ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/int_osc/synthesis/submodules/altera_int_osc.v                         ; int_osc ;
; flash/synthesis/flash.vhd                                             ; yes             ; User VHDL File                    ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/flash/synthesis/flash.vhd                                             ; flash   ;
; flash/synthesis/submodules/altera_onchip_flash_util.v                 ; yes             ; User Verilog HDL File             ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/flash/synthesis/submodules/altera_onchip_flash_util.v                 ; flash   ;
; flash/synthesis/submodules/altera_onchip_flash.v                      ; yes             ; User Verilog HDL File             ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/flash/synthesis/submodules/altera_onchip_flash.v                      ; flash   ;
; flash/synthesis/submodules/altera_onchip_flash_avmm_data_controller.v ; yes             ; User Verilog HDL File             ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/flash/synthesis/submodules/altera_onchip_flash_avmm_data_controller.v ; flash   ;
; flash/synthesis/submodules/altera_onchip_flash_avmm_csr_controller.v  ; yes             ; User Verilog HDL File             ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/flash/synthesis/submodules/altera_onchip_flash_avmm_csr_controller.v  ; flash   ;
; flash/synthesis/submodules/rtl/altera_onchip_flash_block.v            ; yes             ; Encrypted User Verilog HDL File   ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/flash/synthesis/submodules/rtl/altera_onchip_flash_block.v            ; flash   ;
; fir_sample_buffer.vhd                                                 ; yes             ; User Wizard-Generated File        ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/fir_sample_buffer.vhd                                                 ;         ;
; fir_buffer.vhd                                                        ; yes             ; User Wizard-Generated File        ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/fir_buffer.vhd                                                        ;         ;
; altera_std_synchronizer.v                                             ; yes             ; Megafunction                      ; /home/markw/intelFPGA_lite/25.1std/quartus/libraries/megafunctions/altera_std_synchronizer.v                                                                                  ;         ;
; lpm_shiftreg.tdf                                                      ; yes             ; Megafunction                      ; /home/markw/intelFPGA_lite/25.1std/quartus/libraries/megafunctions/lpm_shiftreg.tdf                                                                                           ;         ;
; lpm_constant.inc                                                      ; yes             ; Megafunction                      ; /home/markw/intelFPGA_lite/25.1std/quartus/libraries/megafunctions/lpm_constant.inc                                                                                           ;         ;
; dffeea.inc                                                            ; yes             ; Megafunction                      ; /home/markw/intelFPGA_lite/25.1std/quartus/libraries/megafunctions/dffeea.inc                                                                                                 ;         ;
; aglobal251.inc                                                        ; yes             ; Megafunction                      ; /home/markw/intelFPGA_lite/25.1std/quartus/libraries/megafunctions/aglobal251.inc                                                                                             ;         ;
; pllv3.vhd                                                             ; yes             ; Auto-Found Wizard-Generated File  ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pllv3.vhd                                                             ;         ;
; altpll.tdf                                                            ; yes             ; Megafunction                      ; /home/markw/intelFPGA_lite/25.1std/quartus/libraries/megafunctions/altpll.tdf                                                                                                 ;         ;
; stratix_pll.inc                                                       ; yes             ; Megafunction                      ; /home/markw/intelFPGA_lite/25.1std/quartus/libraries/megafunctions/stratix_pll.inc                                                                                            ;         ;
; stratixii_pll.inc                                                     ; yes             ; Megafunction                      ; /home/markw/intelFPGA_lite/25.1std/quartus/libraries/megafunctions/stratixii_pll.inc                                                                                          ;         ;
; cycloneii_pll.inc                                                     ; yes             ; Megafunction                      ; /home/markw/intelFPGA_lite/25.1std/quartus/libraries/megafunctions/cycloneii_pll.inc                                                                                          ;         ;
; db/pllv3_altpll.v                                                     ; yes             ; Auto-Generated Megafunction       ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/db/pllv3_altpll.v                                                     ;         ;
; altsyncram.tdf                                                        ; yes             ; Megafunction                      ; /home/markw/intelFPGA_lite/25.1std/quartus/libraries/megafunctions/altsyncram.tdf                                                                                             ;         ;
; stratix_ram_block.inc                                                 ; yes             ; Megafunction                      ; /home/markw/intelFPGA_lite/25.1std/quartus/libraries/megafunctions/stratix_ram_block.inc                                                                                      ;         ;
; lpm_mux.inc                                                           ; yes             ; Megafunction                      ; /home/markw/intelFPGA_lite/25.1std/quartus/libraries/megafunctions/lpm_mux.inc                                                                                                ;         ;
; lpm_decode.inc                                                        ; yes             ; Megafunction                      ; /home/markw/intelFPGA_lite/25.1std/quartus/libraries/megafunctions/lpm_decode.inc                                                                                             ;         ;
; a_rdenreg.inc                                                         ; yes             ; Megafunction                      ; /home/markw/intelFPGA_lite/25.1std/quartus/libraries/megafunctions/a_rdenreg.inc                                                                                              ;         ;
; altrom.inc                                                            ; yes             ; Megafunction                      ; /home/markw/intelFPGA_lite/25.1std/quartus/libraries/megafunctions/altrom.inc                                                                                                 ;         ;
; altram.inc                                                            ; yes             ; Megafunction                      ; /home/markw/intelFPGA_lite/25.1std/quartus/libraries/megafunctions/altram.inc                                                                                                 ;         ;
; altdpram.inc                                                          ; yes             ; Megafunction                      ; /home/markw/intelFPGA_lite/25.1std/quartus/libraries/megafunctions/altdpram.inc                                                                                               ;         ;
; db/altsyncram_9r31.tdf                                                ; yes             ; Auto-Generated Megafunction       ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/db/altsyncram_9r31.tdf                                                ;         ;
; altshift_taps.tdf                                                     ; yes             ; Megafunction                      ; /home/markw/intelFPGA_lite/25.1std/quartus/libraries/megafunctions/altshift_taps.tdf                                                                                          ;         ;
; lpm_counter.inc                                                       ; yes             ; Megafunction                      ; /home/markw/intelFPGA_lite/25.1std/quartus/libraries/megafunctions/lpm_counter.inc                                                                                            ;         ;
; lpm_compare.inc                                                       ; yes             ; Megafunction                      ; /home/markw/intelFPGA_lite/25.1std/quartus/libraries/megafunctions/lpm_compare.inc                                                                                            ;         ;
; db/shift_taps_jgm.tdf                                                 ; yes             ; Auto-Generated Megafunction       ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/db/shift_taps_jgm.tdf                                                 ;         ;
; db/altsyncram_rj51.tdf                                                ; yes             ; Auto-Generated Megafunction       ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/db/altsyncram_rj51.tdf                                                ;         ;
; db/add_sub_oed.tdf                                                    ; yes             ; Auto-Generated Megafunction       ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/db/add_sub_oed.tdf                                                    ;         ;
; db/cntr_s3f.tdf                                                       ; yes             ; Auto-Generated Megafunction       ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/db/cntr_s3f.tdf                                                       ;         ;
; db/cmpr_erb.tdf                                                       ; yes             ; Auto-Generated Megafunction       ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/db/cmpr_erb.tdf                                                       ;         ;
; db/cntr_fjg.tdf                                                       ; yes             ; Auto-Generated Megafunction       ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/db/cntr_fjg.tdf                                                       ;         ;
; lpm_mult.tdf                                                          ; yes             ; Megafunction                      ; /home/markw/intelFPGA_lite/25.1std/quartus/libraries/megafunctions/lpm_mult.tdf                                                                                               ;         ;
; lpm_add_sub.inc                                                       ; yes             ; Megafunction                      ; /home/markw/intelFPGA_lite/25.1std/quartus/libraries/megafunctions/lpm_add_sub.inc                                                                                            ;         ;
; multcore.inc                                                          ; yes             ; Megafunction                      ; /home/markw/intelFPGA_lite/25.1std/quartus/libraries/megafunctions/multcore.inc                                                                                               ;         ;
; bypassff.inc                                                          ; yes             ; Megafunction                      ; /home/markw/intelFPGA_lite/25.1std/quartus/libraries/megafunctions/bypassff.inc                                                                                               ;         ;
; altshift.inc                                                          ; yes             ; Megafunction                      ; /home/markw/intelFPGA_lite/25.1std/quartus/libraries/megafunctions/altshift.inc                                                                                               ;         ;
; db/mult_0ls.tdf                                                       ; yes             ; Auto-Generated Megafunction       ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/db/mult_0ls.tdf                                                       ;         ;
; db/mult_4fs.tdf                                                       ; yes             ; Auto-Generated Megafunction       ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/db/mult_4fs.tdf                                                       ;         ;
; db/mult_gfs.tdf                                                       ; yes             ; Auto-Generated Megafunction       ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/db/mult_gfs.tdf                                                       ;         ;
; db/mult_5fs.tdf                                                       ; yes             ; Auto-Generated Megafunction       ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/db/mult_5fs.tdf                                                       ;         ;
; db/mult_6fs.tdf                                                       ; yes             ; Auto-Generated Megafunction       ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/db/mult_6fs.tdf                                                       ;         ;
; db/mult_pgs.tdf                                                       ; yes             ; Auto-Generated Megafunction       ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/db/mult_pgs.tdf                                                       ;         ;
; db/mult_1hs.tdf                                                       ; yes             ; Auto-Generated Megafunction       ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/db/mult_1hs.tdf                                                       ;         ;
; db/mult_ons.tdf                                                       ; yes             ; Auto-Generated Megafunction       ; /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/db/mult_ons.tdf                                                       ;         ;
+-----------------------------------------------------------------------+-----------------+-----------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------+


+------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Resource Usage Summary                                                                                                    ;
+---------------------------------------------+--------------------------------------------------------------------------------------------------+
; Resource                                    ; Usage                                                                                            ;
+---------------------------------------------+--------------------------------------------------------------------------------------------------+
; Estimated Total logic elements              ; 12,752                                                                                           ;
;                                             ;                                                                                                  ;
; Total combinational functions               ; 10384                                                                                            ;
; Logic element usage by number of LUT inputs ;                                                                                                  ;
;     -- 4 input functions                    ; 4759                                                                                             ;
;     -- 3 input functions                    ; 3416                                                                                             ;
;     -- <=2 input functions                  ; 2209                                                                                             ;
;                                             ;                                                                                                  ;
; Logic elements by mode                      ;                                                                                                  ;
;     -- normal mode                          ; 7556                                                                                             ;
;     -- arithmetic mode                      ; 2828                                                                                             ;
;                                             ;                                                                                                  ;
; Total registers                             ; 6162                                                                                             ;
;     -- Dedicated logic registers            ; 6162                                                                                             ;
;     -- I/O registers                        ; 0                                                                                                ;
;                                             ;                                                                                                  ;
; I/O pins                                    ; 57                                                                                               ;
; Total memory bits                           ; 525528                                                                                           ;
; UFM blocks                                  ; 1                                                                                                ;
;                                             ;                                                                                                  ;
; Embedded Multiplier 9-bit elements          ; 45                                                                                               ;
;                                             ;                                                                                                  ;
; Total PLLs                                  ; 1                                                                                                ;
;     -- PLLs                                 ; 1                                                                                                ;
;                                             ;                                                                                                  ;
; Maximum fan-out node                        ; pllv3:\pll_v3_inst:pll_inst|altpll:altpll_component|pllv3_altpll:auto_generated|wire_pll1_clk[0] ;
; Maximum fan-out                             ; 6730                                                                                             ;
; Total fan-out                               ; 64587                                                                                            ;
; Average fan-out                             ; 3.73                                                                                             ;
+---------------------------------------------+--------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Resource Utilization by Entity                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                              ;
+---------------------------------------------------------------------------------------------------------------+---------------------+---------------------------+-------------+------------+--------------+---------+-----------+------+--------------+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------+--------------+
; Compilation Hierarchy Node                                                                                    ; Combinational ALUTs ; Dedicated Logic Registers ; Memory Bits ; UFM Blocks ; DSP Elements ; DSP 9x9 ; DSP 18x18 ; Pins ; Virtual Pins ; ADC blocks ; Full Hierarchy Name                                                                                                                                                                                                                                                   ; Entity Name                                          ; Library Name ;
+---------------------------------------------------------------------------------------------------------------+---------------------+---------------------------+-------------+------------+--------------+---------+-----------+------+--------------+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------+--------------+
; |pokeymax                                                                                                     ; 10384 (515)         ; 6162 (126)                ; 525528      ; 1          ; 45           ; 1       ; 22        ; 57   ; 0            ; 0          ; |pokeymax                                                                                                                                                                                                                                                             ; pokeymax                                             ; work         ;
;    |PSG_top:\psg_on:PSG_1|                                                                                    ; 321 (75)            ; 198 (84)                  ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|PSG_top:\psg_on:PSG_1                                                                                                                                                                                                                                       ; PSG_top                                              ; work         ;
;       |PSG_envelope:envelope|                                                                                 ; 74 (25)             ; 27 (11)                   ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|PSG_top:\psg_on:PSG_1|PSG_envelope:envelope                                                                                                                                                                                                                 ; PSG_envelope                                         ; work         ;
;          |PSG_freqdiv:envelope_ticker|                                                                        ; 49 (49)             ; 16 (16)                   ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|PSG_top:\psg_on:PSG_1|PSG_envelope:envelope|PSG_freqdiv:envelope_ticker                                                                                                                                                                                     ; PSG_freqdiv                                          ; work         ;
;       |PSG_freqdiv:channel_a_ticker|                                                                          ; 36 (36)             ; 12 (12)                   ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|PSG_top:\psg_on:PSG_1|PSG_freqdiv:channel_a_ticker                                                                                                                                                                                                          ; PSG_freqdiv                                          ; work         ;
;       |PSG_freqdiv:channel_b_ticker|                                                                          ; 36 (36)             ; 12 (12)                   ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|PSG_top:\psg_on:PSG_1|PSG_freqdiv:channel_b_ticker                                                                                                                                                                                                          ; PSG_freqdiv                                          ; work         ;
;       |PSG_freqdiv:channel_c_ticker|                                                                          ; 36 (36)             ; 12 (12)                   ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|PSG_top:\psg_on:PSG_1|PSG_freqdiv:channel_c_ticker                                                                                                                                                                                                          ; PSG_freqdiv                                          ; work         ;
;       |PSG_freqdiv:core_ticker|                                                                               ; 3 (3)               ; 3 (3)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|PSG_top:\psg_on:PSG_1|PSG_freqdiv:core_ticker                                                                                                                                                                                                               ; PSG_freqdiv                                          ; work         ;
;       |PSG_freqdiv:noise_preticker|                                                                           ; 2 (2)               ; 1 (1)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|PSG_top:\psg_on:PSG_1|PSG_freqdiv:noise_preticker                                                                                                                                                                                                           ; PSG_freqdiv                                          ; work         ;
;       |PSG_freqdiv:noise_ticker|                                                                              ; 13 (13)             ; 5 (5)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|PSG_top:\psg_on:PSG_1|PSG_freqdiv:noise_ticker                                                                                                                                                                                                              ; PSG_freqdiv                                          ; work         ;
;       |PSG_mixer:mix_a|                                                                                       ; 2 (2)               ; 2 (2)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|PSG_top:\psg_on:PSG_1|PSG_mixer:mix_a                                                                                                                                                                                                                       ; PSG_mixer                                            ; work         ;
;       |PSG_mixer:mix_b|                                                                                       ; 2 (2)               ; 2 (2)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|PSG_top:\psg_on:PSG_1|PSG_mixer:mix_b                                                                                                                                                                                                                       ; PSG_mixer                                            ; work         ;
;       |PSG_mixer:mix_c|                                                                                       ; 2 (2)               ; 2 (2)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|PSG_top:\psg_on:PSG_1|PSG_mixer:mix_c                                                                                                                                                                                                                       ; PSG_mixer                                            ; work         ;
;       |PSG_noise:noise|                                                                                       ; 1 (1)               ; 18 (18)                   ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|PSG_top:\psg_on:PSG_1|PSG_noise:noise                                                                                                                                                                                                                       ; PSG_noise                                            ; work         ;
;       |PSG_volume:vol_a|                                                                                      ; 13 (13)             ; 6 (6)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|PSG_top:\psg_on:PSG_1|PSG_volume:vol_a                                                                                                                                                                                                                      ; PSG_volume                                           ; work         ;
;       |PSG_volume:vol_b|                                                                                      ; 13 (13)             ; 6 (6)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|PSG_top:\psg_on:PSG_1|PSG_volume:vol_b                                                                                                                                                                                                                      ; PSG_volume                                           ; work         ;
;       |PSG_volume:vol_c|                                                                                      ; 13 (13)             ; 6 (6)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|PSG_top:\psg_on:PSG_1|PSG_volume:vol_c                                                                                                                                                                                                                      ; PSG_volume                                           ; work         ;
;    |PSG_top:\psg_on:PSG_2|                                                                                    ; 318 (76)            ; 194 (84)                  ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|PSG_top:\psg_on:PSG_2                                                                                                                                                                                                                                       ; PSG_top                                              ; work         ;
;       |PSG_envelope:envelope|                                                                                 ; 74 (25)             ; 27 (11)                   ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|PSG_top:\psg_on:PSG_2|PSG_envelope:envelope                                                                                                                                                                                                                 ; PSG_envelope                                         ; work         ;
;          |PSG_freqdiv:envelope_ticker|                                                                        ; 49 (49)             ; 16 (16)                   ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|PSG_top:\psg_on:PSG_2|PSG_envelope:envelope|PSG_freqdiv:envelope_ticker                                                                                                                                                                                     ; PSG_freqdiv                                          ; work         ;
;       |PSG_freqdiv:channel_a_ticker|                                                                          ; 36 (36)             ; 12 (12)                   ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|PSG_top:\psg_on:PSG_2|PSG_freqdiv:channel_a_ticker                                                                                                                                                                                                          ; PSG_freqdiv                                          ; work         ;
;       |PSG_freqdiv:channel_b_ticker|                                                                          ; 36 (36)             ; 12 (12)                   ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|PSG_top:\psg_on:PSG_2|PSG_freqdiv:channel_b_ticker                                                                                                                                                                                                          ; PSG_freqdiv                                          ; work         ;
;       |PSG_freqdiv:channel_c_ticker|                                                                          ; 36 (36)             ; 12 (12)                   ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|PSG_top:\psg_on:PSG_2|PSG_freqdiv:channel_c_ticker                                                                                                                                                                                                          ; PSG_freqdiv                                          ; work         ;
;       |PSG_freqdiv:noise_ticker|                                                                              ; 13 (13)             ; 5 (5)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|PSG_top:\psg_on:PSG_2|PSG_freqdiv:noise_ticker                                                                                                                                                                                                              ; PSG_freqdiv                                          ; work         ;
;       |PSG_mixer:mix_a|                                                                                       ; 2 (2)               ; 2 (2)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|PSG_top:\psg_on:PSG_2|PSG_mixer:mix_a                                                                                                                                                                                                                       ; PSG_mixer                                            ; work         ;
;       |PSG_mixer:mix_b|                                                                                       ; 2 (2)               ; 2 (2)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|PSG_top:\psg_on:PSG_2|PSG_mixer:mix_b                                                                                                                                                                                                                       ; PSG_mixer                                            ; work         ;
;       |PSG_mixer:mix_c|                                                                                       ; 3 (3)               ; 2 (2)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|PSG_top:\psg_on:PSG_2|PSG_mixer:mix_c                                                                                                                                                                                                                       ; PSG_mixer                                            ; work         ;
;       |PSG_noise:noise|                                                                                       ; 1 (1)               ; 18 (18)                   ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|PSG_top:\psg_on:PSG_2|PSG_noise:noise                                                                                                                                                                                                                       ; PSG_noise                                            ; work         ;
;       |PSG_volume:vol_a|                                                                                      ; 13 (13)             ; 6 (6)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|PSG_top:\psg_on:PSG_2|PSG_volume:vol_a                                                                                                                                                                                                                      ; PSG_volume                                           ; work         ;
;       |PSG_volume:vol_b|                                                                                      ; 13 (13)             ; 6 (6)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|PSG_top:\psg_on:PSG_2|PSG_volume:vol_b                                                                                                                                                                                                                      ; PSG_volume                                           ; work         ;
;       |PSG_volume:vol_c|                                                                                      ; 13 (13)             ; 6 (6)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|PSG_top:\psg_on:PSG_2|PSG_volume:vol_c                                                                                                                                                                                                                      ; PSG_volume                                           ; work         ;
;    |PSG_volume_profile:\psg_on:vol_profile1|                                                                  ; 64 (64)             ; 59 (59)                   ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|PSG_volume_profile:\psg_on:vol_profile1                                                                                                                                                                                                                     ; PSG_volume_profile                                   ; work         ;
;    |SID_f_distortion_mux:\sid_on:f_distortion_mux|                                                            ; 224 (62)            ; 101 (52)                  ; 0           ; 0          ; 2            ; 0       ; 1         ; 0    ; 0            ; 0          ; |pokeymax|SID_f_distortion_mux:\sid_on:f_distortion_mux                                                                                                                                                                                                               ; SID_f_distortion_mux                                 ; work         ;
;       |SID_f_distortion:f_distortion|                                                                         ; 162 (162)           ; 49 (49)                   ; 0           ; 0          ; 2            ; 0       ; 1         ; 0    ; 0            ; 0          ; |pokeymax|SID_f_distortion_mux:\sid_on:f_distortion_mux|SID_f_distortion:f_distortion                                                                                                                                                                                 ; SID_f_distortion                                     ; work         ;
;          |lpm_mult:Mult0|                                                                                     ; 0 (0)               ; 0 (0)                     ; 0           ; 0          ; 2            ; 0       ; 1         ; 0    ; 0            ; 0          ; |pokeymax|SID_f_distortion_mux:\sid_on:f_distortion_mux|SID_f_distortion:f_distortion|lpm_mult:Mult0                                                                                                                                                                  ; lpm_mult                                             ; work         ;
;             |mult_ons:auto_generated|                                                                         ; 0 (0)               ; 0 (0)                     ; 0           ; 0          ; 2            ; 0       ; 1         ; 0    ; 0            ; 0          ; |pokeymax|SID_f_distortion_mux:\sid_on:f_distortion_mux|SID_f_distortion:f_distortion|lpm_mult:Mult0|mult_ons:auto_generated                                                                                                                                          ; mult_ons                                             ; work         ;
;    |SID_top:\sid_on:sid1|                                                                                     ; 1669 (166)          ; 971 (254)                 ; 0           ; 0          ; 16           ; 0       ; 8         ; 0    ; 0            ; 0          ; |pokeymax|SID_top:\sid_on:sid1                                                                                                                                                                                                                                        ; SID_top                                              ; work         ;
;       |SID_amplitudeModulator:vol_abc|                                                                        ; 58 (58)             ; 0 (0)                     ; 0           ; 0          ; 2            ; 0       ; 1         ; 0    ; 0            ; 0          ; |pokeymax|SID_top:\sid_on:sid1|SID_amplitudeModulator:vol_abc                                                                                                                                                                                                         ; SID_amplitudeModulator                               ; work         ;
;          |lpm_mult:Mult0|                                                                                     ; 0 (0)               ; 0 (0)                     ; 0           ; 0          ; 2            ; 0       ; 1         ; 0    ; 0            ; 0          ; |pokeymax|SID_top:\sid_on:sid1|SID_amplitudeModulator:vol_abc|lpm_mult:Mult0                                                                                                                                                                                          ; lpm_mult                                             ; work         ;
;             |mult_6fs:auto_generated|                                                                         ; 0 (0)               ; 0 (0)                     ; 0           ; 0          ; 2            ; 0       ; 1         ; 0    ; 0            ; 0          ; |pokeymax|SID_top:\sid_on:sid1|SID_amplitudeModulator:vol_abc|lpm_mult:Mult0|mult_6fs:auto_generated                                                                                                                                                                  ; mult_6fs                                             ; work         ;
;       |SID_envelope:envelope_a|                                                                               ; 81 (81)             ; 52 (52)                   ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|SID_top:\sid_on:sid1|SID_envelope:envelope_a                                                                                                                                                                                                                ; SID_envelope                                         ; work         ;
;       |SID_envelope:envelope_b|                                                                               ; 81 (81)             ; 52 (52)                   ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|SID_top:\sid_on:sid1|SID_envelope:envelope_b                                                                                                                                                                                                                ; SID_envelope                                         ; work         ;
;       |SID_envelope:envelope_c|                                                                               ; 81 (81)             ; 52 (52)                   ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|SID_top:\sid_on:sid1|SID_envelope:envelope_c                                                                                                                                                                                                                ; SID_envelope                                         ; work         ;
;       |SID_envelope_tapmatch:envelope_tapmatcher|                                                             ; 60 (60)             ; 5 (5)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|SID_top:\sid_on:sid1|SID_envelope_tapmatch:envelope_tapmatcher                                                                                                                                                                                              ; SID_envelope_tapmatch                                ; work         ;
;       |SID_filter:variable_state_filter|                                                                      ; 390 (336)           ; 232 (232)                 ; 0           ; 0          ; 12           ; 0       ; 6         ; 0    ; 0            ; 0          ; |pokeymax|SID_top:\sid_on:sid1|SID_filter:variable_state_filter                                                                                                                                                                                                       ; SID_filter                                           ; work         ;
;          |lpm_mult:Mult0|                                                                                     ; 16 (0)              ; 0 (0)                     ; 0           ; 0          ; 4            ; 0       ; 2         ; 0    ; 0            ; 0          ; |pokeymax|SID_top:\sid_on:sid1|SID_filter:variable_state_filter|lpm_mult:Mult0                                                                                                                                                                                        ; lpm_mult                                             ; work         ;
;             |mult_1hs:auto_generated|                                                                         ; 16 (16)             ; 0 (0)                     ; 0           ; 0          ; 4            ; 0       ; 2         ; 0    ; 0            ; 0          ; |pokeymax|SID_top:\sid_on:sid1|SID_filter:variable_state_filter|lpm_mult:Mult0|mult_1hs:auto_generated                                                                                                                                                                ; mult_1hs                                             ; work         ;
;          |lpm_mult:Mult3|                                                                                     ; 19 (0)              ; 0 (0)                     ; 0           ; 0          ; 4            ; 0       ; 2         ; 0    ; 0            ; 0          ; |pokeymax|SID_top:\sid_on:sid1|SID_filter:variable_state_filter|lpm_mult:Mult3                                                                                                                                                                                        ; lpm_mult                                             ; work         ;
;             |mult_pgs:auto_generated|                                                                         ; 19 (19)             ; 0 (0)                     ; 0           ; 0          ; 4            ; 0       ; 2         ; 0    ; 0            ; 0          ; |pokeymax|SID_top:\sid_on:sid1|SID_filter:variable_state_filter|lpm_mult:Mult3|mult_pgs:auto_generated                                                                                                                                                                ; mult_pgs                                             ; work         ;
;          |lpm_mult:Mult4|                                                                                     ; 19 (0)              ; 0 (0)                     ; 0           ; 0          ; 4            ; 0       ; 2         ; 0    ; 0            ; 0          ; |pokeymax|SID_top:\sid_on:sid1|SID_filter:variable_state_filter|lpm_mult:Mult4                                                                                                                                                                                        ; lpm_mult                                             ; work         ;
;             |mult_pgs:auto_generated|                                                                         ; 19 (19)             ; 0 (0)                     ; 0           ; 0          ; 4            ; 0       ; 2         ; 0    ; 0            ; 0          ; |pokeymax|SID_top:\sid_on:sid1|SID_filter:variable_state_filter|lpm_mult:Mult4|mult_pgs:auto_generated                                                                                                                                                                ; mult_pgs                                             ; work         ;
;       |SID_oscillator:osc_a|                                                                                  ; 58 (58)             ; 26 (26)                   ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|SID_top:\sid_on:sid1|SID_oscillator:osc_a                                                                                                                                                                                                                   ; SID_oscillator                                       ; work         ;
;       |SID_oscillator:osc_b|                                                                                  ; 58 (58)             ; 26 (26)                   ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|SID_top:\sid_on:sid1|SID_oscillator:osc_b                                                                                                                                                                                                                   ; SID_oscillator                                       ; work         ;
;       |SID_oscillator:osc_c|                                                                                  ; 58 (58)             ; 26 (26)                   ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|SID_top:\sid_on:sid1|SID_oscillator:osc_c                                                                                                                                                                                                                   ; SID_oscillator                                       ; work         ;
;       |SID_postFilterSum:postfilter|                                                                          ; 128 (128)           ; 16 (16)                   ; 0           ; 0          ; 2            ; 0       ; 1         ; 0    ; 0            ; 0          ; |pokeymax|SID_top:\sid_on:sid1|SID_postFilterSum:postfilter                                                                                                                                                                                                           ; SID_postFilterSum                                    ; work         ;
;          |lpm_mult:Mult0|                                                                                     ; 0 (0)               ; 0 (0)                     ; 0           ; 0          ; 2            ; 0       ; 1         ; 0    ; 0            ; 0          ; |pokeymax|SID_top:\sid_on:sid1|SID_postFilterSum:postfilter|lpm_mult:Mult0                                                                                                                                                                                            ; lpm_mult                                             ; work         ;
;             |mult_gfs:auto_generated|                                                                         ; 0 (0)               ; 0 (0)                     ; 0           ; 0          ; 2            ; 0       ; 1         ; 0    ; 0            ; 0          ; |pokeymax|SID_top:\sid_on:sid1|SID_postFilterSum:postfilter|lpm_mult:Mult0|mult_gfs:auto_generated                                                                                                                                                                    ; mult_gfs                                             ; work         ;
;       |SID_preFilterSum:prefilter|                                                                            ; 51 (51)             ; 53 (53)                   ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|SID_top:\sid_on:sid1|SID_preFilterSum:prefilter                                                                                                                                                                                                             ; SID_preFilterSum                                     ; work         ;
;       |SID_wavegen:wavegen_a|                                                                                 ; 132 (132)           ; 59 (59)                   ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|SID_top:\sid_on:sid1|SID_wavegen:wavegen_a                                                                                                                                                                                                                  ; SID_wavegen                                          ; work         ;
;       |SID_wavegen:wavegen_b|                                                                                 ; 132 (132)           ; 59 (59)                   ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|SID_top:\sid_on:sid1|SID_wavegen:wavegen_b                                                                                                                                                                                                                  ; SID_wavegen                                          ; work         ;
;       |SID_wavegen:wavegen_c|                                                                                 ; 134 (134)           ; 59 (59)                   ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|SID_top:\sid_on:sid1|SID_wavegen:wavegen_c                                                                                                                                                                                                                  ; SID_wavegen                                          ; work         ;
;       |complete_address_decoder:decode_addr1|                                                                 ; 1 (1)               ; 0 (0)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|SID_top:\sid_on:sid1|complete_address_decoder:decode_addr1                                                                                                                                                                                                  ; complete_address_decoder                             ; work         ;
;    |SID_top:\sid_on:sid2|                                                                                     ; 1670 (164)          ; 961 (243)                 ; 216         ; 0          ; 16           ; 0       ; 8         ; 0    ; 0            ; 0          ; |pokeymax|SID_top:\sid_on:sid2                                                                                                                                                                                                                                        ; SID_top                                              ; work         ;
;       |SID_amplitudeModulator:vol_abc|                                                                        ; 58 (58)             ; 0 (0)                     ; 0           ; 0          ; 2            ; 0       ; 1         ; 0    ; 0            ; 0          ; |pokeymax|SID_top:\sid_on:sid2|SID_amplitudeModulator:vol_abc                                                                                                                                                                                                         ; SID_amplitudeModulator                               ; work         ;
;          |lpm_mult:Mult0|                                                                                     ; 0 (0)               ; 0 (0)                     ; 0           ; 0          ; 2            ; 0       ; 1         ; 0    ; 0            ; 0          ; |pokeymax|SID_top:\sid_on:sid2|SID_amplitudeModulator:vol_abc|lpm_mult:Mult0                                                                                                                                                                                          ; lpm_mult                                             ; work         ;
;             |mult_6fs:auto_generated|                                                                         ; 0 (0)               ; 0 (0)                     ; 0           ; 0          ; 2            ; 0       ; 1         ; 0    ; 0            ; 0          ; |pokeymax|SID_top:\sid_on:sid2|SID_amplitudeModulator:vol_abc|lpm_mult:Mult0|mult_6fs:auto_generated                                                                                                                                                                  ; mult_6fs                                             ; work         ;
;       |SID_envelope:envelope_a|                                                                               ; 91 (81)             ; 58 (52)                   ; 216         ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|SID_top:\sid_on:sid2|SID_envelope:envelope_a                                                                                                                                                                                                                ; SID_envelope                                         ; work         ;
;          |altshift_taps:attack_del1_reg_rtl_0|                                                                ; 10 (0)              ; 6 (0)                     ; 216         ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|SID_top:\sid_on:sid2|SID_envelope:envelope_a|altshift_taps:attack_del1_reg_rtl_0                                                                                                                                                                            ; altshift_taps                                        ; work         ;
;             |shift_taps_jgm:auto_generated|                                                                   ; 10 (2)              ; 6 (3)                     ; 216         ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|SID_top:\sid_on:sid2|SID_envelope:envelope_a|altshift_taps:attack_del1_reg_rtl_0|shift_taps_jgm:auto_generated                                                                                                                                              ; shift_taps_jgm                                       ; work         ;
;                |altsyncram_rj51:altsyncram4|                                                                  ; 0 (0)               ; 0 (0)                     ; 216         ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|SID_top:\sid_on:sid2|SID_envelope:envelope_a|altshift_taps:attack_del1_reg_rtl_0|shift_taps_jgm:auto_generated|altsyncram_rj51:altsyncram4                                                                                                                  ; altsyncram_rj51                                      ; work         ;
;                |cntr_fjg:cntr5|                                                                               ; 3 (3)               ; 1 (1)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|SID_top:\sid_on:sid2|SID_envelope:envelope_a|altshift_taps:attack_del1_reg_rtl_0|shift_taps_jgm:auto_generated|cntr_fjg:cntr5                                                                                                                               ; cntr_fjg                                             ; work         ;
;                |cntr_s3f:cntr1|                                                                               ; 5 (5)               ; 2 (2)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|SID_top:\sid_on:sid2|SID_envelope:envelope_a|altshift_taps:attack_del1_reg_rtl_0|shift_taps_jgm:auto_generated|cntr_s3f:cntr1                                                                                                                               ; cntr_s3f                                             ; work         ;
;       |SID_envelope:envelope_b|                                                                               ; 81 (81)             ; 52 (52)                   ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|SID_top:\sid_on:sid2|SID_envelope:envelope_b                                                                                                                                                                                                                ; SID_envelope                                         ; work         ;
;       |SID_envelope:envelope_c|                                                                               ; 81 (81)             ; 52 (52)                   ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|SID_top:\sid_on:sid2|SID_envelope:envelope_c                                                                                                                                                                                                                ; SID_envelope                                         ; work         ;
;       |SID_envelope_tapmatch:envelope_tapmatcher|                                                             ; 58 (58)             ; 3 (3)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|SID_top:\sid_on:sid2|SID_envelope_tapmatch:envelope_tapmatcher                                                                                                                                                                                              ; SID_envelope_tapmatch                                ; work         ;
;       |SID_filter:variable_state_filter|                                                                      ; 390 (336)           ; 232 (232)                 ; 0           ; 0          ; 12           ; 0       ; 6         ; 0    ; 0            ; 0          ; |pokeymax|SID_top:\sid_on:sid2|SID_filter:variable_state_filter                                                                                                                                                                                                       ; SID_filter                                           ; work         ;
;          |lpm_mult:Mult0|                                                                                     ; 16 (0)              ; 0 (0)                     ; 0           ; 0          ; 4            ; 0       ; 2         ; 0    ; 0            ; 0          ; |pokeymax|SID_top:\sid_on:sid2|SID_filter:variable_state_filter|lpm_mult:Mult0                                                                                                                                                                                        ; lpm_mult                                             ; work         ;
;             |mult_1hs:auto_generated|                                                                         ; 16 (16)             ; 0 (0)                     ; 0           ; 0          ; 4            ; 0       ; 2         ; 0    ; 0            ; 0          ; |pokeymax|SID_top:\sid_on:sid2|SID_filter:variable_state_filter|lpm_mult:Mult0|mult_1hs:auto_generated                                                                                                                                                                ; mult_1hs                                             ; work         ;
;          |lpm_mult:Mult3|                                                                                     ; 19 (0)              ; 0 (0)                     ; 0           ; 0          ; 4            ; 0       ; 2         ; 0    ; 0            ; 0          ; |pokeymax|SID_top:\sid_on:sid2|SID_filter:variable_state_filter|lpm_mult:Mult3                                                                                                                                                                                        ; lpm_mult                                             ; work         ;
;             |mult_pgs:auto_generated|                                                                         ; 19 (19)             ; 0 (0)                     ; 0           ; 0          ; 4            ; 0       ; 2         ; 0    ; 0            ; 0          ; |pokeymax|SID_top:\sid_on:sid2|SID_filter:variable_state_filter|lpm_mult:Mult3|mult_pgs:auto_generated                                                                                                                                                                ; mult_pgs                                             ; work         ;
;          |lpm_mult:Mult4|                                                                                     ; 19 (0)              ; 0 (0)                     ; 0           ; 0          ; 4            ; 0       ; 2         ; 0    ; 0            ; 0          ; |pokeymax|SID_top:\sid_on:sid2|SID_filter:variable_state_filter|lpm_mult:Mult4                                                                                                                                                                                        ; lpm_mult                                             ; work         ;
;             |mult_pgs:auto_generated|                                                                         ; 19 (19)             ; 0 (0)                     ; 0           ; 0          ; 4            ; 0       ; 2         ; 0    ; 0            ; 0          ; |pokeymax|SID_top:\sid_on:sid2|SID_filter:variable_state_filter|lpm_mult:Mult4|mult_pgs:auto_generated                                                                                                                                                                ; mult_pgs                                             ; work         ;
;       |SID_oscillator:osc_a|                                                                                  ; 58 (58)             ; 26 (26)                   ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|SID_top:\sid_on:sid2|SID_oscillator:osc_a                                                                                                                                                                                                                   ; SID_oscillator                                       ; work         ;
;       |SID_oscillator:osc_b|                                                                                  ; 58 (58)             ; 26 (26)                   ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|SID_top:\sid_on:sid2|SID_oscillator:osc_b                                                                                                                                                                                                                   ; SID_oscillator                                       ; work         ;
;       |SID_oscillator:osc_c|                                                                                  ; 58 (58)             ; 26 (26)                   ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|SID_top:\sid_on:sid2|SID_oscillator:osc_c                                                                                                                                                                                                                   ; SID_oscillator                                       ; work         ;
;       |SID_postFilterSum:postfilter|                                                                          ; 128 (128)           ; 16 (16)                   ; 0           ; 0          ; 2            ; 0       ; 1         ; 0    ; 0            ; 0          ; |pokeymax|SID_top:\sid_on:sid2|SID_postFilterSum:postfilter                                                                                                                                                                                                           ; SID_postFilterSum                                    ; work         ;
;          |lpm_mult:Mult0|                                                                                     ; 0 (0)               ; 0 (0)                     ; 0           ; 0          ; 2            ; 0       ; 1         ; 0    ; 0            ; 0          ; |pokeymax|SID_top:\sid_on:sid2|SID_postFilterSum:postfilter|lpm_mult:Mult0                                                                                                                                                                                            ; lpm_mult                                             ; work         ;
;             |mult_gfs:auto_generated|                                                                         ; 0 (0)               ; 0 (0)                     ; 0           ; 0          ; 2            ; 0       ; 1         ; 0    ; 0            ; 0          ; |pokeymax|SID_top:\sid_on:sid2|SID_postFilterSum:postfilter|lpm_mult:Mult0|mult_gfs:auto_generated                                                                                                                                                                    ; mult_gfs                                             ; work         ;
;       |SID_preFilterSum:prefilter|                                                                            ; 45 (45)             ; 50 (50)                   ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|SID_top:\sid_on:sid2|SID_preFilterSum:prefilter                                                                                                                                                                                                             ; SID_preFilterSum                                     ; work         ;
;       |SID_wavegen:wavegen_a|                                                                                 ; 132 (132)           ; 59 (59)                   ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|SID_top:\sid_on:sid2|SID_wavegen:wavegen_a                                                                                                                                                                                                                  ; SID_wavegen                                          ; work         ;
;       |SID_wavegen:wavegen_b|                                                                                 ; 132 (132)           ; 59 (59)                   ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|SID_top:\sid_on:sid2|SID_wavegen:wavegen_b                                                                                                                                                                                                                  ; SID_wavegen                                          ; work         ;
;       |SID_wavegen:wavegen_c|                                                                                 ; 132 (132)           ; 59 (59)                   ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|SID_top:\sid_on:sid2|SID_wavegen:wavegen_c                                                                                                                                                                                                                  ; SID_wavegen                                          ; work         ;
;       |complete_address_decoder:decode_addr1|                                                                 ; 4 (4)               ; 0 (0)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|SID_top:\sid_on:sid2|complete_address_decoder:decode_addr1                                                                                                                                                                                                  ; complete_address_decoder                             ; work         ;
;    |clockgen:\sidpsg_on:clockgen1|                                                                            ; 82 (82)             ; 30 (30)                   ; 0           ; 0          ; 1            ; 1       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|clockgen:\sidpsg_on:clockgen1                                                                                                                                                                                                                               ; clockgen                                             ; work         ;
;       |lpm_mult:Mult0|                                                                                        ; 0 (0)               ; 0 (0)                     ; 0           ; 0          ; 1            ; 1       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|clockgen:\sidpsg_on:clockgen1|lpm_mult:Mult0                                                                                                                                                                                                                ; lpm_mult                                             ; work         ;
;          |mult_0ls:auto_generated|                                                                            ; 0 (0)               ; 0 (0)                     ; 0           ; 0          ; 1            ; 1       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|clockgen:\sidpsg_on:clockgen1|lpm_mult:Mult0|mult_0ls:auto_generated                                                                                                                                                                                        ; mult_0ls                                             ; work         ;
;    |complete_address_decoder:\gen_config:decode_addr1|                                                        ; 1 (1)               ; 0 (0)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|complete_address_decoder:\gen_config:decode_addr1                                                                                                                                                                                                           ; complete_address_decoder                             ; work         ;
;    |dc_blocker:\POKEY_ON:1:pokey_dc_blockerx|                                                                 ; 57 (57)             ; 36 (36)                   ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|dc_blocker:\POKEY_ON:1:pokey_dc_blockerx                                                                                                                                                                                                                    ; dc_blocker                                           ; work         ;
;    |dc_blocker:\POKEY_ON:2:pokey_dc_blockerx|                                                                 ; 57 (57)             ; 36 (36)                   ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|dc_blocker:\POKEY_ON:2:pokey_dc_blockerx                                                                                                                                                                                                                    ; dc_blocker                                           ; work         ;
;    |dc_blocker:\POKEY_ON:3:pokey_dc_blockerx|                                                                 ; 57 (57)             ; 36 (36)                   ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|dc_blocker:\POKEY_ON:3:pokey_dc_blockerx                                                                                                                                                                                                                    ; dc_blocker                                           ; work         ;
;    |dc_blocker:\psg_on:psg1_dc_blocker|                                                                       ; 57 (57)             ; 36 (36)                   ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|dc_blocker:\psg_on:psg1_dc_blocker                                                                                                                                                                                                                          ; dc_blocker                                           ; work         ;
;    |dc_blocker:\psg_on:psg2_dc_blocker|                                                                       ; 57 (57)             ; 36 (36)                   ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|dc_blocker:\psg_on:psg2_dc_blocker                                                                                                                                                                                                                          ; dc_blocker                                           ; work         ;
;    |dc_blocker:pokey1_dc_blocker|                                                                             ; 57 (57)             ; 36 (36)                   ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|dc_blocker:pokey1_dc_blocker                                                                                                                                                                                                                                ; dc_blocker                                           ; work         ;
;    |filtered_sigmadelta:\audout2_on:dac_1|                                                                    ; 76 (0)              ; 43 (0)                    ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|filtered_sigmadelta:\audout2_on:dac_1                                                                                                                                                                                                                       ; filtered_sigmadelta                                  ; work         ;
;       |sigmadelta_2ndorder:\gen_2ndorder_on:dac_2nd|                                                          ; 76 (76)             ; 43 (43)                   ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|filtered_sigmadelta:\audout2_on:dac_1|sigmadelta_2ndorder:\gen_2ndorder_on:dac_2nd                                                                                                                                                                          ; sigmadelta_2ndorder                                  ; work         ;
;    |filtered_sigmadelta:dac_0|                                                                                ; 76 (0)              ; 43 (0)                    ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|filtered_sigmadelta:dac_0                                                                                                                                                                                                                                   ; filtered_sigmadelta                                  ; work         ;
;       |sigmadelta_2ndorder:\gen_2ndorder_on:dac_2nd|                                                          ; 76 (76)             ; 43 (43)                   ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|filtered_sigmadelta:dac_0|sigmadelta_2ndorder:\gen_2ndorder_on:dac_2nd                                                                                                                                                                                      ; sigmadelta_2ndorder                                  ; work         ;
;    |filtered_sigmadelta:dac_2|                                                                                ; 76 (0)              ; 43 (0)                    ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|filtered_sigmadelta:dac_2                                                                                                                                                                                                                                   ; filtered_sigmadelta                                  ; work         ;
;       |sigmadelta_2ndorder:\gen_2ndorder_on:dac_2nd|                                                          ; 76 (76)             ; 43 (43)                   ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|filtered_sigmadelta:dac_2|sigmadelta_2ndorder:\gen_2ndorder_on:dac_2nd                                                                                                                                                                                      ; sigmadelta_2ndorder                                  ; work         ;
;    |filtered_sigmadelta:dac_3|                                                                                ; 76 (0)              ; 43 (0)                    ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|filtered_sigmadelta:dac_3                                                                                                                                                                                                                                   ; filtered_sigmadelta                                  ; work         ;
;       |sigmadelta_2ndorder:\gen_2ndorder_on:dac_2nd|                                                          ; 76 (76)             ; 43 (43)                   ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|filtered_sigmadelta:dac_3|sigmadelta_2ndorder:\gen_2ndorder_on:dac_2nd                                                                                                                                                                                      ; sigmadelta_2ndorder                                  ; work         ;
;    |flash_controller:\flash_on:flash_controller_inst|                                                         ; 820 (275)           ; 428 (149)                 ; 0           ; 1          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|flash_controller:\flash_on:flash_controller_inst                                                                                                                                                                                                            ; flash_controller                                     ; work         ;
;       |flash:flash1|                                                                                          ; 545 (0)             ; 279 (0)                   ; 0           ; 1          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|flash_controller:\flash_on:flash_controller_inst|flash:flash1                                                                                                                                                                                               ; flash                                                ; flash        ;
;          |altera_onchip_flash:onchip_flash_0|                                                                 ; 545 (0)             ; 279 (0)                   ; 0           ; 1          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0                                                                                                                                                            ; altera_onchip_flash                                  ; flash        ;
;             |altera_onchip_flash_avmm_csr_controller:avmm_csr_controller|                                     ; 54 (54)             ; 33 (33)                   ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_csr_controller:avmm_csr_controller                                                                                                ; altera_onchip_flash_avmm_csr_controller              ; flash        ;
;             |altera_onchip_flash_avmm_data_controller:avmm_data_controller|                                   ; 491 (400)           ; 246 (210)                 ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller                                                                                              ; altera_onchip_flash_avmm_data_controller             ; flash        ;
;                |altera_onchip_flash_a_address_write_protection_check:access_address_write_protection_checker| ; 16 (16)             ; 0 (0)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|altera_onchip_flash_a_address_write_protection_check:access_address_write_protection_checker ; altera_onchip_flash_a_address_write_protection_check ; flash        ;
;                |altera_onchip_flash_convert_address:address_convertor|                                        ; 43 (43)             ; 0 (0)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|altera_onchip_flash_convert_address:address_convertor                                        ; altera_onchip_flash_convert_address                  ; flash        ;
;                |altera_std_synchronizer:stdsync_busy_clear|                                                   ; 0 (0)               ; 2 (2)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|altera_std_synchronizer:stdsync_busy_clear                                                   ; altera_std_synchronizer                              ; work         ;
;                |altera_std_synchronizer:stdsync_busy|                                                         ; 0 (0)               ; 2 (2)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|altera_std_synchronizer:stdsync_busy                                                         ; altera_std_synchronizer                              ; work         ;
;                |lpm_shiftreg:ufm_data_shiftreg|                                                               ; 32 (32)             ; 32 (32)                   ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|lpm_shiftreg:ufm_data_shiftreg                                                               ; lpm_shiftreg                                         ; work         ;
;             |altera_onchip_flash_block:altera_onchip_flash_block|                                             ; 0 (0)               ; 0 (0)                     ; 0           ; 1          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_block:altera_onchip_flash_block                                                                                                        ; altera_onchip_flash_block                            ; flash        ;
;    |i2c_master:\iox_on:i2c_master0|                                                                           ; 78 (78)             ; 37 (37)                   ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|i2c_master:\iox_on:i2c_master0                                                                                                                                                                                                                              ; i2c_master                                           ; work         ;
;    |int_osc:oscillator|                                                                                       ; 0 (0)               ; 0 (0)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|int_osc:oscillator                                                                                                                                                                                                                                          ; int_osc                                              ; int_osc      ;
;       |altera_int_osc:int_osc_0|                                                                              ; 0 (0)               ; 0 (0)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|int_osc:oscillator|altera_int_osc:int_osc_0                                                                                                                                                                                                                 ; altera_int_osc                                       ; int_osc      ;
;    |iox_glue:\iox_on:iox_glue|                                                                                ; 55 (55)             ; 10 (10)                   ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|iox_glue:\iox_on:iox_glue                                                                                                                                                                                                                                   ; iox_glue                                             ; work         ;
;    |m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|                                                      ; 977 (977)           ; 25 (25)                   ; 525312      ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst                                                                                                                                                                                                         ; m9k_grouped                                          ; work         ;
;       |generic_ram_infer:\m9k_loop:0:sample_ram_inst|                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:0:sample_ram_inst                                                                                                                                                           ; generic_ram_infer                                    ; work         ;
;          |altsyncram:ram_block_rtl_0|                                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:0:sample_ram_inst|altsyncram:ram_block_rtl_0                                                                                                                                ; altsyncram                                           ; work         ;
;             |altsyncram_9r31:auto_generated|                                                                  ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:0:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated                                                                                                 ; altsyncram_9r31                                      ; work         ;
;       |generic_ram_infer:\m9k_loop:10:sample_ram_inst|                                                        ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:10:sample_ram_inst                                                                                                                                                          ; generic_ram_infer                                    ; work         ;
;          |altsyncram:ram_block_rtl_0|                                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:10:sample_ram_inst|altsyncram:ram_block_rtl_0                                                                                                                               ; altsyncram                                           ; work         ;
;             |altsyncram_9r31:auto_generated|                                                                  ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:10:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated                                                                                                ; altsyncram_9r31                                      ; work         ;
;       |generic_ram_infer:\m9k_loop:11:sample_ram_inst|                                                        ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:11:sample_ram_inst                                                                                                                                                          ; generic_ram_infer                                    ; work         ;
;          |altsyncram:ram_block_rtl_0|                                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:11:sample_ram_inst|altsyncram:ram_block_rtl_0                                                                                                                               ; altsyncram                                           ; work         ;
;             |altsyncram_9r31:auto_generated|                                                                  ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:11:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated                                                                                                ; altsyncram_9r31                                      ; work         ;
;       |generic_ram_infer:\m9k_loop:12:sample_ram_inst|                                                        ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:12:sample_ram_inst                                                                                                                                                          ; generic_ram_infer                                    ; work         ;
;          |altsyncram:ram_block_rtl_0|                                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:12:sample_ram_inst|altsyncram:ram_block_rtl_0                                                                                                                               ; altsyncram                                           ; work         ;
;             |altsyncram_9r31:auto_generated|                                                                  ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:12:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated                                                                                                ; altsyncram_9r31                                      ; work         ;
;       |generic_ram_infer:\m9k_loop:13:sample_ram_inst|                                                        ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:13:sample_ram_inst                                                                                                                                                          ; generic_ram_infer                                    ; work         ;
;          |altsyncram:ram_block_rtl_0|                                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:13:sample_ram_inst|altsyncram:ram_block_rtl_0                                                                                                                               ; altsyncram                                           ; work         ;
;             |altsyncram_9r31:auto_generated|                                                                  ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:13:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated                                                                                                ; altsyncram_9r31                                      ; work         ;
;       |generic_ram_infer:\m9k_loop:14:sample_ram_inst|                                                        ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:14:sample_ram_inst                                                                                                                                                          ; generic_ram_infer                                    ; work         ;
;          |altsyncram:ram_block_rtl_0|                                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:14:sample_ram_inst|altsyncram:ram_block_rtl_0                                                                                                                               ; altsyncram                                           ; work         ;
;             |altsyncram_9r31:auto_generated|                                                                  ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:14:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated                                                                                                ; altsyncram_9r31                                      ; work         ;
;       |generic_ram_infer:\m9k_loop:15:sample_ram_inst|                                                        ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:15:sample_ram_inst                                                                                                                                                          ; generic_ram_infer                                    ; work         ;
;          |altsyncram:ram_block_rtl_0|                                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:15:sample_ram_inst|altsyncram:ram_block_rtl_0                                                                                                                               ; altsyncram                                           ; work         ;
;             |altsyncram_9r31:auto_generated|                                                                  ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:15:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated                                                                                                ; altsyncram_9r31                                      ; work         ;
;       |generic_ram_infer:\m9k_loop:16:sample_ram_inst|                                                        ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:16:sample_ram_inst                                                                                                                                                          ; generic_ram_infer                                    ; work         ;
;          |altsyncram:ram_block_rtl_0|                                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:16:sample_ram_inst|altsyncram:ram_block_rtl_0                                                                                                                               ; altsyncram                                           ; work         ;
;             |altsyncram_9r31:auto_generated|                                                                  ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:16:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated                                                                                                ; altsyncram_9r31                                      ; work         ;
;       |generic_ram_infer:\m9k_loop:17:sample_ram_inst|                                                        ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:17:sample_ram_inst                                                                                                                                                          ; generic_ram_infer                                    ; work         ;
;          |altsyncram:ram_block_rtl_0|                                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:17:sample_ram_inst|altsyncram:ram_block_rtl_0                                                                                                                               ; altsyncram                                           ; work         ;
;             |altsyncram_9r31:auto_generated|                                                                  ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:17:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated                                                                                                ; altsyncram_9r31                                      ; work         ;
;       |generic_ram_infer:\m9k_loop:18:sample_ram_inst|                                                        ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:18:sample_ram_inst                                                                                                                                                          ; generic_ram_infer                                    ; work         ;
;          |altsyncram:ram_block_rtl_0|                                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:18:sample_ram_inst|altsyncram:ram_block_rtl_0                                                                                                                               ; altsyncram                                           ; work         ;
;             |altsyncram_9r31:auto_generated|                                                                  ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:18:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated                                                                                                ; altsyncram_9r31                                      ; work         ;
;       |generic_ram_infer:\m9k_loop:19:sample_ram_inst|                                                        ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:19:sample_ram_inst                                                                                                                                                          ; generic_ram_infer                                    ; work         ;
;          |altsyncram:ram_block_rtl_0|                                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:19:sample_ram_inst|altsyncram:ram_block_rtl_0                                                                                                                               ; altsyncram                                           ; work         ;
;             |altsyncram_9r31:auto_generated|                                                                  ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:19:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated                                                                                                ; altsyncram_9r31                                      ; work         ;
;       |generic_ram_infer:\m9k_loop:1:sample_ram_inst|                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:1:sample_ram_inst                                                                                                                                                           ; generic_ram_infer                                    ; work         ;
;          |altsyncram:ram_block_rtl_0|                                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:1:sample_ram_inst|altsyncram:ram_block_rtl_0                                                                                                                                ; altsyncram                                           ; work         ;
;             |altsyncram_9r31:auto_generated|                                                                  ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:1:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated                                                                                                 ; altsyncram_9r31                                      ; work         ;
;       |generic_ram_infer:\m9k_loop:20:sample_ram_inst|                                                        ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:20:sample_ram_inst                                                                                                                                                          ; generic_ram_infer                                    ; work         ;
;          |altsyncram:ram_block_rtl_0|                                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:20:sample_ram_inst|altsyncram:ram_block_rtl_0                                                                                                                               ; altsyncram                                           ; work         ;
;             |altsyncram_9r31:auto_generated|                                                                  ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:20:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated                                                                                                ; altsyncram_9r31                                      ; work         ;
;       |generic_ram_infer:\m9k_loop:21:sample_ram_inst|                                                        ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:21:sample_ram_inst                                                                                                                                                          ; generic_ram_infer                                    ; work         ;
;          |altsyncram:ram_block_rtl_0|                                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:21:sample_ram_inst|altsyncram:ram_block_rtl_0                                                                                                                               ; altsyncram                                           ; work         ;
;             |altsyncram_9r31:auto_generated|                                                                  ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:21:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated                                                                                                ; altsyncram_9r31                                      ; work         ;
;       |generic_ram_infer:\m9k_loop:22:sample_ram_inst|                                                        ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:22:sample_ram_inst                                                                                                                                                          ; generic_ram_infer                                    ; work         ;
;          |altsyncram:ram_block_rtl_0|                                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:22:sample_ram_inst|altsyncram:ram_block_rtl_0                                                                                                                               ; altsyncram                                           ; work         ;
;             |altsyncram_9r31:auto_generated|                                                                  ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:22:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated                                                                                                ; altsyncram_9r31                                      ; work         ;
;       |generic_ram_infer:\m9k_loop:23:sample_ram_inst|                                                        ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:23:sample_ram_inst                                                                                                                                                          ; generic_ram_infer                                    ; work         ;
;          |altsyncram:ram_block_rtl_0|                                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:23:sample_ram_inst|altsyncram:ram_block_rtl_0                                                                                                                               ; altsyncram                                           ; work         ;
;             |altsyncram_9r31:auto_generated|                                                                  ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:23:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated                                                                                                ; altsyncram_9r31                                      ; work         ;
;       |generic_ram_infer:\m9k_loop:24:sample_ram_inst|                                                        ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:24:sample_ram_inst                                                                                                                                                          ; generic_ram_infer                                    ; work         ;
;          |altsyncram:ram_block_rtl_0|                                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:24:sample_ram_inst|altsyncram:ram_block_rtl_0                                                                                                                               ; altsyncram                                           ; work         ;
;             |altsyncram_9r31:auto_generated|                                                                  ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:24:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated                                                                                                ; altsyncram_9r31                                      ; work         ;
;       |generic_ram_infer:\m9k_loop:25:sample_ram_inst|                                                        ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:25:sample_ram_inst                                                                                                                                                          ; generic_ram_infer                                    ; work         ;
;          |altsyncram:ram_block_rtl_0|                                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:25:sample_ram_inst|altsyncram:ram_block_rtl_0                                                                                                                               ; altsyncram                                           ; work         ;
;             |altsyncram_9r31:auto_generated|                                                                  ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:25:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated                                                                                                ; altsyncram_9r31                                      ; work         ;
;       |generic_ram_infer:\m9k_loop:26:sample_ram_inst|                                                        ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:26:sample_ram_inst                                                                                                                                                          ; generic_ram_infer                                    ; work         ;
;          |altsyncram:ram_block_rtl_0|                                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:26:sample_ram_inst|altsyncram:ram_block_rtl_0                                                                                                                               ; altsyncram                                           ; work         ;
;             |altsyncram_9r31:auto_generated|                                                                  ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:26:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated                                                                                                ; altsyncram_9r31                                      ; work         ;
;       |generic_ram_infer:\m9k_loop:27:sample_ram_inst|                                                        ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:27:sample_ram_inst                                                                                                                                                          ; generic_ram_infer                                    ; work         ;
;          |altsyncram:ram_block_rtl_0|                                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:27:sample_ram_inst|altsyncram:ram_block_rtl_0                                                                                                                               ; altsyncram                                           ; work         ;
;             |altsyncram_9r31:auto_generated|                                                                  ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:27:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated                                                                                                ; altsyncram_9r31                                      ; work         ;
;       |generic_ram_infer:\m9k_loop:28:sample_ram_inst|                                                        ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:28:sample_ram_inst                                                                                                                                                          ; generic_ram_infer                                    ; work         ;
;          |altsyncram:ram_block_rtl_0|                                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:28:sample_ram_inst|altsyncram:ram_block_rtl_0                                                                                                                               ; altsyncram                                           ; work         ;
;             |altsyncram_9r31:auto_generated|                                                                  ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:28:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated                                                                                                ; altsyncram_9r31                                      ; work         ;
;       |generic_ram_infer:\m9k_loop:29:sample_ram_inst|                                                        ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:29:sample_ram_inst                                                                                                                                                          ; generic_ram_infer                                    ; work         ;
;          |altsyncram:ram_block_rtl_0|                                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:29:sample_ram_inst|altsyncram:ram_block_rtl_0                                                                                                                               ; altsyncram                                           ; work         ;
;             |altsyncram_9r31:auto_generated|                                                                  ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:29:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated                                                                                                ; altsyncram_9r31                                      ; work         ;
;       |generic_ram_infer:\m9k_loop:2:sample_ram_inst|                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:2:sample_ram_inst                                                                                                                                                           ; generic_ram_infer                                    ; work         ;
;          |altsyncram:ram_block_rtl_0|                                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:2:sample_ram_inst|altsyncram:ram_block_rtl_0                                                                                                                                ; altsyncram                                           ; work         ;
;             |altsyncram_9r31:auto_generated|                                                                  ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:2:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated                                                                                                 ; altsyncram_9r31                                      ; work         ;
;       |generic_ram_infer:\m9k_loop:30:sample_ram_inst|                                                        ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:30:sample_ram_inst                                                                                                                                                          ; generic_ram_infer                                    ; work         ;
;          |altsyncram:ram_block_rtl_0|                                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:30:sample_ram_inst|altsyncram:ram_block_rtl_0                                                                                                                               ; altsyncram                                           ; work         ;
;             |altsyncram_9r31:auto_generated|                                                                  ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:30:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated                                                                                                ; altsyncram_9r31                                      ; work         ;
;       |generic_ram_infer:\m9k_loop:31:sample_ram_inst|                                                        ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:31:sample_ram_inst                                                                                                                                                          ; generic_ram_infer                                    ; work         ;
;          |altsyncram:ram_block_rtl_0|                                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:31:sample_ram_inst|altsyncram:ram_block_rtl_0                                                                                                                               ; altsyncram                                           ; work         ;
;             |altsyncram_9r31:auto_generated|                                                                  ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:31:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated                                                                                                ; altsyncram_9r31                                      ; work         ;
;       |generic_ram_infer:\m9k_loop:32:sample_ram_inst|                                                        ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:32:sample_ram_inst                                                                                                                                                          ; generic_ram_infer                                    ; work         ;
;          |altsyncram:ram_block_rtl_0|                                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:32:sample_ram_inst|altsyncram:ram_block_rtl_0                                                                                                                               ; altsyncram                                           ; work         ;
;             |altsyncram_9r31:auto_generated|                                                                  ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:32:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated                                                                                                ; altsyncram_9r31                                      ; work         ;
;       |generic_ram_infer:\m9k_loop:33:sample_ram_inst|                                                        ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:33:sample_ram_inst                                                                                                                                                          ; generic_ram_infer                                    ; work         ;
;          |altsyncram:ram_block_rtl_0|                                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:33:sample_ram_inst|altsyncram:ram_block_rtl_0                                                                                                                               ; altsyncram                                           ; work         ;
;             |altsyncram_9r31:auto_generated|                                                                  ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:33:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated                                                                                                ; altsyncram_9r31                                      ; work         ;
;       |generic_ram_infer:\m9k_loop:34:sample_ram_inst|                                                        ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:34:sample_ram_inst                                                                                                                                                          ; generic_ram_infer                                    ; work         ;
;          |altsyncram:ram_block_rtl_0|                                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:34:sample_ram_inst|altsyncram:ram_block_rtl_0                                                                                                                               ; altsyncram                                           ; work         ;
;             |altsyncram_9r31:auto_generated|                                                                  ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:34:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated                                                                                                ; altsyncram_9r31                                      ; work         ;
;       |generic_ram_infer:\m9k_loop:35:sample_ram_inst|                                                        ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:35:sample_ram_inst                                                                                                                                                          ; generic_ram_infer                                    ; work         ;
;          |altsyncram:ram_block_rtl_0|                                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:35:sample_ram_inst|altsyncram:ram_block_rtl_0                                                                                                                               ; altsyncram                                           ; work         ;
;             |altsyncram_9r31:auto_generated|                                                                  ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:35:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated                                                                                                ; altsyncram_9r31                                      ; work         ;
;       |generic_ram_infer:\m9k_loop:36:sample_ram_inst|                                                        ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:36:sample_ram_inst                                                                                                                                                          ; generic_ram_infer                                    ; work         ;
;          |altsyncram:ram_block_rtl_0|                                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:36:sample_ram_inst|altsyncram:ram_block_rtl_0                                                                                                                               ; altsyncram                                           ; work         ;
;             |altsyncram_9r31:auto_generated|                                                                  ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:36:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated                                                                                                ; altsyncram_9r31                                      ; work         ;
;       |generic_ram_infer:\m9k_loop:37:sample_ram_inst|                                                        ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:37:sample_ram_inst                                                                                                                                                          ; generic_ram_infer                                    ; work         ;
;          |altsyncram:ram_block_rtl_0|                                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:37:sample_ram_inst|altsyncram:ram_block_rtl_0                                                                                                                               ; altsyncram                                           ; work         ;
;             |altsyncram_9r31:auto_generated|                                                                  ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:37:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated                                                                                                ; altsyncram_9r31                                      ; work         ;
;       |generic_ram_infer:\m9k_loop:38:sample_ram_inst|                                                        ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:38:sample_ram_inst                                                                                                                                                          ; generic_ram_infer                                    ; work         ;
;          |altsyncram:ram_block_rtl_0|                                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:38:sample_ram_inst|altsyncram:ram_block_rtl_0                                                                                                                               ; altsyncram                                           ; work         ;
;             |altsyncram_9r31:auto_generated|                                                                  ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:38:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated                                                                                                ; altsyncram_9r31                                      ; work         ;
;       |generic_ram_infer:\m9k_loop:39:sample_ram_inst|                                                        ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:39:sample_ram_inst                                                                                                                                                          ; generic_ram_infer                                    ; work         ;
;          |altsyncram:ram_block_rtl_0|                                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:39:sample_ram_inst|altsyncram:ram_block_rtl_0                                                                                                                               ; altsyncram                                           ; work         ;
;             |altsyncram_9r31:auto_generated|                                                                  ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:39:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated                                                                                                ; altsyncram_9r31                                      ; work         ;
;       |generic_ram_infer:\m9k_loop:3:sample_ram_inst|                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:3:sample_ram_inst                                                                                                                                                           ; generic_ram_infer                                    ; work         ;
;          |altsyncram:ram_block_rtl_0|                                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:3:sample_ram_inst|altsyncram:ram_block_rtl_0                                                                                                                                ; altsyncram                                           ; work         ;
;             |altsyncram_9r31:auto_generated|                                                                  ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:3:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated                                                                                                 ; altsyncram_9r31                                      ; work         ;
;       |generic_ram_infer:\m9k_loop:40:sample_ram_inst|                                                        ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:40:sample_ram_inst                                                                                                                                                          ; generic_ram_infer                                    ; work         ;
;          |altsyncram:ram_block_rtl_0|                                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:40:sample_ram_inst|altsyncram:ram_block_rtl_0                                                                                                                               ; altsyncram                                           ; work         ;
;             |altsyncram_9r31:auto_generated|                                                                  ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:40:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated                                                                                                ; altsyncram_9r31                                      ; work         ;
;       |generic_ram_infer:\m9k_loop:41:sample_ram_inst|                                                        ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:41:sample_ram_inst                                                                                                                                                          ; generic_ram_infer                                    ; work         ;
;          |altsyncram:ram_block_rtl_0|                                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:41:sample_ram_inst|altsyncram:ram_block_rtl_0                                                                                                                               ; altsyncram                                           ; work         ;
;             |altsyncram_9r31:auto_generated|                                                                  ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:41:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated                                                                                                ; altsyncram_9r31                                      ; work         ;
;       |generic_ram_infer:\m9k_loop:42:sample_ram_inst|                                                        ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:42:sample_ram_inst                                                                                                                                                          ; generic_ram_infer                                    ; work         ;
;          |altsyncram:ram_block_rtl_0|                                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:42:sample_ram_inst|altsyncram:ram_block_rtl_0                                                                                                                               ; altsyncram                                           ; work         ;
;             |altsyncram_9r31:auto_generated|                                                                  ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:42:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated                                                                                                ; altsyncram_9r31                                      ; work         ;
;       |generic_ram_infer:\m9k_loop:43:sample_ram_inst|                                                        ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:43:sample_ram_inst                                                                                                                                                          ; generic_ram_infer                                    ; work         ;
;          |altsyncram:ram_block_rtl_0|                                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:43:sample_ram_inst|altsyncram:ram_block_rtl_0                                                                                                                               ; altsyncram                                           ; work         ;
;             |altsyncram_9r31:auto_generated|                                                                  ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:43:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated                                                                                                ; altsyncram_9r31                                      ; work         ;
;       |generic_ram_infer:\m9k_loop:44:sample_ram_inst|                                                        ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:44:sample_ram_inst                                                                                                                                                          ; generic_ram_infer                                    ; work         ;
;          |altsyncram:ram_block_rtl_0|                                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:44:sample_ram_inst|altsyncram:ram_block_rtl_0                                                                                                                               ; altsyncram                                           ; work         ;
;             |altsyncram_9r31:auto_generated|                                                                  ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:44:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated                                                                                                ; altsyncram_9r31                                      ; work         ;
;       |generic_ram_infer:\m9k_loop:45:sample_ram_inst|                                                        ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:45:sample_ram_inst                                                                                                                                                          ; generic_ram_infer                                    ; work         ;
;          |altsyncram:ram_block_rtl_0|                                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:45:sample_ram_inst|altsyncram:ram_block_rtl_0                                                                                                                               ; altsyncram                                           ; work         ;
;             |altsyncram_9r31:auto_generated|                                                                  ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:45:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated                                                                                                ; altsyncram_9r31                                      ; work         ;
;       |generic_ram_infer:\m9k_loop:46:sample_ram_inst|                                                        ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:46:sample_ram_inst                                                                                                                                                          ; generic_ram_infer                                    ; work         ;
;          |altsyncram:ram_block_rtl_0|                                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:46:sample_ram_inst|altsyncram:ram_block_rtl_0                                                                                                                               ; altsyncram                                           ; work         ;
;             |altsyncram_9r31:auto_generated|                                                                  ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:46:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated                                                                                                ; altsyncram_9r31                                      ; work         ;
;       |generic_ram_infer:\m9k_loop:47:sample_ram_inst|                                                        ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:47:sample_ram_inst                                                                                                                                                          ; generic_ram_infer                                    ; work         ;
;          |altsyncram:ram_block_rtl_0|                                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:47:sample_ram_inst|altsyncram:ram_block_rtl_0                                                                                                                               ; altsyncram                                           ; work         ;
;             |altsyncram_9r31:auto_generated|                                                                  ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:47:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated                                                                                                ; altsyncram_9r31                                      ; work         ;
;       |generic_ram_infer:\m9k_loop:48:sample_ram_inst|                                                        ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:48:sample_ram_inst                                                                                                                                                          ; generic_ram_infer                                    ; work         ;
;          |altsyncram:ram_block_rtl_0|                                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:48:sample_ram_inst|altsyncram:ram_block_rtl_0                                                                                                                               ; altsyncram                                           ; work         ;
;             |altsyncram_9r31:auto_generated|                                                                  ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:48:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated                                                                                                ; altsyncram_9r31                                      ; work         ;
;       |generic_ram_infer:\m9k_loop:49:sample_ram_inst|                                                        ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:49:sample_ram_inst                                                                                                                                                          ; generic_ram_infer                                    ; work         ;
;          |altsyncram:ram_block_rtl_0|                                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:49:sample_ram_inst|altsyncram:ram_block_rtl_0                                                                                                                               ; altsyncram                                           ; work         ;
;             |altsyncram_9r31:auto_generated|                                                                  ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:49:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated                                                                                                ; altsyncram_9r31                                      ; work         ;
;       |generic_ram_infer:\m9k_loop:4:sample_ram_inst|                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:4:sample_ram_inst                                                                                                                                                           ; generic_ram_infer                                    ; work         ;
;          |altsyncram:ram_block_rtl_0|                                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:4:sample_ram_inst|altsyncram:ram_block_rtl_0                                                                                                                                ; altsyncram                                           ; work         ;
;             |altsyncram_9r31:auto_generated|                                                                  ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:4:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated                                                                                                 ; altsyncram_9r31                                      ; work         ;
;       |generic_ram_infer:\m9k_loop:50:sample_ram_inst|                                                        ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:50:sample_ram_inst                                                                                                                                                          ; generic_ram_infer                                    ; work         ;
;          |altsyncram:ram_block_rtl_0|                                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:50:sample_ram_inst|altsyncram:ram_block_rtl_0                                                                                                                               ; altsyncram                                           ; work         ;
;             |altsyncram_9r31:auto_generated|                                                                  ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:50:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated                                                                                                ; altsyncram_9r31                                      ; work         ;
;       |generic_ram_infer:\m9k_loop:51:sample_ram_inst|                                                        ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:51:sample_ram_inst                                                                                                                                                          ; generic_ram_infer                                    ; work         ;
;          |altsyncram:ram_block_rtl_0|                                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:51:sample_ram_inst|altsyncram:ram_block_rtl_0                                                                                                                               ; altsyncram                                           ; work         ;
;             |altsyncram_9r31:auto_generated|                                                                  ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:51:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated                                                                                                ; altsyncram_9r31                                      ; work         ;
;       |generic_ram_infer:\m9k_loop:52:sample_ram_inst|                                                        ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:52:sample_ram_inst                                                                                                                                                          ; generic_ram_infer                                    ; work         ;
;          |altsyncram:ram_block_rtl_0|                                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:52:sample_ram_inst|altsyncram:ram_block_rtl_0                                                                                                                               ; altsyncram                                           ; work         ;
;             |altsyncram_9r31:auto_generated|                                                                  ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:52:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated                                                                                                ; altsyncram_9r31                                      ; work         ;
;       |generic_ram_infer:\m9k_loop:53:sample_ram_inst|                                                        ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:53:sample_ram_inst                                                                                                                                                          ; generic_ram_infer                                    ; work         ;
;          |altsyncram:ram_block_rtl_0|                                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:53:sample_ram_inst|altsyncram:ram_block_rtl_0                                                                                                                               ; altsyncram                                           ; work         ;
;             |altsyncram_9r31:auto_generated|                                                                  ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:53:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated                                                                                                ; altsyncram_9r31                                      ; work         ;
;       |generic_ram_infer:\m9k_loop:54:sample_ram_inst|                                                        ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:54:sample_ram_inst                                                                                                                                                          ; generic_ram_infer                                    ; work         ;
;          |altsyncram:ram_block_rtl_0|                                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:54:sample_ram_inst|altsyncram:ram_block_rtl_0                                                                                                                               ; altsyncram                                           ; work         ;
;             |altsyncram_9r31:auto_generated|                                                                  ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:54:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated                                                                                                ; altsyncram_9r31                                      ; work         ;
;       |generic_ram_infer:\m9k_loop:55:sample_ram_inst|                                                        ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:55:sample_ram_inst                                                                                                                                                          ; generic_ram_infer                                    ; work         ;
;          |altsyncram:ram_block_rtl_0|                                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:55:sample_ram_inst|altsyncram:ram_block_rtl_0                                                                                                                               ; altsyncram                                           ; work         ;
;             |altsyncram_9r31:auto_generated|                                                                  ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:55:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated                                                                                                ; altsyncram_9r31                                      ; work         ;
;       |generic_ram_infer:\m9k_loop:56:sample_ram_inst|                                                        ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:56:sample_ram_inst                                                                                                                                                          ; generic_ram_infer                                    ; work         ;
;          |altsyncram:ram_block_rtl_0|                                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:56:sample_ram_inst|altsyncram:ram_block_rtl_0                                                                                                                               ; altsyncram                                           ; work         ;
;             |altsyncram_9r31:auto_generated|                                                                  ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:56:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated                                                                                                ; altsyncram_9r31                                      ; work         ;
;       |generic_ram_infer:\m9k_loop:5:sample_ram_inst|                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:5:sample_ram_inst                                                                                                                                                           ; generic_ram_infer                                    ; work         ;
;          |altsyncram:ram_block_rtl_0|                                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:5:sample_ram_inst|altsyncram:ram_block_rtl_0                                                                                                                                ; altsyncram                                           ; work         ;
;             |altsyncram_9r31:auto_generated|                                                                  ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:5:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated                                                                                                 ; altsyncram_9r31                                      ; work         ;
;       |generic_ram_infer:\m9k_loop:6:sample_ram_inst|                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:6:sample_ram_inst                                                                                                                                                           ; generic_ram_infer                                    ; work         ;
;          |altsyncram:ram_block_rtl_0|                                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:6:sample_ram_inst|altsyncram:ram_block_rtl_0                                                                                                                                ; altsyncram                                           ; work         ;
;             |altsyncram_9r31:auto_generated|                                                                  ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:6:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated                                                                                                 ; altsyncram_9r31                                      ; work         ;
;       |generic_ram_infer:\m9k_loop:7:sample_ram_inst|                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:7:sample_ram_inst                                                                                                                                                           ; generic_ram_infer                                    ; work         ;
;          |altsyncram:ram_block_rtl_0|                                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:7:sample_ram_inst|altsyncram:ram_block_rtl_0                                                                                                                                ; altsyncram                                           ; work         ;
;             |altsyncram_9r31:auto_generated|                                                                  ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:7:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated                                                                                                 ; altsyncram_9r31                                      ; work         ;
;       |generic_ram_infer:\m9k_loop:8:sample_ram_inst|                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:8:sample_ram_inst                                                                                                                                                           ; generic_ram_infer                                    ; work         ;
;          |altsyncram:ram_block_rtl_0|                                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:8:sample_ram_inst|altsyncram:ram_block_rtl_0                                                                                                                                ; altsyncram                                           ; work         ;
;             |altsyncram_9r31:auto_generated|                                                                  ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:8:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated                                                                                                 ; altsyncram_9r31                                      ; work         ;
;       |generic_ram_infer:\m9k_loop:9:sample_ram_inst|                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:9:sample_ram_inst                                                                                                                                                           ; generic_ram_infer                                    ; work         ;
;          |altsyncram:ram_block_rtl_0|                                                                         ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:9:sample_ram_inst|altsyncram:ram_block_rtl_0                                                                                                                                ; altsyncram                                           ; work         ;
;             |altsyncram_9r31:auto_generated|                                                                  ; 0 (0)               ; 0 (0)                     ; 9216        ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:9:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated                                                                                                 ; altsyncram_9r31                                      ; work         ;
;    |mixer:mixer1|                                                                                             ; 277 (277)           ; 147 (147)                 ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|mixer:mixer1                                                                                                                                                                                                                                                ; mixer                                                ; work         ;
;    |pll_reset_sync:pll_sync|                                                                                  ; 9 (9)               ; 8 (8)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pll_reset_sync:pll_sync                                                                                                                                                                                                                                     ; pll_reset_sync                                       ; work         ;
;    |pllv3:\pll_v3_inst:pll_inst|                                                                              ; 0 (0)               ; 0 (0)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pllv3:\pll_v3_inst:pll_inst                                                                                                                                                                                                                                 ; pllv3                                                ; work         ;
;       |altpll:altpll_component|                                                                               ; 0 (0)               ; 0 (0)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pllv3:\pll_v3_inst:pll_inst|altpll:altpll_component                                                                                                                                                                                                         ; altpll                                               ; work         ;
;          |pllv3_altpll:auto_generated|                                                                        ; 0 (0)               ; 0 (0)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pllv3:\pll_v3_inst:pll_inst|altpll:altpll_component|pllv3_altpll:auto_generated                                                                                                                                                                             ; pllv3_altpll                                         ; work         ;
;    |pokey:\POKEY_ON:1:pokeyx|                                                                                 ; 267 (131)           ; 339 (197)                 ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:1:pokeyx                                                                                                                                                                                                                                    ; pokey                                                ; work         ;
;       |delay_line:serin_clock_delay|                                                                          ; 8 (8)               ; 5 (5)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:1:pokeyx|delay_line:serin_clock_delay                                                                                                                                                                                                       ; delay_line                                           ; work         ;
;       |delay_line:serout_clock_delay|                                                                         ; 4 (4)               ; 2 (2)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:1:pokeyx|delay_line:serout_clock_delay                                                                                                                                                                                                      ; delay_line                                           ; work         ;
;       |latch_delay_line:stimer_delay|                                                                         ; 2 (2)               ; 4 (4)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:1:pokeyx|latch_delay_line:stimer_delay                                                                                                                                                                                                      ; latch_delay_line                                     ; work         ;
;       |latch_delay_line:twotone_del|                                                                          ; 2 (2)               ; 2 (2)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:1:pokeyx|latch_delay_line:twotone_del                                                                                                                                                                                                       ; latch_delay_line                                     ; work         ;
;       |pokey_countdown_timer:timer0|                                                                          ; 15 (9)              ; 11 (8)                    ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:1:pokeyx|pokey_countdown_timer:timer0                                                                                                                                                                                                       ; pokey_countdown_timer                                ; work         ;
;          |delay_line:underflow0_delay|                                                                        ; 6 (6)               ; 3 (3)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:1:pokeyx|pokey_countdown_timer:timer0|delay_line:underflow0_delay                                                                                                                                                                           ; delay_line                                           ; work         ;
;       |pokey_countdown_timer:timer1|                                                                          ; 14 (9)              ; 11 (8)                    ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:1:pokeyx|pokey_countdown_timer:timer1                                                                                                                                                                                                       ; pokey_countdown_timer                                ; work         ;
;          |delay_line:underflow0_delay|                                                                        ; 5 (5)               ; 3 (3)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:1:pokeyx|pokey_countdown_timer:timer1|delay_line:underflow0_delay                                                                                                                                                                           ; delay_line                                           ; work         ;
;       |pokey_countdown_timer:timer2|                                                                          ; 14 (9)              ; 11 (8)                    ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:1:pokeyx|pokey_countdown_timer:timer2                                                                                                                                                                                                       ; pokey_countdown_timer                                ; work         ;
;          |delay_line:underflow0_delay|                                                                        ; 5 (5)               ; 3 (3)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:1:pokeyx|pokey_countdown_timer:timer2|delay_line:underflow0_delay                                                                                                                                                                           ; delay_line                                           ; work         ;
;       |pokey_countdown_timer:timer3|                                                                          ; 16 (9)              ; 11 (8)                    ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:1:pokeyx|pokey_countdown_timer:timer3                                                                                                                                                                                                       ; pokey_countdown_timer                                ; work         ;
;          |delay_line:underflow0_delay|                                                                        ; 7 (7)               ; 3 (3)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:1:pokeyx|pokey_countdown_timer:timer3|delay_line:underflow0_delay                                                                                                                                                                           ; delay_line                                           ; work         ;
;       |pokey_noise_filter:pokey_noise_filter0|                                                                ; 4 (4)               ; 1 (1)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:1:pokeyx|pokey_noise_filter:pokey_noise_filter0                                                                                                                                                                                             ; pokey_noise_filter                                   ; work         ;
;       |pokey_noise_filter:pokey_noise_filter1|                                                                ; 4 (4)               ; 1 (1)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:1:pokeyx|pokey_noise_filter:pokey_noise_filter1                                                                                                                                                                                             ; pokey_noise_filter                                   ; work         ;
;       |pokey_noise_filter:pokey_noise_filter2|                                                                ; 4 (4)               ; 1 (1)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:1:pokeyx|pokey_noise_filter:pokey_noise_filter2                                                                                                                                                                                             ; pokey_noise_filter                                   ; work         ;
;       |pokey_noise_filter:pokey_noise_filter3|                                                                ; 4 (4)               ; 1 (1)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:1:pokeyx|pokey_noise_filter:pokey_noise_filter3                                                                                                                                                                                             ; pokey_noise_filter                                   ; work         ;
;       |pokey_poly_17_9:poly_17_19_lfsr|                                                                       ; 18 (18)             ; 18 (18)                   ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:1:pokeyx|pokey_poly_17_9:poly_17_19_lfsr                                                                                                                                                                                                    ; pokey_poly_17_9                                      ; work         ;
;       |pokey_poly_4:poly_4_lfsr|                                                                              ; 4 (4)               ; 4 (4)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:1:pokeyx|pokey_poly_4:poly_4_lfsr                                                                                                                                                                                                           ; pokey_poly_4                                         ; work         ;
;       |pokey_poly_5:poly_5_lfsr|                                                                              ; 5 (5)               ; 5 (5)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:1:pokeyx|pokey_poly_5:poly_5_lfsr                                                                                                                                                                                                           ; pokey_poly_5                                         ; work         ;
;       |syncreset_enable_divider:enable_15_div|                                                                ; 10 (10)             ; 8 (8)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:1:pokeyx|syncreset_enable_divider:enable_15_div                                                                                                                                                                                             ; syncreset_enable_divider                             ; work         ;
;       |syncreset_enable_divider:enable_64_div|                                                                ; 8 (8)               ; 6 (6)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:1:pokeyx|syncreset_enable_divider:enable_64_div                                                                                                                                                                                             ; syncreset_enable_divider                             ; work         ;
;       |wide_delay_line:audctl_delay|                                                                          ; 0 (0)               ; 8 (8)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:1:pokeyx|wide_delay_line:audctl_delay                                                                                                                                                                                                       ; wide_delay_line                                      ; work         ;
;       |wide_delay_line:audf0_delay|                                                                           ; 0 (0)               ; 8 (8)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:1:pokeyx|wide_delay_line:audf0_delay                                                                                                                                                                                                        ; wide_delay_line                                      ; work         ;
;       |wide_delay_line:audf1_delay|                                                                           ; 0 (0)               ; 8 (8)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:1:pokeyx|wide_delay_line:audf1_delay                                                                                                                                                                                                        ; wide_delay_line                                      ; work         ;
;       |wide_delay_line:audf2_delay|                                                                           ; 0 (0)               ; 8 (8)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:1:pokeyx|wide_delay_line:audf2_delay                                                                                                                                                                                                        ; wide_delay_line                                      ; work         ;
;       |wide_delay_line:audf3_delay|                                                                           ; 0 (0)               ; 8 (8)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:1:pokeyx|wide_delay_line:audf3_delay                                                                                                                                                                                                        ; wide_delay_line                                      ; work         ;
;    |pokey:\POKEY_ON:2:pokeyx|                                                                                 ; 290 (155)           ; 338 (196)                 ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:2:pokeyx                                                                                                                                                                                                                                    ; pokey                                                ; work         ;
;       |delay_line:serin_clock_delay|                                                                          ; 8 (8)               ; 5 (5)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:2:pokeyx|delay_line:serin_clock_delay                                                                                                                                                                                                       ; delay_line                                           ; work         ;
;       |delay_line:serout_clock_delay|                                                                         ; 4 (4)               ; 2 (2)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:2:pokeyx|delay_line:serout_clock_delay                                                                                                                                                                                                      ; delay_line                                           ; work         ;
;       |latch_delay_line:stimer_delay|                                                                         ; 2 (2)               ; 4 (4)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:2:pokeyx|latch_delay_line:stimer_delay                                                                                                                                                                                                      ; latch_delay_line                                     ; work         ;
;       |latch_delay_line:twotone_del|                                                                          ; 2 (2)               ; 2 (2)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:2:pokeyx|latch_delay_line:twotone_del                                                                                                                                                                                                       ; latch_delay_line                                     ; work         ;
;       |pokey_countdown_timer:timer0|                                                                          ; 14 (9)              ; 11 (8)                    ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:2:pokeyx|pokey_countdown_timer:timer0                                                                                                                                                                                                       ; pokey_countdown_timer                                ; work         ;
;          |delay_line:underflow0_delay|                                                                        ; 5 (5)               ; 3 (3)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:2:pokeyx|pokey_countdown_timer:timer0|delay_line:underflow0_delay                                                                                                                                                                           ; delay_line                                           ; work         ;
;       |pokey_countdown_timer:timer1|                                                                          ; 14 (9)              ; 11 (8)                    ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:2:pokeyx|pokey_countdown_timer:timer1                                                                                                                                                                                                       ; pokey_countdown_timer                                ; work         ;
;          |delay_line:underflow0_delay|                                                                        ; 5 (5)               ; 3 (3)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:2:pokeyx|pokey_countdown_timer:timer1|delay_line:underflow0_delay                                                                                                                                                                           ; delay_line                                           ; work         ;
;       |pokey_countdown_timer:timer2|                                                                          ; 14 (9)              ; 11 (8)                    ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:2:pokeyx|pokey_countdown_timer:timer2                                                                                                                                                                                                       ; pokey_countdown_timer                                ; work         ;
;          |delay_line:underflow0_delay|                                                                        ; 5 (5)               ; 3 (3)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:2:pokeyx|pokey_countdown_timer:timer2|delay_line:underflow0_delay                                                                                                                                                                           ; delay_line                                           ; work         ;
;       |pokey_countdown_timer:timer3|                                                                          ; 16 (9)              ; 11 (8)                    ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:2:pokeyx|pokey_countdown_timer:timer3                                                                                                                                                                                                       ; pokey_countdown_timer                                ; work         ;
;          |delay_line:underflow0_delay|                                                                        ; 7 (7)               ; 3 (3)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:2:pokeyx|pokey_countdown_timer:timer3|delay_line:underflow0_delay                                                                                                                                                                           ; delay_line                                           ; work         ;
;       |pokey_noise_filter:pokey_noise_filter0|                                                                ; 4 (4)               ; 1 (1)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:2:pokeyx|pokey_noise_filter:pokey_noise_filter0                                                                                                                                                                                             ; pokey_noise_filter                                   ; work         ;
;       |pokey_noise_filter:pokey_noise_filter1|                                                                ; 4 (4)               ; 1 (1)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:2:pokeyx|pokey_noise_filter:pokey_noise_filter1                                                                                                                                                                                             ; pokey_noise_filter                                   ; work         ;
;       |pokey_noise_filter:pokey_noise_filter2|                                                                ; 4 (4)               ; 1 (1)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:2:pokeyx|pokey_noise_filter:pokey_noise_filter2                                                                                                                                                                                             ; pokey_noise_filter                                   ; work         ;
;       |pokey_noise_filter:pokey_noise_filter3|                                                                ; 4 (4)               ; 1 (1)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:2:pokeyx|pokey_noise_filter:pokey_noise_filter3                                                                                                                                                                                             ; pokey_noise_filter                                   ; work         ;
;       |pokey_poly_17_9:poly_17_19_lfsr|                                                                       ; 18 (18)             ; 18 (18)                   ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:2:pokeyx|pokey_poly_17_9:poly_17_19_lfsr                                                                                                                                                                                                    ; pokey_poly_17_9                                      ; work         ;
;       |pokey_poly_4:poly_4_lfsr|                                                                              ; 4 (4)               ; 4 (4)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:2:pokeyx|pokey_poly_4:poly_4_lfsr                                                                                                                                                                                                           ; pokey_poly_4                                         ; work         ;
;       |pokey_poly_5:poly_5_lfsr|                                                                              ; 5 (5)               ; 5 (5)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:2:pokeyx|pokey_poly_5:poly_5_lfsr                                                                                                                                                                                                           ; pokey_poly_5                                         ; work         ;
;       |syncreset_enable_divider:enable_15_div|                                                                ; 10 (10)             ; 8 (8)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:2:pokeyx|syncreset_enable_divider:enable_15_div                                                                                                                                                                                             ; syncreset_enable_divider                             ; work         ;
;       |syncreset_enable_divider:enable_64_div|                                                                ; 8 (8)               ; 6 (6)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:2:pokeyx|syncreset_enable_divider:enable_64_div                                                                                                                                                                                             ; syncreset_enable_divider                             ; work         ;
;       |wide_delay_line:audctl_delay|                                                                          ; 0 (0)               ; 8 (8)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:2:pokeyx|wide_delay_line:audctl_delay                                                                                                                                                                                                       ; wide_delay_line                                      ; work         ;
;       |wide_delay_line:audf0_delay|                                                                           ; 0 (0)               ; 8 (8)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:2:pokeyx|wide_delay_line:audf0_delay                                                                                                                                                                                                        ; wide_delay_line                                      ; work         ;
;       |wide_delay_line:audf1_delay|                                                                           ; 0 (0)               ; 8 (8)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:2:pokeyx|wide_delay_line:audf1_delay                                                                                                                                                                                                        ; wide_delay_line                                      ; work         ;
;       |wide_delay_line:audf2_delay|                                                                           ; 0 (0)               ; 8 (8)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:2:pokeyx|wide_delay_line:audf2_delay                                                                                                                                                                                                        ; wide_delay_line                                      ; work         ;
;       |wide_delay_line:audf3_delay|                                                                           ; 0 (0)               ; 8 (8)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:2:pokeyx|wide_delay_line:audf3_delay                                                                                                                                                                                                        ; wide_delay_line                                      ; work         ;
;    |pokey:\POKEY_ON:3:pokeyx|                                                                                 ; 270 (130)           ; 340 (198)                 ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:3:pokeyx                                                                                                                                                                                                                                    ; pokey                                                ; work         ;
;       |complete_address_decoder:decode_addr1|                                                                 ; 3 (3)               ; 0 (0)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:3:pokeyx|complete_address_decoder:decode_addr1                                                                                                                                                                                              ; complete_address_decoder                             ; work         ;
;       |delay_line:serin_clock_delay|                                                                          ; 8 (8)               ; 5 (5)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:3:pokeyx|delay_line:serin_clock_delay                                                                                                                                                                                                       ; delay_line                                           ; work         ;
;       |delay_line:serout_clock_delay|                                                                         ; 4 (4)               ; 2 (2)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:3:pokeyx|delay_line:serout_clock_delay                                                                                                                                                                                                      ; delay_line                                           ; work         ;
;       |latch_delay_line:stimer_delay|                                                                         ; 2 (2)               ; 4 (4)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:3:pokeyx|latch_delay_line:stimer_delay                                                                                                                                                                                                      ; latch_delay_line                                     ; work         ;
;       |latch_delay_line:twotone_del|                                                                          ; 2 (2)               ; 2 (2)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:3:pokeyx|latch_delay_line:twotone_del                                                                                                                                                                                                       ; latch_delay_line                                     ; work         ;
;       |pokey_countdown_timer:timer0|                                                                          ; 15 (9)              ; 11 (8)                    ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:3:pokeyx|pokey_countdown_timer:timer0                                                                                                                                                                                                       ; pokey_countdown_timer                                ; work         ;
;          |delay_line:underflow0_delay|                                                                        ; 6 (6)               ; 3 (3)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:3:pokeyx|pokey_countdown_timer:timer0|delay_line:underflow0_delay                                                                                                                                                                           ; delay_line                                           ; work         ;
;       |pokey_countdown_timer:timer1|                                                                          ; 15 (9)              ; 11 (8)                    ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:3:pokeyx|pokey_countdown_timer:timer1                                                                                                                                                                                                       ; pokey_countdown_timer                                ; work         ;
;          |delay_line:underflow0_delay|                                                                        ; 6 (6)               ; 3 (3)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:3:pokeyx|pokey_countdown_timer:timer1|delay_line:underflow0_delay                                                                                                                                                                           ; delay_line                                           ; work         ;
;       |pokey_countdown_timer:timer2|                                                                          ; 14 (9)              ; 11 (8)                    ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:3:pokeyx|pokey_countdown_timer:timer2                                                                                                                                                                                                       ; pokey_countdown_timer                                ; work         ;
;          |delay_line:underflow0_delay|                                                                        ; 5 (5)               ; 3 (3)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:3:pokeyx|pokey_countdown_timer:timer2|delay_line:underflow0_delay                                                                                                                                                                           ; delay_line                                           ; work         ;
;       |pokey_countdown_timer:timer3|                                                                          ; 16 (9)              ; 11 (8)                    ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:3:pokeyx|pokey_countdown_timer:timer3                                                                                                                                                                                                       ; pokey_countdown_timer                                ; work         ;
;          |delay_line:underflow0_delay|                                                                        ; 7 (7)               ; 3 (3)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:3:pokeyx|pokey_countdown_timer:timer3|delay_line:underflow0_delay                                                                                                                                                                           ; delay_line                                           ; work         ;
;       |pokey_noise_filter:pokey_noise_filter0|                                                                ; 4 (4)               ; 1 (1)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:3:pokeyx|pokey_noise_filter:pokey_noise_filter0                                                                                                                                                                                             ; pokey_noise_filter                                   ; work         ;
;       |pokey_noise_filter:pokey_noise_filter1|                                                                ; 4 (4)               ; 1 (1)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:3:pokeyx|pokey_noise_filter:pokey_noise_filter1                                                                                                                                                                                             ; pokey_noise_filter                                   ; work         ;
;       |pokey_noise_filter:pokey_noise_filter2|                                                                ; 4 (4)               ; 1 (1)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:3:pokeyx|pokey_noise_filter:pokey_noise_filter2                                                                                                                                                                                             ; pokey_noise_filter                                   ; work         ;
;       |pokey_noise_filter:pokey_noise_filter3|                                                                ; 4 (4)               ; 1 (1)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:3:pokeyx|pokey_noise_filter:pokey_noise_filter3                                                                                                                                                                                             ; pokey_noise_filter                                   ; work         ;
;       |pokey_poly_17_9:poly_17_19_lfsr|                                                                       ; 18 (18)             ; 18 (18)                   ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:3:pokeyx|pokey_poly_17_9:poly_17_19_lfsr                                                                                                                                                                                                    ; pokey_poly_17_9                                      ; work         ;
;       |pokey_poly_4:poly_4_lfsr|                                                                              ; 4 (4)               ; 4 (4)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:3:pokeyx|pokey_poly_4:poly_4_lfsr                                                                                                                                                                                                           ; pokey_poly_4                                         ; work         ;
;       |pokey_poly_5:poly_5_lfsr|                                                                              ; 5 (5)               ; 5 (5)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:3:pokeyx|pokey_poly_5:poly_5_lfsr                                                                                                                                                                                                           ; pokey_poly_5                                         ; work         ;
;       |syncreset_enable_divider:enable_15_div|                                                                ; 10 (10)             ; 8 (8)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:3:pokeyx|syncreset_enable_divider:enable_15_div                                                                                                                                                                                             ; syncreset_enable_divider                             ; work         ;
;       |syncreset_enable_divider:enable_64_div|                                                                ; 8 (8)               ; 6 (6)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:3:pokeyx|syncreset_enable_divider:enable_64_div                                                                                                                                                                                             ; syncreset_enable_divider                             ; work         ;
;       |wide_delay_line:audctl_delay|                                                                          ; 0 (0)               ; 8 (8)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:3:pokeyx|wide_delay_line:audctl_delay                                                                                                                                                                                                       ; wide_delay_line                                      ; work         ;
;       |wide_delay_line:audf0_delay|                                                                           ; 0 (0)               ; 8 (8)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:3:pokeyx|wide_delay_line:audf0_delay                                                                                                                                                                                                        ; wide_delay_line                                      ; work         ;
;       |wide_delay_line:audf1_delay|                                                                           ; 0 (0)               ; 8 (8)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:3:pokeyx|wide_delay_line:audf1_delay                                                                                                                                                                                                        ; wide_delay_line                                      ; work         ;
;       |wide_delay_line:audf2_delay|                                                                           ; 0 (0)               ; 8 (8)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:3:pokeyx|wide_delay_line:audf2_delay                                                                                                                                                                                                        ; wide_delay_line                                      ; work         ;
;       |wide_delay_line:audf3_delay|                                                                           ; 0 (0)               ; 8 (8)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:\POKEY_ON:3:pokeyx|wide_delay_line:audf3_delay                                                                                                                                                                                                        ; wide_delay_line                                      ; work         ;
;    |pokey:pokey1|                                                                                             ; 411 (234)           ; 448 (269)                 ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:pokey1                                                                                                                                                                                                                                                ; pokey                                                ; work         ;
;       |complete_address_decoder:decode_addr1|                                                                 ; 3 (3)               ; 0 (0)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:pokey1|complete_address_decoder:decode_addr1                                                                                                                                                                                                          ; complete_address_decoder                             ; work         ;
;       |delay_line:serin_clock_delay|                                                                          ; 6 (6)               ; 5 (5)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:pokey1|delay_line:serin_clock_delay                                                                                                                                                                                                                   ; delay_line                                           ; work         ;
;       |delay_line:serout_clock_delay|                                                                         ; 6 (6)               ; 2 (2)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:pokey1|delay_line:serout_clock_delay                                                                                                                                                                                                                  ; delay_line                                           ; work         ;
;       |latch_delay_line:stimer_delay|                                                                         ; 2 (2)               ; 4 (4)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:pokey1|latch_delay_line:stimer_delay                                                                                                                                                                                                                  ; latch_delay_line                                     ; work         ;
;       |latch_delay_line:twotone_del|                                                                          ; 0 (0)               ; 2 (2)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:pokey1|latch_delay_line:twotone_del                                                                                                                                                                                                                   ; latch_delay_line                                     ; work         ;
;       |pokey_countdown_timer:timer0|                                                                          ; 15 (9)              ; 11 (8)                    ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:pokey1|pokey_countdown_timer:timer0                                                                                                                                                                                                                   ; pokey_countdown_timer                                ; work         ;
;          |delay_line:underflow0_delay|                                                                        ; 6 (6)               ; 3 (3)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:pokey1|pokey_countdown_timer:timer0|delay_line:underflow0_delay                                                                                                                                                                                       ; delay_line                                           ; work         ;
;       |pokey_countdown_timer:timer1|                                                                          ; 14 (9)              ; 11 (8)                    ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:pokey1|pokey_countdown_timer:timer1                                                                                                                                                                                                                   ; pokey_countdown_timer                                ; work         ;
;          |delay_line:underflow0_delay|                                                                        ; 5 (5)               ; 3 (3)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:pokey1|pokey_countdown_timer:timer1|delay_line:underflow0_delay                                                                                                                                                                                       ; delay_line                                           ; work         ;
;       |pokey_countdown_timer:timer2|                                                                          ; 14 (9)              ; 11 (8)                    ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:pokey1|pokey_countdown_timer:timer2                                                                                                                                                                                                                   ; pokey_countdown_timer                                ; work         ;
;          |delay_line:underflow0_delay|                                                                        ; 5 (5)               ; 3 (3)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:pokey1|pokey_countdown_timer:timer2|delay_line:underflow0_delay                                                                                                                                                                                       ; delay_line                                           ; work         ;
;       |pokey_countdown_timer:timer3|                                                                          ; 16 (9)              ; 11 (8)                    ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:pokey1|pokey_countdown_timer:timer3                                                                                                                                                                                                                   ; pokey_countdown_timer                                ; work         ;
;          |delay_line:underflow0_delay|                                                                        ; 7 (7)               ; 3 (3)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:pokey1|pokey_countdown_timer:timer3|delay_line:underflow0_delay                                                                                                                                                                                       ; delay_line                                           ; work         ;
;       |pokey_keyboard_scanner:\gen_custom_scan:pokey_keyboard_scanner1|                                       ; 40 (40)             ; 28 (28)                   ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:pokey1|pokey_keyboard_scanner:\gen_custom_scan:pokey_keyboard_scanner1                                                                                                                                                                                ; pokey_keyboard_scanner                               ; work         ;
;       |pokey_noise_filter:pokey_noise_filter0|                                                                ; 4 (4)               ; 1 (1)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:pokey1|pokey_noise_filter:pokey_noise_filter0                                                                                                                                                                                                         ; pokey_noise_filter                                   ; work         ;
;       |pokey_noise_filter:pokey_noise_filter1|                                                                ; 4 (4)               ; 1 (1)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:pokey1|pokey_noise_filter:pokey_noise_filter1                                                                                                                                                                                                         ; pokey_noise_filter                                   ; work         ;
;       |pokey_noise_filter:pokey_noise_filter2|                                                                ; 4 (4)               ; 1 (1)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:pokey1|pokey_noise_filter:pokey_noise_filter2                                                                                                                                                                                                         ; pokey_noise_filter                                   ; work         ;
;       |pokey_noise_filter:pokey_noise_filter3|                                                                ; 4 (4)               ; 1 (1)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:pokey1|pokey_noise_filter:pokey_noise_filter3                                                                                                                                                                                                         ; pokey_noise_filter                                   ; work         ;
;       |pokey_poly_17_9:poly_17_19_lfsr|                                                                       ; 18 (18)             ; 18 (18)                   ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr                                                                                                                                                                                                                ; pokey_poly_17_9                                      ; work         ;
;       |pokey_poly_4:poly_4_lfsr|                                                                              ; 4 (4)               ; 4 (4)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:pokey1|pokey_poly_4:poly_4_lfsr                                                                                                                                                                                                                       ; pokey_poly_4                                         ; work         ;
;       |pokey_poly_5:poly_5_lfsr|                                                                              ; 5 (5)               ; 5 (5)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:pokey1|pokey_poly_5:poly_5_lfsr                                                                                                                                                                                                                       ; pokey_poly_5                                         ; work         ;
;       |synchronizer:sio_clk1_synchronizer|                                                                    ; 0 (0)               ; 3 (3)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:pokey1|synchronizer:sio_clk1_synchronizer                                                                                                                                                                                                             ; synchronizer                                         ; work         ;
;       |synchronizer:sio_in1_synchronizer|                                                                     ; 0 (0)               ; 3 (3)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:pokey1|synchronizer:sio_in1_synchronizer                                                                                                                                                                                                              ; synchronizer                                         ; work         ;
;       |synchronizer:sio_in2_synchronizer|                                                                     ; 0 (0)               ; 3 (3)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:pokey1|synchronizer:sio_in2_synchronizer                                                                                                                                                                                                              ; synchronizer                                         ; work         ;
;       |syncreset_enable_divider:enable_15_div|                                                                ; 10 (10)             ; 8 (8)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:pokey1|syncreset_enable_divider:enable_15_div                                                                                                                                                                                                         ; syncreset_enable_divider                             ; work         ;
;       |syncreset_enable_divider:enable_64_div|                                                                ; 8 (8)               ; 6 (6)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:pokey1|syncreset_enable_divider:enable_64_div                                                                                                                                                                                                         ; syncreset_enable_divider                             ; work         ;
;       |wide_delay_line:audctl_delay|                                                                          ; 0 (0)               ; 8 (8)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:pokey1|wide_delay_line:audctl_delay                                                                                                                                                                                                                   ; wide_delay_line                                      ; work         ;
;       |wide_delay_line:audf0_delay|                                                                           ; 0 (0)               ; 8 (8)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:pokey1|wide_delay_line:audf0_delay                                                                                                                                                                                                                    ; wide_delay_line                                      ; work         ;
;       |wide_delay_line:audf1_delay|                                                                           ; 0 (0)               ; 8 (8)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:pokey1|wide_delay_line:audf1_delay                                                                                                                                                                                                                    ; wide_delay_line                                      ; work         ;
;       |wide_delay_line:audf2_delay|                                                                           ; 0 (0)               ; 8 (8)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:pokey1|wide_delay_line:audf2_delay                                                                                                                                                                                                                    ; wide_delay_line                                      ; work         ;
;       |wide_delay_line:audf3_delay|                                                                           ; 0 (0)               ; 8 (8)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey:pokey1|wide_delay_line:audf3_delay                                                                                                                                                                                                                    ; wide_delay_line                                      ; work         ;
;    |pokey_mixer_mux:pokey_mixer_both|                                                                         ; 42 (42)             ; 95 (95)                   ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|pokey_mixer_mux:pokey_mixer_both                                                                                                                                                                                                                            ; pokey_mixer_mux                                      ; work         ;
;    |ps2_to_atari800:\ps2_on:keyboard_map1|                                                                    ; 243 (167)           ; 132 (65)                  ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|ps2_to_atari800:\ps2_on:keyboard_map1                                                                                                                                                                                                                       ; ps2_to_atari800                                      ; work         ;
;       |ps2_keyboard:\gen_ps2_on:keyboard1|                                                                    ; 76 (65)             ; 67 (52)                   ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|ps2_to_atari800:\ps2_on:keyboard_map1|ps2_keyboard:\gen_ps2_on:keyboard1                                                                                                                                                                                    ; ps2_keyboard                                         ; work         ;
;          |enable_divider:enable_div|                                                                          ; 11 (11)             ; 9 (9)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|ps2_to_atari800:\ps2_on:keyboard_map1|ps2_keyboard:\gen_ps2_on:keyboard1|enable_divider:enable_div                                                                                                                                                          ; enable_divider                                       ; work         ;
;          |synchronizer:sync_clk|                                                                              ; 0 (0)               ; 3 (3)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|ps2_to_atari800:\ps2_on:keyboard_map1|ps2_keyboard:\gen_ps2_on:keyboard1|synchronizer:sync_clk                                                                                                                                                              ; synchronizer                                         ; work         ;
;          |synchronizer:sync_dat|                                                                              ; 0 (0)               ; 3 (3)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|ps2_to_atari800:\ps2_on:keyboard_map1|ps2_keyboard:\gen_ps2_on:keyboard1|synchronizer:sync_dat                                                                                                                                                              ; synchronizer                                         ; work         ;
;    |sample_top:\sample_on:sample1|                                                                            ; 863 (314)           ; 591 (292)                 ; 0           ; 0          ; 10           ; 0       ; 5         ; 0    ; 0            ; 0          ; |pokeymax|sample_top:\sample_on:sample1                                                                                                                                                                                                                               ; sample_top                                           ; work         ;
;       |complete_address_decoder:decode_addr2|                                                                 ; 4 (4)               ; 0 (0)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|sample_top:\sample_on:sample1|complete_address_decoder:decode_addr2                                                                                                                                                                                         ; complete_address_decoder                             ; work         ;
;       |lpm_mult:Mult0|                                                                                        ; 0 (0)               ; 0 (0)                     ; 0           ; 0          ; 2            ; 0       ; 1         ; 0    ; 0            ; 0          ; |pokeymax|sample_top:\sample_on:sample1|lpm_mult:Mult0                                                                                                                                                                                                                ; lpm_mult                                             ; work         ;
;          |mult_4fs:auto_generated|                                                                            ; 0 (0)               ; 0 (0)                     ; 0           ; 0          ; 2            ; 0       ; 1         ; 0    ; 0            ; 0          ; |pokeymax|sample_top:\sample_on:sample1|lpm_mult:Mult0|mult_4fs:auto_generated                                                                                                                                                                                        ; mult_4fs                                             ; work         ;
;       |lpm_mult:Mult1|                                                                                        ; 0 (0)               ; 0 (0)                     ; 0           ; 0          ; 2            ; 0       ; 1         ; 0    ; 0            ; 0          ; |pokeymax|sample_top:\sample_on:sample1|lpm_mult:Mult1                                                                                                                                                                                                                ; lpm_mult                                             ; work         ;
;          |mult_4fs:auto_generated|                                                                            ; 0 (0)               ; 0 (0)                     ; 0           ; 0          ; 2            ; 0       ; 1         ; 0    ; 0            ; 0          ; |pokeymax|sample_top:\sample_on:sample1|lpm_mult:Mult1|mult_4fs:auto_generated                                                                                                                                                                                        ; mult_4fs                                             ; work         ;
;       |lpm_mult:Mult2|                                                                                        ; 0 (0)               ; 0 (0)                     ; 0           ; 0          ; 2            ; 0       ; 1         ; 0    ; 0            ; 0          ; |pokeymax|sample_top:\sample_on:sample1|lpm_mult:Mult2                                                                                                                                                                                                                ; lpm_mult                                             ; work         ;
;          |mult_4fs:auto_generated|                                                                            ; 0 (0)               ; 0 (0)                     ; 0           ; 0          ; 2            ; 0       ; 1         ; 0    ; 0            ; 0          ; |pokeymax|sample_top:\sample_on:sample1|lpm_mult:Mult2|mult_4fs:auto_generated                                                                                                                                                                                        ; mult_4fs                                             ; work         ;
;       |lpm_mult:Mult3|                                                                                        ; 0 (0)               ; 0 (0)                     ; 0           ; 0          ; 2            ; 0       ; 1         ; 0    ; 0            ; 0          ; |pokeymax|sample_top:\sample_on:sample1|lpm_mult:Mult3                                                                                                                                                                                                                ; lpm_mult                                             ; work         ;
;          |mult_4fs:auto_generated|                                                                            ; 0 (0)               ; 0 (0)                     ; 0           ; 0          ; 2            ; 0       ; 1         ; 0    ; 0            ; 0          ; |pokeymax|sample_top:\sample_on:sample1|lpm_mult:Mult3|mult_4fs:auto_generated                                                                                                                                                                                        ; mult_4fs                                             ; work         ;
;       |sample_adpcm:adpcm_decoder|                                                                            ; 171 (171)           ; 107 (107)                 ; 0           ; 0          ; 2            ; 0       ; 1         ; 0    ; 0            ; 0          ; |pokeymax|sample_top:\sample_on:sample1|sample_adpcm:adpcm_decoder                                                                                                                                                                                                    ; sample_adpcm                                         ; work         ;
;          |lpm_mult:Mult0|                                                                                     ; 0 (0)               ; 0 (0)                     ; 0           ; 0          ; 2            ; 0       ; 1         ; 0    ; 0            ; 0          ; |pokeymax|sample_top:\sample_on:sample1|sample_adpcm:adpcm_decoder|lpm_mult:Mult0                                                                                                                                                                                     ; lpm_mult                                             ; work         ;
;             |mult_5fs:auto_generated|                                                                         ; 0 (0)               ; 0 (0)                     ; 0           ; 0          ; 2            ; 0       ; 1         ; 0    ; 0            ; 0          ; |pokeymax|sample_top:\sample_on:sample1|sample_adpcm:adpcm_decoder|lpm_mult:Mult0|mult_5fs:auto_generated                                                                                                                                                             ; mult_5fs                                             ; work         ;
;       |sample_channel:ch0_inst|                                                                               ; 93 (93)             ; 48 (48)                   ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|sample_top:\sample_on:sample1|sample_channel:ch0_inst                                                                                                                                                                                                       ; sample_channel                                       ; work         ;
;       |sample_channel:ch1_inst|                                                                               ; 94 (94)             ; 48 (48)                   ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|sample_top:\sample_on:sample1|sample_channel:ch1_inst                                                                                                                                                                                                       ; sample_channel                                       ; work         ;
;       |sample_channel:ch2_inst|                                                                               ; 94 (94)             ; 48 (48)                   ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|sample_top:\sample_on:sample1|sample_channel:ch2_inst                                                                                                                                                                                                       ; sample_channel                                       ; work         ;
;       |sample_channel:ch3_inst|                                                                               ; 93 (93)             ; 48 (48)                   ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|sample_top:\sample_on:sample1|sample_channel:ch3_inst                                                                                                                                                                                                       ; sample_channel                                       ; work         ;
;    |simple_low_pass_filter:\spdif_on:filter_left|                                                             ; 83 (83)             ; 42 (42)                   ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|simple_low_pass_filter:\spdif_on:filter_left                                                                                                                                                                                                                ; simple_low_pass_filter                               ; work         ;
;    |simple_low_pass_filter:\spdif_on:filter_right|                                                            ; 83 (83)             ; 42 (42)                   ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|simple_low_pass_filter:\spdif_on:filter_right                                                                                                                                                                                                               ; simple_low_pass_filter                               ; work         ;
;    |slave_timing_6502:bus_adapt|                                                                              ; 13 (13)             ; 44 (41)                   ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|slave_timing_6502:bus_adapt                                                                                                                                                                                                                                 ; slave_timing_6502                                    ; work         ;
;       |synchronizer:synchronizer_phi|                                                                         ; 0 (0)               ; 3 (3)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|slave_timing_6502:bus_adapt|synchronizer:synchronizer_phi                                                                                                                                                                                                   ; synchronizer                                         ; work         ;
;    |spdif_transmitter:\spdif_on:spdif|                                                                        ; 89 (89)             ; 59 (59)                   ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|spdif_transmitter:\spdif_on:spdif                                                                                                                                                                                                                           ; spdif_transmitter                                    ; work         ;
;    |stereo_detect:\auto_stereo:a4|                                                                            ; 4 (4)               ; 6 (3)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|stereo_detect:\auto_stereo:a4                                                                                                                                                                                                                               ; stereo_detect                                        ; work         ;
;       |synchronizer:synchronizer_4|                                                                           ; 0 (0)               ; 3 (3)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|stereo_detect:\auto_stereo:a4|synchronizer:synchronizer_4                                                                                                                                                                                                   ; synchronizer                                         ; work         ;
;    |synchronizer:synchronizer_gtia_audio|                                                                     ; 0 (0)               ; 3 (3)                     ; 0           ; 0          ; 0            ; 0       ; 0         ; 0    ; 0            ; 0          ; |pokeymax|synchronizer:synchronizer_gtia_audio                                                                                                                                                                                                                        ; synchronizer                                         ; work         ;
+---------------------------------------------------------------------------------------------------------------+---------------------+---------------------------+-------------+------------+--------------+---------+-----------+------+--------------+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------+--------------+
Note: For table entries with two numbers listed, the numbers in parentheses indicate the number of resources of the given type used by the specific entity alone. The numbers listed outside of parentheses indicate the total resources of the given type used by the specific entity and all of its sub-entities in the hierarchy.


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis RAM Summary                                                                                                                                                                                                                                            ;
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+------+------+
; Name                                                                                                                                                                    ; Type ; Mode             ; Port A Depth ; Port A Width ; Port B Depth ; Port B Width ; Size ; MIF  ;
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+------+------+
; SID_top:\sid_on:sid2|SID_envelope:envelope_a|altshift_taps:attack_del1_reg_rtl_0|shift_taps_jgm:auto_generated|altsyncram_rj51:altsyncram4|ALTSYNCRAM                   ; AUTO ; Simple Dual Port ; 3            ; 72           ; 3            ; 72           ; 216  ; None ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:0:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated|ALTSYNCRAM  ; AUTO ; Single Port      ; 1024         ; 9            ; --           ; --           ; 9216 ; None ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:10:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated|ALTSYNCRAM ; AUTO ; Single Port      ; 1024         ; 9            ; --           ; --           ; 9216 ; None ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:11:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated|ALTSYNCRAM ; AUTO ; Single Port      ; 1024         ; 9            ; --           ; --           ; 9216 ; None ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:12:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated|ALTSYNCRAM ; AUTO ; Single Port      ; 1024         ; 9            ; --           ; --           ; 9216 ; None ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:13:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated|ALTSYNCRAM ; AUTO ; Single Port      ; 1024         ; 9            ; --           ; --           ; 9216 ; None ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:14:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated|ALTSYNCRAM ; AUTO ; Single Port      ; 1024         ; 9            ; --           ; --           ; 9216 ; None ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:15:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated|ALTSYNCRAM ; AUTO ; Single Port      ; 1024         ; 9            ; --           ; --           ; 9216 ; None ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:16:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated|ALTSYNCRAM ; AUTO ; Single Port      ; 1024         ; 9            ; --           ; --           ; 9216 ; None ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:17:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated|ALTSYNCRAM ; AUTO ; Single Port      ; 1024         ; 9            ; --           ; --           ; 9216 ; None ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:18:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated|ALTSYNCRAM ; AUTO ; Single Port      ; 1024         ; 9            ; --           ; --           ; 9216 ; None ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:19:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated|ALTSYNCRAM ; AUTO ; Single Port      ; 1024         ; 9            ; --           ; --           ; 9216 ; None ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:1:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated|ALTSYNCRAM  ; AUTO ; Single Port      ; 1024         ; 9            ; --           ; --           ; 9216 ; None ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:20:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated|ALTSYNCRAM ; AUTO ; Single Port      ; 1024         ; 9            ; --           ; --           ; 9216 ; None ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:21:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated|ALTSYNCRAM ; AUTO ; Single Port      ; 1024         ; 9            ; --           ; --           ; 9216 ; None ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:22:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated|ALTSYNCRAM ; AUTO ; Single Port      ; 1024         ; 9            ; --           ; --           ; 9216 ; None ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:23:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated|ALTSYNCRAM ; AUTO ; Single Port      ; 1024         ; 9            ; --           ; --           ; 9216 ; None ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:24:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated|ALTSYNCRAM ; AUTO ; Single Port      ; 1024         ; 9            ; --           ; --           ; 9216 ; None ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:25:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated|ALTSYNCRAM ; AUTO ; Single Port      ; 1024         ; 9            ; --           ; --           ; 9216 ; None ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:26:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated|ALTSYNCRAM ; AUTO ; Single Port      ; 1024         ; 9            ; --           ; --           ; 9216 ; None ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:27:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated|ALTSYNCRAM ; AUTO ; Single Port      ; 1024         ; 9            ; --           ; --           ; 9216 ; None ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:28:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated|ALTSYNCRAM ; AUTO ; Single Port      ; 1024         ; 9            ; --           ; --           ; 9216 ; None ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:29:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated|ALTSYNCRAM ; AUTO ; Single Port      ; 1024         ; 9            ; --           ; --           ; 9216 ; None ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:2:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated|ALTSYNCRAM  ; AUTO ; Single Port      ; 1024         ; 9            ; --           ; --           ; 9216 ; None ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:30:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated|ALTSYNCRAM ; AUTO ; Single Port      ; 1024         ; 9            ; --           ; --           ; 9216 ; None ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:31:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated|ALTSYNCRAM ; AUTO ; Single Port      ; 1024         ; 9            ; --           ; --           ; 9216 ; None ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:32:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated|ALTSYNCRAM ; AUTO ; Single Port      ; 1024         ; 9            ; --           ; --           ; 9216 ; None ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:33:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated|ALTSYNCRAM ; AUTO ; Single Port      ; 1024         ; 9            ; --           ; --           ; 9216 ; None ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:34:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated|ALTSYNCRAM ; AUTO ; Single Port      ; 1024         ; 9            ; --           ; --           ; 9216 ; None ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:35:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated|ALTSYNCRAM ; AUTO ; Single Port      ; 1024         ; 9            ; --           ; --           ; 9216 ; None ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:36:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated|ALTSYNCRAM ; AUTO ; Single Port      ; 1024         ; 9            ; --           ; --           ; 9216 ; None ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:37:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated|ALTSYNCRAM ; AUTO ; Single Port      ; 1024         ; 9            ; --           ; --           ; 9216 ; None ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:38:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated|ALTSYNCRAM ; AUTO ; Single Port      ; 1024         ; 9            ; --           ; --           ; 9216 ; None ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:39:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated|ALTSYNCRAM ; AUTO ; Single Port      ; 1024         ; 9            ; --           ; --           ; 9216 ; None ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:3:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated|ALTSYNCRAM  ; AUTO ; Single Port      ; 1024         ; 9            ; --           ; --           ; 9216 ; None ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:40:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated|ALTSYNCRAM ; AUTO ; Single Port      ; 1024         ; 9            ; --           ; --           ; 9216 ; None ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:41:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated|ALTSYNCRAM ; AUTO ; Single Port      ; 1024         ; 9            ; --           ; --           ; 9216 ; None ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:42:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated|ALTSYNCRAM ; AUTO ; Single Port      ; 1024         ; 9            ; --           ; --           ; 9216 ; None ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:43:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated|ALTSYNCRAM ; AUTO ; Single Port      ; 1024         ; 9            ; --           ; --           ; 9216 ; None ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:44:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated|ALTSYNCRAM ; AUTO ; Single Port      ; 1024         ; 9            ; --           ; --           ; 9216 ; None ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:45:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated|ALTSYNCRAM ; AUTO ; Single Port      ; 1024         ; 9            ; --           ; --           ; 9216 ; None ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:46:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated|ALTSYNCRAM ; AUTO ; Single Port      ; 1024         ; 9            ; --           ; --           ; 9216 ; None ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:47:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated|ALTSYNCRAM ; AUTO ; Single Port      ; 1024         ; 9            ; --           ; --           ; 9216 ; None ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:48:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated|ALTSYNCRAM ; AUTO ; Single Port      ; 1024         ; 9            ; --           ; --           ; 9216 ; None ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:49:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated|ALTSYNCRAM ; AUTO ; Single Port      ; 1024         ; 9            ; --           ; --           ; 9216 ; None ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:4:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated|ALTSYNCRAM  ; AUTO ; Single Port      ; 1024         ; 9            ; --           ; --           ; 9216 ; None ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:50:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated|ALTSYNCRAM ; AUTO ; Single Port      ; 1024         ; 9            ; --           ; --           ; 9216 ; None ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:51:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated|ALTSYNCRAM ; AUTO ; Single Port      ; 1024         ; 9            ; --           ; --           ; 9216 ; None ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:52:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated|ALTSYNCRAM ; AUTO ; Single Port      ; 1024         ; 9            ; --           ; --           ; 9216 ; None ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:53:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated|ALTSYNCRAM ; AUTO ; Single Port      ; 1024         ; 9            ; --           ; --           ; 9216 ; None ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:54:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated|ALTSYNCRAM ; AUTO ; Single Port      ; 1024         ; 9            ; --           ; --           ; 9216 ; None ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:55:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated|ALTSYNCRAM ; AUTO ; Single Port      ; 1024         ; 9            ; --           ; --           ; 9216 ; None ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:56:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated|ALTSYNCRAM ; AUTO ; Single Port      ; 1024         ; 9            ; --           ; --           ; 9216 ; None ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:5:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated|ALTSYNCRAM  ; AUTO ; Single Port      ; 1024         ; 9            ; --           ; --           ; 9216 ; None ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:6:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated|ALTSYNCRAM  ; AUTO ; Single Port      ; 1024         ; 9            ; --           ; --           ; 9216 ; None ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:7:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated|ALTSYNCRAM  ; AUTO ; Single Port      ; 1024         ; 9            ; --           ; --           ; 9216 ; None ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:8:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated|ALTSYNCRAM  ; AUTO ; Single Port      ; 1024         ; 9            ; --           ; --           ; 9216 ; None ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:9:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated|ALTSYNCRAM  ; AUTO ; Single Port      ; 1024         ; 9            ; --           ; --           ; 9216 ; None ;
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+------+------+


+-----------------------------------------------------+
; Analysis & Synthesis DSP Block Usage Summary        ;
+---------------------------------------+-------------+
; Statistic                             ; Number Used ;
+---------------------------------------+-------------+
; Simple Multipliers (9-bit)            ; 1           ;
; Simple Multipliers (18-bit)           ; 22          ;
; Embedded Multiplier Blocks            ; --          ;
; Embedded Multiplier 9-bit elements    ; 45          ;
; Signed Embedded Multipliers           ; 15          ;
; Unsigned Embedded Multipliers         ; 2           ;
; Mixed Sign Embedded Multipliers       ; 6           ;
; Variable Sign Embedded Multipliers    ; 0           ;
; Dedicated Input Shift Register Chains ; 0           ;
+---------------------------------------+-------------+
Note: number of Embedded Multiplier Blocks used is only available after a successful fit.


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis IP Cores Summary                                                                                                                                                                                                                   ;
+--------+---------------------+---------+--------------+--------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------+
; Vendor ; IP Core Name        ; Version ; Release Date ; License Type ; Entity Instance                                                                                                                                                ; IP Include File ;
+--------+---------------------+---------+--------------+--------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------+
; N/A    ; altera_onchip_flash ; 23.1    ; N/A          ; N/A          ; |pokeymax|flash_controller:\flash_on:flash_controller_inst|flash:flash1                                                                                        ; flash.qsys      ;
; Altera ; 6AF7_FFFF           ; N/A     ; N/A          ; Licensed     ; |pokeymax|flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_block:altera_onchip_flash_block ;                 ;
; N/A    ; altera_int_osc      ; 23.1    ; N/A          ; N/A          ; |pokeymax|int_osc:oscillator                                                                                                                                   ; int_osc.qsys    ;
+--------+---------------------+---------+--------------+--------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------+


Encoding Type:  One-Hot
+--------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |pokeymax|i2c_master:\iox_on:i2c_master0|state                                                                                   ;
+----------------+------------+----------------+----------------+----------+----------+----------------+---------------+-------------+-------------+
; Name           ; state.stop ; state.mstr_ack ; state.slv_ack2 ; state.rd ; state.wr ; state.slv_ack1 ; state.command ; state.start ; state.ready ;
+----------------+------------+----------------+----------------+----------+----------+----------------+---------------+-------------+-------------+
; state.ready    ; 0          ; 0              ; 0              ; 0        ; 0        ; 0              ; 0             ; 0           ; 0           ;
; state.start    ; 0          ; 0              ; 0              ; 0        ; 0        ; 0              ; 0             ; 1           ; 1           ;
; state.command  ; 0          ; 0              ; 0              ; 0        ; 0        ; 0              ; 1             ; 0           ; 1           ;
; state.slv_ack1 ; 0          ; 0              ; 0              ; 0        ; 0        ; 1              ; 0             ; 0           ; 1           ;
; state.wr       ; 0          ; 0              ; 0              ; 0        ; 1        ; 0              ; 0             ; 0           ; 1           ;
; state.rd       ; 0          ; 0              ; 0              ; 1        ; 0        ; 0              ; 0             ; 0           ; 1           ;
; state.slv_ack2 ; 0          ; 0              ; 1              ; 0        ; 0        ; 0              ; 0             ; 0           ; 1           ;
; state.mstr_ack ; 0          ; 1              ; 0              ; 0        ; 0        ; 0              ; 0             ; 0           ; 1           ;
; state.stop     ; 1          ; 0              ; 0              ; 0        ; 0        ; 0              ; 0             ; 0           ; 1           ;
+----------------+------------+----------------+----------------+----------+----------+----------------+---------------+-------------+-------------+


Encoding Type:  One-Hot
+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |pokeymax|flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|avmm_read_valid_state ;
+----------------------------------------------+---------------------------------------+----------------------------------------------+--------------------------------------------------------------------------+
; Name                                         ; avmm_read_valid_state.READ_VALID_IDLE ; avmm_read_valid_state.READ_VALID_PRE_READING ; avmm_read_valid_state.READ_VALID_READING                                 ;
+----------------------------------------------+---------------------------------------+----------------------------------------------+--------------------------------------------------------------------------+
; avmm_read_valid_state.READ_VALID_IDLE        ; 0                                     ; 0                                            ; 0                                                                        ;
; avmm_read_valid_state.READ_VALID_READING     ; 1                                     ; 0                                            ; 1                                                                        ;
; avmm_read_valid_state.READ_VALID_PRE_READING ; 1                                     ; 1                                            ; 0                                                                        ;
+----------------------------------------------+---------------------------------------+----------------------------------------------+--------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |pokeymax|flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|read_state                                                                             ;
+--------------------------------+--------------------------------+-----------------------------+-----------------------------+-----------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+
; Name                           ; read_state.READ_STATE_PULSE_SE ; read_state.READ_STATE_CLEAR ; read_state.READ_STATE_FINAL ; read_state.READ_STATE_READY ; read_state.READ_STATE_DUMMY ; read_state.READ_STATE_SETUP ; read_state.READ_STATE_ADDR ; read_state.READ_STATE_IDLE ;
+--------------------------------+--------------------------------+-----------------------------+-----------------------------+-----------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+
; read_state.READ_STATE_IDLE     ; 0                              ; 0                           ; 0                           ; 0                           ; 0                           ; 0                           ; 0                          ; 0                          ;
; read_state.READ_STATE_ADDR     ; 0                              ; 0                           ; 0                           ; 0                           ; 0                           ; 0                           ; 1                          ; 1                          ;
; read_state.READ_STATE_SETUP    ; 0                              ; 0                           ; 0                           ; 0                           ; 0                           ; 1                           ; 0                          ; 1                          ;
; read_state.READ_STATE_DUMMY    ; 0                              ; 0                           ; 0                           ; 0                           ; 1                           ; 0                           ; 0                          ; 1                          ;
; read_state.READ_STATE_READY    ; 0                              ; 0                           ; 0                           ; 1                           ; 0                           ; 0                           ; 0                          ; 1                          ;
; read_state.READ_STATE_FINAL    ; 0                              ; 0                           ; 1                           ; 0                           ; 0                           ; 0                           ; 0                          ; 1                          ;
; read_state.READ_STATE_CLEAR    ; 0                              ; 1                           ; 0                           ; 0                           ; 0                           ; 0                           ; 0                          ; 1                          ;
; read_state.READ_STATE_PULSE_SE ; 1                              ; 0                           ; 0                           ; 0                           ; 0                           ; 0                           ; 0                          ; 1                          ;
+--------------------------------+--------------------------------+-----------------------------+-----------------------------+-----------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+


Encoding Type:  One-Hot
+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |pokeymax|flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|erase_state                                    ;
+-----------------------------------+-------------------------------+-------------------------------+-----------------------------------+-----------------------------------+------------------------------+------------------------------+
; Name                              ; erase_state.ERASE_STATE_ERROR ; erase_state.ERASE_STATE_RESET ; erase_state.ERASE_STATE_WAIT_DONE ; erase_state.ERASE_STATE_WAIT_BUSY ; erase_state.ERASE_STATE_ADDR ; erase_state.ERASE_STATE_IDLE ;
+-----------------------------------+-------------------------------+-------------------------------+-----------------------------------+-----------------------------------+------------------------------+------------------------------+
; erase_state.ERASE_STATE_IDLE      ; 0                             ; 0                             ; 0                                 ; 0                                 ; 0                            ; 0                            ;
; erase_state.ERASE_STATE_ADDR      ; 0                             ; 0                             ; 0                                 ; 0                                 ; 1                            ; 1                            ;
; erase_state.ERASE_STATE_WAIT_BUSY ; 0                             ; 0                             ; 0                                 ; 1                                 ; 0                            ; 1                            ;
; erase_state.ERASE_STATE_WAIT_DONE ; 0                             ; 0                             ; 1                                 ; 0                                 ; 0                            ; 1                            ;
; erase_state.ERASE_STATE_RESET     ; 0                             ; 1                             ; 0                                 ; 0                                 ; 0                            ; 1                            ;
; erase_state.ERASE_STATE_ERROR     ; 1                             ; 0                             ; 0                                 ; 0                                 ; 0                            ; 1                            ;
+-----------------------------------+-------------------------------+-------------------------------+-----------------------------------+-----------------------------------+------------------------------+------------------------------+


Encoding Type:  One-Hot
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |pokeymax|flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|write_state                                                                    ;
+-----------------------------------+-------------------------------+-------------------------------+-----------------------------------+-----------------------------------+-------------------------------+------------------------------+------------------------------+
; Name                              ; write_state.WRITE_STATE_ERROR ; write_state.WRITE_STATE_RESET ; write_state.WRITE_STATE_WAIT_DONE ; write_state.WRITE_STATE_WAIT_BUSY ; write_state.WRITE_STATE_WRITE ; write_state.WRITE_STATE_ADDR ; write_state.WRITE_STATE_IDLE ;
+-----------------------------------+-------------------------------+-------------------------------+-----------------------------------+-----------------------------------+-------------------------------+------------------------------+------------------------------+
; write_state.WRITE_STATE_IDLE      ; 0                             ; 0                             ; 0                                 ; 0                                 ; 0                             ; 0                            ; 0                            ;
; write_state.WRITE_STATE_ADDR      ; 0                             ; 0                             ; 0                                 ; 0                                 ; 0                             ; 1                            ; 1                            ;
; write_state.WRITE_STATE_WRITE     ; 0                             ; 0                             ; 0                                 ; 0                                 ; 1                             ; 0                            ; 1                            ;
; write_state.WRITE_STATE_WAIT_BUSY ; 0                             ; 0                             ; 0                                 ; 1                                 ; 0                             ; 0                            ; 1                            ;
; write_state.WRITE_STATE_WAIT_DONE ; 0                             ; 0                             ; 1                                 ; 0                                 ; 0                             ; 0                            ; 1                            ;
; write_state.WRITE_STATE_RESET     ; 0                             ; 1                             ; 0                                 ; 0                                 ; 0                             ; 0                            ; 1                            ;
; write_state.WRITE_STATE_ERROR     ; 1                             ; 0                             ; 0                                 ; 0                                 ; 0                             ; 0                            ; 1                            ;
+-----------------------------------+-------------------------------+-------------------------------+-----------------------------------+-----------------------------------+-------------------------------+------------------------------+------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Registers Protected by Synthesis                                                                                                                                                                                                                                                                                                  ;
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------+--------------------------------------------+
; Register Name                                                                                                                                                                                                     ; Protected by Synthesis Attribute or Preserve Register Assignment ; Not to be Touched by Netlist Optimizations ;
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------+--------------------------------------------+
; flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|altera_std_synchronizer:stdsync_busy_clear|dreg[0] ; yes                                                              ; yes                                        ;
; flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|altera_std_synchronizer:stdsync_busy|dreg[0]       ; yes                                                              ; yes                                        ;
; flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|altera_std_synchronizer:stdsync_busy_clear|din_s1  ; yes                                                              ; yes                                        ;
; flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|altera_std_synchronizer:stdsync_busy|din_s1        ; yes                                                              ; yes                                        ;
; Total number of protected registers is 4                                                                                                                                                                          ;                                                                  ;                                            ;
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------+--------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Registers Removed During Synthesis                                                                                                                                                                                                                                                                                                                                                  ;
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Register name                                                                                                                                                                               ; Reason for Removal                                                                                                                                                                    ;
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; spdif_transmitter:\spdif_on:spdif|data_in_buffer[0..7]                                                                                                                                      ; Stuck at GND due to stuck port data_in                                                                                                                                                ;
; pokey:\POKEY_ON:3:pokeyx|irqst_reg[6,7]                                                                                                                                                     ; Stuck at VCC due to stuck port data_in                                                                                                                                                ;
; pokey:\POKEY_ON:3:pokeyx|keyboard_overrun_reg                                                                                                                                               ; Stuck at GND due to stuck port data_in                                                                                                                                                ;
; pokey:\POKEY_ON:3:pokeyx|synchronizer:sio_clk1_synchronizer|ff_reg[2]                                                                                                                       ; Stuck at VCC due to stuck port data_in                                                                                                                                                ;
; pokey:\POKEY_ON:3:pokeyx|synchronizer:sio_in1_synchronizer|ff_reg[2]                                                                                                                        ; Stuck at VCC due to stuck port data_in                                                                                                                                                ;
; pokey:\POKEY_ON:2:pokeyx|irqst_reg[6,7]                                                                                                                                                     ; Stuck at VCC due to stuck port data_in                                                                                                                                                ;
; pokey:\POKEY_ON:2:pokeyx|keyboard_overrun_reg                                                                                                                                               ; Stuck at GND due to stuck port data_in                                                                                                                                                ;
; pokey:\POKEY_ON:2:pokeyx|synchronizer:sio_clk1_synchronizer|ff_reg[2]                                                                                                                       ; Stuck at VCC due to stuck port data_in                                                                                                                                                ;
; pokey:\POKEY_ON:2:pokeyx|synchronizer:sio_in1_synchronizer|ff_reg[2]                                                                                                                        ; Stuck at VCC due to stuck port data_in                                                                                                                                                ;
; pokey:\POKEY_ON:1:pokeyx|irqst_reg[6,7]                                                                                                                                                     ; Stuck at VCC due to stuck port data_in                                                                                                                                                ;
; pokey:\POKEY_ON:1:pokeyx|keyboard_overrun_reg                                                                                                                                               ; Stuck at GND due to stuck port data_in                                                                                                                                                ;
; pokey:\POKEY_ON:1:pokeyx|synchronizer:sio_clk1_synchronizer|ff_reg[2]                                                                                                                       ; Stuck at VCC due to stuck port data_in                                                                                                                                                ;
; pokey:\POKEY_ON:1:pokeyx|synchronizer:sio_in1_synchronizer|ff_reg[2]                                                                                                                        ; Stuck at VCC due to stuck port data_in                                                                                                                                                ;
; synchronizer:synchronizer_fancy_enable|ff_reg[2]                                                                                                                                            ; Stuck at VCC due to stuck port data_in                                                                                                                                                ;
; flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|is_sector5_writable_reg      ; Stuck at GND due to stuck port data_in                                                                                                                                                ;
; pokey:\POKEY_ON:3:pokeyx|synchronizer:sio_clk1_synchronizer|ff_reg[1]                                                                                                                       ; Stuck at VCC due to stuck port data_in                                                                                                                                                ;
; pokey:\POKEY_ON:3:pokeyx|synchronizer:sio_in1_synchronizer|ff_reg[1]                                                                                                                        ; Stuck at VCC due to stuck port data_in                                                                                                                                                ;
; pokey:\POKEY_ON:2:pokeyx|synchronizer:sio_clk1_synchronizer|ff_reg[1]                                                                                                                       ; Stuck at VCC due to stuck port data_in                                                                                                                                                ;
; pokey:\POKEY_ON:2:pokeyx|synchronizer:sio_in1_synchronizer|ff_reg[1]                                                                                                                        ; Stuck at VCC due to stuck port data_in                                                                                                                                                ;
; pokey:\POKEY_ON:1:pokeyx|synchronizer:sio_clk1_synchronizer|ff_reg[1]                                                                                                                       ; Stuck at VCC due to stuck port data_in                                                                                                                                                ;
; pokey:\POKEY_ON:1:pokeyx|synchronizer:sio_in1_synchronizer|ff_reg[1]                                                                                                                        ; Stuck at VCC due to stuck port data_in                                                                                                                                                ;
; synchronizer:synchronizer_fancy_enable|ff_reg[1]                                                                                                                                            ; Stuck at VCC due to stuck port data_in                                                                                                                                                ;
; pokey:\POKEY_ON:3:pokeyx|synchronizer:sio_clk1_synchronizer|ff_reg[0]                                                                                                                       ; Stuck at VCC due to stuck port data_in                                                                                                                                                ;
; pokey:\POKEY_ON:3:pokeyx|synchronizer:sio_in1_synchronizer|ff_reg[0]                                                                                                                        ; Stuck at VCC due to stuck port data_in                                                                                                                                                ;
; pokey:\POKEY_ON:2:pokeyx|synchronizer:sio_clk1_synchronizer|ff_reg[0]                                                                                                                       ; Stuck at VCC due to stuck port data_in                                                                                                                                                ;
; pokey:\POKEY_ON:2:pokeyx|synchronizer:sio_in1_synchronizer|ff_reg[0]                                                                                                                        ; Stuck at VCC due to stuck port data_in                                                                                                                                                ;
; pokey:\POKEY_ON:1:pokeyx|synchronizer:sio_clk1_synchronizer|ff_reg[0]                                                                                                                       ; Stuck at VCC due to stuck port data_in                                                                                                                                                ;
; pokey:\POKEY_ON:1:pokeyx|synchronizer:sio_in1_synchronizer|ff_reg[0]                                                                                                                        ; Stuck at VCC due to stuck port data_in                                                                                                                                                ;
; synchronizer:synchronizer_fancy_enable|ff_reg[0]                                                                                                                                            ; Stuck at VCC due to stuck port data_in                                                                                                                                                ;
; pokey:\POKEY_ON:3:pokeyx|synchronizer:sio_in2_synchronizer|ff_reg[2]                                                                                                                        ; Stuck at VCC due to stuck port data_in                                                                                                                                                ;
; pokey:\POKEY_ON:2:pokeyx|synchronizer:sio_in2_synchronizer|ff_reg[2]                                                                                                                        ; Stuck at VCC due to stuck port data_in                                                                                                                                                ;
; pokey:\POKEY_ON:1:pokeyx|synchronizer:sio_in2_synchronizer|ff_reg[2]                                                                                                                        ; Stuck at VCC due to stuck port data_in                                                                                                                                                ;
; pokey:\POKEY_ON:3:pokeyx|synchronizer:sio_in2_synchronizer|ff_reg[1]                                                                                                                        ; Stuck at VCC due to stuck port data_in                                                                                                                                                ;
; pokey:\POKEY_ON:2:pokeyx|synchronizer:sio_in2_synchronizer|ff_reg[1]                                                                                                                        ; Stuck at VCC due to stuck port data_in                                                                                                                                                ;
; pokey:\POKEY_ON:1:pokeyx|synchronizer:sio_in2_synchronizer|ff_reg[1]                                                                                                                        ; Stuck at VCC due to stuck port data_in                                                                                                                                                ;
; pokey:\POKEY_ON:3:pokeyx|synchronizer:sio_in2_synchronizer|ff_reg[0]                                                                                                                        ; Stuck at VCC due to stuck port data_in                                                                                                                                                ;
; pokey:\POKEY_ON:2:pokeyx|synchronizer:sio_in2_synchronizer|ff_reg[0]                                                                                                                        ; Stuck at VCC due to stuck port data_in                                                                                                                                                ;
; pokey:\POKEY_ON:1:pokeyx|synchronizer:sio_in2_synchronizer|ff_reg[0]                                                                                                                        ; Stuck at VCC due to stuck port data_in                                                                                                                                                ;
; pokey:\POKEY_ON:3:pokeyx|irqen_reg[6,7]                                                                                                                                                     ; Lost fanout                                                                                                                                                                           ;
; pokey:\POKEY_ON:2:pokeyx|irqen_reg[6,7]                                                                                                                                                     ; Lost fanout                                                                                                                                                                           ;
; pokey:\POKEY_ON:1:pokeyx|irqen_reg[6,7]                                                                                                                                                     ; Lost fanout                                                                                                                                                                           ;
; flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|avmm_burstcount_input_reg[1] ; Stuck at GND due to stuck port data_in                                                                                                                                                ;
; pokey:\POKEY_ON:1:pokeyx|clock_reg                                                                                                                                                          ; Merged with pokey:\POKEY_ON:2:pokeyx|clock_reg                                                                                                                                        ;
; pokey:\POKEY_ON:2:pokeyx|clock_reg                                                                                                                                                          ; Merged with pokey:\POKEY_ON:3:pokeyx|clock_reg                                                                                                                                        ;
; SID_top:\sid_on:sid2|potread_y_reg                                                                                                                                                          ; Merged with SID_top:\sid_on:sid2|potread_x_reg                                                                                                                                        ;
; SID_top:\sid_on:sid2|SID_filter:variable_state_filter|mult1_reg[49,50]                                                                                                                      ; Merged with SID_top:\sid_on:sid2|SID_filter:variable_state_filter|mult1_reg[51]                                                                                                       ;
; SID_top:\sid_on:sid2|SID_filter:variable_state_filter|mult2_reg[49,50]                                                                                                                      ; Merged with SID_top:\sid_on:sid2|SID_filter:variable_state_filter|mult2_reg[51]                                                                                                       ;
; SID_top:\sid_on:sid1|potread_y_reg                                                                                                                                                          ; Merged with SID_top:\sid_on:sid1|potread_x_reg                                                                                                                                        ;
; SID_top:\sid_on:sid1|SID_filter:variable_state_filter|mult1_reg[49,50]                                                                                                                      ; Merged with SID_top:\sid_on:sid1|SID_filter:variable_state_filter|mult1_reg[51]                                                                                                       ;
; SID_top:\sid_on:sid1|SID_filter:variable_state_filter|mult2_reg[49,50]                                                                                                                      ; Merged with SID_top:\sid_on:sid1|SID_filter:variable_state_filter|mult2_reg[51]                                                                                                       ;
; pokey:\POKEY_ON:2:pokeyx|clock_sync_reg                                                                                                                                                     ; Merged with pokey:\POKEY_ON:3:pokeyx|clock_sync_reg                                                                                                                                   ;
; pokey:\POKEY_ON:1:pokeyx|clock_sync_reg                                                                                                                                                     ; Merged with pokey:\POKEY_ON:3:pokeyx|clock_sync_reg                                                                                                                                   ;
; pokey:\POKEY_ON:3:pokeyx|pokey_poly_17_9:poly_17_19_lfsr|cycle_delay_reg                                                                                                                    ; Merged with pokey:\POKEY_ON:3:pokeyx|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[8]                                                                                                     ;
; pokey:\POKEY_ON:2:pokeyx|pokey_poly_17_9:poly_17_19_lfsr|cycle_delay_reg                                                                                                                    ; Merged with pokey:\POKEY_ON:2:pokeyx|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[8]                                                                                                     ;
; pokey:\POKEY_ON:1:pokeyx|pokey_poly_17_9:poly_17_19_lfsr|cycle_delay_reg                                                                                                                    ; Merged with pokey:\POKEY_ON:1:pokeyx|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[8]                                                                                                     ;
; pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|cycle_delay_reg                                                                                                                                ; Merged with pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr|shift_reg[8]                                                                                                                 ;
; i2c_master:\iox_on:i2c_master0|addr_rw[2..5,7]                                                                                                                                              ; Merged with i2c_master:\iox_on:i2c_master0|addr_rw[1]                                                                                                                                 ;
; flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|reset_n_reg2                 ; Merged with flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_csr_controller:avmm_csr_controller|reset_n_reg2 ;
; flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|reset_n_reg1                 ; Merged with flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_csr_controller:avmm_csr_controller|reset_n_reg1 ;
; PSG_top:\psg_on:PSG_2|PSG_freqdiv:core_ticker|count_reg[3]                                                                                                                                  ; Merged with PSG_top:\psg_on:PSG_1|PSG_freqdiv:core_ticker|count_reg[3]                                                                                                                ;
; PSG_top:\psg_on:PSG_2|PSG_freqdiv:core_ticker|count_reg[2]                                                                                                                                  ; Merged with PSG_top:\psg_on:PSG_1|PSG_freqdiv:core_ticker|count_reg[2]                                                                                                                ;
; PSG_top:\psg_on:PSG_2|PSG_freqdiv:core_ticker|count_reg[1]                                                                                                                                  ; Merged with PSG_top:\psg_on:PSG_1|PSG_freqdiv:core_ticker|count_reg[1]                                                                                                                ;
; PSG_top:\psg_on:PSG_2|PSG_freqdiv:core_ticker|count_reg[0]                                                                                                                                  ; Merged with PSG_top:\psg_on:PSG_1|PSG_freqdiv:core_ticker|count_reg[0]                                                                                                                ;
; pokey:\POKEY_ON:3:pokeyx|pot1_reg[0]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:3:pokeyx|pot0_reg[0]                                                                                                                                      ;
; pokey:\POKEY_ON:3:pokeyx|pot2_reg[0]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:3:pokeyx|pot0_reg[0]                                                                                                                                      ;
; pokey:\POKEY_ON:3:pokeyx|pot3_reg[0]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:3:pokeyx|pot0_reg[0]                                                                                                                                      ;
; pokey:\POKEY_ON:3:pokeyx|pot4_reg[0]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:3:pokeyx|pot0_reg[0]                                                                                                                                      ;
; pokey:\POKEY_ON:3:pokeyx|pot5_reg[0]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:3:pokeyx|pot0_reg[0]                                                                                                                                      ;
; pokey:\POKEY_ON:3:pokeyx|pot6_reg[0]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:3:pokeyx|pot0_reg[0]                                                                                                                                      ;
; pokey:\POKEY_ON:3:pokeyx|pot7_reg[0]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:3:pokeyx|pot0_reg[0]                                                                                                                                      ;
; pokey:\POKEY_ON:3:pokeyx|allpot_reg[1..7]                                                                                                                                                   ; Merged with pokey:\POKEY_ON:3:pokeyx|allpot_reg[0]                                                                                                                                    ;
; SID_top:\sid_on:sid1|poty_reg[0]                                                                                                                                                            ; Merged with SID_top:\sid_on:sid1|potx_reg[0]                                                                                                                                          ;
; SID_top:\sid_on:sid2|potx_reg[0]                                                                                                                                                            ; Merged with SID_top:\sid_on:sid1|potx_reg[0]                                                                                                                                          ;
; SID_top:\sid_on:sid2|poty_reg[0]                                                                                                                                                            ; Merged with SID_top:\sid_on:sid1|potx_reg[0]                                                                                                                                          ;
; pokey:\POKEY_ON:3:pokeyx|pot1_reg[1]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:3:pokeyx|pot0_reg[1]                                                                                                                                      ;
; pokey:\POKEY_ON:3:pokeyx|pot2_reg[1]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:3:pokeyx|pot0_reg[1]                                                                                                                                      ;
; pokey:\POKEY_ON:3:pokeyx|pot3_reg[1]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:3:pokeyx|pot0_reg[1]                                                                                                                                      ;
; pokey:\POKEY_ON:3:pokeyx|pot4_reg[1]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:3:pokeyx|pot0_reg[1]                                                                                                                                      ;
; pokey:\POKEY_ON:3:pokeyx|pot5_reg[1]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:3:pokeyx|pot0_reg[1]                                                                                                                                      ;
; pokey:\POKEY_ON:3:pokeyx|pot6_reg[1]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:3:pokeyx|pot0_reg[1]                                                                                                                                      ;
; pokey:\POKEY_ON:3:pokeyx|pot7_reg[1]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:3:pokeyx|pot0_reg[1]                                                                                                                                      ;
; SID_top:\sid_on:sid1|poty_reg[1]                                                                                                                                                            ; Merged with SID_top:\sid_on:sid1|potx_reg[1]                                                                                                                                          ;
; SID_top:\sid_on:sid2|potx_reg[1]                                                                                                                                                            ; Merged with SID_top:\sid_on:sid1|potx_reg[1]                                                                                                                                          ;
; SID_top:\sid_on:sid2|poty_reg[1]                                                                                                                                                            ; Merged with SID_top:\sid_on:sid1|potx_reg[1]                                                                                                                                          ;
; pokey:\POKEY_ON:3:pokeyx|pot1_reg[2]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:3:pokeyx|pot0_reg[2]                                                                                                                                      ;
; pokey:\POKEY_ON:3:pokeyx|pot2_reg[2]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:3:pokeyx|pot0_reg[2]                                                                                                                                      ;
; pokey:\POKEY_ON:3:pokeyx|pot3_reg[2]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:3:pokeyx|pot0_reg[2]                                                                                                                                      ;
; pokey:\POKEY_ON:3:pokeyx|pot4_reg[2]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:3:pokeyx|pot0_reg[2]                                                                                                                                      ;
; pokey:\POKEY_ON:3:pokeyx|pot5_reg[2]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:3:pokeyx|pot0_reg[2]                                                                                                                                      ;
; pokey:\POKEY_ON:3:pokeyx|pot6_reg[2]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:3:pokeyx|pot0_reg[2]                                                                                                                                      ;
; pokey:\POKEY_ON:3:pokeyx|pot7_reg[2]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:3:pokeyx|pot0_reg[2]                                                                                                                                      ;
; SID_top:\sid_on:sid1|poty_reg[2]                                                                                                                                                            ; Merged with SID_top:\sid_on:sid1|potx_reg[2]                                                                                                                                          ;
; SID_top:\sid_on:sid2|potx_reg[2]                                                                                                                                                            ; Merged with SID_top:\sid_on:sid1|potx_reg[2]                                                                                                                                          ;
; SID_top:\sid_on:sid2|poty_reg[2]                                                                                                                                                            ; Merged with SID_top:\sid_on:sid1|potx_reg[2]                                                                                                                                          ;
; pokey:\POKEY_ON:3:pokeyx|pot1_reg[3]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:3:pokeyx|pot0_reg[3]                                                                                                                                      ;
; pokey:\POKEY_ON:3:pokeyx|pot2_reg[3]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:3:pokeyx|pot0_reg[3]                                                                                                                                      ;
; pokey:\POKEY_ON:3:pokeyx|pot3_reg[3]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:3:pokeyx|pot0_reg[3]                                                                                                                                      ;
; pokey:\POKEY_ON:3:pokeyx|pot4_reg[3]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:3:pokeyx|pot0_reg[3]                                                                                                                                      ;
; pokey:\POKEY_ON:3:pokeyx|pot5_reg[3]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:3:pokeyx|pot0_reg[3]                                                                                                                                      ;
; pokey:\POKEY_ON:3:pokeyx|pot6_reg[3]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:3:pokeyx|pot0_reg[3]                                                                                                                                      ;
; pokey:\POKEY_ON:3:pokeyx|pot7_reg[3]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:3:pokeyx|pot0_reg[3]                                                                                                                                      ;
; SID_top:\sid_on:sid1|poty_reg[3]                                                                                                                                                            ; Merged with SID_top:\sid_on:sid1|potx_reg[3]                                                                                                                                          ;
; SID_top:\sid_on:sid2|potx_reg[3]                                                                                                                                                            ; Merged with SID_top:\sid_on:sid1|potx_reg[3]                                                                                                                                          ;
; SID_top:\sid_on:sid2|poty_reg[3]                                                                                                                                                            ; Merged with SID_top:\sid_on:sid1|potx_reg[3]                                                                                                                                          ;
; pokey:\POKEY_ON:3:pokeyx|pot1_reg[4]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:3:pokeyx|pot0_reg[4]                                                                                                                                      ;
; pokey:\POKEY_ON:3:pokeyx|pot2_reg[4]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:3:pokeyx|pot0_reg[4]                                                                                                                                      ;
; pokey:\POKEY_ON:3:pokeyx|pot3_reg[4]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:3:pokeyx|pot0_reg[4]                                                                                                                                      ;
; pokey:\POKEY_ON:3:pokeyx|pot4_reg[4]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:3:pokeyx|pot0_reg[4]                                                                                                                                      ;
; pokey:\POKEY_ON:3:pokeyx|pot5_reg[4]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:3:pokeyx|pot0_reg[4]                                                                                                                                      ;
; pokey:\POKEY_ON:3:pokeyx|pot6_reg[4]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:3:pokeyx|pot0_reg[4]                                                                                                                                      ;
; pokey:\POKEY_ON:3:pokeyx|pot7_reg[4]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:3:pokeyx|pot0_reg[4]                                                                                                                                      ;
; pokey:\POKEY_ON:2:pokeyx|sio_in_reg                                                                                                                                                         ; Merged with pokey:\POKEY_ON:1:pokeyx|sio_in_reg                                                                                                                                       ;
; pokey:\POKEY_ON:3:pokeyx|sio_in_reg                                                                                                                                                         ; Merged with pokey:\POKEY_ON:1:pokeyx|sio_in_reg                                                                                                                                       ;
; SID_top:\sid_on:sid1|poty_reg[4]                                                                                                                                                            ; Merged with SID_top:\sid_on:sid1|potx_reg[4]                                                                                                                                          ;
; SID_top:\sid_on:sid2|potx_reg[4]                                                                                                                                                            ; Merged with SID_top:\sid_on:sid1|potx_reg[4]                                                                                                                                          ;
; SID_top:\sid_on:sid2|poty_reg[4]                                                                                                                                                            ; Merged with SID_top:\sid_on:sid1|potx_reg[4]                                                                                                                                          ;
; pokey:\POKEY_ON:3:pokeyx|pot1_reg[5]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:3:pokeyx|pot0_reg[5]                                                                                                                                      ;
; pokey:\POKEY_ON:3:pokeyx|pot2_reg[5]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:3:pokeyx|pot0_reg[5]                                                                                                                                      ;
; pokey:\POKEY_ON:3:pokeyx|pot3_reg[5]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:3:pokeyx|pot0_reg[5]                                                                                                                                      ;
; pokey:\POKEY_ON:3:pokeyx|pot4_reg[5]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:3:pokeyx|pot0_reg[5]                                                                                                                                      ;
; pokey:\POKEY_ON:3:pokeyx|pot5_reg[5]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:3:pokeyx|pot0_reg[5]                                                                                                                                      ;
; pokey:\POKEY_ON:3:pokeyx|pot6_reg[5]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:3:pokeyx|pot0_reg[5]                                                                                                                                      ;
; pokey:\POKEY_ON:3:pokeyx|pot7_reg[5]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:3:pokeyx|pot0_reg[5]                                                                                                                                      ;
; SID_top:\sid_on:sid1|poty_reg[5]                                                                                                                                                            ; Merged with SID_top:\sid_on:sid1|potx_reg[5]                                                                                                                                          ;
; SID_top:\sid_on:sid2|potx_reg[5]                                                                                                                                                            ; Merged with SID_top:\sid_on:sid1|potx_reg[5]                                                                                                                                          ;
; SID_top:\sid_on:sid2|poty_reg[5]                                                                                                                                                            ; Merged with SID_top:\sid_on:sid1|potx_reg[5]                                                                                                                                          ;
; pokey:\POKEY_ON:3:pokeyx|pot1_reg[6]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:3:pokeyx|pot0_reg[6]                                                                                                                                      ;
; pokey:\POKEY_ON:3:pokeyx|pot2_reg[6]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:3:pokeyx|pot0_reg[6]                                                                                                                                      ;
; pokey:\POKEY_ON:3:pokeyx|pot3_reg[6]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:3:pokeyx|pot0_reg[6]                                                                                                                                      ;
; pokey:\POKEY_ON:3:pokeyx|pot4_reg[6]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:3:pokeyx|pot0_reg[6]                                                                                                                                      ;
; pokey:\POKEY_ON:3:pokeyx|pot5_reg[6]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:3:pokeyx|pot0_reg[6]                                                                                                                                      ;
; pokey:\POKEY_ON:3:pokeyx|pot6_reg[6]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:3:pokeyx|pot0_reg[6]                                                                                                                                      ;
; pokey:\POKEY_ON:3:pokeyx|pot7_reg[6]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:3:pokeyx|pot0_reg[6]                                                                                                                                      ;
; SID_top:\sid_on:sid1|poty_reg[6]                                                                                                                                                            ; Merged with SID_top:\sid_on:sid1|potx_reg[6]                                                                                                                                          ;
; SID_top:\sid_on:sid2|potx_reg[6]                                                                                                                                                            ; Merged with SID_top:\sid_on:sid1|potx_reg[6]                                                                                                                                          ;
; SID_top:\sid_on:sid2|poty_reg[6]                                                                                                                                                            ; Merged with SID_top:\sid_on:sid1|potx_reg[6]                                                                                                                                          ;
; pokey:\POKEY_ON:3:pokeyx|pot1_reg[7]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:3:pokeyx|pot0_reg[7]                                                                                                                                      ;
; pokey:\POKEY_ON:3:pokeyx|pot2_reg[7]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:3:pokeyx|pot0_reg[7]                                                                                                                                      ;
; pokey:\POKEY_ON:3:pokeyx|pot3_reg[7]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:3:pokeyx|pot0_reg[7]                                                                                                                                      ;
; pokey:\POKEY_ON:3:pokeyx|pot4_reg[7]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:3:pokeyx|pot0_reg[7]                                                                                                                                      ;
; pokey:\POKEY_ON:3:pokeyx|pot5_reg[7]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:3:pokeyx|pot0_reg[7]                                                                                                                                      ;
; pokey:\POKEY_ON:3:pokeyx|pot6_reg[7]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:3:pokeyx|pot0_reg[7]                                                                                                                                      ;
; pokey:\POKEY_ON:3:pokeyx|pot7_reg[7]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:3:pokeyx|pot0_reg[7]                                                                                                                                      ;
; SID_top:\sid_on:sid1|poty_reg[7]                                                                                                                                                            ; Merged with SID_top:\sid_on:sid1|potx_reg[7]                                                                                                                                          ;
; SID_top:\sid_on:sid2|potx_reg[7]                                                                                                                                                            ; Merged with SID_top:\sid_on:sid1|potx_reg[7]                                                                                                                                          ;
; SID_top:\sid_on:sid2|poty_reg[7]                                                                                                                                                            ; Merged with SID_top:\sid_on:sid1|potx_reg[7]                                                                                                                                          ;
; PSG_top:\psg_on:PSG_2|PSG_freqdiv:noise_preticker|count_reg[1]                                                                                                                              ; Merged with PSG_top:\psg_on:PSG_1|PSG_freqdiv:noise_preticker|count_reg[1]                                                                                                            ;
; PSG_top:\psg_on:PSG_2|PSG_freqdiv:noise_preticker|count_reg[0]                                                                                                                              ; Merged with PSG_top:\psg_on:PSG_1|PSG_freqdiv:noise_preticker|count_reg[0]                                                                                                            ;
; SID_top:\sid_on:sid2|potcount_reg[0]                                                                                                                                                        ; Merged with SID_top:\sid_on:sid1|potcount_reg[0]                                                                                                                                      ;
; SID_top:\sid_on:sid2|potread_x_reg                                                                                                                                                          ; Merged with SID_top:\sid_on:sid1|potread_x_reg                                                                                                                                        ;
; SID_top:\sid_on:sid2|potcount_reg[8]                                                                                                                                                        ; Merged with SID_top:\sid_on:sid1|potcount_reg[8]                                                                                                                                      ;
; SID_top:\sid_on:sid2|potcount_reg[7]                                                                                                                                                        ; Merged with SID_top:\sid_on:sid1|potcount_reg[7]                                                                                                                                      ;
; SID_top:\sid_on:sid2|potcount_reg[6]                                                                                                                                                        ; Merged with SID_top:\sid_on:sid1|potcount_reg[6]                                                                                                                                      ;
; SID_top:\sid_on:sid2|potcount_reg[5]                                                                                                                                                        ; Merged with SID_top:\sid_on:sid1|potcount_reg[5]                                                                                                                                      ;
; SID_top:\sid_on:sid2|potcount_reg[4]                                                                                                                                                        ; Merged with SID_top:\sid_on:sid1|potcount_reg[4]                                                                                                                                      ;
; SID_top:\sid_on:sid2|potcount_reg[3]                                                                                                                                                        ; Merged with SID_top:\sid_on:sid1|potcount_reg[3]                                                                                                                                      ;
; SID_top:\sid_on:sid2|potcount_reg[2]                                                                                                                                                        ; Merged with SID_top:\sid_on:sid1|potcount_reg[2]                                                                                                                                      ;
; SID_top:\sid_on:sid2|potcount_reg[1]                                                                                                                                                        ; Merged with SID_top:\sid_on:sid1|potcount_reg[1]                                                                                                                                      ;
; SID_top:\sid_on:sid2|SID_envelope_tapmatch:envelope_tapmatcher|state_reg[1]                                                                                                                 ; Merged with SID_top:\sid_on:sid1|SID_envelope_tapmatch:envelope_tapmatcher|state_reg[1]                                                                                               ;
; SID_top:\sid_on:sid2|SID_preFilterSum:prefilter|phase_reg[2]                                                                                                                                ; Merged with SID_top:\sid_on:sid1|SID_preFilterSum:prefilter|phase_reg[2]                                                                                                              ;
; SID_top:\sid_on:sid2|SID_preFilterSum:prefilter|phase_reg[1]                                                                                                                                ; Merged with SID_top:\sid_on:sid1|SID_preFilterSum:prefilter|phase_reg[1]                                                                                                              ;
; SID_top:\sid_on:sid2|SID_preFilterSum:prefilter|phase_reg[0]                                                                                                                                ; Merged with SID_top:\sid_on:sid1|SID_preFilterSum:prefilter|phase_reg[0]                                                                                                              ;
; pokey:\POKEY_ON:2:pokeyx|allpot_reg[1..7]                                                                                                                                                   ; Merged with pokey:\POKEY_ON:2:pokeyx|allpot_reg[0]                                                                                                                                    ;
; pokey:\POKEY_ON:1:pokeyx|allpot_reg[1..7]                                                                                                                                                   ; Merged with pokey:\POKEY_ON:1:pokeyx|allpot_reg[0]                                                                                                                                    ;
; SID_top:\sid_on:sid2|SID_envelope_tapmatch:envelope_tapmatcher|state_reg[0]                                                                                                                 ; Merged with SID_top:\sid_on:sid1|SID_envelope_tapmatch:envelope_tapmatcher|state_reg[0]                                                                                               ;
; pokey:\POKEY_ON:2:pokeyx|pot1_reg[0]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:2:pokeyx|pot0_reg[0]                                                                                                                                      ;
; pokey:\POKEY_ON:2:pokeyx|pot2_reg[0]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:2:pokeyx|pot0_reg[0]                                                                                                                                      ;
; pokey:\POKEY_ON:2:pokeyx|pot3_reg[0]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:2:pokeyx|pot0_reg[0]                                                                                                                                      ;
; pokey:\POKEY_ON:2:pokeyx|pot4_reg[0]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:2:pokeyx|pot0_reg[0]                                                                                                                                      ;
; pokey:\POKEY_ON:2:pokeyx|pot5_reg[0]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:2:pokeyx|pot0_reg[0]                                                                                                                                      ;
; pokey:\POKEY_ON:2:pokeyx|pot6_reg[0]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:2:pokeyx|pot0_reg[0]                                                                                                                                      ;
; pokey:\POKEY_ON:2:pokeyx|pot7_reg[0]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:2:pokeyx|pot0_reg[0]                                                                                                                                      ;
; pokey:\POKEY_ON:2:pokeyx|pot1_reg[1]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:2:pokeyx|pot0_reg[1]                                                                                                                                      ;
; pokey:\POKEY_ON:2:pokeyx|pot2_reg[1]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:2:pokeyx|pot0_reg[1]                                                                                                                                      ;
; pokey:\POKEY_ON:2:pokeyx|pot3_reg[1]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:2:pokeyx|pot0_reg[1]                                                                                                                                      ;
; pokey:\POKEY_ON:2:pokeyx|pot4_reg[1]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:2:pokeyx|pot0_reg[1]                                                                                                                                      ;
; pokey:\POKEY_ON:2:pokeyx|pot5_reg[1]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:2:pokeyx|pot0_reg[1]                                                                                                                                      ;
; pokey:\POKEY_ON:2:pokeyx|pot6_reg[1]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:2:pokeyx|pot0_reg[1]                                                                                                                                      ;
; pokey:\POKEY_ON:2:pokeyx|pot7_reg[1]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:2:pokeyx|pot0_reg[1]                                                                                                                                      ;
; pokey:\POKEY_ON:2:pokeyx|pot1_reg[2]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:2:pokeyx|pot0_reg[2]                                                                                                                                      ;
; pokey:\POKEY_ON:2:pokeyx|pot2_reg[2]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:2:pokeyx|pot0_reg[2]                                                                                                                                      ;
; pokey:\POKEY_ON:2:pokeyx|pot3_reg[2]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:2:pokeyx|pot0_reg[2]                                                                                                                                      ;
; pokey:\POKEY_ON:2:pokeyx|pot4_reg[2]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:2:pokeyx|pot0_reg[2]                                                                                                                                      ;
; pokey:\POKEY_ON:2:pokeyx|pot5_reg[2]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:2:pokeyx|pot0_reg[2]                                                                                                                                      ;
; pokey:\POKEY_ON:2:pokeyx|pot6_reg[2]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:2:pokeyx|pot0_reg[2]                                                                                                                                      ;
; pokey:\POKEY_ON:2:pokeyx|pot7_reg[2]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:2:pokeyx|pot0_reg[2]                                                                                                                                      ;
; pokey:\POKEY_ON:2:pokeyx|pot1_reg[3]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:2:pokeyx|pot0_reg[3]                                                                                                                                      ;
; pokey:\POKEY_ON:2:pokeyx|pot2_reg[3]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:2:pokeyx|pot0_reg[3]                                                                                                                                      ;
; pokey:\POKEY_ON:2:pokeyx|pot3_reg[3]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:2:pokeyx|pot0_reg[3]                                                                                                                                      ;
; pokey:\POKEY_ON:2:pokeyx|pot4_reg[3]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:2:pokeyx|pot0_reg[3]                                                                                                                                      ;
; pokey:\POKEY_ON:2:pokeyx|pot5_reg[3]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:2:pokeyx|pot0_reg[3]                                                                                                                                      ;
; pokey:\POKEY_ON:2:pokeyx|pot6_reg[3]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:2:pokeyx|pot0_reg[3]                                                                                                                                      ;
; pokey:\POKEY_ON:2:pokeyx|pot7_reg[3]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:2:pokeyx|pot0_reg[3]                                                                                                                                      ;
; pokey:\POKEY_ON:2:pokeyx|pot1_reg[4]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:2:pokeyx|pot0_reg[4]                                                                                                                                      ;
; pokey:\POKEY_ON:2:pokeyx|pot2_reg[4]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:2:pokeyx|pot0_reg[4]                                                                                                                                      ;
; pokey:\POKEY_ON:2:pokeyx|pot3_reg[4]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:2:pokeyx|pot0_reg[4]                                                                                                                                      ;
; pokey:\POKEY_ON:2:pokeyx|pot4_reg[4]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:2:pokeyx|pot0_reg[4]                                                                                                                                      ;
; pokey:\POKEY_ON:2:pokeyx|pot5_reg[4]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:2:pokeyx|pot0_reg[4]                                                                                                                                      ;
; pokey:\POKEY_ON:2:pokeyx|pot6_reg[4]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:2:pokeyx|pot0_reg[4]                                                                                                                                      ;
; pokey:\POKEY_ON:2:pokeyx|pot7_reg[4]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:2:pokeyx|pot0_reg[4]                                                                                                                                      ;
; pokey:\POKEY_ON:2:pokeyx|pot1_reg[5]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:2:pokeyx|pot0_reg[5]                                                                                                                                      ;
; pokey:\POKEY_ON:2:pokeyx|pot2_reg[5]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:2:pokeyx|pot0_reg[5]                                                                                                                                      ;
; pokey:\POKEY_ON:2:pokeyx|pot3_reg[5]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:2:pokeyx|pot0_reg[5]                                                                                                                                      ;
; pokey:\POKEY_ON:2:pokeyx|pot4_reg[5]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:2:pokeyx|pot0_reg[5]                                                                                                                                      ;
; pokey:\POKEY_ON:2:pokeyx|pot5_reg[5]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:2:pokeyx|pot0_reg[5]                                                                                                                                      ;
; pokey:\POKEY_ON:2:pokeyx|pot6_reg[5]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:2:pokeyx|pot0_reg[5]                                                                                                                                      ;
; pokey:\POKEY_ON:2:pokeyx|pot7_reg[5]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:2:pokeyx|pot0_reg[5]                                                                                                                                      ;
; pokey:\POKEY_ON:2:pokeyx|pot1_reg[6]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:2:pokeyx|pot0_reg[6]                                                                                                                                      ;
; pokey:\POKEY_ON:2:pokeyx|pot2_reg[6]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:2:pokeyx|pot0_reg[6]                                                                                                                                      ;
; pokey:\POKEY_ON:2:pokeyx|pot3_reg[6]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:2:pokeyx|pot0_reg[6]                                                                                                                                      ;
; pokey:\POKEY_ON:2:pokeyx|pot4_reg[6]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:2:pokeyx|pot0_reg[6]                                                                                                                                      ;
; pokey:\POKEY_ON:2:pokeyx|pot5_reg[6]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:2:pokeyx|pot0_reg[6]                                                                                                                                      ;
; pokey:\POKEY_ON:2:pokeyx|pot6_reg[6]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:2:pokeyx|pot0_reg[6]                                                                                                                                      ;
; pokey:\POKEY_ON:2:pokeyx|pot7_reg[6]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:2:pokeyx|pot0_reg[6]                                                                                                                                      ;
; pokey:\POKEY_ON:2:pokeyx|pot1_reg[7]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:2:pokeyx|pot0_reg[7]                                                                                                                                      ;
; pokey:\POKEY_ON:2:pokeyx|pot2_reg[7]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:2:pokeyx|pot0_reg[7]                                                                                                                                      ;
; pokey:\POKEY_ON:2:pokeyx|pot3_reg[7]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:2:pokeyx|pot0_reg[7]                                                                                                                                      ;
; pokey:\POKEY_ON:2:pokeyx|pot4_reg[7]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:2:pokeyx|pot0_reg[7]                                                                                                                                      ;
; pokey:\POKEY_ON:2:pokeyx|pot5_reg[7]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:2:pokeyx|pot0_reg[7]                                                                                                                                      ;
; pokey:\POKEY_ON:2:pokeyx|pot6_reg[7]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:2:pokeyx|pot0_reg[7]                                                                                                                                      ;
; pokey:\POKEY_ON:2:pokeyx|pot7_reg[7]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:2:pokeyx|pot0_reg[7]                                                                                                                                      ;
; pokey:\POKEY_ON:1:pokeyx|pot1_reg[0]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:1:pokeyx|pot0_reg[0]                                                                                                                                      ;
; pokey:\POKEY_ON:1:pokeyx|pot2_reg[0]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:1:pokeyx|pot0_reg[0]                                                                                                                                      ;
; pokey:\POKEY_ON:1:pokeyx|pot3_reg[0]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:1:pokeyx|pot0_reg[0]                                                                                                                                      ;
; pokey:\POKEY_ON:1:pokeyx|pot4_reg[0]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:1:pokeyx|pot0_reg[0]                                                                                                                                      ;
; pokey:\POKEY_ON:1:pokeyx|pot5_reg[0]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:1:pokeyx|pot0_reg[0]                                                                                                                                      ;
; pokey:\POKEY_ON:1:pokeyx|pot6_reg[0]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:1:pokeyx|pot0_reg[0]                                                                                                                                      ;
; pokey:\POKEY_ON:1:pokeyx|pot7_reg[0]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:1:pokeyx|pot0_reg[0]                                                                                                                                      ;
; pokey:\POKEY_ON:1:pokeyx|pot1_reg[1]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:1:pokeyx|pot0_reg[1]                                                                                                                                      ;
; pokey:\POKEY_ON:1:pokeyx|pot2_reg[1]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:1:pokeyx|pot0_reg[1]                                                                                                                                      ;
; pokey:\POKEY_ON:1:pokeyx|pot3_reg[1]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:1:pokeyx|pot0_reg[1]                                                                                                                                      ;
; pokey:\POKEY_ON:1:pokeyx|pot4_reg[1]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:1:pokeyx|pot0_reg[1]                                                                                                                                      ;
; pokey:\POKEY_ON:1:pokeyx|pot5_reg[1]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:1:pokeyx|pot0_reg[1]                                                                                                                                      ;
; pokey:\POKEY_ON:1:pokeyx|pot6_reg[1]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:1:pokeyx|pot0_reg[1]                                                                                                                                      ;
; pokey:\POKEY_ON:1:pokeyx|pot7_reg[1]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:1:pokeyx|pot0_reg[1]                                                                                                                                      ;
; pokey:\POKEY_ON:1:pokeyx|pot1_reg[2]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:1:pokeyx|pot0_reg[2]                                                                                                                                      ;
; pokey:\POKEY_ON:1:pokeyx|pot2_reg[2]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:1:pokeyx|pot0_reg[2]                                                                                                                                      ;
; pokey:\POKEY_ON:1:pokeyx|pot3_reg[2]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:1:pokeyx|pot0_reg[2]                                                                                                                                      ;
; pokey:\POKEY_ON:1:pokeyx|pot4_reg[2]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:1:pokeyx|pot0_reg[2]                                                                                                                                      ;
; pokey:\POKEY_ON:1:pokeyx|pot5_reg[2]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:1:pokeyx|pot0_reg[2]                                                                                                                                      ;
; pokey:\POKEY_ON:1:pokeyx|pot6_reg[2]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:1:pokeyx|pot0_reg[2]                                                                                                                                      ;
; pokey:\POKEY_ON:1:pokeyx|pot7_reg[2]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:1:pokeyx|pot0_reg[2]                                                                                                                                      ;
; pokey:\POKEY_ON:1:pokeyx|pot1_reg[3]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:1:pokeyx|pot0_reg[3]                                                                                                                                      ;
; pokey:\POKEY_ON:1:pokeyx|pot2_reg[3]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:1:pokeyx|pot0_reg[3]                                                                                                                                      ;
; pokey:\POKEY_ON:1:pokeyx|pot3_reg[3]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:1:pokeyx|pot0_reg[3]                                                                                                                                      ;
; pokey:\POKEY_ON:1:pokeyx|pot4_reg[3]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:1:pokeyx|pot0_reg[3]                                                                                                                                      ;
; pokey:\POKEY_ON:1:pokeyx|pot5_reg[3]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:1:pokeyx|pot0_reg[3]                                                                                                                                      ;
; pokey:\POKEY_ON:1:pokeyx|pot6_reg[3]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:1:pokeyx|pot0_reg[3]                                                                                                                                      ;
; pokey:\POKEY_ON:1:pokeyx|pot7_reg[3]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:1:pokeyx|pot0_reg[3]                                                                                                                                      ;
; pokey:\POKEY_ON:1:pokeyx|pot1_reg[4]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:1:pokeyx|pot0_reg[4]                                                                                                                                      ;
; pokey:\POKEY_ON:1:pokeyx|pot2_reg[4]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:1:pokeyx|pot0_reg[4]                                                                                                                                      ;
; pokey:\POKEY_ON:1:pokeyx|pot3_reg[4]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:1:pokeyx|pot0_reg[4]                                                                                                                                      ;
; pokey:\POKEY_ON:1:pokeyx|pot4_reg[4]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:1:pokeyx|pot0_reg[4]                                                                                                                                      ;
; pokey:\POKEY_ON:1:pokeyx|pot5_reg[4]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:1:pokeyx|pot0_reg[4]                                                                                                                                      ;
; pokey:\POKEY_ON:1:pokeyx|pot6_reg[4]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:1:pokeyx|pot0_reg[4]                                                                                                                                      ;
; pokey:\POKEY_ON:1:pokeyx|pot7_reg[4]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:1:pokeyx|pot0_reg[4]                                                                                                                                      ;
; pokey:\POKEY_ON:1:pokeyx|pot1_reg[5]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:1:pokeyx|pot0_reg[5]                                                                                                                                      ;
; pokey:\POKEY_ON:1:pokeyx|pot2_reg[5]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:1:pokeyx|pot0_reg[5]                                                                                                                                      ;
; pokey:\POKEY_ON:1:pokeyx|pot3_reg[5]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:1:pokeyx|pot0_reg[5]                                                                                                                                      ;
; pokey:\POKEY_ON:1:pokeyx|pot4_reg[5]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:1:pokeyx|pot0_reg[5]                                                                                                                                      ;
; pokey:\POKEY_ON:1:pokeyx|pot5_reg[5]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:1:pokeyx|pot0_reg[5]                                                                                                                                      ;
; pokey:\POKEY_ON:1:pokeyx|pot6_reg[5]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:1:pokeyx|pot0_reg[5]                                                                                                                                      ;
; pokey:\POKEY_ON:1:pokeyx|pot7_reg[5]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:1:pokeyx|pot0_reg[5]                                                                                                                                      ;
; pokey:\POKEY_ON:1:pokeyx|pot1_reg[6]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:1:pokeyx|pot0_reg[6]                                                                                                                                      ;
; pokey:\POKEY_ON:1:pokeyx|pot2_reg[6]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:1:pokeyx|pot0_reg[6]                                                                                                                                      ;
; pokey:\POKEY_ON:1:pokeyx|pot3_reg[6]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:1:pokeyx|pot0_reg[6]                                                                                                                                      ;
; pokey:\POKEY_ON:1:pokeyx|pot4_reg[6]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:1:pokeyx|pot0_reg[6]                                                                                                                                      ;
; pokey:\POKEY_ON:1:pokeyx|pot5_reg[6]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:1:pokeyx|pot0_reg[6]                                                                                                                                      ;
; pokey:\POKEY_ON:1:pokeyx|pot6_reg[6]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:1:pokeyx|pot0_reg[6]                                                                                                                                      ;
; pokey:\POKEY_ON:1:pokeyx|pot7_reg[6]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:1:pokeyx|pot0_reg[6]                                                                                                                                      ;
; pokey:\POKEY_ON:1:pokeyx|pot1_reg[7]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:1:pokeyx|pot0_reg[7]                                                                                                                                      ;
; pokey:\POKEY_ON:1:pokeyx|pot2_reg[7]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:1:pokeyx|pot0_reg[7]                                                                                                                                      ;
; pokey:\POKEY_ON:1:pokeyx|pot3_reg[7]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:1:pokeyx|pot0_reg[7]                                                                                                                                      ;
; pokey:\POKEY_ON:1:pokeyx|pot4_reg[7]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:1:pokeyx|pot0_reg[7]                                                                                                                                      ;
; pokey:\POKEY_ON:1:pokeyx|pot5_reg[7]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:1:pokeyx|pot0_reg[7]                                                                                                                                      ;
; pokey:\POKEY_ON:1:pokeyx|pot6_reg[7]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:1:pokeyx|pot0_reg[7]                                                                                                                                      ;
; pokey:\POKEY_ON:1:pokeyx|pot7_reg[7]                                                                                                                                                        ; Merged with pokey:\POKEY_ON:1:pokeyx|pot0_reg[7]                                                                                                                                      ;
; spdif_transmitter:\spdif_on:spdif|channel_status_shift[0..5]                                                                                                                                ; Stuck at GND due to stuck port data_in                                                                                                                                                ;
; PSG_top:\psg_on:PSG_1|PSG_freqdiv:noise_preticker|count_reg[1]                                                                                                                              ; Stuck at GND due to stuck port data_in                                                                                                                                                ;
; PSG_top:\psg_on:PSG_1|PSG_freqdiv:core_ticker|count_reg[3]                                                                                                                                  ; Stuck at GND due to stuck port data_in                                                                                                                                                ;
; i2c_master:\iox_on:i2c_master0|addr_rw[1]                                                                                                                                                   ; Stuck at GND due to stuck port data_in                                                                                                                                                ;
; i2c_master:\iox_on:i2c_master0|addr_rw[6]                                                                                                                                                   ; Stuck at VCC due to stuck port data_in                                                                                                                                                ;
; flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|flash_seq_read_ardin[20..22] ; Stuck at GND due to stuck port data_in                                                                                                                                                ;
; flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|flash_page_addr[21,22]       ; Stuck at GND due to stuck port data_in                                                                                                                                                ;
; flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|flash_seq_read_ardin[17..19] ; Stuck at GND due to stuck port data_in                                                                                                                                                ;
; SID_top:\sid_on:sid1|potx_reg[7]                                                                                                                                                            ; Merged with SID_top:\sid_on:sid1|potx_reg[6]                                                                                                                                          ;
; SID_top:\sid_on:sid1|potx_reg[6]                                                                                                                                                            ; Merged with SID_top:\sid_on:sid1|potx_reg[5]                                                                                                                                          ;
; SID_top:\sid_on:sid1|potx_reg[5]                                                                                                                                                            ; Merged with SID_top:\sid_on:sid1|potx_reg[4]                                                                                                                                          ;
; SID_top:\sid_on:sid1|potx_reg[4]                                                                                                                                                            ; Merged with SID_top:\sid_on:sid1|potx_reg[3]                                                                                                                                          ;
; SID_top:\sid_on:sid1|potx_reg[3]                                                                                                                                                            ; Merged with SID_top:\sid_on:sid1|potx_reg[2]                                                                                                                                          ;
; SID_top:\sid_on:sid1|potx_reg[2]                                                                                                                                                            ; Merged with SID_top:\sid_on:sid1|potx_reg[1]                                                                                                                                          ;
; SID_top:\sid_on:sid1|potx_reg[1]                                                                                                                                                            ; Merged with SID_top:\sid_on:sid1|potx_reg[0]                                                                                                                                          ;
; SID_f_distortion_mux:\sid_on:f_distortion_mux|state_reg[0]                                                                                                                                  ; Merged with SID_top:\sid_on:sid1|SID_preFilterSum:prefilter|phase_reg[0]                                                                                                              ;
; flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|read_state~7                 ; Lost fanout                                                                                                                                                                           ;
; flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|read_state~8                 ; Lost fanout                                                                                                                                                                           ;
; flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|read_state~9                 ; Lost fanout                                                                                                                                                                           ;
; flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|erase_state~6                ; Lost fanout                                                                                                                                                                           ;
; flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|erase_state~7                ; Lost fanout                                                                                                                                                                           ;
; flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|erase_state~8                ; Lost fanout                                                                                                                                                                           ;
; flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|write_state~5                ; Lost fanout                                                                                                                                                                           ;
; flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|write_state~6                ; Lost fanout                                                                                                                                                                           ;
; flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|write_state~7                ; Lost fanout                                                                                                                                                                           ;
; filtered_sigmadelta:dac_0|sigmadelta_2ndorder:\gen_2ndorder_on:dac_2nd|ttl1_reg[21]                                                                                                         ; Lost fanout                                                                                                                                                                           ;
; filtered_sigmadelta:\audout2_on:dac_1|sigmadelta_2ndorder:\gen_2ndorder_on:dac_2nd|ttl1_reg[21]                                                                                             ; Lost fanout                                                                                                                                                                           ;
; filtered_sigmadelta:dac_2|sigmadelta_2ndorder:\gen_2ndorder_on:dac_2nd|ttl1_reg[21]                                                                                                         ; Lost fanout                                                                                                                                                                           ;
; filtered_sigmadelta:dac_3|sigmadelta_2ndorder:\gen_2ndorder_on:dac_2nd|ttl1_reg[21]                                                                                                         ; Lost fanout                                                                                                                                                                           ;
; SID_f_distortion_mux:\sid_on:f_distortion_mux|state_reg[1]                                                                                                                                  ; Merged with SID_top:\sid_on:sid1|SID_preFilterSum:prefilter|phase_reg[1]                                                                                                              ;
; flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|read_ctrl_count[2]           ; Stuck at GND due to stuck port data_in                                                                                                                                                ;
; pokey:pokey1|latch_delay_line:twotone_del|data_in_reg                                                                                                                                       ; Stuck at GND due to stuck port data_in                                                                                                                                                ;
; pokey:\POKEY_ON:1:pokeyx|latch_delay_line:twotone_del|data_in_reg                                                                                                                           ; Stuck at GND due to stuck port data_in                                                                                                                                                ;
; pokey:\POKEY_ON:2:pokeyx|latch_delay_line:twotone_del|data_in_reg                                                                                                                           ; Stuck at GND due to stuck port data_in                                                                                                                                                ;
; pokey:\POKEY_ON:3:pokeyx|latch_delay_line:twotone_del|data_in_reg                                                                                                                           ; Stuck at GND due to stuck port data_in                                                                                                                                                ;
; Total Number of Removed Registers = 361                                                                                                                                                     ;                                                                                                                                                                                       ;
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Removed Registers Triggering Further Register Optimizations                                                                                                                                                                                                                                                                                                                                                    ;
+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Register name                                                                                                                                                                           ; Reason for Removal        ; Registers Removed due to This Register                                                                                                                                                   ;
+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; pokey:\POKEY_ON:3:pokeyx|synchronizer:sio_in1_synchronizer|ff_reg[2]                                                                                                                    ; Stuck at VCC              ; pokey:\POKEY_ON:3:pokeyx|synchronizer:sio_in1_synchronizer|ff_reg[1],                                                                                                                    ;
;                                                                                                                                                                                         ; due to stuck port data_in ; pokey:\POKEY_ON:3:pokeyx|synchronizer:sio_in1_synchronizer|ff_reg[0],                                                                                                                    ;
;                                                                                                                                                                                         ;                           ; pokey:\POKEY_ON:3:pokeyx|synchronizer:sio_in2_synchronizer|ff_reg[2],                                                                                                                    ;
;                                                                                                                                                                                         ;                           ; pokey:\POKEY_ON:3:pokeyx|synchronizer:sio_in2_synchronizer|ff_reg[1],                                                                                                                    ;
;                                                                                                                                                                                         ;                           ; pokey:\POKEY_ON:3:pokeyx|synchronizer:sio_in2_synchronizer|ff_reg[0]                                                                                                                     ;
; pokey:\POKEY_ON:2:pokeyx|synchronizer:sio_in1_synchronizer|ff_reg[2]                                                                                                                    ; Stuck at VCC              ; pokey:\POKEY_ON:2:pokeyx|synchronizer:sio_in1_synchronizer|ff_reg[1],                                                                                                                    ;
;                                                                                                                                                                                         ; due to stuck port data_in ; pokey:\POKEY_ON:2:pokeyx|synchronizer:sio_in1_synchronizer|ff_reg[0],                                                                                                                    ;
;                                                                                                                                                                                         ;                           ; pokey:\POKEY_ON:2:pokeyx|synchronizer:sio_in2_synchronizer|ff_reg[2],                                                                                                                    ;
;                                                                                                                                                                                         ;                           ; pokey:\POKEY_ON:2:pokeyx|synchronizer:sio_in2_synchronizer|ff_reg[1],                                                                                                                    ;
;                                                                                                                                                                                         ;                           ; pokey:\POKEY_ON:2:pokeyx|synchronizer:sio_in2_synchronizer|ff_reg[0]                                                                                                                     ;
; pokey:\POKEY_ON:1:pokeyx|synchronizer:sio_in1_synchronizer|ff_reg[2]                                                                                                                    ; Stuck at VCC              ; pokey:\POKEY_ON:1:pokeyx|synchronizer:sio_in1_synchronizer|ff_reg[1],                                                                                                                    ;
;                                                                                                                                                                                         ; due to stuck port data_in ; pokey:\POKEY_ON:1:pokeyx|synchronizer:sio_in1_synchronizer|ff_reg[0],                                                                                                                    ;
;                                                                                                                                                                                         ;                           ; pokey:\POKEY_ON:1:pokeyx|synchronizer:sio_in2_synchronizer|ff_reg[2],                                                                                                                    ;
;                                                                                                                                                                                         ;                           ; pokey:\POKEY_ON:1:pokeyx|synchronizer:sio_in2_synchronizer|ff_reg[1],                                                                                                                    ;
;                                                                                                                                                                                         ;                           ; pokey:\POKEY_ON:1:pokeyx|synchronizer:sio_in2_synchronizer|ff_reg[0]                                                                                                                     ;
; spdif_transmitter:\spdif_on:spdif|channel_status_shift[0]                                                                                                                               ; Stuck at GND              ; spdif_transmitter:\spdif_on:spdif|channel_status_shift[1],                                                                                                                               ;
;                                                                                                                                                                                         ; due to stuck port data_in ; spdif_transmitter:\spdif_on:spdif|channel_status_shift[2],                                                                                                                               ;
;                                                                                                                                                                                         ;                           ; spdif_transmitter:\spdif_on:spdif|channel_status_shift[3],                                                                                                                               ;
;                                                                                                                                                                                         ;                           ; spdif_transmitter:\spdif_on:spdif|channel_status_shift[4],                                                                                                                               ;
;                                                                                                                                                                                         ;                           ; spdif_transmitter:\spdif_on:spdif|channel_status_shift[5]                                                                                                                                ;
; flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|flash_seq_read_ardin[20] ; Stuck at GND              ; flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|flash_page_addr[21],      ;
;                                                                                                                                                                                         ; due to stuck port data_in ; flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|flash_page_addr[22],      ;
;                                                                                                                                                                                         ;                           ; flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|flash_seq_read_ardin[17], ;
;                                                                                                                                                                                         ;                           ; flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|flash_seq_read_ardin[18], ;
;                                                                                                                                                                                         ;                           ; flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|flash_seq_read_ardin[19]  ;
; pokey:\POKEY_ON:3:pokeyx|synchronizer:sio_clk1_synchronizer|ff_reg[2]                                                                                                                   ; Stuck at VCC              ; pokey:\POKEY_ON:3:pokeyx|synchronizer:sio_clk1_synchronizer|ff_reg[1],                                                                                                                   ;
;                                                                                                                                                                                         ; due to stuck port data_in ; pokey:\POKEY_ON:3:pokeyx|synchronizer:sio_clk1_synchronizer|ff_reg[0]                                                                                                                    ;
; pokey:\POKEY_ON:2:pokeyx|synchronizer:sio_clk1_synchronizer|ff_reg[2]                                                                                                                   ; Stuck at VCC              ; pokey:\POKEY_ON:2:pokeyx|synchronizer:sio_clk1_synchronizer|ff_reg[1],                                                                                                                   ;
;                                                                                                                                                                                         ; due to stuck port data_in ; pokey:\POKEY_ON:2:pokeyx|synchronizer:sio_clk1_synchronizer|ff_reg[0]                                                                                                                    ;
; pokey:\POKEY_ON:1:pokeyx|synchronizer:sio_clk1_synchronizer|ff_reg[2]                                                                                                                   ; Stuck at VCC              ; pokey:\POKEY_ON:1:pokeyx|synchronizer:sio_clk1_synchronizer|ff_reg[1],                                                                                                                   ;
;                                                                                                                                                                                         ; due to stuck port data_in ; pokey:\POKEY_ON:1:pokeyx|synchronizer:sio_clk1_synchronizer|ff_reg[0]                                                                                                                    ;
; synchronizer:synchronizer_fancy_enable|ff_reg[2]                                                                                                                                        ; Stuck at VCC              ; synchronizer:synchronizer_fancy_enable|ff_reg[1],                                                                                                                                        ;
;                                                                                                                                                                                         ; due to stuck port data_in ; synchronizer:synchronizer_fancy_enable|ff_reg[0]                                                                                                                                         ;
; pokey:\POKEY_ON:3:pokeyx|irqst_reg[7]                                                                                                                                                   ; Stuck at VCC              ; pokey:\POKEY_ON:3:pokeyx|irqen_reg[7]                                                                                                                                                    ;
;                                                                                                                                                                                         ; due to stuck port data_in ;                                                                                                                                                                                          ;
; pokey:\POKEY_ON:3:pokeyx|irqst_reg[6]                                                                                                                                                   ; Stuck at VCC              ; pokey:\POKEY_ON:3:pokeyx|irqen_reg[6]                                                                                                                                                    ;
;                                                                                                                                                                                         ; due to stuck port data_in ;                                                                                                                                                                                          ;
; pokey:\POKEY_ON:2:pokeyx|irqst_reg[7]                                                                                                                                                   ; Stuck at VCC              ; pokey:\POKEY_ON:2:pokeyx|irqen_reg[7]                                                                                                                                                    ;
;                                                                                                                                                                                         ; due to stuck port data_in ;                                                                                                                                                                                          ;
; pokey:\POKEY_ON:2:pokeyx|irqst_reg[6]                                                                                                                                                   ; Stuck at VCC              ; pokey:\POKEY_ON:2:pokeyx|irqen_reg[6]                                                                                                                                                    ;
;                                                                                                                                                                                         ; due to stuck port data_in ;                                                                                                                                                                                          ;
; pokey:\POKEY_ON:1:pokeyx|irqst_reg[7]                                                                                                                                                   ; Stuck at VCC              ; pokey:\POKEY_ON:1:pokeyx|irqen_reg[7]                                                                                                                                                    ;
;                                                                                                                                                                                         ; due to stuck port data_in ;                                                                                                                                                                                          ;
; pokey:\POKEY_ON:1:pokeyx|irqst_reg[6]                                                                                                                                                   ; Stuck at VCC              ; pokey:\POKEY_ON:1:pokeyx|irqen_reg[6]                                                                                                                                                    ;
;                                                                                                                                                                                         ; due to stuck port data_in ;                                                                                                                                                                                          ;
+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------+
; General Register Statistics                          ;
+----------------------------------------------+-------+
; Statistic                                    ; Value ;
+----------------------------------------------+-------+
; Total registers                              ; 6162  ;
; Number of registers using Synchronous Clear  ; 121   ;
; Number of registers using Synchronous Load   ; 444   ;
; Number of registers using Asynchronous Clear ; 5690  ;
; Number of registers using Asynchronous Load  ; 0     ;
; Number of registers using Clock Enable       ; 4319  ;
; Number of registers using Preset             ; 0     ;
+----------------------------------------------+-------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Inverted Register Statistics                                                                                                                                                                              ;
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------+
; Inverted Register                                                                                                                                                                               ; Fan out ;
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------+
; ps2_to_atari800:\ps2_on:keyboard_map1|ps2_keyboard:\gen_ps2_on:keyboard1|enable_divider:enable_div|count_reg[0]                                                                                 ; 2       ;
; ps2_to_atari800:\ps2_on:keyboard_map1|ps2_keyboard:\gen_ps2_on:keyboard1|enable_divider:enable_div|count_reg[1]                                                                                 ; 2       ;
; ps2_to_atari800:\ps2_on:keyboard_map1|ps2_keyboard:\gen_ps2_on:keyboard1|enable_divider:enable_div|count_reg[2]                                                                                 ; 2       ;
; ps2_to_atari800:\ps2_on:keyboard_map1|ps2_keyboard:\gen_ps2_on:keyboard1|enable_divider:enable_div|count_reg[3]                                                                                 ; 2       ;
; ps2_to_atari800:\ps2_on:keyboard_map1|ps2_keyboard:\gen_ps2_on:keyboard1|enable_divider:enable_div|count_reg[4]                                                                                 ; 2       ;
; ps2_to_atari800:\ps2_on:keyboard_map1|ps2_keyboard:\gen_ps2_on:keyboard1|enable_divider:enable_div|count_reg[5]                                                                                 ; 2       ;
; ps2_to_atari800:\ps2_on:keyboard_map1|ps2_keyboard:\gen_ps2_on:keyboard1|enable_divider:enable_div|count_reg[6]                                                                                 ; 2       ;
; ps2_to_atari800:\ps2_on:keyboard_map1|ps2_keyboard:\gen_ps2_on:keyboard1|enable_divider:enable_div|count_reg[7]                                                                                 ; 2       ;
; CHANNEL_EN_REG[0]                                                                                                                                                                               ; 2       ;
; CHANNEL_EN_REG[1]                                                                                                                                                                               ; 2       ;
; CHANNEL_EN_REG[2]                                                                                                                                                                               ; 2       ;
; CHANNEL_EN_REG[3]                                                                                                                                                                               ; 2       ;
; pokey:pokey1|pot_reset_reg                                                                                                                                                                      ; 11      ;
; flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|flash_drshft_neg_reg             ; 1       ;
; pokey:pokey1|sio_out_reg                                                                                                                                                                        ; 1       ;
; slave_timing_6502:bus_adapt|phi_rw_n_reg                                                                                                                                                        ; 8       ;
; slave_timing_6502:bus_adapt|state_reg[0]                                                                                                                                                        ; 5       ;
; slave_timing_6502:bus_adapt|phi_edge_prev_reg                                                                                                                                                   ; 6       ;
; RESTRICT_CAPABILITY_REG[4]                                                                                                                                                                      ; 4       ;
; RESTRICT_CAPABILITY_REG[3]                                                                                                                                                                      ; 2       ;
; RESTRICT_CAPABILITY_REG[2]                                                                                                                                                                      ; 2       ;
; RESTRICT_CAPABILITY_REG[0]                                                                                                                                                                      ; 2       ;
; RESTRICT_CAPABILITY_REG[1]                                                                                                                                                                      ; 3       ;
; flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|flash_drshft_reg                 ; 2       ;
; flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_csr_controller:avmm_csr_controller|csr_sector_page_erase_addr_reg[20] ; 7       ;
; flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_csr_controller:avmm_csr_controller|csr_sector_page_erase_addr_reg[21] ; 6       ;
; flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_csr_controller:avmm_csr_controller|csr_sector_page_erase_addr_reg[22] ; 7       ;
; flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_csr_controller:avmm_csr_controller|csr_sector_page_erase_addr_reg[12] ; 2       ;
; flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_csr_controller:avmm_csr_controller|csr_sector_page_erase_addr_reg[13] ; 2       ;
; flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_csr_controller:avmm_csr_controller|csr_sector_page_erase_addr_reg[14] ; 2       ;
; flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_csr_controller:avmm_csr_controller|csr_sector_page_erase_addr_reg[15] ; 2       ;
; flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_csr_controller:avmm_csr_controller|csr_sector_page_erase_addr_reg[19] ; 8       ;
; flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_csr_controller:avmm_csr_controller|csr_sector_page_erase_addr_reg[11] ; 2       ;
; flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_csr_controller:avmm_csr_controller|csr_sector_page_erase_addr_reg[16] ; 2       ;
; flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_csr_controller:avmm_csr_controller|csr_sector_page_erase_addr_reg[17] ; 6       ;
; flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_csr_controller:avmm_csr_controller|csr_sector_page_erase_addr_reg[18] ; 6       ;
; flash_controller:\flash_on:flash_controller_inst|robin_reg[7]                                                                                                                                   ; 6       ;
; PSG_volume_profile:\psg_on:vol_profile1|channelsel_reg[5]                                                                                                                                       ; 10      ;
; PSG_STEREOMODE_REG[0]                                                                                                                                                                           ; 4       ;
; pokey:pokey1|serial_out_reg                                                                                                                                                                     ; 3       ;
; slave_timing_6502:bus_adapt|phi_cs_reg                                                                                                                                                          ; 2       ;
; stereo_detect:\auto_stereo:a4|addr_bit_sync_reg                                                                                                                                                 ; 2       ;
; flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_csr_controller:avmm_csr_controller|csr_wp_mode[1]                     ; 2       ;
; flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_csr_controller:avmm_csr_controller|csr_wp_mode[2]                     ; 2       ;
; flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_csr_controller:avmm_csr_controller|csr_wp_mode[3]                     ; 2       ;
; flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_csr_controller:avmm_csr_controller|csr_wp_mode[4]                     ; 1       ;
; pokey:\POKEY_ON:1:pokeyx|irq_n_reg                                                                                                                                                              ; 1       ;
; pokey:\POKEY_ON:2:pokeyx|irq_n_reg                                                                                                                                                              ; 1       ;
; pokey:\POKEY_ON:3:pokeyx|irq_n_reg                                                                                                                                                              ; 1       ;
; pokey:pokey1|irq_n_reg                                                                                                                                                                          ; 1       ;
; CHANNEL_EN_REG[4]                                                                                                                                                                               ; 2       ;
; i2c_master:\iox_on:i2c_master0|sda_int                                                                                                                                                          ; 2       ;
; flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_csr_controller:avmm_csr_controller|csr_wp_mode[0]                     ; 2       ;
; CPU_FLASH_WRITE_N_REG                                                                                                                                                                           ; 3       ;
; SID_top:\sid_on:sid1|statevariable_f_dirty_reg                                                                                                                                                  ; 2       ;
; SID_top:\sid_on:sid1|statevariable_q_dirty_reg                                                                                                                                                  ; 3       ;
; SID_top:\sid_on:sid2|statevariable_f_dirty_reg                                                                                                                                                  ; 2       ;
; SID_top:\sid_on:sid2|statevariable_q_dirty_reg                                                                                                                                                  ; 3       ;
; pokey_mixer_mux:pokey_mixer_both|CHANNEL_DIRTY_REG[2]                                                                                                                                           ; 3       ;
; pokey_mixer_mux:pokey_mixer_both|CHANNEL_DIRTY_REG[1]                                                                                                                                           ; 4       ;
; pokey_mixer_mux:pokey_mixer_both|CHANNEL_DIRTY_REG[0]                                                                                                                                           ; 3       ;
; pokey_mixer_mux:pokey_mixer_both|CHANNEL_DIRTY_REG[3]                                                                                                                                           ; 4       ;
; PSG_top:\psg_on:PSG_1|PSG_volume:vol_a|changed_reg                                                                                                                                              ; 1       ;
; PSG_top:\psg_on:PSG_1|PSG_volume:vol_b|changed_reg                                                                                                                                              ; 1       ;
; PSG_top:\psg_on:PSG_1|PSG_volume:vol_c|changed_reg                                                                                                                                              ; 1       ;
; PSG_top:\psg_on:PSG_2|PSG_volume:vol_a|changed_reg                                                                                                                                              ; 1       ;
; PSG_top:\psg_on:PSG_2|PSG_volume:vol_b|changed_reg                                                                                                                                              ; 1       ;
; PSG_top:\psg_on:PSG_2|PSG_volume:vol_c|changed_reg                                                                                                                                              ; 1       ;
; flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_csr_controller:avmm_csr_controller|csr_sector_page_erase_addr_reg[0]  ; 2       ;
; flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_csr_controller:avmm_csr_controller|csr_sector_page_erase_addr_reg[1]  ; 2       ;
; flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_csr_controller:avmm_csr_controller|csr_sector_page_erase_addr_reg[2]  ; 2       ;
; flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_csr_controller:avmm_csr_controller|csr_sector_page_erase_addr_reg[3]  ; 2       ;
; flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_csr_controller:avmm_csr_controller|csr_sector_page_erase_addr_reg[4]  ; 2       ;
; flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_csr_controller:avmm_csr_controller|csr_sector_page_erase_addr_reg[5]  ; 2       ;
; flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_csr_controller:avmm_csr_controller|csr_sector_page_erase_addr_reg[6]  ; 2       ;
; flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_csr_controller:avmm_csr_controller|csr_sector_page_erase_addr_reg[7]  ; 2       ;
; flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_csr_controller:avmm_csr_controller|csr_sector_page_erase_addr_reg[8]  ; 2       ;
; flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_csr_controller:avmm_csr_controller|csr_sector_page_erase_addr_reg[9]  ; 2       ;
; flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_csr_controller:avmm_csr_controller|csr_sector_page_erase_addr_reg[10] ; 2       ;
; DETECT_RIGHT_REG                                                                                                                                                                                ; 2       ;
; pokey:\POKEY_ON:1:pokeyx|irqst_reg[3]                                                                                                                                                           ; 2       ;
; pokey:\POKEY_ON:1:pokeyx|irqst_reg[5]                                                                                                                                                           ; 4       ;
; pokey:\POKEY_ON:1:pokeyx|irqst_reg[4]                                                                                                                                                           ; 3       ;
; pokey:\POKEY_ON:1:pokeyx|irqst_reg[2]                                                                                                                                                           ; 3       ;
; pokey:\POKEY_ON:1:pokeyx|irqst_reg[1]                                                                                                                                                           ; 3       ;
; pokey:\POKEY_ON:1:pokeyx|irqst_reg[0]                                                                                                                                                           ; 3       ;
; pokey:\POKEY_ON:2:pokeyx|irqst_reg[3]                                                                                                                                                           ; 2       ;
; pokey:\POKEY_ON:2:pokeyx|irqst_reg[5]                                                                                                                                                           ; 4       ;
; pokey:\POKEY_ON:2:pokeyx|irqst_reg[4]                                                                                                                                                           ; 3       ;
; pokey:\POKEY_ON:2:pokeyx|irqst_reg[2]                                                                                                                                                           ; 3       ;
; pokey:\POKEY_ON:2:pokeyx|irqst_reg[1]                                                                                                                                                           ; 3       ;
; pokey:\POKEY_ON:2:pokeyx|irqst_reg[0]                                                                                                                                                           ; 3       ;
; pokey:\POKEY_ON:3:pokeyx|irqst_reg[3]                                                                                                                                                           ; 2       ;
; pokey:\POKEY_ON:3:pokeyx|irqst_reg[5]                                                                                                                                                           ; 4       ;
; pokey:\POKEY_ON:3:pokeyx|irqst_reg[4]                                                                                                                                                           ; 3       ;
; pokey:\POKEY_ON:3:pokeyx|irqst_reg[2]                                                                                                                                                           ; 3       ;
; pokey:\POKEY_ON:3:pokeyx|irqst_reg[1]                                                                                                                                                           ; 3       ;
; pokey:\POKEY_ON:3:pokeyx|irqst_reg[0]                                                                                                                                                           ; 3       ;
; pokey:pokey1|irqst_reg[3]                                                                                                                                                                       ; 2       ;
; pokey:pokey1|irqst_reg[7]                                                                                                                                                                       ; 3       ;
; Total number of inverted registers = 505*                                                                                                                                                       ;         ;
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------+
* Table truncated at 100 items. To change the number of inverted registers reported, set the "Number of Inverted Registers Reported" option under Assignments->Settings->Analysis and Synthesis Settings->More Settings


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Registers Packed Into Inferred Megafunctions                                                                                                                                                                                                     ;
+----------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------+------------+
; Register Name                                                                                                  ; Megafunction                                                                                                       ; Type       ;
+----------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------+------------+
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:2:sample_ram_inst|q_ram[0..8]  ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:2:sample_ram_inst|ram_block_rtl_0  ; RAM        ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:10:sample_ram_inst|q_ram[0..8] ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:10:sample_ram_inst|ram_block_rtl_0 ; RAM        ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:18:sample_ram_inst|q_ram[0..8] ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:18:sample_ram_inst|ram_block_rtl_0 ; RAM        ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:26:sample_ram_inst|q_ram[0..8] ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:26:sample_ram_inst|ram_block_rtl_0 ; RAM        ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:34:sample_ram_inst|q_ram[0..8] ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:34:sample_ram_inst|ram_block_rtl_0 ; RAM        ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:42:sample_ram_inst|q_ram[0..8] ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:42:sample_ram_inst|ram_block_rtl_0 ; RAM        ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:50:sample_ram_inst|q_ram[0..8] ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:50:sample_ram_inst|ram_block_rtl_0 ; RAM        ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:56:sample_ram_inst|q_ram[0..8] ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:56:sample_ram_inst|ram_block_rtl_0 ; RAM        ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:0:sample_ram_inst|q_ram[0..8]  ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:0:sample_ram_inst|ram_block_rtl_0  ; RAM        ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:1:sample_ram_inst|q_ram[0..8]  ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:1:sample_ram_inst|ram_block_rtl_0  ; RAM        ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:3:sample_ram_inst|q_ram[0..8]  ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:3:sample_ram_inst|ram_block_rtl_0  ; RAM        ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:4:sample_ram_inst|q_ram[0..8]  ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:4:sample_ram_inst|ram_block_rtl_0  ; RAM        ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:5:sample_ram_inst|q_ram[0..8]  ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:5:sample_ram_inst|ram_block_rtl_0  ; RAM        ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:6:sample_ram_inst|q_ram[0..8]  ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:6:sample_ram_inst|ram_block_rtl_0  ; RAM        ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:7:sample_ram_inst|q_ram[0..8]  ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:7:sample_ram_inst|ram_block_rtl_0  ; RAM        ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:8:sample_ram_inst|q_ram[0..8]  ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:8:sample_ram_inst|ram_block_rtl_0  ; RAM        ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:9:sample_ram_inst|q_ram[0..8]  ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:9:sample_ram_inst|ram_block_rtl_0  ; RAM        ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:11:sample_ram_inst|q_ram[0..8] ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:11:sample_ram_inst|ram_block_rtl_0 ; RAM        ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:12:sample_ram_inst|q_ram[0..8] ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:12:sample_ram_inst|ram_block_rtl_0 ; RAM        ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:13:sample_ram_inst|q_ram[0..8] ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:13:sample_ram_inst|ram_block_rtl_0 ; RAM        ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:14:sample_ram_inst|q_ram[0..8] ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:14:sample_ram_inst|ram_block_rtl_0 ; RAM        ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:15:sample_ram_inst|q_ram[0..8] ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:15:sample_ram_inst|ram_block_rtl_0 ; RAM        ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:16:sample_ram_inst|q_ram[0..8] ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:16:sample_ram_inst|ram_block_rtl_0 ; RAM        ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:17:sample_ram_inst|q_ram[0..8] ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:17:sample_ram_inst|ram_block_rtl_0 ; RAM        ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:19:sample_ram_inst|q_ram[0..8] ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:19:sample_ram_inst|ram_block_rtl_0 ; RAM        ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:20:sample_ram_inst|q_ram[0..8] ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:20:sample_ram_inst|ram_block_rtl_0 ; RAM        ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:21:sample_ram_inst|q_ram[0..8] ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:21:sample_ram_inst|ram_block_rtl_0 ; RAM        ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:22:sample_ram_inst|q_ram[0..8] ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:22:sample_ram_inst|ram_block_rtl_0 ; RAM        ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:23:sample_ram_inst|q_ram[0..8] ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:23:sample_ram_inst|ram_block_rtl_0 ; RAM        ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:24:sample_ram_inst|q_ram[0..8] ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:24:sample_ram_inst|ram_block_rtl_0 ; RAM        ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:25:sample_ram_inst|q_ram[0..8] ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:25:sample_ram_inst|ram_block_rtl_0 ; RAM        ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:27:sample_ram_inst|q_ram[0..8] ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:27:sample_ram_inst|ram_block_rtl_0 ; RAM        ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:28:sample_ram_inst|q_ram[0..8] ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:28:sample_ram_inst|ram_block_rtl_0 ; RAM        ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:29:sample_ram_inst|q_ram[0..8] ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:29:sample_ram_inst|ram_block_rtl_0 ; RAM        ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:30:sample_ram_inst|q_ram[0..8] ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:30:sample_ram_inst|ram_block_rtl_0 ; RAM        ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:31:sample_ram_inst|q_ram[0..8] ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:31:sample_ram_inst|ram_block_rtl_0 ; RAM        ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:32:sample_ram_inst|q_ram[0..8] ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:32:sample_ram_inst|ram_block_rtl_0 ; RAM        ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:33:sample_ram_inst|q_ram[0..8] ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:33:sample_ram_inst|ram_block_rtl_0 ; RAM        ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:35:sample_ram_inst|q_ram[0..8] ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:35:sample_ram_inst|ram_block_rtl_0 ; RAM        ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:36:sample_ram_inst|q_ram[0..8] ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:36:sample_ram_inst|ram_block_rtl_0 ; RAM        ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:37:sample_ram_inst|q_ram[0..8] ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:37:sample_ram_inst|ram_block_rtl_0 ; RAM        ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:38:sample_ram_inst|q_ram[0..8] ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:38:sample_ram_inst|ram_block_rtl_0 ; RAM        ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:39:sample_ram_inst|q_ram[0..8] ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:39:sample_ram_inst|ram_block_rtl_0 ; RAM        ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:40:sample_ram_inst|q_ram[0..8] ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:40:sample_ram_inst|ram_block_rtl_0 ; RAM        ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:41:sample_ram_inst|q_ram[0..8] ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:41:sample_ram_inst|ram_block_rtl_0 ; RAM        ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:43:sample_ram_inst|q_ram[0..8] ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:43:sample_ram_inst|ram_block_rtl_0 ; RAM        ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:44:sample_ram_inst|q_ram[0..8] ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:44:sample_ram_inst|ram_block_rtl_0 ; RAM        ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:45:sample_ram_inst|q_ram[0..8] ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:45:sample_ram_inst|ram_block_rtl_0 ; RAM        ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:46:sample_ram_inst|q_ram[0..8] ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:46:sample_ram_inst|ram_block_rtl_0 ; RAM        ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:47:sample_ram_inst|q_ram[0..8] ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:47:sample_ram_inst|ram_block_rtl_0 ; RAM        ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:48:sample_ram_inst|q_ram[0..8] ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:48:sample_ram_inst|ram_block_rtl_0 ; RAM        ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:49:sample_ram_inst|q_ram[0..8] ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:49:sample_ram_inst|ram_block_rtl_0 ; RAM        ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:51:sample_ram_inst|q_ram[0..8] ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:51:sample_ram_inst|ram_block_rtl_0 ; RAM        ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:52:sample_ram_inst|q_ram[0..8] ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:52:sample_ram_inst|ram_block_rtl_0 ; RAM        ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:53:sample_ram_inst|q_ram[0..8] ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:53:sample_ram_inst|ram_block_rtl_0 ; RAM        ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:54:sample_ram_inst|q_ram[0..8] ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:54:sample_ram_inst|ram_block_rtl_0 ; RAM        ;
; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:55:sample_ram_inst|q_ram[0..8] ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:55:sample_ram_inst|ram_block_rtl_0 ; RAM        ;
; SID_top:\sid_on:sid2|SID_envelope:envelope_a|attack_del3_reg[0..3]                                             ; SID_top:\sid_on:sid2|SID_envelope:envelope_a|attack_del1_reg_rtl_0                                                 ; SHIFT_TAPS ;
; SID_top:\sid_on:sid2|SID_envelope:envelope_a|attack_del2_reg[0..3]                                             ; SID_top:\sid_on:sid2|SID_envelope:envelope_a|attack_del1_reg_rtl_0                                                 ; SHIFT_TAPS ;
; SID_top:\sid_on:sid2|SID_envelope:envelope_a|attack_del1_reg[0..3]                                             ; SID_top:\sid_on:sid2|SID_envelope:envelope_a|attack_del1_reg_rtl_0                                                 ; SHIFT_TAPS ;
; SID_top:\sid_on:sid2|SID_envelope:envelope_a|decay_del3_reg[0..3]                                              ; SID_top:\sid_on:sid2|SID_envelope:envelope_a|attack_del1_reg_rtl_0                                                 ; SHIFT_TAPS ;
; SID_top:\sid_on:sid2|SID_envelope:envelope_a|decay_del2_reg[0..3]                                              ; SID_top:\sid_on:sid2|SID_envelope:envelope_a|attack_del1_reg_rtl_0                                                 ; SHIFT_TAPS ;
; SID_top:\sid_on:sid2|SID_envelope:envelope_a|decay_del1_reg[0..3]                                              ; SID_top:\sid_on:sid2|SID_envelope:envelope_a|attack_del1_reg_rtl_0                                                 ; SHIFT_TAPS ;
; SID_top:\sid_on:sid2|SID_envelope:envelope_a|release_del3_reg[0..3]                                            ; SID_top:\sid_on:sid2|SID_envelope:envelope_a|attack_del1_reg_rtl_0                                                 ; SHIFT_TAPS ;
; SID_top:\sid_on:sid2|SID_envelope:envelope_a|release_del2_reg[0..3]                                            ; SID_top:\sid_on:sid2|SID_envelope:envelope_a|attack_del1_reg_rtl_0                                                 ; SHIFT_TAPS ;
; SID_top:\sid_on:sid2|SID_envelope:envelope_a|release_del1_reg[0..3]                                            ; SID_top:\sid_on:sid2|SID_envelope:envelope_a|attack_del1_reg_rtl_0                                                 ; SHIFT_TAPS ;
; SID_top:\sid_on:sid2|SID_envelope:envelope_b|attack_del3_reg[0..3]                                             ; SID_top:\sid_on:sid2|SID_envelope:envelope_a|attack_del1_reg_rtl_0                                                 ; SHIFT_TAPS ;
; SID_top:\sid_on:sid2|SID_envelope:envelope_b|attack_del2_reg[0..3]                                             ; SID_top:\sid_on:sid2|SID_envelope:envelope_a|attack_del1_reg_rtl_0                                                 ; SHIFT_TAPS ;
; SID_top:\sid_on:sid2|SID_envelope:envelope_b|attack_del1_reg[0..3]                                             ; SID_top:\sid_on:sid2|SID_envelope:envelope_a|attack_del1_reg_rtl_0                                                 ; SHIFT_TAPS ;
; SID_top:\sid_on:sid2|SID_envelope:envelope_b|decay_del3_reg[0..3]                                              ; SID_top:\sid_on:sid2|SID_envelope:envelope_a|attack_del1_reg_rtl_0                                                 ; SHIFT_TAPS ;
; SID_top:\sid_on:sid2|SID_envelope:envelope_b|decay_del2_reg[0..3]                                              ; SID_top:\sid_on:sid2|SID_envelope:envelope_a|attack_del1_reg_rtl_0                                                 ; SHIFT_TAPS ;
; SID_top:\sid_on:sid2|SID_envelope:envelope_b|decay_del1_reg[0..3]                                              ; SID_top:\sid_on:sid2|SID_envelope:envelope_a|attack_del1_reg_rtl_0                                                 ; SHIFT_TAPS ;
; SID_top:\sid_on:sid2|SID_envelope:envelope_b|release_del3_reg[0..3]                                            ; SID_top:\sid_on:sid2|SID_envelope:envelope_a|attack_del1_reg_rtl_0                                                 ; SHIFT_TAPS ;
; SID_top:\sid_on:sid2|SID_envelope:envelope_b|release_del2_reg[0..3]                                            ; SID_top:\sid_on:sid2|SID_envelope:envelope_a|attack_del1_reg_rtl_0                                                 ; SHIFT_TAPS ;
; SID_top:\sid_on:sid2|SID_envelope:envelope_b|release_del1_reg[0..3]                                            ; SID_top:\sid_on:sid2|SID_envelope:envelope_a|attack_del1_reg_rtl_0                                                 ; SHIFT_TAPS ;
; SID_top:\sid_on:sid2|SID_envelope:envelope_c|attack_del3_reg[0..3]                                             ; SID_top:\sid_on:sid2|SID_envelope:envelope_a|attack_del1_reg_rtl_0                                                 ; SHIFT_TAPS ;
; SID_top:\sid_on:sid2|SID_envelope:envelope_c|attack_del2_reg[0..3]                                             ; SID_top:\sid_on:sid2|SID_envelope:envelope_a|attack_del1_reg_rtl_0                                                 ; SHIFT_TAPS ;
; SID_top:\sid_on:sid2|SID_envelope:envelope_c|attack_del1_reg[0..3]                                             ; SID_top:\sid_on:sid2|SID_envelope:envelope_a|attack_del1_reg_rtl_0                                                 ; SHIFT_TAPS ;
; SID_top:\sid_on:sid2|SID_envelope:envelope_c|decay_del3_reg[0..3]                                              ; SID_top:\sid_on:sid2|SID_envelope:envelope_a|attack_del1_reg_rtl_0                                                 ; SHIFT_TAPS ;
; SID_top:\sid_on:sid2|SID_envelope:envelope_c|decay_del2_reg[0..3]                                              ; SID_top:\sid_on:sid2|SID_envelope:envelope_a|attack_del1_reg_rtl_0                                                 ; SHIFT_TAPS ;
; SID_top:\sid_on:sid2|SID_envelope:envelope_c|decay_del1_reg[0..3]                                              ; SID_top:\sid_on:sid2|SID_envelope:envelope_a|attack_del1_reg_rtl_0                                                 ; SHIFT_TAPS ;
; SID_top:\sid_on:sid2|SID_envelope:envelope_c|release_del3_reg[0..3]                                            ; SID_top:\sid_on:sid2|SID_envelope:envelope_a|attack_del1_reg_rtl_0                                                 ; SHIFT_TAPS ;
; SID_top:\sid_on:sid2|SID_envelope:envelope_c|release_del2_reg[0..3]                                            ; SID_top:\sid_on:sid2|SID_envelope:envelope_a|attack_del1_reg_rtl_0                                                 ; SHIFT_TAPS ;
; SID_top:\sid_on:sid2|SID_envelope:envelope_c|release_del1_reg[0..3]                                            ; SID_top:\sid_on:sid2|SID_envelope:envelope_a|attack_del1_reg_rtl_0                                                 ; SHIFT_TAPS ;
; SID_top:\sid_on:sid1|SID_envelope:envelope_a|attack_del3_reg[0..3]                                             ; SID_top:\sid_on:sid2|SID_envelope:envelope_a|attack_del1_reg_rtl_0                                                 ; SHIFT_TAPS ;
; SID_top:\sid_on:sid1|SID_envelope:envelope_a|attack_del2_reg[0..3]                                             ; SID_top:\sid_on:sid2|SID_envelope:envelope_a|attack_del1_reg_rtl_0                                                 ; SHIFT_TAPS ;
; SID_top:\sid_on:sid1|SID_envelope:envelope_a|attack_del1_reg[0..3]                                             ; SID_top:\sid_on:sid2|SID_envelope:envelope_a|attack_del1_reg_rtl_0                                                 ; SHIFT_TAPS ;
; SID_top:\sid_on:sid1|SID_envelope:envelope_a|decay_del3_reg[0..3]                                              ; SID_top:\sid_on:sid2|SID_envelope:envelope_a|attack_del1_reg_rtl_0                                                 ; SHIFT_TAPS ;
; SID_top:\sid_on:sid1|SID_envelope:envelope_a|decay_del2_reg[0..3]                                              ; SID_top:\sid_on:sid2|SID_envelope:envelope_a|attack_del1_reg_rtl_0                                                 ; SHIFT_TAPS ;
; SID_top:\sid_on:sid1|SID_envelope:envelope_a|decay_del1_reg[0..3]                                              ; SID_top:\sid_on:sid2|SID_envelope:envelope_a|attack_del1_reg_rtl_0                                                 ; SHIFT_TAPS ;
; SID_top:\sid_on:sid1|SID_envelope:envelope_a|release_del3_reg[0..3]                                            ; SID_top:\sid_on:sid2|SID_envelope:envelope_a|attack_del1_reg_rtl_0                                                 ; SHIFT_TAPS ;
; SID_top:\sid_on:sid1|SID_envelope:envelope_a|release_del2_reg[0..3]                                            ; SID_top:\sid_on:sid2|SID_envelope:envelope_a|attack_del1_reg_rtl_0                                                 ; SHIFT_TAPS ;
; SID_top:\sid_on:sid1|SID_envelope:envelope_a|release_del1_reg[0..3]                                            ; SID_top:\sid_on:sid2|SID_envelope:envelope_a|attack_del1_reg_rtl_0                                                 ; SHIFT_TAPS ;
; SID_top:\sid_on:sid1|SID_envelope:envelope_b|attack_del3_reg[0..3]                                             ; SID_top:\sid_on:sid2|SID_envelope:envelope_a|attack_del1_reg_rtl_0                                                 ; SHIFT_TAPS ;
; SID_top:\sid_on:sid1|SID_envelope:envelope_b|attack_del2_reg[0..3]                                             ; SID_top:\sid_on:sid2|SID_envelope:envelope_a|attack_del1_reg_rtl_0                                                 ; SHIFT_TAPS ;
; SID_top:\sid_on:sid1|SID_envelope:envelope_b|attack_del1_reg[0..3]                                             ; SID_top:\sid_on:sid2|SID_envelope:envelope_a|attack_del1_reg_rtl_0                                                 ; SHIFT_TAPS ;
; SID_top:\sid_on:sid1|SID_envelope:envelope_b|decay_del3_reg[0..3]                                              ; SID_top:\sid_on:sid2|SID_envelope:envelope_a|attack_del1_reg_rtl_0                                                 ; SHIFT_TAPS ;
; SID_top:\sid_on:sid1|SID_envelope:envelope_b|decay_del2_reg[0..3]                                              ; SID_top:\sid_on:sid2|SID_envelope:envelope_a|attack_del1_reg_rtl_0                                                 ; SHIFT_TAPS ;
; SID_top:\sid_on:sid1|SID_envelope:envelope_b|decay_del1_reg[0..3]                                              ; SID_top:\sid_on:sid2|SID_envelope:envelope_a|attack_del1_reg_rtl_0                                                 ; SHIFT_TAPS ;
; SID_top:\sid_on:sid1|SID_envelope:envelope_b|release_del3_reg[0..3]                                            ; SID_top:\sid_on:sid2|SID_envelope:envelope_a|attack_del1_reg_rtl_0                                                 ; SHIFT_TAPS ;
; SID_top:\sid_on:sid1|SID_envelope:envelope_b|release_del2_reg[0..3]                                            ; SID_top:\sid_on:sid2|SID_envelope:envelope_a|attack_del1_reg_rtl_0                                                 ; SHIFT_TAPS ;
; SID_top:\sid_on:sid1|SID_envelope:envelope_b|release_del1_reg[0..3]                                            ; SID_top:\sid_on:sid2|SID_envelope:envelope_a|attack_del1_reg_rtl_0                                                 ; SHIFT_TAPS ;
; SID_top:\sid_on:sid1|SID_envelope:envelope_c|attack_del3_reg[0..3]                                             ; SID_top:\sid_on:sid2|SID_envelope:envelope_a|attack_del1_reg_rtl_0                                                 ; SHIFT_TAPS ;
; SID_top:\sid_on:sid1|SID_envelope:envelope_c|attack_del2_reg[0..3]                                             ; SID_top:\sid_on:sid2|SID_envelope:envelope_a|attack_del1_reg_rtl_0                                                 ; SHIFT_TAPS ;
; SID_top:\sid_on:sid1|SID_envelope:envelope_c|attack_del1_reg[0..3]                                             ; SID_top:\sid_on:sid2|SID_envelope:envelope_a|attack_del1_reg_rtl_0                                                 ; SHIFT_TAPS ;
; SID_top:\sid_on:sid1|SID_envelope:envelope_c|decay_del3_reg[0..3]                                              ; SID_top:\sid_on:sid2|SID_envelope:envelope_a|attack_del1_reg_rtl_0                                                 ; SHIFT_TAPS ;
; SID_top:\sid_on:sid1|SID_envelope:envelope_c|decay_del2_reg[0..3]                                              ; SID_top:\sid_on:sid2|SID_envelope:envelope_a|attack_del1_reg_rtl_0                                                 ; SHIFT_TAPS ;
; SID_top:\sid_on:sid1|SID_envelope:envelope_c|decay_del1_reg[0..3]                                              ; SID_top:\sid_on:sid2|SID_envelope:envelope_a|attack_del1_reg_rtl_0                                                 ; SHIFT_TAPS ;
; SID_top:\sid_on:sid1|SID_envelope:envelope_c|release_del3_reg[0..3]                                            ; SID_top:\sid_on:sid2|SID_envelope:envelope_a|attack_del1_reg_rtl_0                                                 ; SHIFT_TAPS ;
; SID_top:\sid_on:sid1|SID_envelope:envelope_c|release_del2_reg[0..3]                                            ; SID_top:\sid_on:sid2|SID_envelope:envelope_a|attack_del1_reg_rtl_0                                                 ; SHIFT_TAPS ;
; SID_top:\sid_on:sid1|SID_envelope:envelope_c|release_del1_reg[0..3]                                            ; SID_top:\sid_on:sid2|SID_envelope:envelope_a|attack_del1_reg_rtl_0                                                 ; SHIFT_TAPS ;
+----------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------+------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Multiplexer Restructuring Statistics (Restructuring Performed)                                                                                                                                                                                                                                                          ;
+--------------------+-----------+---------------+----------------------+------------------------+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Multiplexer Inputs ; Bus Width ; Baseline Area ; Area if Restructured ; Saving if Restructured ; Registered ; Example Multiplexer Output                                                                                                                                                                                ;
+--------------------+-----------+---------------+----------------------+------------------------+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; 3:1                ; 9 bits    ; 18 LEs        ; 0 LEs                ; 18 LEs                 ; Yes        ; |pokeymax|i2c_master:\iox_on:i2c_master0|data_tx[3]                                                                                                                                                       ;
; 3:1                ; 20 bits   ; 40 LEs        ; 40 LEs               ; 0 LEs                  ; Yes        ; |pokeymax|flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|flash_addr_wire_neg_reg[11]      ;
; 3:1                ; 3 bits    ; 6 LEs         ; 6 LEs                ; 0 LEs                  ; Yes        ; |pokeymax|flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|flash_addr_wire_neg_reg[20]      ;
; 3:1                ; 5 bits    ; 10 LEs        ; 5 LEs                ; 5 LEs                  ; Yes        ; |pokeymax|pokey:pokey1|delay_line:serout_clock_delay|shift_reg[0]                                                                                                                                         ;
; 3:1                ; 3 bits    ; 6 LEs         ; 3 LEs                ; 3 LEs                  ; Yes        ; |pokeymax|pokey:pokey1|pokey_countdown_timer:timer1|delay_line:underflow0_delay|shift_reg[0]                                                                                                              ;
; 3:1                ; 3 bits    ; 6 LEs         ; 3 LEs                ; 3 LEs                  ; Yes        ; |pokeymax|pokey:pokey1|pokey_countdown_timer:timer0|delay_line:underflow0_delay|shift_reg[1]                                                                                                              ;
; 3:1                ; 3 bits    ; 6 LEs         ; 3 LEs                ; 3 LEs                  ; Yes        ; |pokeymax|pokey:pokey1|pokey_countdown_timer:timer3|delay_line:underflow0_delay|shift_reg[1]                                                                                                              ;
; 3:1                ; 3 bits    ; 6 LEs         ; 3 LEs                ; 3 LEs                  ; Yes        ; |pokeymax|pokey:\POKEY_ON:1:pokeyx|pokey_countdown_timer:timer3|delay_line:underflow0_delay|shift_reg[0]                                                                                                  ;
; 3:1                ; 3 bits    ; 6 LEs         ; 3 LEs                ; 3 LEs                  ; Yes        ; |pokeymax|pokey:\POKEY_ON:1:pokeyx|pokey_countdown_timer:timer1|delay_line:underflow0_delay|shift_reg[2]                                                                                                  ;
; 3:1                ; 3 bits    ; 6 LEs         ; 3 LEs                ; 3 LEs                  ; Yes        ; |pokeymax|pokey:\POKEY_ON:1:pokeyx|pokey_countdown_timer:timer0|delay_line:underflow0_delay|shift_reg[0]                                                                                                  ;
; 3:1                ; 3 bits    ; 6 LEs         ; 3 LEs                ; 3 LEs                  ; Yes        ; |pokeymax|pokey:\POKEY_ON:2:pokeyx|pokey_countdown_timer:timer3|delay_line:underflow0_delay|shift_reg[0]                                                                                                  ;
; 3:1                ; 3 bits    ; 6 LEs         ; 3 LEs                ; 3 LEs                  ; Yes        ; |pokeymax|pokey:\POKEY_ON:2:pokeyx|pokey_countdown_timer:timer1|delay_line:underflow0_delay|shift_reg[1]                                                                                                  ;
; 3:1                ; 3 bits    ; 6 LEs         ; 3 LEs                ; 3 LEs                  ; Yes        ; |pokeymax|pokey:\POKEY_ON:2:pokeyx|pokey_countdown_timer:timer0|delay_line:underflow0_delay|shift_reg[0]                                                                                                  ;
; 3:1                ; 3 bits    ; 6 LEs         ; 3 LEs                ; 3 LEs                  ; Yes        ; |pokeymax|pokey:\POKEY_ON:3:pokeyx|pokey_countdown_timer:timer3|delay_line:underflow0_delay|shift_reg[2]                                                                                                  ;
; 3:1                ; 3 bits    ; 6 LEs         ; 3 LEs                ; 3 LEs                  ; Yes        ; |pokeymax|pokey:\POKEY_ON:3:pokeyx|pokey_countdown_timer:timer1|delay_line:underflow0_delay|shift_reg[1]                                                                                                  ;
; 3:1                ; 3 bits    ; 6 LEs         ; 3 LEs                ; 3 LEs                  ; Yes        ; |pokeymax|pokey:\POKEY_ON:3:pokeyx|pokey_countdown_timer:timer0|delay_line:underflow0_delay|shift_reg[0]                                                                                                  ;
; 3:1                ; 3 bits    ; 6 LEs         ; 3 LEs                ; 3 LEs                  ; Yes        ; |pokeymax|pokey:\POKEY_ON:3:pokeyx|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[2]                                                                                                  ;
; 3:1                ; 3 bits    ; 6 LEs         ; 3 LEs                ; 3 LEs                  ; Yes        ; |pokeymax|pokey:\POKEY_ON:2:pokeyx|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[0]                                                                                                  ;
; 3:1                ; 3 bits    ; 6 LEs         ; 3 LEs                ; 3 LEs                  ; Yes        ; |pokeymax|pokey:pokey1|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[0]                                                                                                              ;
; 3:1                ; 3 bits    ; 6 LEs         ; 3 LEs                ; 3 LEs                  ; Yes        ; |pokeymax|pokey:\POKEY_ON:1:pokeyx|pokey_countdown_timer:timer2|delay_line:underflow0_delay|shift_reg[0]                                                                                                  ;
; 3:1                ; 5 bits    ; 10 LEs        ; 5 LEs                ; 5 LEs                  ; Yes        ; |pokeymax|pokey:\POKEY_ON:1:pokeyx|delay_line:serin_clock_delay|shift_reg[0]                                                                                                                              ;
; 3:1                ; 5 bits    ; 10 LEs        ; 5 LEs                ; 5 LEs                  ; Yes        ; |pokeymax|pokey:\POKEY_ON:2:pokeyx|delay_line:serin_clock_delay|shift_reg[2]                                                                                                                              ;
; 3:1                ; 5 bits    ; 10 LEs        ; 5 LEs                ; 5 LEs                  ; Yes        ; |pokeymax|pokey:\POKEY_ON:3:pokeyx|delay_line:serin_clock_delay|shift_reg[3]                                                                                                                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 2 LEs                ; 2 LEs                  ; Yes        ; |pokeymax|PSG_PROFILESEL_REG[0]                                                                                                                                                                           ;
; 3:1                ; 3 bits    ; 6 LEs         ; 3 LEs                ; 3 LEs                  ; Yes        ; |pokeymax|SIO_DATA_VOLUME_REG[0]                                                                                                                                                                          ;
; 3:1                ; 8 bits    ; 16 LEs        ; 8 LEs                ; 8 LEs                  ; Yes        ; |pokeymax|pokey:pokey1|pot_counter_reg[7]                                                                                                                                                                 ;
; 3:1                ; 39 bits   ; 78 LEs        ; 0 LEs                ; 78 LEs                 ; Yes        ; |pokeymax|flash_controller:\flash_on:flash_controller_inst|request_di_reg[19]                                                                                                                             ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |pokeymax|SID_top:\sid_on:sid1|statevariable_F_reg[4]                                                                                                                                                     ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |pokeymax|SID_top:\sid_on:sid2|statevariable_F_reg[2]                                                                                                                                                     ;
; 3:1                ; 18 bits   ; 36 LEs        ; 18 LEs               ; 18 LEs                 ; Yes        ; |pokeymax|PSG_volume_profile:\psg_on:vol_profile1|acc_reg[8]                                                                                                                                              ;
; 3:1                ; 5 bits    ; 10 LEs        ; 5 LEs                ; 5 LEs                  ; Yes        ; |pokeymax|PSG_volume_profile:\psg_on:vol_profile1|channelsel_reg[2]                                                                                                                                       ;
; 3:1                ; 8 bits    ; 16 LEs        ; 0 LEs                ; 16 LEs                 ; Yes        ; |pokeymax|sample_top:\sample_on:sample1|ch0_len_reg[5]                                                                                                                                                    ;
; 3:1                ; 8 bits    ; 16 LEs        ; 0 LEs                ; 16 LEs                 ; Yes        ; |pokeymax|sample_top:\sample_on:sample1|ch1_len_reg[0]                                                                                                                                                    ;
; 3:1                ; 8 bits    ; 16 LEs        ; 0 LEs                ; 16 LEs                 ; Yes        ; |pokeymax|sample_top:\sample_on:sample1|ch2_len_reg[2]                                                                                                                                                    ;
; 3:1                ; 8 bits    ; 16 LEs        ; 0 LEs                ; 16 LEs                 ; Yes        ; |pokeymax|sample_top:\sample_on:sample1|ch3_len_reg[0]                                                                                                                                                    ;
; 3:1                ; 6 bits    ; 12 LEs        ; 6 LEs                ; 6 LEs                  ; Yes        ; |pokeymax|SID_top:\sid_on:sid2|readcount_reg[8]                                                                                                                                                           ;
; 3:1                ; 10 bits   ; 20 LEs        ; 10 LEs               ; 10 LEs                 ; Yes        ; |pokeymax|SID_top:\sid_on:sid2|readcount_reg[14]                                                                                                                                                          ;
; 3:1                ; 6 bits    ; 12 LEs        ; 6 LEs                ; 6 LEs                  ; Yes        ; |pokeymax|SID_top:\sid_on:sid1|readcount_reg[6]                                                                                                                                                           ;
; 3:1                ; 10 bits   ; 20 LEs        ; 10 LEs               ; 10 LEs                 ; Yes        ; |pokeymax|SID_top:\sid_on:sid1|readcount_reg[4]                                                                                                                                                           ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |pokeymax|mixer:mixer1|RIGHT_SNAP_REG[12]                                                                                                                                                                 ;
; 3:1                ; 5 bits    ; 10 LEs        ; 10 LEs               ; 0 LEs                  ; Yes        ; |pokeymax|PSG_top:\psg_on:PSG_1|PSG_envelope:envelope|envelope_reg[2]                                                                                                                                     ;
; 3:1                ; 5 bits    ; 10 LEs        ; 5 LEs                ; 5 LEs                  ; Yes        ; |pokeymax|PSG_top:\psg_on:PSG_1|PSG_envelope:envelope|count_reg[3]                                                                                                                                        ;
; 3:1                ; 5 bits    ; 10 LEs        ; 10 LEs               ; 0 LEs                  ; Yes        ; |pokeymax|PSG_top:\psg_on:PSG_2|PSG_envelope:envelope|envelope_reg[2]                                                                                                                                     ;
; 3:1                ; 5 bits    ; 10 LEs        ; 5 LEs                ; 5 LEs                  ; Yes        ; |pokeymax|PSG_top:\psg_on:PSG_2|PSG_envelope:envelope|count_reg[1]                                                                                                                                        ;
; 4:1                ; 8 bits    ; 16 LEs        ; 8 LEs                ; 8 LEs                  ; Yes        ; |pokeymax|pokey:pokey1|pokey_countdown_timer:timer1|count_reg[5]                                                                                                                                          ;
; 4:1                ; 8 bits    ; 16 LEs        ; 8 LEs                ; 8 LEs                  ; Yes        ; |pokeymax|pokey:pokey1|pokey_countdown_timer:timer0|count_reg[7]                                                                                                                                          ;
; 3:1                ; 8 bits    ; 16 LEs        ; 8 LEs                ; 8 LEs                  ; Yes        ; |pokeymax|pokey:pokey1|serin_shift_reg[7]                                                                                                                                                                 ;
; 4:1                ; 8 bits    ; 16 LEs        ; 8 LEs                ; 8 LEs                  ; Yes        ; |pokeymax|pokey:pokey1|pokey_countdown_timer:timer3|count_reg[6]                                                                                                                                          ;
; 3:1                ; 16 bits   ; 32 LEs        ; 16 LEs               ; 16 LEs                 ; Yes        ; |pokeymax|mixer:mixer1|divided_reg[2]                                                                                                                                                                     ;
; 3:1                ; 24 bits   ; 48 LEs        ; 24 LEs               ; 24 LEs                 ; Yes        ; |pokeymax|mixer:mixer1|RIGHT_PLAYING_COUNT_REG[1]                                                                                                                                                         ;
; 3:1                ; 8 bits    ; 16 LEs        ; 0 LEs                ; 16 LEs                 ; Yes        ; |pokeymax|sample_top:\sample_on:sample1|ch0_start_addr_reg[12]                                                                                                                                            ;
; 3:1                ; 8 bits    ; 16 LEs        ; 0 LEs                ; 16 LEs                 ; Yes        ; |pokeymax|sample_top:\sample_on:sample1|ch1_start_addr_reg[10]                                                                                                                                            ;
; 3:1                ; 8 bits    ; 16 LEs        ; 0 LEs                ; 16 LEs                 ; Yes        ; |pokeymax|sample_top:\sample_on:sample1|ch2_start_addr_reg[13]                                                                                                                                            ;
; 3:1                ; 8 bits    ; 16 LEs        ; 0 LEs                ; 16 LEs                 ; Yes        ; |pokeymax|sample_top:\sample_on:sample1|ch3_start_addr_reg[10]                                                                                                                                            ;
; 3:1                ; 8 bits    ; 16 LEs        ; 8 LEs                ; 8 LEs                  ; Yes        ; |pokeymax|sample_top:\sample_on:sample1|ram_cpu_addr_reg[11]                                                                                                                                              ;
; 3:1                ; 4 bits    ; 8 LEs         ; 0 LEs                ; 8 LEs                  ; Yes        ; |pokeymax|sample_top:\sample_on:sample1|ch0_period_reg[9]                                                                                                                                                 ;
; 3:1                ; 4 bits    ; 8 LEs         ; 0 LEs                ; 8 LEs                  ; Yes        ; |pokeymax|sample_top:\sample_on:sample1|ch1_period_reg[8]                                                                                                                                                 ;
; 3:1                ; 4 bits    ; 8 LEs         ; 0 LEs                ; 8 LEs                  ; Yes        ; |pokeymax|sample_top:\sample_on:sample1|ch2_period_reg[11]                                                                                                                                                ;
; 3:1                ; 4 bits    ; 8 LEs         ; 0 LEs                ; 8 LEs                  ; Yes        ; |pokeymax|sample_top:\sample_on:sample1|ch3_period_reg[8]                                                                                                                                                 ;
; 3:1                ; 8 bits    ; 16 LEs        ; 8 LEs                ; 8 LEs                  ; Yes        ; |pokeymax|pokey:\POKEY_ON:3:pokeyx|pot_counter_reg[7]                                                                                                                                                     ;
; 3:1                ; 8 bits    ; 16 LEs        ; 8 LEs                ; 8 LEs                  ; Yes        ; |pokeymax|pokey:\POKEY_ON:3:pokeyx|serin_shift_reg[2]                                                                                                                                                     ;
; 3:1                ; 8 bits    ; 16 LEs        ; 8 LEs                ; 8 LEs                  ; Yes        ; |pokeymax|pokey:\POKEY_ON:2:pokeyx|pot_counter_reg[1]                                                                                                                                                     ;
; 3:1                ; 8 bits    ; 16 LEs        ; 8 LEs                ; 8 LEs                  ; Yes        ; |pokeymax|pokey:\POKEY_ON:2:pokeyx|serin_shift_reg[8]                                                                                                                                                     ;
; 3:1                ; 8 bits    ; 16 LEs        ; 8 LEs                ; 8 LEs                  ; Yes        ; |pokeymax|pokey:\POKEY_ON:1:pokeyx|pot_counter_reg[5]                                                                                                                                                     ;
; 3:1                ; 8 bits    ; 16 LEs        ; 8 LEs                ; 8 LEs                  ; Yes        ; |pokeymax|pokey:\POKEY_ON:1:pokeyx|serin_shift_reg[8]                                                                                                                                                     ;
; 4:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |pokeymax|SID_top:\sid_on:sid2|SID_envelope:envelope_c|adrmux_reg[0]                                                                                                                                      ;
; 4:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |pokeymax|SID_top:\sid_on:sid1|SID_envelope:envelope_c|adrmux_reg[1]                                                                                                                                      ;
; 3:1                ; 8 bits    ; 16 LEs        ; 8 LEs                ; 8 LEs                  ; Yes        ; |pokeymax|sample_top:\sample_on:sample1|ram_cpu_addr_reg[3]                                                                                                                                               ;
; 4:1                ; 8 bits    ; 16 LEs        ; 8 LEs                ; 8 LEs                  ; Yes        ; |pokeymax|pokey:\POKEY_ON:1:pokeyx|pokey_countdown_timer:timer3|count_reg[7]                                                                                                                              ;
; 4:1                ; 8 bits    ; 16 LEs        ; 8 LEs                ; 8 LEs                  ; Yes        ; |pokeymax|pokey:\POKEY_ON:1:pokeyx|pokey_countdown_timer:timer1|count_reg[5]                                                                                                                              ;
; 4:1                ; 8 bits    ; 16 LEs        ; 8 LEs                ; 8 LEs                  ; Yes        ; |pokeymax|pokey:\POKEY_ON:1:pokeyx|pokey_countdown_timer:timer0|count_reg[6]                                                                                                                              ;
; 4:1                ; 8 bits    ; 16 LEs        ; 8 LEs                ; 8 LEs                  ; Yes        ; |pokeymax|pokey:\POKEY_ON:2:pokeyx|pokey_countdown_timer:timer3|count_reg[5]                                                                                                                              ;
; 4:1                ; 8 bits    ; 16 LEs        ; 8 LEs                ; 8 LEs                  ; Yes        ; |pokeymax|pokey:\POKEY_ON:2:pokeyx|pokey_countdown_timer:timer1|count_reg[0]                                                                                                                              ;
; 4:1                ; 8 bits    ; 16 LEs        ; 8 LEs                ; 8 LEs                  ; Yes        ; |pokeymax|pokey:\POKEY_ON:2:pokeyx|pokey_countdown_timer:timer0|count_reg[0]                                                                                                                              ;
; 4:1                ; 8 bits    ; 16 LEs        ; 8 LEs                ; 8 LEs                  ; Yes        ; |pokeymax|pokey:\POKEY_ON:3:pokeyx|pokey_countdown_timer:timer3|count_reg[1]                                                                                                                              ;
; 4:1                ; 8 bits    ; 16 LEs        ; 8 LEs                ; 8 LEs                  ; Yes        ; |pokeymax|pokey:\POKEY_ON:3:pokeyx|pokey_countdown_timer:timer1|count_reg[0]                                                                                                                              ;
; 4:1                ; 8 bits    ; 16 LEs        ; 8 LEs                ; 8 LEs                  ; Yes        ; |pokeymax|pokey:\POKEY_ON:3:pokeyx|pokey_countdown_timer:timer0|count_reg[7]                                                                                                                              ;
; 3:1                ; 8 bits    ; 16 LEs        ; 0 LEs                ; 16 LEs                 ; Yes        ; |pokeymax|sample_top:\sample_on:sample1|ch0_start_addr_reg[5]                                                                                                                                             ;
; 3:1                ; 8 bits    ; 16 LEs        ; 0 LEs                ; 16 LEs                 ; Yes        ; |pokeymax|sample_top:\sample_on:sample1|ch1_start_addr_reg[1]                                                                                                                                             ;
; 3:1                ; 8 bits    ; 16 LEs        ; 0 LEs                ; 16 LEs                 ; Yes        ; |pokeymax|sample_top:\sample_on:sample1|ch2_start_addr_reg[7]                                                                                                                                             ;
; 3:1                ; 8 bits    ; 16 LEs        ; 0 LEs                ; 16 LEs                 ; Yes        ; |pokeymax|sample_top:\sample_on:sample1|ch3_start_addr_reg[1]                                                                                                                                             ;
; 4:1                ; 8 bits    ; 16 LEs        ; 8 LEs                ; 8 LEs                  ; Yes        ; |pokeymax|pokey:\POKEY_ON:3:pokeyx|pokey_countdown_timer:timer2|count_reg[1]                                                                                                                              ;
; 4:1                ; 8 bits    ; 16 LEs        ; 8 LEs                ; 8 LEs                  ; Yes        ; |pokeymax|pokey:\POKEY_ON:2:pokeyx|pokey_countdown_timer:timer2|count_reg[5]                                                                                                                              ;
; 4:1                ; 8 bits    ; 16 LEs        ; 8 LEs                ; 8 LEs                  ; Yes        ; |pokeymax|pokey:pokey1|pokey_countdown_timer:timer2|count_reg[1]                                                                                                                                          ;
; 4:1                ; 8 bits    ; 16 LEs        ; 8 LEs                ; 8 LEs                  ; Yes        ; |pokeymax|pokey:\POKEY_ON:1:pokeyx|pokey_countdown_timer:timer2|count_reg[6]                                                                                                                              ;
; 3:1                ; 6 bits    ; 12 LEs        ; 0 LEs                ; 12 LEs                 ; Yes        ; |pokeymax|pokey:pokey1|pokey_keyboard_scanner:\gen_custom_scan:pokey_keyboard_scanner1|compare_latch_reg[5]                                                                                               ;
; 3:1                ; 17 bits   ; 34 LEs        ; 17 LEs               ; 17 LEs                 ; Yes        ; |pokeymax|spdif_transmitter:\spdif_on:spdif|channel_status_shift[19]                                                                                                                                      ;
; 4:1                ; 4 bits    ; 8 LEs         ; 8 LEs                ; 0 LEs                  ; Yes        ; |pokeymax|SID_top:\sid_on:sid2|SID_envelope:envelope_a|tapkey_reg[1]                                                                                                                                      ;
; 4:1                ; 4 bits    ; 8 LEs         ; 8 LEs                ; 0 LEs                  ; Yes        ; |pokeymax|SID_top:\sid_on:sid2|SID_envelope:envelope_b|tapkey_reg[2]                                                                                                                                      ;
; 4:1                ; 4 bits    ; 8 LEs         ; 8 LEs                ; 0 LEs                  ; Yes        ; |pokeymax|SID_top:\sid_on:sid2|SID_envelope:envelope_c|tapkey_reg[2]                                                                                                                                      ;
; 4:1                ; 4 bits    ; 8 LEs         ; 8 LEs                ; 0 LEs                  ; Yes        ; |pokeymax|SID_top:\sid_on:sid1|SID_envelope:envelope_a|tapkey_reg[0]                                                                                                                                      ;
; 4:1                ; 4 bits    ; 8 LEs         ; 8 LEs                ; 0 LEs                  ; Yes        ; |pokeymax|SID_top:\sid_on:sid1|SID_envelope:envelope_b|tapkey_reg[3]                                                                                                                                      ;
; 4:1                ; 4 bits    ; 8 LEs         ; 8 LEs                ; 0 LEs                  ; Yes        ; |pokeymax|SID_top:\sid_on:sid1|SID_envelope:envelope_c|tapkey_reg[3]                                                                                                                                      ;
; 4:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |pokeymax|SID_top:\sid_on:sid1|SID_envelope:envelope_a|adrmux_reg[1]                                                                                                                                      ;
; 4:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |pokeymax|SID_top:\sid_on:sid1|SID_envelope:envelope_b|adrmux_reg[1]                                                                                                                                      ;
; 4:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |pokeymax|SID_top:\sid_on:sid2|SID_envelope:envelope_a|adrmux_reg[0]                                                                                                                                      ;
; 4:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |pokeymax|SID_top:\sid_on:sid2|SID_envelope:envelope_b|adrmux_reg[0]                                                                                                                                      ;
; 3:1                ; 9 bits    ; 18 LEs        ; 9 LEs                ; 9 LEs                  ; Yes        ; |pokeymax|ps2_to_atari800:\ps2_on:keyboard_map1|ps2_keyboard:\gen_ps2_on:keyboard1|byte_reg[7]                                                                                                            ;
; 4:1                ; 10 bits   ; 20 LEs        ; 20 LEs               ; 0 LEs                  ; Yes        ; |pokeymax|SID_f_distortion_mux:\sid_on:f_distortion_mux|SID_f_distortion:f_distortion|STATE_reg[16]                                                                                                       ;
; 3:1                ; 11 bits   ; 22 LEs        ; 11 LEs               ; 11 LEs                 ; Yes        ; |pokeymax|ps2_to_atari800:\ps2_on:keyboard_map1|ps2_keyboard:\gen_ps2_on:keyboard1|ps2_shiftreg_reg[2]                                                                                                    ;
; 3:1                ; 8 bits    ; 16 LEs        ; 0 LEs                ; 16 LEs                 ; Yes        ; |pokeymax|sample_top:\sample_on:sample1|ch0_period_reg[0]                                                                                                                                                 ;
; 3:1                ; 8 bits    ; 16 LEs        ; 0 LEs                ; 16 LEs                 ; Yes        ; |pokeymax|sample_top:\sample_on:sample1|ch1_period_reg[3]                                                                                                                                                 ;
; 3:1                ; 8 bits    ; 16 LEs        ; 0 LEs                ; 16 LEs                 ; Yes        ; |pokeymax|sample_top:\sample_on:sample1|ch2_period_reg[1]                                                                                                                                                 ;
; 3:1                ; 8 bits    ; 16 LEs        ; 0 LEs                ; 16 LEs                 ; Yes        ; |pokeymax|sample_top:\sample_on:sample1|ch3_period_reg[6]                                                                                                                                                 ;
; 3:1                ; 8 bits    ; 16 LEs        ; 0 LEs                ; 16 LEs                 ; Yes        ; |pokeymax|sample_top:\sample_on:sample1|ch0_len_reg[8]                                                                                                                                                    ;
; 3:1                ; 8 bits    ; 16 LEs        ; 0 LEs                ; 16 LEs                 ; Yes        ; |pokeymax|sample_top:\sample_on:sample1|ch1_len_reg[10]                                                                                                                                                   ;
; 3:1                ; 8 bits    ; 16 LEs        ; 0 LEs                ; 16 LEs                 ; Yes        ; |pokeymax|sample_top:\sample_on:sample1|ch2_len_reg[9]                                                                                                                                                    ;
; 3:1                ; 8 bits    ; 16 LEs        ; 0 LEs                ; 16 LEs                 ; Yes        ; |pokeymax|sample_top:\sample_on:sample1|ch3_len_reg[8]                                                                                                                                                    ;
; 3:1                ; 20 bits   ; 40 LEs        ; 20 LEs               ; 20 LEs                 ; Yes        ; |pokeymax|mixer:mixer1|acc_reg[18]                                                                                                                                                                        ;
; 3:1                ; 6 bits    ; 12 LEs        ; 6 LEs                ; 6 LEs                  ; Yes        ; |pokeymax|pll_reset_sync:pll_sync|cnt[3]                                                                                                                                                                  ;
; 3:1                ; 16 bits   ; 32 LEs        ; 16 LEs               ; 16 LEs                 ; Yes        ; |pokeymax|sample_top:\sample_on:sample1|sample_channel:ch0_inst|remaining_reg[3]                                                                                                                          ;
; 3:1                ; 16 bits   ; 32 LEs        ; 16 LEs               ; 16 LEs                 ; Yes        ; |pokeymax|sample_top:\sample_on:sample1|sample_channel:ch1_inst|remaining_reg[15]                                                                                                                         ;
; 3:1                ; 16 bits   ; 32 LEs        ; 16 LEs               ; 16 LEs                 ; Yes        ; |pokeymax|sample_top:\sample_on:sample1|sample_channel:ch2_inst|remaining_reg[1]                                                                                                                          ;
; 3:1                ; 16 bits   ; 32 LEs        ; 16 LEs               ; 16 LEs                 ; Yes        ; |pokeymax|sample_top:\sample_on:sample1|sample_channel:ch3_inst|remaining_reg[11]                                                                                                                         ;
; 4:1                ; 4 bits    ; 8 LEs         ; 4 LEs                ; 4 LEs                  ; Yes        ; |pokeymax|clockgen:\sidpsg_on:clockgen1|cycle_count_reg[3]                                                                                                                                                ;
; 4:1                ; 7 bits    ; 14 LEs        ; 14 LEs               ; 0 LEs                  ; Yes        ; |pokeymax|pokey:pokey1|syncreset_enable_divider:enable_15_div|count_reg[5]                                                                                                                                ;
; 3:1                ; 8 bits    ; 16 LEs        ; 8 LEs                ; 8 LEs                  ; Yes        ; |pokeymax|CPU_FLASH_DATA_REG[16]                                                                                                                                                                          ;
; 3:1                ; 8 bits    ; 16 LEs        ; 8 LEs                ; 8 LEs                  ; Yes        ; |pokeymax|CPU_FLASH_DATA_REG[12]                                                                                                                                                                          ;
; 3:1                ; 8 bits    ; 16 LEs        ; 8 LEs                ; 8 LEs                  ; Yes        ; |pokeymax|CPU_FLASH_DATA_REG[29]                                                                                                                                                                          ;
; 3:1                ; 8 bits    ; 16 LEs        ; 8 LEs                ; 8 LEs                  ; Yes        ; |pokeymax|CPU_FLASH_DATA_REG[6]                                                                                                                                                                           ;
; 4:1                ; 8 bits    ; 16 LEs        ; 16 LEs               ; 0 LEs                  ; Yes        ; |pokeymax|pokey:pokey1|serout_shift_reg[5]                                                                                                                                                                ;
; 4:1                ; 4 bits    ; 8 LEs         ; 4 LEs                ; 4 LEs                  ; Yes        ; |pokeymax|pokey:pokey1|serin_bitcount_reg[3]                                                                                                                                                              ;
; 4:1                ; 4 bits    ; 8 LEs         ; 4 LEs                ; 4 LEs                  ; Yes        ; |pokeymax|pokey:\POKEY_ON:1:pokeyx|serin_bitcount_reg[3]                                                                                                                                                  ;
; 4:1                ; 4 bits    ; 8 LEs         ; 4 LEs                ; 4 LEs                  ; Yes        ; |pokeymax|pokey:\POKEY_ON:2:pokeyx|serin_bitcount_reg[1]                                                                                                                                                  ;
; 4:1                ; 4 bits    ; 8 LEs         ; 4 LEs                ; 4 LEs                  ; Yes        ; |pokeymax|pokey:\POKEY_ON:3:pokeyx|serin_bitcount_reg[0]                                                                                                                                                  ;
; 4:1                ; 7 bits    ; 14 LEs        ; 14 LEs               ; 0 LEs                  ; Yes        ; |pokeymax|pokey:\POKEY_ON:3:pokeyx|syncreset_enable_divider:enable_15_div|count_reg[2]                                                                                                                    ;
; 4:1                ; 7 bits    ; 14 LEs        ; 14 LEs               ; 0 LEs                  ; Yes        ; |pokeymax|pokey:\POKEY_ON:2:pokeyx|syncreset_enable_divider:enable_15_div|count_reg[5]                                                                                                                    ;
; 4:1                ; 7 bits    ; 14 LEs        ; 14 LEs               ; 0 LEs                  ; Yes        ; |pokeymax|pokey:\POKEY_ON:1:pokeyx|syncreset_enable_divider:enable_15_div|count_reg[2]                                                                                                                    ;
; 4:1                ; 5 bits    ; 10 LEs        ; 10 LEs               ; 0 LEs                  ; Yes        ; |pokeymax|pokey:pokey1|syncreset_enable_divider:enable_64_div|count_reg[0]                                                                                                                                ;
; 4:1                ; 5 bits    ; 10 LEs        ; 10 LEs               ; 0 LEs                  ; Yes        ; |pokeymax|pokey:\POKEY_ON:1:pokeyx|syncreset_enable_divider:enable_64_div|count_reg[4]                                                                                                                    ;
; 4:1                ; 8 bits    ; 16 LEs        ; 16 LEs               ; 0 LEs                  ; Yes        ; |pokeymax|pokey:\POKEY_ON:1:pokeyx|serout_shift_reg[6]                                                                                                                                                    ;
; 4:1                ; 5 bits    ; 10 LEs        ; 10 LEs               ; 0 LEs                  ; Yes        ; |pokeymax|pokey:\POKEY_ON:2:pokeyx|syncreset_enable_divider:enable_64_div|count_reg[0]                                                                                                                    ;
; 4:1                ; 8 bits    ; 16 LEs        ; 16 LEs               ; 0 LEs                  ; Yes        ; |pokeymax|pokey:\POKEY_ON:2:pokeyx|serout_shift_reg[4]                                                                                                                                                    ;
; 4:1                ; 5 bits    ; 10 LEs        ; 10 LEs               ; 0 LEs                  ; Yes        ; |pokeymax|pokey:\POKEY_ON:3:pokeyx|syncreset_enable_divider:enable_64_div|count_reg[0]                                                                                                                    ;
; 4:1                ; 8 bits    ; 16 LEs        ; 16 LEs               ; 0 LEs                  ; Yes        ; |pokeymax|pokey:\POKEY_ON:3:pokeyx|serout_shift_reg[8]                                                                                                                                                    ;
; 4:1                ; 4 bits    ; 8 LEs         ; 4 LEs                ; 4 LEs                  ; Yes        ; |pokeymax|ps2_to_atari800:\ps2_on:keyboard_map1|ps2_keyboard:\gen_ps2_on:keyboard1|bitcount_reg[1]                                                                                                        ;
; 4:1                ; 2 bits    ; 4 LEs         ; 2 LEs                ; 2 LEs                  ; Yes        ; |pokeymax|flash_controller:\flash_on:flash_controller_inst|device_reg                                                                                                                                     ;
; 4:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |pokeymax|spdif_transmitter:\spdif_on:spdif|data_out_buffer[5]                                                                                                                                            ;
; 4:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |pokeymax|spdif_transmitter:\spdif_on:spdif|data_out_buffer[3]                                                                                                                                            ;
; 4:1                ; 10 bits   ; 20 LEs        ; 20 LEs               ; 0 LEs                  ; Yes        ; |pokeymax|flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|flash_page_addr[8]               ;
; 4:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |pokeymax|flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|csr_status_busy[0]               ;
; 4:1                ; 16 bits   ; 32 LEs        ; 16 LEs               ; 16 LEs                 ; Yes        ; |pokeymax|PSG_top:\psg_on:PSG_1|PSG_envelope:envelope|PSG_freqdiv:envelope_ticker|count_reg[14]                                                                                                           ;
; 4:1                ; 16 bits   ; 32 LEs        ; 16 LEs               ; 16 LEs                 ; Yes        ; |pokeymax|PSG_top:\psg_on:PSG_2|PSG_envelope:envelope|PSG_freqdiv:envelope_ticker|count_reg[7]                                                                                                            ;
; 4:1                ; 13 bits   ; 26 LEs        ; 26 LEs               ; 0 LEs                  ; Yes        ; |pokeymax|flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|flash_page_addr[11]              ;
; 6:1                ; 6 bits    ; 24 LEs        ; 6 LEs                ; 18 LEs                 ; Yes        ; |pokeymax|clockgen:\sidpsg_on:clockgen1|err_reg[3]                                                                                                                                                        ;
; 6:1                ; 8 bits    ; 32 LEs        ; 16 LEs               ; 16 LEs                 ; Yes        ; |pokeymax|clockgen:\sidpsg_on:clockgen1|err_reg[8]                                                                                                                                                        ;
; 6:1                ; 2 bits    ; 8 LEs         ; 4 LEs                ; 4 LEs                  ; Yes        ; |pokeymax|CONFIG_FLASH_STATE_REG[1]                                                                                                                                                                       ;
; 5:1                ; 4 bits    ; 12 LEs        ; 8 LEs                ; 4 LEs                  ; Yes        ; |pokeymax|pokey:pokey1|serout_bitcount_reg[0]                                                                                                                                                             ;
; 5:1                ; 8 bits    ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |pokeymax|SID_top:\sid_on:sid2|SID_envelope:envelope_c|envelope_reg[4]                                                                                                                                    ;
; 5:1                ; 8 bits    ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |pokeymax|SID_top:\sid_on:sid1|SID_envelope:envelope_c|envelope_reg[3]                                                                                                                                    ;
; 5:1                ; 4 bits    ; 12 LEs        ; 8 LEs                ; 4 LEs                  ; Yes        ; |pokeymax|pokey:\POKEY_ON:1:pokeyx|serout_bitcount_reg[2]                                                                                                                                                 ;
; 5:1                ; 4 bits    ; 12 LEs        ; 8 LEs                ; 4 LEs                  ; Yes        ; |pokeymax|pokey:\POKEY_ON:2:pokeyx|serout_bitcount_reg[3]                                                                                                                                                 ;
; 5:1                ; 4 bits    ; 12 LEs        ; 8 LEs                ; 4 LEs                  ; Yes        ; |pokeymax|pokey:\POKEY_ON:3:pokeyx|serout_bitcount_reg[1]                                                                                                                                                 ;
; 5:1                ; 8 bits    ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |pokeymax|SID_top:\sid_on:sid1|SID_envelope:envelope_a|envelope_reg[0]                                                                                                                                    ;
; 5:1                ; 8 bits    ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |pokeymax|SID_top:\sid_on:sid1|SID_envelope:envelope_b|envelope_reg[3]                                                                                                                                    ;
; 5:1                ; 8 bits    ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |pokeymax|SID_top:\sid_on:sid2|SID_envelope:envelope_a|envelope_reg[6]                                                                                                                                    ;
; 5:1                ; 8 bits    ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |pokeymax|SID_top:\sid_on:sid2|SID_envelope:envelope_b|envelope_reg[3]                                                                                                                                    ;
; 5:1                ; 2 bits    ; 6 LEs         ; 6 LEs                ; 0 LEs                  ; Yes        ; |pokeymax|flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|flash_sector_addr[2]             ;
; 10:1               ; 2 bits    ; 12 LEs        ; 8 LEs                ; 4 LEs                  ; Yes        ; |pokeymax|spdif_transmitter:\spdif_on:spdif|data_out_buffer[6]                                                                                                                                            ;
; 5:1                ; 6 bits    ; 18 LEs        ; 6 LEs                ; 12 LEs                 ; Yes        ; |pokeymax|flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|flash_seq_read_ardin[18]         ;
; 5:1                ; 15 bits   ; 45 LEs        ; 30 LEs               ; 15 LEs                 ; Yes        ; |pokeymax|flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|flash_seq_read_ardin[13]         ;
; 6:1                ; 2 bits    ; 8 LEs         ; 4 LEs                ; 4 LEs                  ; Yes        ; |pokeymax|flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|avmm_burstcount_reg[1]           ;
; 8:1                ; 2 bits    ; 10 LEs        ; 4 LEs                ; 6 LEs                  ; Yes        ; |pokeymax|flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_csr_controller:avmm_csr_controller|csr_erase_state[0]                 ;
; 7:1                ; 12 bits   ; 48 LEs        ; 36 LEs               ; 12 LEs                 ; Yes        ; |pokeymax|SID_top:\sid_on:sid1|SID_wavegen:wavegen_a|wave_reg[11]                                                                                                                                         ;
; 7:1                ; 12 bits   ; 48 LEs        ; 36 LEs               ; 12 LEs                 ; Yes        ; |pokeymax|SID_top:\sid_on:sid1|SID_wavegen:wavegen_b|wave_reg[8]                                                                                                                                          ;
; 7:1                ; 12 bits   ; 48 LEs        ; 36 LEs               ; 12 LEs                 ; Yes        ; |pokeymax|SID_top:\sid_on:sid1|SID_wavegen:wavegen_c|wave_reg[2]                                                                                                                                          ;
; 7:1                ; 12 bits   ; 48 LEs        ; 36 LEs               ; 12 LEs                 ; Yes        ; |pokeymax|SID_top:\sid_on:sid2|SID_wavegen:wavegen_a|wave_reg[4]                                                                                                                                          ;
; 7:1                ; 12 bits   ; 48 LEs        ; 36 LEs               ; 12 LEs                 ; Yes        ; |pokeymax|SID_top:\sid_on:sid2|SID_wavegen:wavegen_b|wave_reg[1]                                                                                                                                          ;
; 7:1                ; 12 bits   ; 48 LEs        ; 36 LEs               ; 12 LEs                 ; Yes        ; |pokeymax|SID_top:\sid_on:sid2|SID_wavegen:wavegen_c|wave_reg[5]                                                                                                                                          ;
; 6:1                ; 2 bits    ; 8 LEs         ; 2 LEs                ; 6 LEs                  ; Yes        ; |pokeymax|flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|flash_ardin_align_backup_reg[1]  ;
; 18:1               ; 2 bits    ; 24 LEs        ; 10 LEs               ; 14 LEs                 ; Yes        ; |pokeymax|flash_controller:\flash_on:flash_controller_inst|state_reg[1]                                                                                                                                   ;
; 7:1                ; 3 bits    ; 12 LEs        ; 6 LEs                ; 6 LEs                  ; Yes        ; |pokeymax|flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|data_count[1]                    ;
; 256:1              ; 3 bits    ; 510 LEs       ; 12 LEs               ; 498 LEs                ; Yes        ; |pokeymax|SID_top:\sid_on:sid2|SID_envelope:envelope_c|exptapmatch_reg[2]                                                                                                                                 ;
; 256:1              ; 3 bits    ; 510 LEs       ; 12 LEs               ; 498 LEs                ; Yes        ; |pokeymax|SID_top:\sid_on:sid1|SID_envelope:envelope_c|exptapmatch_reg[0]                                                                                                                                 ;
; 256:1              ; 3 bits    ; 510 LEs       ; 12 LEs               ; 498 LEs                ; Yes        ; |pokeymax|SID_top:\sid_on:sid1|SID_envelope:envelope_a|exptapmatch_reg[2]                                                                                                                                 ;
; 256:1              ; 3 bits    ; 510 LEs       ; 12 LEs               ; 498 LEs                ; Yes        ; |pokeymax|SID_top:\sid_on:sid1|SID_envelope:envelope_b|exptapmatch_reg[1]                                                                                                                                 ;
; 256:1              ; 3 bits    ; 510 LEs       ; 12 LEs               ; 498 LEs                ; Yes        ; |pokeymax|SID_top:\sid_on:sid2|SID_envelope:envelope_a|exptapmatch_reg[0]                                                                                                                                 ;
; 256:1              ; 3 bits    ; 510 LEs       ; 12 LEs               ; 498 LEs                ; Yes        ; |pokeymax|SID_top:\sid_on:sid2|SID_envelope:envelope_b|exptapmatch_reg[2]                                                                                                                                 ;
; 10:1               ; 3 bits    ; 18 LEs        ; 12 LEs               ; 6 LEs                  ; Yes        ; |pokeymax|SID_top:\sid_on:sid1|rom_state_reg[0]                                                                                                                                                           ;
; 10:1               ; 3 bits    ; 18 LEs        ; 12 LEs               ; 6 LEs                  ; Yes        ; |pokeymax|SID_top:\sid_on:sid2|rom_state_reg[2]                                                                                                                                                           ;
; 7:1                ; 22 bits   ; 88 LEs        ; 66 LEs               ; 22 LEs                 ; Yes        ; |pokeymax|flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|erase_count[13]                  ;
; 5:1                ; 10 bits   ; 30 LEs        ; 0 LEs                ; 30 LEs                 ; Yes        ; |pokeymax|ps2_to_atari800:\ps2_on:keyboard_map1|ps2_keyboard:\gen_ps2_on:keyboard1|key_value_last_reg[4]                                                                                                  ;
; 15:1               ; 2 bits    ; 20 LEs        ; 8 LEs                ; 12 LEs                 ; Yes        ; |pokeymax|PSG_volume_profile:\psg_on:vol_profile1|state_reg[2]                                                                                                                                            ;
; 8:1                ; 3 bits    ; 15 LEs        ; 12 LEs               ; 3 LEs                  ; Yes        ; |pokeymax|flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|erase_count[7]                   ;
; 7:1                ; 11 bits   ; 44 LEs        ; 33 LEs               ; 11 LEs                 ; Yes        ; |pokeymax|flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|write_count[12]                  ;
; 6:1                ; 10 bits   ; 40 LEs        ; 10 LEs               ; 30 LEs                 ; Yes        ; |pokeymax|ps2_to_atari800:\ps2_on:keyboard_map1|ps2_keyboard:\gen_ps2_on:keyboard1|key_value_reg[7]                                                                                                       ;
; 9:1                ; 3 bits    ; 18 LEs        ; 6 LEs                ; 12 LEs                 ; Yes        ; |pokeymax|flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|write_count[4]                   ;
; 272:1              ; 3 bits    ; 543 LEs       ; 9 LEs                ; 534 LEs                ; Yes        ; |pokeymax|flash_controller:\flash_on:flash_controller_inst|request_addr_reg[12]                                                                                                                           ;
; 33:1               ; 3 bits    ; 66 LEs        ; 36 LEs               ; 30 LEs                 ; Yes        ; |pokeymax|flash_controller:\flash_on:flash_controller_inst|request_addr_reg[9]                                                                                                                            ;
; 99:1               ; 3 bits    ; 198 LEs       ; 54 LEs               ; 144 LEs                ; Yes        ; |pokeymax|flash_controller:\flash_on:flash_controller_inst|request_addr_reg[3]                                                                                                                            ;
; 3:1                ; 3 bits    ; 6 LEs         ; 3 LEs                ; 3 LEs                  ; Yes        ; |pokeymax|i2c_master:\iox_on:i2c_master0|bit_cnt[2]                                                                                                                                                       ;
; 3:1                ; 2 bits    ; 4 LEs         ; 2 LEs                ; 2 LEs                  ; Yes        ; |pokeymax|POST_DIVIDE_REG[5]                                                                                                                                                                              ;
; 3:1                ; 3 bits    ; 6 LEs         ; 3 LEs                ; 3 LEs                  ; Yes        ; |pokeymax|GTIA_ENABLE_REG[2]                                                                                                                                                                              ;
; 3:1                ; 5 bits    ; 10 LEs        ; 5 LEs                ; 5 LEs                  ; Yes        ; |pokeymax|flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_csr_controller:avmm_csr_controller|csr_wp_mode[2]                     ;
; 3:1                ; 23 bits   ; 46 LEs        ; 23 LEs               ; 23 LEs                 ; Yes        ; |pokeymax|flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_csr_controller:avmm_csr_controller|csr_sector_page_erase_addr_reg[16] ;
; 3:1                ; 18 bits   ; 36 LEs        ; 0 LEs                ; 36 LEs                 ; Yes        ; |pokeymax|SID_top:\sid_on:sid1|statevariable_1q_reg[9]                                                                                                                                                    ;
; 3:1                ; 18 bits   ; 36 LEs        ; 0 LEs                ; 36 LEs                 ; Yes        ; |pokeymax|SID_top:\sid_on:sid2|statevariable_1q_reg[12]                                                                                                                                                   ;
; 3:1                ; 6 bits    ; 12 LEs        ; 0 LEs                ; 12 LEs                 ; Yes        ; |pokeymax|sample_top:\sample_on:sample1|ch0_volume_reg[0]                                                                                                                                                 ;
; 3:1                ; 6 bits    ; 12 LEs        ; 0 LEs                ; 12 LEs                 ; Yes        ; |pokeymax|sample_top:\sample_on:sample1|ch1_volume_reg[5]                                                                                                                                                 ;
; 3:1                ; 6 bits    ; 12 LEs        ; 0 LEs                ; 12 LEs                 ; Yes        ; |pokeymax|sample_top:\sample_on:sample1|ch2_volume_reg[5]                                                                                                                                                 ;
; 3:1                ; 6 bits    ; 12 LEs        ; 0 LEs                ; 12 LEs                 ; Yes        ; |pokeymax|sample_top:\sample_on:sample1|ch3_volume_reg[0]                                                                                                                                                 ;
; 3:1                ; 2 bits    ; 4 LEs         ; 2 LEs                ; 2 LEs                  ; Yes        ; |pokeymax|pokey:\POKEY_ON:3:pokeyx|pot_reset_reg                                                                                                                                                          ;
; 3:1                ; 2 bits    ; 4 LEs         ; 2 LEs                ; 2 LEs                  ; Yes        ; |pokeymax|pokey:\POKEY_ON:2:pokeyx|pot_reset_reg                                                                                                                                                          ;
; 3:1                ; 2 bits    ; 4 LEs         ; 2 LEs                ; 2 LEs                  ; Yes        ; |pokeymax|pokey:\POKEY_ON:1:pokeyx|allpot_reg[0]                                                                                                                                                          ;
; 3:1                ; 5 bits    ; 10 LEs        ; 5 LEs                ; 5 LEs                  ; Yes        ; |pokeymax|SID_top:\sid_on:sid2|SID_envelope:envelope_c|expdelay_lfsr_reg[0]                                                                                                                               ;
; 3:1                ; 5 bits    ; 10 LEs        ; 5 LEs                ; 5 LEs                  ; Yes        ; |pokeymax|SID_top:\sid_on:sid1|SID_envelope:envelope_c|expdelay_lfsr_reg[1]                                                                                                                               ;
; 3:1                ; 5 bits    ; 10 LEs        ; 5 LEs                ; 5 LEs                  ; Yes        ; |pokeymax|SID_top:\sid_on:sid2|SID_envelope:envelope_a|expdelay_lfsr_reg[2]                                                                                                                               ;
; 3:1                ; 5 bits    ; 10 LEs        ; 5 LEs                ; 5 LEs                  ; Yes        ; |pokeymax|SID_top:\sid_on:sid2|SID_envelope:envelope_b|expdelay_lfsr_reg[4]                                                                                                                               ;
; 3:1                ; 5 bits    ; 10 LEs        ; 5 LEs                ; 5 LEs                  ; Yes        ; |pokeymax|SID_top:\sid_on:sid1|SID_envelope:envelope_a|expdelay_lfsr_reg[3]                                                                                                                               ;
; 3:1                ; 5 bits    ; 10 LEs        ; 5 LEs                ; 5 LEs                  ; Yes        ; |pokeymax|SID_top:\sid_on:sid1|SID_envelope:envelope_b|expdelay_lfsr_reg[4]                                                                                                                               ;
; 3:1                ; 2 bits    ; 4 LEs         ; 0 LEs                ; 4 LEs                  ; Yes        ; |pokeymax|iox_glue:\iox_on:iox_glue|keyboard_response_reg[1]                                                                                                                                              ;
; 6:1                ; 2 bits    ; 8 LEs         ; 0 LEs                ; 8 LEs                  ; Yes        ; |pokeymax|pokey:pokey1|pokey_keyboard_scanner:\gen_custom_scan:pokey_keyboard_scanner1|keycode_latch_reg[6]                                                                                               ;
; 6:1                ; 6 bits    ; 24 LEs        ; 6 LEs                ; 18 LEs                 ; Yes        ; |pokeymax|pokey:pokey1|pokey_keyboard_scanner:\gen_custom_scan:pokey_keyboard_scanner1|keycode_latch_reg[0]                                                                                               ;
; 5:1                ; 8 bits    ; 24 LEs        ; 16 LEs               ; 8 LEs                  ; Yes        ; |pokeymax|pokey:pokey1|allpot_reg[5]                                                                                                                                                                      ;
; 8:1                ; 2 bits    ; 10 LEs        ; 6 LEs                ; 4 LEs                  ; Yes        ; |pokeymax|SID_top:\sid_on:sid2|SID_envelope:envelope_c|state_reg[0]                                                                                                                                       ;
; 8:1                ; 2 bits    ; 10 LEs        ; 6 LEs                ; 4 LEs                  ; Yes        ; |pokeymax|SID_top:\sid_on:sid1|SID_envelope:envelope_c|state_reg[1]                                                                                                                                       ;
; 8:1                ; 2 bits    ; 10 LEs        ; 6 LEs                ; 4 LEs                  ; Yes        ; |pokeymax|SID_top:\sid_on:sid1|SID_envelope:envelope_a|state_reg[1]                                                                                                                                       ;
; 8:1                ; 2 bits    ; 10 LEs        ; 6 LEs                ; 4 LEs                  ; Yes        ; |pokeymax|SID_top:\sid_on:sid1|SID_envelope:envelope_b|state_reg[1]                                                                                                                                       ;
; 8:1                ; 2 bits    ; 10 LEs        ; 6 LEs                ; 4 LEs                  ; Yes        ; |pokeymax|SID_top:\sid_on:sid2|SID_envelope:envelope_a|state_reg[1]                                                                                                                                       ;
; 8:1                ; 2 bits    ; 10 LEs        ; 6 LEs                ; 4 LEs                  ; Yes        ; |pokeymax|SID_top:\sid_on:sid2|SID_envelope:envelope_b|state_reg[1]                                                                                                                                       ;
; 4:1                ; 5 bits    ; 10 LEs        ; 10 LEs               ; 0 LEs                  ; No         ; |pokeymax|sample_top:\sample_on:sample1|Mux281                                                                                                                                                            ;
; 3:1                ; 25 bits   ; 50 LEs        ; 50 LEs               ; 0 LEs                  ; No         ; |pokeymax|flash_controller:\flash_on:flash_controller_inst|flash_do[14]                                                                                                                                   ;
; 3:1                ; 5 bits    ; 10 LEs        ; 10 LEs               ; 0 LEs                  ; No         ; |pokeymax|flash_controller:\flash_on:flash_controller_inst|flash_do[2]                                                                                                                                    ;
; 3:1                ; 4 bits    ; 8 LEs         ; 4 LEs                ; 4 LEs                  ; No         ; |pokeymax|sample_top:\sample_on:sample1|irq_clear_n[2]                                                                                                                                                    ;
; 3:1                ; 12 bits   ; 24 LEs        ; 24 LEs               ; 0 LEs                  ; No         ; |pokeymax|SID_top:\sid_on:sid1|SID_oscillator:osc_a|count_next[15]                                                                                                                                        ;
; 3:1                ; 12 bits   ; 24 LEs        ; 24 LEs               ; 0 LEs                  ; No         ; |pokeymax|SID_top:\sid_on:sid1|SID_oscillator:osc_b|count_next[14]                                                                                                                                        ;
; 3:1                ; 12 bits   ; 24 LEs        ; 24 LEs               ; 0 LEs                  ; No         ; |pokeymax|SID_top:\sid_on:sid1|SID_oscillator:osc_c|count_next[15]                                                                                                                                        ;
; 3:1                ; 12 bits   ; 24 LEs        ; 24 LEs               ; 0 LEs                  ; No         ; |pokeymax|SID_top:\sid_on:sid2|SID_oscillator:osc_a|count_next[19]                                                                                                                                        ;
; 3:1                ; 12 bits   ; 24 LEs        ; 24 LEs               ; 0 LEs                  ; No         ; |pokeymax|SID_top:\sid_on:sid2|SID_oscillator:osc_b|count_next[14]                                                                                                                                        ;
; 3:1                ; 12 bits   ; 24 LEs        ; 24 LEs               ; 0 LEs                  ; No         ; |pokeymax|SID_top:\sid_on:sid2|SID_oscillator:osc_c|count_next[16]                                                                                                                                        ;
; 3:1                ; 7 bits    ; 14 LEs        ; 14 LEs               ; 0 LEs                  ; No         ; |pokeymax|sample_top:\sample_on:sample1|sample_adpcm:adpcm_decoder|decstep_next[1]                                                                                                                        ;
; 4:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; No         ; |pokeymax|mixer:mixer1|Mux1                                                                                                                                                                               ;
; 3:1                ; 72 bits   ; 144 LEs       ; 144 LEs              ; 0 LEs                  ; No         ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|write_data_ram_wide[1][6]                                                                                                                   ;
; 3:1                ; 72 bits   ; 144 LEs       ; 144 LEs              ; 0 LEs                  ; No         ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|write_data_ram_wide[8][4]                                                                                                                   ;
; 3:1                ; 72 bits   ; 144 LEs       ; 144 LEs              ; 0 LEs                  ; No         ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|write_data_ram_wide[16][0]                                                                                                                  ;
; 3:1                ; 72 bits   ; 144 LEs       ; 144 LEs              ; 0 LEs                  ; No         ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|write_data_ram_wide[25][6]                                                                                                                  ;
; 3:1                ; 72 bits   ; 144 LEs       ; 144 LEs              ; 0 LEs                  ; No         ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|write_data_ram_wide[34][5]                                                                                                                  ;
; 3:1                ; 72 bits   ; 144 LEs       ; 144 LEs              ; 0 LEs                  ; No         ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|write_data_ram_wide[42][2]                                                                                                                  ;
; 3:1                ; 72 bits   ; 144 LEs       ; 144 LEs              ; 0 LEs                  ; No         ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|write_data_ram_wide[51][4]                                                                                                                  ;
; 1:1                ; 8 bits    ; 0 LEs         ; 0 LEs                ; 0 LEs                  ; No         ; |pokeymax|SID_top:\sid_on:sid2|SID_envelope:envelope_c|Add0                                                                                                                                               ;
; 1:1                ; 8 bits    ; 0 LEs         ; 0 LEs                ; 0 LEs                  ; No         ; |pokeymax|SID_top:\sid_on:sid1|SID_envelope:envelope_c|Add0                                                                                                                                               ;
; 4:1                ; 38 bits   ; 76 LEs        ; 76 LEs               ; 0 LEs                  ; No         ; |pokeymax|SID_top:\sid_on:sid2|SID_envelope_tapmatch:envelope_tapmatcher|Mux21                                                                                                                            ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; No         ; |pokeymax|SID_top:\sid_on:sid1|SID_preFilterSum:prefilter|Mux1                                                                                                                                            ;
; 1:1                ; 8 bits    ; 0 LEs         ; 0 LEs                ; 0 LEs                  ; No         ; |pokeymax|SID_top:\sid_on:sid1|SID_envelope:envelope_a|Add0                                                                                                                                               ;
; 1:1                ; 8 bits    ; 0 LEs         ; 0 LEs                ; 0 LEs                  ; No         ; |pokeymax|SID_top:\sid_on:sid1|SID_envelope:envelope_b|Add0                                                                                                                                               ;
; 1:1                ; 8 bits    ; 0 LEs         ; 0 LEs                ; 0 LEs                  ; No         ; |pokeymax|SID_top:\sid_on:sid2|SID_envelope:envelope_a|Add0                                                                                                                                               ;
; 1:1                ; 8 bits    ; 0 LEs         ; 0 LEs                ; 0 LEs                  ; No         ; |pokeymax|SID_top:\sid_on:sid2|SID_envelope:envelope_b|Add0                                                                                                                                               ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; No         ; |pokeymax|flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|avmm_read_valid_state            ;
; 3:1                ; 7 bits    ; 14 LEs        ; 7 LEs                ; 7 LEs                  ; No         ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|sel_ram                                                                                                                                     ;
; 3:1                ; 3 bits    ; 6 LEs         ; 3 LEs                ; 3 LEs                  ; No         ; |pokeymax|flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|cur_a_addr[22]                   ;
; 3:1                ; 3 bits    ; 6 LEs         ; 6 LEs                ; 0 LEs                  ; No         ; |pokeymax|flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|cur_a_addr[19]                   ;
; 3:1                ; 7 bits    ; 14 LEs        ; 14 LEs               ; 0 LEs                  ; No         ; |pokeymax|flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|cur_a_addr[14]                   ;
; 3:1                ; 4 bits    ; 8 LEs         ; 4 LEs                ; 4 LEs                  ; No         ; |pokeymax|addr_bits                                                                                                                                                                                       ;
; 3:1                ; 8 bits    ; 16 LEs        ; 16 LEs               ; 0 LEs                  ; No         ; |pokeymax|SID_f_distortion_mux:\sid_on:f_distortion_mux|SID_f_distortion:f_distortion|pos[12]                                                                                                             ;
; 5:1                ; 16 bits   ; 48 LEs        ; 48 LEs               ; 0 LEs                  ; No         ; |pokeymax|sample_top:\sample_on:sample1|RAM_ADDR[7]                                                                                                                                                       ;
; 5:1                ; 23 bits   ; 69 LEs        ; 69 LEs               ; 0 LEs                  ; No         ; |pokeymax|sample_top:\sample_on:sample1|sample_adpcm:adpcm_decoder|STEP_ADDR[6]                                                                                                                           ;
; 8:1                ; 2 bits    ; 10 LEs        ; 4 LEs                ; 6 LEs                  ; No         ; |pokeymax|PSG_volume_profile:\psg_on:vol_profile1|Mux5                                                                                                                                                    ;
; 8:1                ; 3 bits    ; 15 LEs        ; 9 LEs                ; 6 LEs                  ; No         ; |pokeymax|SID_top:\sid_on:sid1|Mux73                                                                                                                                                                      ;
; 8:1                ; 3 bits    ; 15 LEs        ; 9 LEs                ; 6 LEs                  ; No         ; |pokeymax|SID_top:\sid_on:sid2|Mux73                                                                                                                                                                      ;
; 3:1                ; 3 bits    ; 6 LEs         ; 6 LEs                ; 0 LEs                  ; No         ; |pokeymax|sample_top:\sample_on:sample1|store                                                                                                                                                             ;
; 4:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; No         ; |pokeymax|SID_top:\sid_on:sid1|SID_preFilterSum:prefilter|Mux2                                                                                                                                            ;
; 4:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; No         ; |pokeymax|SID_top:\sid_on:sid1|SID_preFilterSum:prefilter|Mux1                                                                                                                                            ;
; 8:1                ; 2 bits    ; 10 LEs        ; 4 LEs                ; 6 LEs                  ; No         ; |pokeymax|SID_top:\sid_on:sid2|SID_preFilterSum:prefilter|Mux0                                                                                                                                            ;
; 8:1                ; 15 bits   ; 75 LEs        ; 15 LEs               ; 60 LEs                 ; No         ; |pokeymax|SID_top:\sid_on:sid1|SID_amplitudeModulator:vol_abc|Mux31                                                                                                                                       ;
; 8:1                ; 20 bits   ; 100 LEs       ; 60 LEs               ; 40 LEs                 ; No         ; |pokeymax|SID_top:\sid_on:sid1|SID_amplitudeModulator:vol_abc|Mux9                                                                                                                                        ;
; 8:1                ; 15 bits   ; 75 LEs        ; 15 LEs               ; 60 LEs                 ; No         ; |pokeymax|SID_top:\sid_on:sid2|SID_amplitudeModulator:vol_abc|Mux25                                                                                                                                       ;
; 8:1                ; 20 bits   ; 100 LEs       ; 60 LEs               ; 40 LEs                 ; No         ; |pokeymax|SID_top:\sid_on:sid2|SID_amplitudeModulator:vol_abc|Mux7                                                                                                                                        ;
; 4:1                ; 16 bits   ; 32 LEs        ; 32 LEs               ; 0 LEs                  ; No         ; |pokeymax|sample_top:\sample_on:sample1|sample_channel:ch0_inst|addr[9]                                                                                                                                   ;
; 4:1                ; 16 bits   ; 32 LEs        ; 32 LEs               ; 0 LEs                  ; No         ; |pokeymax|sample_top:\sample_on:sample1|sample_channel:ch1_inst|addr[3]                                                                                                                                   ;
; 4:1                ; 16 bits   ; 32 LEs        ; 32 LEs               ; 0 LEs                  ; No         ; |pokeymax|sample_top:\sample_on:sample1|sample_channel:ch2_inst|addr[12]                                                                                                                                  ;
; 4:1                ; 16 bits   ; 32 LEs        ; 32 LEs               ; 0 LEs                  ; No         ; |pokeymax|sample_top:\sample_on:sample1|sample_channel:ch3_inst|addr[10]                                                                                                                                  ;
; 14:1               ; 11 bits   ; 99 LEs        ; 88 LEs               ; 11 LEs                 ; No         ; |pokeymax|mixer:mixer1|Mux80                                                                                                                                                                              ;
; 16:1               ; 4 bits    ; 40 LEs        ; 12 LEs               ; 28 LEs                 ; No         ; |pokeymax|sample_top:\sample_on:sample1|Mux6                                                                                                                                                              ;
; 16:1               ; 4 bits    ; 40 LEs        ; 8 LEs                ; 32 LEs                 ; No         ; |pokeymax|sample_top:\sample_on:sample1|Mux3                                                                                                                                                              ;
; 6:1                ; 8 bits    ; 32 LEs        ; 16 LEs               ; 16 LEs                 ; No         ; |pokeymax|SID_top:\sid_on:sid2|DO[5]                                                                                                                                                                      ;
; 6:1                ; 8 bits    ; 32 LEs        ; 16 LEs               ; 16 LEs                 ; No         ; |pokeymax|SID_top:\sid_on:sid1|DO[7]                                                                                                                                                                      ;
; 18:1               ; 2 bits    ; 24 LEs        ; 14 LEs               ; 10 LEs                 ; No         ; |pokeymax|iox_glue:\iox_on:iox_glue|Mux6                                                                                                                                                                  ;
; 19:1               ; 3 bits    ; 36 LEs        ; 24 LEs               ; 12 LEs                 ; No         ; |pokeymax|iox_glue:\iox_on:iox_glue|Mux5                                                                                                                                                                  ;
; 12:1               ; 4 bits    ; 32 LEs        ; 32 LEs               ; 0 LEs                  ; No         ; |pokeymax|mixer:mixer1|Mux71                                                                                                                                                                              ;
; 8:1                ; 2 bits    ; 10 LEs        ; 8 LEs                ; 2 LEs                  ; No         ; |pokeymax|flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|erase_state                      ;
; 8:1                ; 2 bits    ; 10 LEs        ; 4 LEs                ; 6 LEs                  ; No         ; |pokeymax|flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|erase_state                      ;
; 10:1               ; 2 bits    ; 12 LEs        ; 10 LEs               ; 2 LEs                  ; No         ; |pokeymax|flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|erase_state                      ;
; 8:1                ; 2 bits    ; 10 LEs        ; 8 LEs                ; 2 LEs                  ; No         ; |pokeymax|flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|write_state                      ;
; 8:1                ; 2 bits    ; 10 LEs        ; 4 LEs                ; 6 LEs                  ; No         ; |pokeymax|flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|write_state                      ;
; 66:1               ; 7 bits    ; 308 LEs       ; 294 LEs              ; 14 LEs                 ; No         ; |pokeymax|m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|q[7]                                                                                                                                        ;
; 6:1                ; 2 bits    ; 8 LEs         ; 2 LEs                ; 6 LEs                  ; No         ; |pokeymax|SID_top:\sid_on:sid2|Add1                                                                                                                                                                       ;
+--------------------+-----------+---------------+----------------------+------------------------+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|altera_std_synchronizer:stdsync_busy ;
+-----------------------------+------------------------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                  ; Value                  ; From ; To                                                                                                                                                           ;
+-----------------------------+------------------------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; ADV_NETLIST_OPT_ALLOWED     ; NEVER_ALLOW            ; -    ; dreg[0]                                                                                                                                                      ;
; SYNCHRONIZER_IDENTIFICATION ; FORCED_IF_ASYNCHRONOUS ; -    ; dreg[0]                                                                                                                                                      ;
; DONT_MERGE_REGISTER         ; ON                     ; -    ; dreg[0]                                                                                                                                                      ;
; PRESERVE_REGISTER           ; ON                     ; -    ; dreg[0]                                                                                                                                                      ;
; ADV_NETLIST_OPT_ALLOWED     ; NEVER_ALLOW            ; -    ; din_s1                                                                                                                                                       ;
; SYNCHRONIZER_IDENTIFICATION ; FORCED_IF_ASYNCHRONOUS ; -    ; din_s1                                                                                                                                                       ;
; DONT_MERGE_REGISTER         ; ON                     ; -    ; din_s1                                                                                                                                                       ;
; PRESERVE_REGISTER           ; ON                     ; -    ; din_s1                                                                                                                                                       ;
+-----------------------------+------------------------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|altera_std_synchronizer:stdsync_busy_clear ;
+-----------------------------+------------------------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                  ; Value                  ; From ; To                                                                                                                                                                 ;
+-----------------------------+------------------------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; ADV_NETLIST_OPT_ALLOWED     ; NEVER_ALLOW            ; -    ; dreg[0]                                                                                                                                                            ;
; SYNCHRONIZER_IDENTIFICATION ; FORCED_IF_ASYNCHRONOUS ; -    ; dreg[0]                                                                                                                                                            ;
; DONT_MERGE_REGISTER         ; ON                     ; -    ; dreg[0]                                                                                                                                                            ;
; PRESERVE_REGISTER           ; ON                     ; -    ; dreg[0]                                                                                                                                                            ;
; ADV_NETLIST_OPT_ALLOWED     ; NEVER_ALLOW            ; -    ; din_s1                                                                                                                                                             ;
; SYNCHRONIZER_IDENTIFICATION ; FORCED_IF_ASYNCHRONOUS ; -    ; din_s1                                                                                                                                                             ;
; DONT_MERGE_REGISTER         ; ON                     ; -    ; din_s1                                                                                                                                                             ;
; PRESERVE_REGISTER           ; ON                     ; -    ; din_s1                                                                                                                                                             ;
+-----------------------------+------------------------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:2:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated ;
+---------------------------------+--------------------+------+----------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                   ;
+---------------------------------+--------------------+------+----------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                    ;
+---------------------------------+--------------------+------+----------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:10:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                    ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                     ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:18:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                    ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                     ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:26:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                    ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                     ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:34:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                    ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                     ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:42:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                    ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                     ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:50:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                    ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                     ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:56:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                    ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                     ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:0:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated ;
+---------------------------------+--------------------+------+----------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                   ;
+---------------------------------+--------------------+------+----------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                    ;
+---------------------------------+--------------------+------+----------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:1:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated ;
+---------------------------------+--------------------+------+----------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                   ;
+---------------------------------+--------------------+------+----------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                    ;
+---------------------------------+--------------------+------+----------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:3:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated ;
+---------------------------------+--------------------+------+----------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                   ;
+---------------------------------+--------------------+------+----------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                    ;
+---------------------------------+--------------------+------+----------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:4:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated ;
+---------------------------------+--------------------+------+----------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                   ;
+---------------------------------+--------------------+------+----------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                    ;
+---------------------------------+--------------------+------+----------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:5:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated ;
+---------------------------------+--------------------+------+----------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                   ;
+---------------------------------+--------------------+------+----------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                    ;
+---------------------------------+--------------------+------+----------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:6:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated ;
+---------------------------------+--------------------+------+----------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                   ;
+---------------------------------+--------------------+------+----------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                    ;
+---------------------------------+--------------------+------+----------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:7:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated ;
+---------------------------------+--------------------+------+----------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                   ;
+---------------------------------+--------------------+------+----------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                    ;
+---------------------------------+--------------------+------+----------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:8:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated ;
+---------------------------------+--------------------+------+----------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                   ;
+---------------------------------+--------------------+------+----------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                    ;
+---------------------------------+--------------------+------+----------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:9:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated ;
+---------------------------------+--------------------+------+----------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                   ;
+---------------------------------+--------------------+------+----------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                    ;
+---------------------------------+--------------------+------+----------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:11:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                    ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                     ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:12:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                    ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                     ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:13:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                    ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                     ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:14:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                    ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                     ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:15:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                    ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                     ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:16:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                    ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                     ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:17:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                    ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                     ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:19:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                    ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                     ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:20:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                    ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                     ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:21:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                    ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                     ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:22:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                    ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                     ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:23:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                    ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                     ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:24:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                    ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                     ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:25:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                    ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                     ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:27:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                    ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                     ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:28:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                    ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                     ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:29:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                    ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                     ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:30:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                    ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                     ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:31:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                    ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                     ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:32:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                    ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                     ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:33:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                    ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                     ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:35:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                    ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                     ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:36:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                    ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                     ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:37:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                    ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                     ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:38:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                    ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                     ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:39:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                    ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                     ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:40:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                    ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                     ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:41:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                    ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                     ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:43:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                    ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                     ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:44:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                    ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                     ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:45:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                    ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                     ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:46:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                    ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                     ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:47:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                    ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                     ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:48:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                    ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                     ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:49:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                    ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                     ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:51:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                    ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                     ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:52:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                    ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                     ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:53:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                    ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                     ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:54:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                    ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                     ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:55:sample_ram_inst|altsyncram:ram_block_rtl_0|altsyncram_9r31:auto_generated ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                    ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                     ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for SID_top:\sid_on:sid2|SID_envelope:envelope_a|altshift_taps:attack_del1_reg_rtl_0|shift_taps_jgm:auto_generated|altsyncram_rj51:altsyncram4 ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                  ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                   ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: Top-level Entity: |pokeymax ;
+----------------------------+----------+----------------------------------+
; Parameter Name             ; Value    ; Type                             ;
+----------------------------+----------+----------------------------------+
; pokeys                     ; 4        ; Untyped                          ;
; lowpass                    ; 0        ; Signed Integer                   ;
; enable_auto_stereo         ; 1        ; Untyped                          ;
; fancy_switch_bit           ; 20       ; Signed Integer                   ;
; gtia_audio_bit             ; 5        ; Untyped                          ;
; detect_right_on_by_default ; 1        ; Signed Integer                   ;
; saturate_on_by_default     ; 1        ; Signed Integer                   ;
; a4_bit                     ; 1        ; Untyped                          ;
; a5_bit                     ; 2        ; Untyped                          ;
; a6_bit                     ; 3        ; Untyped                          ;
; a7_bit                     ; 4        ; Untyped                          ;
; cs0_bit                    ; 18       ; Signed Integer                   ;
; cs1_bit                    ; 20       ; Untyped                          ;
; spdif_bit                  ; 6        ; Untyped                          ;
; ps2clk_bit                 ; 7        ; Untyped                          ;
; ps2dat_bit                 ; 8        ; Untyped                          ;
; adc_audio_detect           ; 0        ; Signed Integer                   ;
; adc_fir_filter_v4          ; 0        ; Signed Integer                   ;
; sigmadelta_implementation  ; 2        ; Signed Integer                   ;
; ext_bits                   ; 11       ; Untyped                          ;
; pll_v2                     ; 0        ; Untyped                          ;
; enable_config              ; 1        ; Signed Integer                   ;
; enable_sid                 ; 1        ; Untyped                          ;
; enable_psg                 ; 1        ; Untyped                          ;
; enable_covox               ; 1        ; Untyped                          ;
; enable_sample              ; 1        ; Untyped                          ;
; enable_flash               ; 1        ; Untyped                          ;
; enable_audout2             ; 1        ; Signed Integer                   ;
; enable_spdif               ; 1        ; Untyped                          ;
; enable_ps2                 ; 1        ; Untyped                          ;
; enable_adc                 ; 0        ; Signed Integer                   ;
; enable_routing             ; 0        ; Signed Integer                   ;
; paddle_lvds                ; 0        ; Signed Integer                   ;
; paddle_comp                ; 1        ; Signed Integer                   ;
; enable_iox                 ; 1        ; Signed Integer                   ;
; sid_wave_base              ; 79872    ; Untyped                          ;
; sample_ram_size            ; 65536    ; Untyped                          ;
; flash_addr_bits            ; 17       ; Untyped                          ;
; ext_clk_enable             ; 0        ; Signed Integer                   ;
; version                    ; 313016QF ; Untyped                          ;
+----------------------------+----------+----------------------------------+
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+------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: int_osc:oscillator|altera_int_osc:int_osc_0 ;
+-----------------+--------+---------------------------------------------------------------+
; Parameter Name  ; Value  ; Type                                                          ;
+-----------------+--------+---------------------------------------------------------------+
; DEVICE_FAMILY   ; MAX 10 ; String                                                        ;
; DEVICE_ID       ; 08     ; String                                                        ;
; CLOCK_FREQUENCY ; 116    ; String                                                        ;
+-----------------+--------+---------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: flash_controller:\flash_on:flash_controller_inst ;
+----------------+-------+----------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                 ;
+----------------+-------+----------------------------------------------------------------------+
; addr_bits      ; 17    ; Signed Integer                                                       ;
+----------------+-------+----------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0 ;
+-------------------------------------+----------------+----------------------------------------------------------------------------------------+
; Parameter Name                      ; Value          ; Type                                                                                   ;
+-------------------------------------+----------------+----------------------------------------------------------------------------------------+
; DEVICE_FAMILY                       ; MAX 10         ; String                                                                                 ;
; PART_NAME                           ; 10M16SCU169C8G ; String                                                                                 ;
; IS_DUAL_BOOT                        ; False          ; String                                                                                 ;
; IS_ERAM_SKIP                        ; True           ; String                                                                                 ;
; IS_COMPRESSED_IMAGE                 ; False          ; String                                                                                 ;
; INIT_FILENAME                       ;                ; String                                                                                 ;
; DEVICE_ID                           ; 16             ; String                                                                                 ;
; INIT_FILENAME_SIM                   ;                ; String                                                                                 ;
; PARALLEL_MODE                       ; true           ; Enumerated                                                                             ;
; READ_AND_WRITE_MODE                 ; true           ; Enumerated                                                                             ;
; WRAPPING_BURST_MODE                 ; false          ; Enumerated                                                                             ;
; AVMM_CSR_DATA_WIDTH                 ; 32             ; Signed Integer                                                                         ;
; AVMM_DATA_DATA_WIDTH                ; 32             ; Signed Integer                                                                         ;
; AVMM_DATA_ADDR_WIDTH                ; 17             ; Signed Integer                                                                         ;
; AVMM_DATA_BURSTCOUNT_WIDTH          ; 2              ; Signed Integer                                                                         ;
; FLASH_DATA_WIDTH                    ; 32             ; Signed Integer                                                                         ;
; FLASH_ADDR_WIDTH                    ; 23             ; Signed Integer                                                                         ;
; FLASH_SEQ_READ_DATA_COUNT           ; 4              ; Signed Integer                                                                         ;
; FLASH_READ_CYCLE_MAX_INDEX          ; 4              ; Signed Integer                                                                         ;
; FLASH_ADDR_ALIGNMENT_BITS           ; 2              ; Signed Integer                                                                         ;
; FLASH_RESET_CYCLE_MAX_INDEX         ; 29             ; Signed Integer                                                                         ;
; FLASH_BUSY_TIMEOUT_CYCLE_MAX_INDEX  ; 139            ; Signed Integer                                                                         ;
; FLASH_ERASE_TIMEOUT_CYCLE_MAX_INDEX ; 40600000       ; Signed Integer                                                                         ;
; FLASH_WRITE_TIMEOUT_CYCLE_MAX_INDEX ; 35380          ; Signed Integer                                                                         ;
; MIN_VALID_ADDR                      ; 0              ; Signed Integer                                                                         ;
; MAX_VALID_ADDR                      ; 104447         ; Signed Integer                                                                         ;
; MIN_UFM_VALID_ADDR                  ; 0              ; Signed Integer                                                                         ;
; MAX_UFM_VALID_ADDR                  ; 8191           ; Signed Integer                                                                         ;
; SECTOR1_START_ADDR                  ; 0              ; Signed Integer                                                                         ;
; SECTOR1_END_ADDR                    ; 4095           ; Signed Integer                                                                         ;
; SECTOR2_START_ADDR                  ; 4096           ; Signed Integer                                                                         ;
; SECTOR2_END_ADDR                    ; 8191           ; Signed Integer                                                                         ;
; SECTOR3_START_ADDR                  ; 8192           ; Signed Integer                                                                         ;
; SECTOR3_END_ADDR                    ; 36863          ; Signed Integer                                                                         ;
; SECTOR4_START_ADDR                  ; 36864          ; Signed Integer                                                                         ;
; SECTOR4_END_ADDR                    ; 104447         ; Signed Integer                                                                         ;
; SECTOR5_START_ADDR                  ; 0              ; Signed Integer                                                                         ;
; SECTOR5_END_ADDR                    ; 0              ; Signed Integer                                                                         ;
; SECTOR_READ_PROTECTION_MODE         ; 16             ; Signed Integer                                                                         ;
; SECTOR1_MAP                         ; 1              ; Signed Integer                                                                         ;
; SECTOR2_MAP                         ; 2              ; Signed Integer                                                                         ;
; SECTOR3_MAP                         ; 4              ; Signed Integer                                                                         ;
; SECTOR4_MAP                         ; 5              ; Signed Integer                                                                         ;
; SECTOR5_MAP                         ; 0              ; Signed Integer                                                                         ;
; ADDR_RANGE1_END_ADDR                ; 8191           ; Signed Integer                                                                         ;
; ADDR_RANGE2_END_ADDR                ; 104447         ; Signed Integer                                                                         ;
; ADDR_RANGE1_OFFSET                  ; 1024           ; Signed Integer                                                                         ;
; ADDR_RANGE2_OFFSET                  ; 39936          ; Signed Integer                                                                         ;
; ADDR_RANGE3_OFFSET                  ; 0              ; Signed Integer                                                                         ;
+-------------------------------------+----------------+----------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_csr_controller:avmm_csr_controller ;
+---------------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name      ; Value ; Type                                                                                                                                                                        ;
+---------------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AVMM_CSR_DATA_WIDTH ; 32    ; Signed Integer                                                                                                                                                              ;
+---------------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller ;
+-------------------------------------+----------+------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name                      ; Value    ; Type                                                                                                                                                       ;
+-------------------------------------+----------+------------------------------------------------------------------------------------------------------------------------------------------------------------+
; READ_AND_WRITE_MODE                 ; 1        ; Signed Integer                                                                                                                                             ;
; WRAPPING_BURST_MODE                 ; 0        ; Signed Integer                                                                                                                                             ;
; DATA_WIDTH                          ; 32       ; Signed Integer                                                                                                                                             ;
; AVMM_DATA_ADDR_WIDTH                ; 17       ; Signed Integer                                                                                                                                             ;
; AVMM_DATA_BURSTCOUNT_WIDTH          ; 2        ; Signed Integer                                                                                                                                             ;
; FLASH_ADDR_WIDTH                    ; 23       ; Signed Integer                                                                                                                                             ;
; FLASH_SEQ_READ_DATA_COUNT           ; 4        ; Signed Integer                                                                                                                                             ;
; FLASH_READ_CYCLE_MAX_INDEX          ; 4        ; Signed Integer                                                                                                                                             ;
; FLASH_ADDR_ALIGNMENT_BITS           ; 2        ; Signed Integer                                                                                                                                             ;
; FLASH_RESET_CYCLE_MAX_INDEX         ; 29       ; Signed Integer                                                                                                                                             ;
; FLASH_BUSY_TIMEOUT_CYCLE_MAX_INDEX  ; 139      ; Signed Integer                                                                                                                                             ;
; FLASH_ERASE_TIMEOUT_CYCLE_MAX_INDEX ; 40600000 ; Signed Integer                                                                                                                                             ;
; FLASH_WRITE_TIMEOUT_CYCLE_MAX_INDEX ; 35380    ; Signed Integer                                                                                                                                             ;
; MIN_VALID_ADDR                      ; 0        ; Signed Integer                                                                                                                                             ;
; MAX_VALID_ADDR                      ; 104447   ; Signed Integer                                                                                                                                             ;
; SECTOR1_START_ADDR                  ; 0        ; Signed Integer                                                                                                                                             ;
; SECTOR1_END_ADDR                    ; 4095     ; Signed Integer                                                                                                                                             ;
; SECTOR2_START_ADDR                  ; 4096     ; Signed Integer                                                                                                                                             ;
; SECTOR2_END_ADDR                    ; 8191     ; Signed Integer                                                                                                                                             ;
; SECTOR3_START_ADDR                  ; 8192     ; Signed Integer                                                                                                                                             ;
; SECTOR3_END_ADDR                    ; 36863    ; Signed Integer                                                                                                                                             ;
; SECTOR4_START_ADDR                  ; 36864    ; Signed Integer                                                                                                                                             ;
; SECTOR4_END_ADDR                    ; 104447   ; Signed Integer                                                                                                                                             ;
; SECTOR5_START_ADDR                  ; 0        ; Signed Integer                                                                                                                                             ;
; SECTOR5_END_ADDR                    ; 0        ; Signed Integer                                                                                                                                             ;
; SECTOR_READ_PROTECTION_MODE         ; 16       ; Signed Integer                                                                                                                                             ;
; SECTOR1_MAP                         ; 1        ; Signed Integer                                                                                                                                             ;
; SECTOR2_MAP                         ; 2        ; Signed Integer                                                                                                                                             ;
; SECTOR3_MAP                         ; 4        ; Signed Integer                                                                                                                                             ;
; SECTOR4_MAP                         ; 5        ; Signed Integer                                                                                                                                             ;
; SECTOR5_MAP                         ; 0        ; Signed Integer                                                                                                                                             ;
; ADDR_RANGE1_END_ADDR                ; 8191     ; Signed Integer                                                                                                                                             ;
; ADDR_RANGE2_END_ADDR                ; 104447   ; Signed Integer                                                                                                                                             ;
; ADDR_RANGE1_OFFSET                  ; 1024     ; Signed Integer                                                                                                                                             ;
; ADDR_RANGE2_OFFSET                  ; 39936    ; Signed Integer                                                                                                                                             ;
; ADDR_RANGE3_OFFSET                  ; 0        ; Signed Integer                                                                                                                                             ;
+-------------------------------------+----------+------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|altera_std_synchronizer:stdsync_busy ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                                                                                    ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; depth          ; 2     ; Signed Integer                                                                                                                                                                                                          ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|altera_std_synchronizer:stdsync_busy_clear ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                                                                                          ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; depth          ; 2     ; Signed Integer                                                                                                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|lpm_shiftreg:ufm_data_shiftreg ;
+------------------------+--------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value  ; Type                                                                                                                                                                                                     ;
+------------------------+--------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 32     ; Signed Integer                                                                                                                                                                                           ;
; LPM_DIRECTION          ; LEFT   ; Untyped                                                                                                                                                                                                  ;
; LPM_AVALUE             ; UNUSED ; Untyped                                                                                                                                                                                                  ;
; LPM_SVALUE             ; UNUSED ; Untyped                                                                                                                                                                                                  ;
; DEVICE_FAMILY          ; MAX 10 ; Untyped                                                                                                                                                                                                  ;
; AUTO_CARRY_CHAINS      ; ON     ; AUTO_CARRY                                                                                                                                                                                               ;
; IGNORE_CARRY_BUFFERS   ; OFF    ; IGNORE_CARRY                                                                                                                                                                                             ;
; AUTO_CASCADE_CHAINS    ; ON     ; AUTO_CASCADE                                                                                                                                                                                             ;
; IGNORE_CASCADE_BUFFERS ; OFF    ; IGNORE_CASCADE                                                                                                                                                                                           ;
+------------------------+--------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|altera_onchip_flash_address_range_check:address_range_checker ;
+------------------+--------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name   ; Value  ; Type                                                                                                                                                                                                                                          ;
+------------------+--------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; FLASH_ADDR_WIDTH ; 23     ; Signed Integer                                                                                                                                                                                                                                ;
; MIN_VALID_ADDR   ; 0      ; Signed Integer                                                                                                                                                                                                                                ;
; MAX_VALID_ADDR   ; 104447 ; Signed Integer                                                                                                                                                                                                                                ;
+------------------+--------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|altera_onchip_flash_convert_address:address_convertor ;
+----------------------+--------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name       ; Value  ; Type                                                                                                                                                                                                                              ;
+----------------------+--------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; FLASH_ADDR_WIDTH     ; 23     ; Signed Integer                                                                                                                                                                                                                    ;
; ADDR_RANGE1_END_ADDR ; 8191   ; Signed Integer                                                                                                                                                                                                                    ;
; ADDR_RANGE2_END_ADDR ; 104447 ; Signed Integer                                                                                                                                                                                                                    ;
; ADDR_RANGE1_OFFSET   ; 1024   ; Signed Integer                                                                                                                                                                                                                    ;
; ADDR_RANGE2_OFFSET   ; 39936  ; Signed Integer                                                                                                                                                                                                                    ;
; ADDR_RANGE3_OFFSET   ; 0      ; Signed Integer                                                                                                                                                                                                                    ;
+----------------------+--------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|altera_onchip_flash_a_address_write_protection_check:access_address_write_protection_checker ;
+--------------------+--------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name     ; Value  ; Type                                                                                                                                                                                                                                                                       ;
+--------------------+--------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; FLASH_ADDR_WIDTH   ; 23     ; Signed Integer                                                                                                                                                                                                                                                             ;
; SECTOR1_START_ADDR ; 0      ; Signed Integer                                                                                                                                                                                                                                                             ;
; SECTOR1_END_ADDR   ; 4095   ; Signed Integer                                                                                                                                                                                                                                                             ;
; SECTOR2_START_ADDR ; 4096   ; Signed Integer                                                                                                                                                                                                                                                             ;
; SECTOR2_END_ADDR   ; 8191   ; Signed Integer                                                                                                                                                                                                                                                             ;
; SECTOR3_START_ADDR ; 8192   ; Signed Integer                                                                                                                                                                                                                                                             ;
; SECTOR3_END_ADDR   ; 36863  ; Signed Integer                                                                                                                                                                                                                                                             ;
; SECTOR4_START_ADDR ; 36864  ; Signed Integer                                                                                                                                                                                                                                                             ;
; SECTOR4_END_ADDR   ; 104447 ; Signed Integer                                                                                                                                                                                                                                                             ;
; SECTOR5_START_ADDR ; 0      ; Signed Integer                                                                                                                                                                                                                                                             ;
; SECTOR5_END_ADDR   ; 0      ; Signed Integer                                                                                                                                                                                                                                                             ;
+--------------------+--------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|altera_onchip_flash_convert_sector:sector_convertor ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                                                                                                   ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; SECTOR1_MAP    ; 1     ; Signed Integer                                                                                                                                                                                                                         ;
; SECTOR2_MAP    ; 2     ; Signed Integer                                                                                                                                                                                                                         ;
; SECTOR3_MAP    ; 4     ; Signed Integer                                                                                                                                                                                                                         ;
; SECTOR4_MAP    ; 5     ; Signed Integer                                                                                                                                                                                                                         ;
; SECTOR5_MAP    ; 0     ; Signed Integer                                                                                                                                                                                                                         ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pllv3:\pll_v3_inst:pll_inst|altpll:altpll_component ;
+-------------------------------+-------------------------+----------------------------------------+
; Parameter Name                ; Value                   ; Type                                   ;
+-------------------------------+-------------------------+----------------------------------------+
; OPERATION_MODE                ; NORMAL                  ; Untyped                                ;
; PLL_TYPE                      ; AUTO                    ; Untyped                                ;
; LPM_HINT                      ; CBX_MODULE_PREFIX=pllv3 ; Untyped                                ;
; QUALIFY_CONF_DONE             ; OFF                     ; Untyped                                ;
; COMPENSATE_CLOCK              ; CLK0                    ; Untyped                                ;
; SCAN_CHAIN                    ; LONG                    ; Untyped                                ;
; PRIMARY_CLOCK                 ; INCLK0                  ; Untyped                                ;
; INCLK0_INPUT_FREQUENCY        ; 20345                   ; Signed Integer                         ;
; INCLK1_INPUT_FREQUENCY        ; 0                       ; Untyped                                ;
; GATE_LOCK_SIGNAL              ; NO                      ; Untyped                                ;
; GATE_LOCK_COUNTER             ; 0                       ; Untyped                                ;
; LOCK_HIGH                     ; 1                       ; Untyped                                ;
; LOCK_LOW                      ; 1                       ; Untyped                                ;
; VALID_LOCK_MULTIPLIER         ; 1                       ; Untyped                                ;
; INVALID_LOCK_MULTIPLIER       ; 5                       ; Untyped                                ;
; SWITCH_OVER_ON_LOSSCLK        ; OFF                     ; Untyped                                ;
; SWITCH_OVER_ON_GATED_LOCK     ; OFF                     ; Untyped                                ;
; ENABLE_SWITCH_OVER_COUNTER    ; OFF                     ; Untyped                                ;
; SKIP_VCO                      ; OFF                     ; Untyped                                ;
; SWITCH_OVER_COUNTER           ; 0                       ; Untyped                                ;
; SWITCH_OVER_TYPE              ; AUTO                    ; Untyped                                ;
; FEEDBACK_SOURCE               ; EXTCLK0                 ; Untyped                                ;
; BANDWIDTH                     ; 0                       ; Untyped                                ;
; BANDWIDTH_TYPE                ; AUTO                    ; Untyped                                ;
; SPREAD_FREQUENCY              ; 0                       ; Untyped                                ;
; DOWN_SPREAD                   ; 0                       ; Untyped                                ;
; SELF_RESET_ON_GATED_LOSS_LOCK ; OFF                     ; Untyped                                ;
; SELF_RESET_ON_LOSS_LOCK       ; ON                      ; Untyped                                ;
; CLK9_MULTIPLY_BY              ; 0                       ; Untyped                                ;
; CLK8_MULTIPLY_BY              ; 0                       ; Untyped                                ;
; CLK7_MULTIPLY_BY              ; 0                       ; Untyped                                ;
; CLK6_MULTIPLY_BY              ; 0                       ; Untyped                                ;
; CLK5_MULTIPLY_BY              ; 1                       ; Untyped                                ;
; CLK4_MULTIPLY_BY              ; 1                       ; Untyped                                ;
; CLK3_MULTIPLY_BY              ; 1                       ; Signed Integer                         ;
; CLK2_MULTIPLY_BY              ; 2                       ; Signed Integer                         ;
; CLK1_MULTIPLY_BY              ; 7                       ; Signed Integer                         ;
; CLK0_MULTIPLY_BY              ; 7                       ; Signed Integer                         ;
; CLK9_DIVIDE_BY                ; 0                       ; Untyped                                ;
; CLK8_DIVIDE_BY                ; 0                       ; Untyped                                ;
; CLK7_DIVIDE_BY                ; 0                       ; Untyped                                ;
; CLK6_DIVIDE_BY                ; 0                       ; Untyped                                ;
; CLK5_DIVIDE_BY                ; 1                       ; Untyped                                ;
; CLK4_DIVIDE_BY                ; 1                       ; Untyped                                ;
; CLK3_DIVIDE_BY                ; 8                       ; Signed Integer                         ;
; CLK2_DIVIDE_BY                ; 1                       ; Signed Integer                         ;
; CLK1_DIVIDE_BY                ; 3                       ; Signed Integer                         ;
; CLK0_DIVIDE_BY                ; 6                       ; Signed Integer                         ;
; CLK9_PHASE_SHIFT              ; 0                       ; Untyped                                ;
; CLK8_PHASE_SHIFT              ; 0                       ; Untyped                                ;
; CLK7_PHASE_SHIFT              ; 0                       ; Untyped                                ;
; CLK6_PHASE_SHIFT              ; 0                       ; Untyped                                ;
; CLK5_PHASE_SHIFT              ; 0                       ; Untyped                                ;
; CLK4_PHASE_SHIFT              ; 0                       ; Untyped                                ;
; CLK3_PHASE_SHIFT              ; 0                       ; Untyped                                ;
; CLK2_PHASE_SHIFT              ; 0                       ; Untyped                                ;
; CLK1_PHASE_SHIFT              ; 0                       ; Untyped                                ;
; CLK0_PHASE_SHIFT              ; 0                       ; Untyped                                ;
; CLK5_TIME_DELAY               ; 0                       ; Untyped                                ;
; CLK4_TIME_DELAY               ; 0                       ; Untyped                                ;
; CLK3_TIME_DELAY               ; 0                       ; Untyped                                ;
; CLK2_TIME_DELAY               ; 0                       ; Untyped                                ;
; CLK1_TIME_DELAY               ; 0                       ; Untyped                                ;
; CLK0_TIME_DELAY               ; 0                       ; Untyped                                ;
; CLK9_DUTY_CYCLE               ; 50                      ; Untyped                                ;
; CLK8_DUTY_CYCLE               ; 50                      ; Untyped                                ;
; CLK7_DUTY_CYCLE               ; 50                      ; Untyped                                ;
; CLK6_DUTY_CYCLE               ; 50                      ; Untyped                                ;
; CLK5_DUTY_CYCLE               ; 50                      ; Untyped                                ;
; CLK4_DUTY_CYCLE               ; 50                      ; Untyped                                ;
; CLK3_DUTY_CYCLE               ; 50                      ; Signed Integer                         ;
; CLK2_DUTY_CYCLE               ; 50                      ; Signed Integer                         ;
; CLK1_DUTY_CYCLE               ; 50                      ; Signed Integer                         ;
; CLK0_DUTY_CYCLE               ; 50                      ; Signed Integer                         ;
; CLK9_USE_EVEN_COUNTER_MODE    ; OFF                     ; Untyped                                ;
; CLK8_USE_EVEN_COUNTER_MODE    ; OFF                     ; Untyped                                ;
; CLK7_USE_EVEN_COUNTER_MODE    ; OFF                     ; Untyped                                ;
; CLK6_USE_EVEN_COUNTER_MODE    ; OFF                     ; Untyped                                ;
; CLK5_USE_EVEN_COUNTER_MODE    ; OFF                     ; Untyped                                ;
; CLK4_USE_EVEN_COUNTER_MODE    ; OFF                     ; Untyped                                ;
; CLK3_USE_EVEN_COUNTER_MODE    ; OFF                     ; Untyped                                ;
; CLK2_USE_EVEN_COUNTER_MODE    ; OFF                     ; Untyped                                ;
; CLK1_USE_EVEN_COUNTER_MODE    ; OFF                     ; Untyped                                ;
; CLK0_USE_EVEN_COUNTER_MODE    ; OFF                     ; Untyped                                ;
; CLK9_USE_EVEN_COUNTER_VALUE   ; OFF                     ; Untyped                                ;
; CLK8_USE_EVEN_COUNTER_VALUE   ; OFF                     ; Untyped                                ;
; CLK7_USE_EVEN_COUNTER_VALUE   ; OFF                     ; Untyped                                ;
; CLK6_USE_EVEN_COUNTER_VALUE   ; OFF                     ; Untyped                                ;
; CLK5_USE_EVEN_COUNTER_VALUE   ; OFF                     ; Untyped                                ;
; CLK4_USE_EVEN_COUNTER_VALUE   ; OFF                     ; Untyped                                ;
; CLK3_USE_EVEN_COUNTER_VALUE   ; OFF                     ; Untyped                                ;
; CLK2_USE_EVEN_COUNTER_VALUE   ; OFF                     ; Untyped                                ;
; CLK1_USE_EVEN_COUNTER_VALUE   ; OFF                     ; Untyped                                ;
; CLK0_USE_EVEN_COUNTER_VALUE   ; OFF                     ; Untyped                                ;
; LOCK_WINDOW_UI                ;  0.05                   ; Untyped                                ;
; LOCK_WINDOW_UI_BITS           ; UNUSED                  ; Untyped                                ;
; VCO_RANGE_DETECTOR_LOW_BITS   ; UNUSED                  ; Untyped                                ;
; VCO_RANGE_DETECTOR_HIGH_BITS  ; UNUSED                  ; Untyped                                ;
; DPA_MULTIPLY_BY               ; 0                       ; Untyped                                ;
; DPA_DIVIDE_BY                 ; 1                       ; Untyped                                ;
; DPA_DIVIDER                   ; 0                       ; Untyped                                ;
; EXTCLK3_MULTIPLY_BY           ; 1                       ; Untyped                                ;
; EXTCLK2_MULTIPLY_BY           ; 1                       ; Untyped                                ;
; EXTCLK1_MULTIPLY_BY           ; 1                       ; Untyped                                ;
; EXTCLK0_MULTIPLY_BY           ; 1                       ; Untyped                                ;
; EXTCLK3_DIVIDE_BY             ; 1                       ; Untyped                                ;
; EXTCLK2_DIVIDE_BY             ; 1                       ; Untyped                                ;
; EXTCLK1_DIVIDE_BY             ; 1                       ; Untyped                                ;
; EXTCLK0_DIVIDE_BY             ; 1                       ; Untyped                                ;
; EXTCLK3_PHASE_SHIFT           ; 0                       ; Untyped                                ;
; EXTCLK2_PHASE_SHIFT           ; 0                       ; Untyped                                ;
; EXTCLK1_PHASE_SHIFT           ; 0                       ; Untyped                                ;
; EXTCLK0_PHASE_SHIFT           ; 0                       ; Untyped                                ;
; EXTCLK3_TIME_DELAY            ; 0                       ; Untyped                                ;
; EXTCLK2_TIME_DELAY            ; 0                       ; Untyped                                ;
; EXTCLK1_TIME_DELAY            ; 0                       ; Untyped                                ;
; EXTCLK0_TIME_DELAY            ; 0                       ; Untyped                                ;
; EXTCLK3_DUTY_CYCLE            ; 50                      ; Untyped                                ;
; EXTCLK2_DUTY_CYCLE            ; 50                      ; Untyped                                ;
; EXTCLK1_DUTY_CYCLE            ; 50                      ; Untyped                                ;
; EXTCLK0_DUTY_CYCLE            ; 50                      ; Untyped                                ;
; VCO_MULTIPLY_BY               ; 0                       ; Untyped                                ;
; VCO_DIVIDE_BY                 ; 0                       ; Untyped                                ;
; SCLKOUT0_PHASE_SHIFT          ; 0                       ; Untyped                                ;
; SCLKOUT1_PHASE_SHIFT          ; 0                       ; Untyped                                ;
; VCO_MIN                       ; 0                       ; Untyped                                ;
; VCO_MAX                       ; 0                       ; Untyped                                ;
; VCO_CENTER                    ; 0                       ; Untyped                                ;
; PFD_MIN                       ; 0                       ; Untyped                                ;
; PFD_MAX                       ; 0                       ; Untyped                                ;
; M_INITIAL                     ; 0                       ; Untyped                                ;
; M                             ; 0                       ; Untyped                                ;
; N                             ; 1                       ; Untyped                                ;
; M2                            ; 1                       ; Untyped                                ;
; N2                            ; 1                       ; Untyped                                ;
; SS                            ; 1                       ; Untyped                                ;
; C0_HIGH                       ; 0                       ; Untyped                                ;
; C1_HIGH                       ; 0                       ; Untyped                                ;
; C2_HIGH                       ; 0                       ; Untyped                                ;
; C3_HIGH                       ; 0                       ; Untyped                                ;
; C4_HIGH                       ; 0                       ; Untyped                                ;
; C5_HIGH                       ; 0                       ; Untyped                                ;
; C6_HIGH                       ; 0                       ; Untyped                                ;
; C7_HIGH                       ; 0                       ; Untyped                                ;
; C8_HIGH                       ; 0                       ; Untyped                                ;
; C9_HIGH                       ; 0                       ; Untyped                                ;
; C0_LOW                        ; 0                       ; Untyped                                ;
; C1_LOW                        ; 0                       ; Untyped                                ;
; C2_LOW                        ; 0                       ; Untyped                                ;
; C3_LOW                        ; 0                       ; Untyped                                ;
; C4_LOW                        ; 0                       ; Untyped                                ;
; C5_LOW                        ; 0                       ; Untyped                                ;
; C6_LOW                        ; 0                       ; Untyped                                ;
; C7_LOW                        ; 0                       ; Untyped                                ;
; C8_LOW                        ; 0                       ; Untyped                                ;
; C9_LOW                        ; 0                       ; Untyped                                ;
; C0_INITIAL                    ; 0                       ; Untyped                                ;
; C1_INITIAL                    ; 0                       ; Untyped                                ;
; C2_INITIAL                    ; 0                       ; Untyped                                ;
; C3_INITIAL                    ; 0                       ; Untyped                                ;
; C4_INITIAL                    ; 0                       ; Untyped                                ;
; C5_INITIAL                    ; 0                       ; Untyped                                ;
; C6_INITIAL                    ; 0                       ; Untyped                                ;
; C7_INITIAL                    ; 0                       ; Untyped                                ;
; C8_INITIAL                    ; 0                       ; Untyped                                ;
; C9_INITIAL                    ; 0                       ; Untyped                                ;
; C0_MODE                       ; BYPASS                  ; Untyped                                ;
; C1_MODE                       ; BYPASS                  ; Untyped                                ;
; C2_MODE                       ; BYPASS                  ; Untyped                                ;
; C3_MODE                       ; BYPASS                  ; Untyped                                ;
; C4_MODE                       ; BYPASS                  ; Untyped                                ;
; C5_MODE                       ; BYPASS                  ; Untyped                                ;
; C6_MODE                       ; BYPASS                  ; Untyped                                ;
; C7_MODE                       ; BYPASS                  ; Untyped                                ;
; C8_MODE                       ; BYPASS                  ; Untyped                                ;
; C9_MODE                       ; BYPASS                  ; Untyped                                ;
; C0_PH                         ; 0                       ; Untyped                                ;
; C1_PH                         ; 0                       ; Untyped                                ;
; C2_PH                         ; 0                       ; Untyped                                ;
; C3_PH                         ; 0                       ; Untyped                                ;
; C4_PH                         ; 0                       ; Untyped                                ;
; C5_PH                         ; 0                       ; Untyped                                ;
; C6_PH                         ; 0                       ; Untyped                                ;
; C7_PH                         ; 0                       ; Untyped                                ;
; C8_PH                         ; 0                       ; Untyped                                ;
; C9_PH                         ; 0                       ; Untyped                                ;
; L0_HIGH                       ; 1                       ; Untyped                                ;
; L1_HIGH                       ; 1                       ; Untyped                                ;
; G0_HIGH                       ; 1                       ; Untyped                                ;
; G1_HIGH                       ; 1                       ; Untyped                                ;
; G2_HIGH                       ; 1                       ; Untyped                                ;
; G3_HIGH                       ; 1                       ; Untyped                                ;
; E0_HIGH                       ; 1                       ; Untyped                                ;
; E1_HIGH                       ; 1                       ; Untyped                                ;
; E2_HIGH                       ; 1                       ; Untyped                                ;
; E3_HIGH                       ; 1                       ; Untyped                                ;
; L0_LOW                        ; 1                       ; Untyped                                ;
; L1_LOW                        ; 1                       ; Untyped                                ;
; G0_LOW                        ; 1                       ; Untyped                                ;
; G1_LOW                        ; 1                       ; Untyped                                ;
; G2_LOW                        ; 1                       ; Untyped                                ;
; G3_LOW                        ; 1                       ; Untyped                                ;
; E0_LOW                        ; 1                       ; Untyped                                ;
; E1_LOW                        ; 1                       ; Untyped                                ;
; E2_LOW                        ; 1                       ; Untyped                                ;
; E3_LOW                        ; 1                       ; Untyped                                ;
; L0_INITIAL                    ; 1                       ; Untyped                                ;
; L1_INITIAL                    ; 1                       ; Untyped                                ;
; G0_INITIAL                    ; 1                       ; Untyped                                ;
; G1_INITIAL                    ; 1                       ; Untyped                                ;
; G2_INITIAL                    ; 1                       ; Untyped                                ;
; G3_INITIAL                    ; 1                       ; Untyped                                ;
; E0_INITIAL                    ; 1                       ; Untyped                                ;
; E1_INITIAL                    ; 1                       ; Untyped                                ;
; E2_INITIAL                    ; 1                       ; Untyped                                ;
; E3_INITIAL                    ; 1                       ; Untyped                                ;
; L0_MODE                       ; BYPASS                  ; Untyped                                ;
; L1_MODE                       ; BYPASS                  ; Untyped                                ;
; G0_MODE                       ; BYPASS                  ; Untyped                                ;
; G1_MODE                       ; BYPASS                  ; Untyped                                ;
; G2_MODE                       ; BYPASS                  ; Untyped                                ;
; G3_MODE                       ; BYPASS                  ; Untyped                                ;
; E0_MODE                       ; BYPASS                  ; Untyped                                ;
; E1_MODE                       ; BYPASS                  ; Untyped                                ;
; E2_MODE                       ; BYPASS                  ; Untyped                                ;
; E3_MODE                       ; BYPASS                  ; Untyped                                ;
; L0_PH                         ; 0                       ; Untyped                                ;
; L1_PH                         ; 0                       ; Untyped                                ;
; G0_PH                         ; 0                       ; Untyped                                ;
; G1_PH                         ; 0                       ; Untyped                                ;
; G2_PH                         ; 0                       ; Untyped                                ;
; G3_PH                         ; 0                       ; Untyped                                ;
; E0_PH                         ; 0                       ; Untyped                                ;
; E1_PH                         ; 0                       ; Untyped                                ;
; E2_PH                         ; 0                       ; Untyped                                ;
; E3_PH                         ; 0                       ; Untyped                                ;
; M_PH                          ; 0                       ; Untyped                                ;
; C1_USE_CASC_IN                ; OFF                     ; Untyped                                ;
; C2_USE_CASC_IN                ; OFF                     ; Untyped                                ;
; C3_USE_CASC_IN                ; OFF                     ; Untyped                                ;
; C4_USE_CASC_IN                ; OFF                     ; Untyped                                ;
; C5_USE_CASC_IN                ; OFF                     ; Untyped                                ;
; C6_USE_CASC_IN                ; OFF                     ; Untyped                                ;
; C7_USE_CASC_IN                ; OFF                     ; Untyped                                ;
; C8_USE_CASC_IN                ; OFF                     ; Untyped                                ;
; C9_USE_CASC_IN                ; OFF                     ; Untyped                                ;
; CLK0_COUNTER                  ; G0                      ; Untyped                                ;
; CLK1_COUNTER                  ; G0                      ; Untyped                                ;
; CLK2_COUNTER                  ; G0                      ; Untyped                                ;
; CLK3_COUNTER                  ; G0                      ; Untyped                                ;
; CLK4_COUNTER                  ; G0                      ; Untyped                                ;
; CLK5_COUNTER                  ; G0                      ; Untyped                                ;
; CLK6_COUNTER                  ; E0                      ; Untyped                                ;
; CLK7_COUNTER                  ; E1                      ; Untyped                                ;
; CLK8_COUNTER                  ; E2                      ; Untyped                                ;
; CLK9_COUNTER                  ; E3                      ; Untyped                                ;
; L0_TIME_DELAY                 ; 0                       ; Untyped                                ;
; L1_TIME_DELAY                 ; 0                       ; Untyped                                ;
; G0_TIME_DELAY                 ; 0                       ; Untyped                                ;
; G1_TIME_DELAY                 ; 0                       ; Untyped                                ;
; G2_TIME_DELAY                 ; 0                       ; Untyped                                ;
; G3_TIME_DELAY                 ; 0                       ; Untyped                                ;
; E0_TIME_DELAY                 ; 0                       ; Untyped                                ;
; E1_TIME_DELAY                 ; 0                       ; Untyped                                ;
; E2_TIME_DELAY                 ; 0                       ; Untyped                                ;
; E3_TIME_DELAY                 ; 0                       ; Untyped                                ;
; M_TIME_DELAY                  ; 0                       ; Untyped                                ;
; N_TIME_DELAY                  ; 0                       ; Untyped                                ;
; EXTCLK3_COUNTER               ; E3                      ; Untyped                                ;
; EXTCLK2_COUNTER               ; E2                      ; Untyped                                ;
; EXTCLK1_COUNTER               ; E1                      ; Untyped                                ;
; EXTCLK0_COUNTER               ; E0                      ; Untyped                                ;
; ENABLE0_COUNTER               ; L0                      ; Untyped                                ;
; ENABLE1_COUNTER               ; L0                      ; Untyped                                ;
; CHARGE_PUMP_CURRENT           ; 2                       ; Untyped                                ;
; LOOP_FILTER_R                 ;  1.000000               ; Untyped                                ;
; LOOP_FILTER_C                 ; 5                       ; Untyped                                ;
; CHARGE_PUMP_CURRENT_BITS      ; 9999                    ; Untyped                                ;
; LOOP_FILTER_R_BITS            ; 9999                    ; Untyped                                ;
; LOOP_FILTER_C_BITS            ; 9999                    ; Untyped                                ;
; VCO_POST_SCALE                ; 0                       ; Untyped                                ;
; CLK2_OUTPUT_FREQUENCY         ; 0                       ; Untyped                                ;
; CLK1_OUTPUT_FREQUENCY         ; 0                       ; Untyped                                ;
; CLK0_OUTPUT_FREQUENCY         ; 0                       ; Untyped                                ;
; INTENDED_DEVICE_FAMILY        ; MAX 10                  ; Untyped                                ;
; PORT_CLKENA0                  ; PORT_UNUSED             ; Untyped                                ;
; PORT_CLKENA1                  ; PORT_UNUSED             ; Untyped                                ;
; PORT_CLKENA2                  ; PORT_UNUSED             ; Untyped                                ;
; PORT_CLKENA3                  ; PORT_UNUSED             ; Untyped                                ;
; PORT_CLKENA4                  ; PORT_UNUSED             ; Untyped                                ;
; PORT_CLKENA5                  ; PORT_UNUSED             ; Untyped                                ;
; PORT_EXTCLKENA0               ; PORT_CONNECTIVITY       ; Untyped                                ;
; PORT_EXTCLKENA1               ; PORT_CONNECTIVITY       ; Untyped                                ;
; PORT_EXTCLKENA2               ; PORT_CONNECTIVITY       ; Untyped                                ;
; PORT_EXTCLKENA3               ; PORT_CONNECTIVITY       ; Untyped                                ;
; PORT_EXTCLK0                  ; PORT_UNUSED             ; Untyped                                ;
; PORT_EXTCLK1                  ; PORT_UNUSED             ; Untyped                                ;
; PORT_EXTCLK2                  ; PORT_UNUSED             ; Untyped                                ;
; PORT_EXTCLK3                  ; PORT_UNUSED             ; Untyped                                ;
; PORT_CLKBAD0                  ; PORT_UNUSED             ; Untyped                                ;
; PORT_CLKBAD1                  ; PORT_UNUSED             ; Untyped                                ;
; PORT_CLK0                     ; PORT_USED               ; Untyped                                ;
; PORT_CLK1                     ; PORT_USED               ; Untyped                                ;
; PORT_CLK2                     ; PORT_USED               ; Untyped                                ;
; PORT_CLK3                     ; PORT_USED               ; Untyped                                ;
; PORT_CLK4                     ; PORT_UNUSED             ; Untyped                                ;
; PORT_CLK5                     ; PORT_UNUSED             ; Untyped                                ;
; PORT_CLK6                     ; PORT_UNUSED             ; Untyped                                ;
; PORT_CLK7                     ; PORT_UNUSED             ; Untyped                                ;
; PORT_CLK8                     ; PORT_UNUSED             ; Untyped                                ;
; PORT_CLK9                     ; PORT_UNUSED             ; Untyped                                ;
; PORT_SCANDATA                 ; PORT_UNUSED             ; Untyped                                ;
; PORT_SCANDATAOUT              ; PORT_UNUSED             ; Untyped                                ;
; PORT_SCANDONE                 ; PORT_UNUSED             ; Untyped                                ;
; PORT_SCLKOUT1                 ; PORT_CONNECTIVITY       ; Untyped                                ;
; PORT_SCLKOUT0                 ; PORT_CONNECTIVITY       ; Untyped                                ;
; PORT_ACTIVECLOCK              ; PORT_UNUSED             ; Untyped                                ;
; PORT_CLKLOSS                  ; PORT_UNUSED             ; Untyped                                ;
; PORT_INCLK1                   ; PORT_UNUSED             ; Untyped                                ;
; PORT_INCLK0                   ; PORT_USED               ; Untyped                                ;
; PORT_FBIN                     ; PORT_UNUSED             ; Untyped                                ;
; PORT_PLLENA                   ; PORT_UNUSED             ; Untyped                                ;
; PORT_CLKSWITCH                ; PORT_UNUSED             ; Untyped                                ;
; PORT_ARESET                   ; PORT_UNUSED             ; Untyped                                ;
; PORT_PFDENA                   ; PORT_UNUSED             ; Untyped                                ;
; PORT_SCANCLK                  ; PORT_UNUSED             ; Untyped                                ;
; PORT_SCANACLR                 ; PORT_UNUSED             ; Untyped                                ;
; PORT_SCANREAD                 ; PORT_UNUSED             ; Untyped                                ;
; PORT_SCANWRITE                ; PORT_UNUSED             ; Untyped                                ;
; PORT_ENABLE0                  ; PORT_CONNECTIVITY       ; Untyped                                ;
; PORT_ENABLE1                  ; PORT_CONNECTIVITY       ; Untyped                                ;
; PORT_LOCKED                   ; PORT_USED               ; Untyped                                ;
; PORT_CONFIGUPDATE             ; PORT_UNUSED             ; Untyped                                ;
; PORT_FBOUT                    ; PORT_CONNECTIVITY       ; Untyped                                ;
; PORT_PHASEDONE                ; PORT_UNUSED             ; Untyped                                ;
; PORT_PHASESTEP                ; PORT_UNUSED             ; Untyped                                ;
; PORT_PHASEUPDOWN              ; PORT_UNUSED             ; Untyped                                ;
; PORT_SCANCLKENA               ; PORT_UNUSED             ; Untyped                                ;
; PORT_PHASECOUNTERSELECT       ; PORT_UNUSED             ; Untyped                                ;
; PORT_VCOOVERRANGE             ; PORT_CONNECTIVITY       ; Untyped                                ;
; PORT_VCOUNDERRANGE            ; PORT_CONNECTIVITY       ; Untyped                                ;
; M_TEST_SOURCE                 ; 5                       ; Untyped                                ;
; C0_TEST_SOURCE                ; 5                       ; Untyped                                ;
; C1_TEST_SOURCE                ; 5                       ; Untyped                                ;
; C2_TEST_SOURCE                ; 5                       ; Untyped                                ;
; C3_TEST_SOURCE                ; 5                       ; Untyped                                ;
; C4_TEST_SOURCE                ; 5                       ; Untyped                                ;
; C5_TEST_SOURCE                ; 5                       ; Untyped                                ;
; C6_TEST_SOURCE                ; 5                       ; Untyped                                ;
; C7_TEST_SOURCE                ; 5                       ; Untyped                                ;
; C8_TEST_SOURCE                ; 5                       ; Untyped                                ;
; C9_TEST_SOURCE                ; 5                       ; Untyped                                ;
; CBXI_PARAMETER                ; pllv3_altpll            ; Untyped                                ;
; VCO_FREQUENCY_CONTROL         ; AUTO                    ; Untyped                                ;
; VCO_PHASE_SHIFT_STEP          ; 0                       ; Untyped                                ;
; WIDTH_CLOCK                   ; 5                       ; Signed Integer                         ;
; WIDTH_PHASECOUNTERSELECT      ; 4                       ; Untyped                                ;
; USING_FBMIMICBIDIR_PORT       ; OFF                     ; Untyped                                ;
; DEVICE_FAMILY                 ; MAX 10                  ; Untyped                                ;
; SCAN_CHAIN_MIF_FILE           ; UNUSED                  ; Untyped                                ;
; SIM_GATE_LOCK_DEVICE_BEHAVIOR ; OFF                     ; Untyped                                ;
; AUTO_CARRY_CHAINS             ; ON                      ; AUTO_CARRY                             ;
; IGNORE_CARRY_BUFFERS          ; OFF                     ; IGNORE_CARRY                           ;
; AUTO_CASCADE_CHAINS           ; ON                      ; AUTO_CASCADE                           ;
; IGNORE_CASCADE_BUFFERS        ; OFF                     ; IGNORE_CASCADE                         ;
+-------------------------------+-------------------------+----------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pll_reset_sync:pll_sync ;
+----------------+-------+---------------------------------------------+
; Parameter Name ; Value ; Type                                        ;
+----------------+-------+---------------------------------------------+
; reset_cycles   ; 64    ; Signed Integer                              ;
+----------------+-------+---------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: slave_timing_6502:bus_adapt ;
+----------------+-------+-------------------------------------------------+
; Parameter Name ; Value ; Type                                            ;
+----------------+-------+-------------------------------------------------+
; address_bits   ; 8     ; Signed Integer                                  ;
+----------------+-------+-------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:pokey1 ;
+----------------------+-------+----------------------------+
; Parameter Name       ; Value ; Type                       ;
+----------------------+-------+----------------------------+
; custom_keyboard_scan ; 1     ; Signed Integer             ;
+----------------------+-------+----------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:pokey1|complete_address_decoder:decode_addr1 ;
+----------------+-------+------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                   ;
+----------------+-------+------------------------------------------------------------------------+
; width          ; 4     ; Signed Integer                                                         ;
+----------------+-------+------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:pokey1|wide_delay_line:audf0_delay ;
+----------------+-------+--------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                         ;
+----------------+-------+--------------------------------------------------------------+
; count          ; 1     ; Signed Integer                                               ;
; width          ; 8     ; Signed Integer                                               ;
+----------------+-------+--------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:pokey1|wide_delay_line:audf1_delay ;
+----------------+-------+--------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                         ;
+----------------+-------+--------------------------------------------------------------+
; count          ; 1     ; Signed Integer                                               ;
; width          ; 8     ; Signed Integer                                               ;
+----------------+-------+--------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:pokey1|wide_delay_line:audf2_delay ;
+----------------+-------+--------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                         ;
+----------------+-------+--------------------------------------------------------------+
; count          ; 1     ; Signed Integer                                               ;
; width          ; 8     ; Signed Integer                                               ;
+----------------+-------+--------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:pokey1|wide_delay_line:audf3_delay ;
+----------------+-------+--------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                         ;
+----------------+-------+--------------------------------------------------------------+
; count          ; 1     ; Signed Integer                                               ;
; width          ; 8     ; Signed Integer                                               ;
+----------------+-------+--------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:pokey1|wide_delay_line:audctl_delay ;
+----------------+-------+---------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                          ;
+----------------+-------+---------------------------------------------------------------+
; count          ; 1     ; Signed Integer                                                ;
; width          ; 8     ; Signed Integer                                                ;
+----------------+-------+---------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:pokey1|pokey_countdown_timer:timer0 ;
+-----------------+-------+--------------------------------------------------------------+
; Parameter Name  ; Value ; Type                                                         ;
+-----------------+-------+--------------------------------------------------------------+
; underflow_delay ; 3     ; Signed Integer                                               ;
+-----------------+-------+--------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:pokey1|pokey_countdown_timer:timer0|delay_line:underflow0_delay ;
+----------------+-------+-------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------+
; count          ; 3     ; Signed Integer                                                                            ;
+----------------+-------+-------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:pokey1|pokey_countdown_timer:timer1 ;
+-----------------+-------+--------------------------------------------------------------+
; Parameter Name  ; Value ; Type                                                         ;
+-----------------+-------+--------------------------------------------------------------+
; underflow_delay ; 3     ; Signed Integer                                               ;
+-----------------+-------+--------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:pokey1|pokey_countdown_timer:timer1|delay_line:underflow0_delay ;
+----------------+-------+-------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------+
; count          ; 3     ; Signed Integer                                                                            ;
+----------------+-------+-------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:pokey1|pokey_countdown_timer:timer2 ;
+-----------------+-------+--------------------------------------------------------------+
; Parameter Name  ; Value ; Type                                                         ;
+-----------------+-------+--------------------------------------------------------------+
; underflow_delay ; 3     ; Signed Integer                                               ;
+-----------------+-------+--------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:pokey1|pokey_countdown_timer:timer2|delay_line:underflow0_delay ;
+----------------+-------+-------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------+
; count          ; 3     ; Signed Integer                                                                            ;
+----------------+-------+-------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:pokey1|pokey_countdown_timer:timer3 ;
+-----------------+-------+--------------------------------------------------------------+
; Parameter Name  ; Value ; Type                                                         ;
+-----------------+-------+--------------------------------------------------------------+
; underflow_delay ; 3     ; Signed Integer                                               ;
+-----------------+-------+--------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:pokey1|pokey_countdown_timer:timer3|delay_line:underflow0_delay ;
+----------------+-------+-------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------+
; count          ; 3     ; Signed Integer                                                                            ;
+----------------+-------+-------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:pokey1|latch_delay_line:twotone_del ;
+----------------+-------+---------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                          ;
+----------------+-------+---------------------------------------------------------------+
; count          ; 2     ; Signed Integer                                                ;
+----------------+-------+---------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:pokey1|latch_delay_line:stimer_delay ;
+----------------+-------+----------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                           ;
+----------------+-------+----------------------------------------------------------------+
; count          ; 3     ; Signed Integer                                                 ;
+----------------+-------+----------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:pokey1|syncreset_enable_divider:enable_64_div ;
+----------------+-------+-------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                    ;
+----------------+-------+-------------------------------------------------------------------------+
; count          ; 28    ; Signed Integer                                                          ;
; resetcount     ; 7     ; Signed Integer                                                          ;
+----------------+-------+-------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:pokey1|syncreset_enable_divider:enable_15_div ;
+----------------+-------+-------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                    ;
+----------------+-------+-------------------------------------------------------------------------+
; count          ; 114   ; Signed Integer                                                          ;
; resetcount     ; 34    ; Signed Integer                                                          ;
+----------------+-------+-------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:pokey1|delay_line:serout_clock_delay ;
+----------------+-------+----------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                           ;
+----------------+-------+----------------------------------------------------------------+
; count          ; 2     ; Signed Integer                                                 ;
+----------------+-------+----------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:pokey1|delay_line:serin_clock_delay ;
+----------------+-------+---------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                          ;
+----------------+-------+---------------------------------------------------------------+
; count          ; 5     ; Signed Integer                                                ;
+----------------+-------+---------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: dc_blocker:pokey1_dc_blocker ;
+----------------+-------+--------------------------------------------------+
; Parameter Name ; Value ; Type                                             ;
+----------------+-------+--------------------------------------------------+
; bits           ; 16    ; Signed Integer                                   ;
; extra_bits     ; 4     ; Signed Integer                                   ;
; k              ; 10    ; Signed Integer                                   ;
+----------------+-------+--------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:1:pokeyx ;
+----------------------+-------+----------------------------------------+
; Parameter Name       ; Value ; Type                                   ;
+----------------------+-------+----------------------------------------+
; custom_keyboard_scan ; 2     ; Signed Integer                         ;
+----------------------+-------+----------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:1:pokeyx|complete_address_decoder:decode_addr1 ;
+----------------+-------+------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                               ;
+----------------+-------+------------------------------------------------------------------------------------+
; width          ; 4     ; Signed Integer                                                                     ;
+----------------+-------+------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:1:pokeyx|wide_delay_line:audf0_delay ;
+----------------+-------+--------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                     ;
+----------------+-------+--------------------------------------------------------------------------+
; count          ; 1     ; Signed Integer                                                           ;
; width          ; 8     ; Signed Integer                                                           ;
+----------------+-------+--------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:1:pokeyx|wide_delay_line:audf1_delay ;
+----------------+-------+--------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                     ;
+----------------+-------+--------------------------------------------------------------------------+
; count          ; 1     ; Signed Integer                                                           ;
; width          ; 8     ; Signed Integer                                                           ;
+----------------+-------+--------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:1:pokeyx|wide_delay_line:audf2_delay ;
+----------------+-------+--------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                     ;
+----------------+-------+--------------------------------------------------------------------------+
; count          ; 1     ; Signed Integer                                                           ;
; width          ; 8     ; Signed Integer                                                           ;
+----------------+-------+--------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:1:pokeyx|wide_delay_line:audf3_delay ;
+----------------+-------+--------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                     ;
+----------------+-------+--------------------------------------------------------------------------+
; count          ; 1     ; Signed Integer                                                           ;
; width          ; 8     ; Signed Integer                                                           ;
+----------------+-------+--------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:1:pokeyx|wide_delay_line:audctl_delay ;
+----------------+-------+---------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                      ;
+----------------+-------+---------------------------------------------------------------------------+
; count          ; 1     ; Signed Integer                                                            ;
; width          ; 8     ; Signed Integer                                                            ;
+----------------+-------+---------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:1:pokeyx|pokey_countdown_timer:timer0 ;
+-----------------+-------+--------------------------------------------------------------------------+
; Parameter Name  ; Value ; Type                                                                     ;
+-----------------+-------+--------------------------------------------------------------------------+
; underflow_delay ; 3     ; Signed Integer                                                           ;
+-----------------+-------+--------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:1:pokeyx|pokey_countdown_timer:timer0|delay_line:underflow0_delay ;
+----------------+-------+-------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                  ;
+----------------+-------+-------------------------------------------------------------------------------------------------------+
; count          ; 3     ; Signed Integer                                                                                        ;
+----------------+-------+-------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:1:pokeyx|pokey_countdown_timer:timer1 ;
+-----------------+-------+--------------------------------------------------------------------------+
; Parameter Name  ; Value ; Type                                                                     ;
+-----------------+-------+--------------------------------------------------------------------------+
; underflow_delay ; 3     ; Signed Integer                                                           ;
+-----------------+-------+--------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:1:pokeyx|pokey_countdown_timer:timer1|delay_line:underflow0_delay ;
+----------------+-------+-------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                  ;
+----------------+-------+-------------------------------------------------------------------------------------------------------+
; count          ; 3     ; Signed Integer                                                                                        ;
+----------------+-------+-------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:1:pokeyx|pokey_countdown_timer:timer2 ;
+-----------------+-------+--------------------------------------------------------------------------+
; Parameter Name  ; Value ; Type                                                                     ;
+-----------------+-------+--------------------------------------------------------------------------+
; underflow_delay ; 3     ; Signed Integer                                                           ;
+-----------------+-------+--------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:1:pokeyx|pokey_countdown_timer:timer2|delay_line:underflow0_delay ;
+----------------+-------+-------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                  ;
+----------------+-------+-------------------------------------------------------------------------------------------------------+
; count          ; 3     ; Signed Integer                                                                                        ;
+----------------+-------+-------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:1:pokeyx|pokey_countdown_timer:timer3 ;
+-----------------+-------+--------------------------------------------------------------------------+
; Parameter Name  ; Value ; Type                                                                     ;
+-----------------+-------+--------------------------------------------------------------------------+
; underflow_delay ; 3     ; Signed Integer                                                           ;
+-----------------+-------+--------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:1:pokeyx|pokey_countdown_timer:timer3|delay_line:underflow0_delay ;
+----------------+-------+-------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                  ;
+----------------+-------+-------------------------------------------------------------------------------------------------------+
; count          ; 3     ; Signed Integer                                                                                        ;
+----------------+-------+-------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:1:pokeyx|latch_delay_line:twotone_del ;
+----------------+-------+---------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                      ;
+----------------+-------+---------------------------------------------------------------------------+
; count          ; 2     ; Signed Integer                                                            ;
+----------------+-------+---------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:1:pokeyx|latch_delay_line:stimer_delay ;
+----------------+-------+----------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                       ;
+----------------+-------+----------------------------------------------------------------------------+
; count          ; 3     ; Signed Integer                                                             ;
+----------------+-------+----------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:1:pokeyx|syncreset_enable_divider:enable_64_div ;
+----------------+-------+-------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------+
; count          ; 28    ; Signed Integer                                                                      ;
; resetcount     ; 7     ; Signed Integer                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:1:pokeyx|syncreset_enable_divider:enable_15_div ;
+----------------+-------+-------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------+
; count          ; 114   ; Signed Integer                                                                      ;
; resetcount     ; 34    ; Signed Integer                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:1:pokeyx|delay_line:serout_clock_delay ;
+----------------+-------+----------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                       ;
+----------------+-------+----------------------------------------------------------------------------+
; count          ; 2     ; Signed Integer                                                             ;
+----------------+-------+----------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:1:pokeyx|delay_line:serin_clock_delay ;
+----------------+-------+---------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                      ;
+----------------+-------+---------------------------------------------------------------------------+
; count          ; 5     ; Signed Integer                                                            ;
+----------------+-------+---------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: dc_blocker:\POKEY_ON:1:pokey_dc_blockerx ;
+----------------+-------+--------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                         ;
+----------------+-------+--------------------------------------------------------------+
; bits           ; 16    ; Signed Integer                                               ;
; extra_bits     ; 4     ; Signed Integer                                               ;
; k              ; 10    ; Signed Integer                                               ;
+----------------+-------+--------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:2:pokeyx ;
+----------------------+-------+----------------------------------------+
; Parameter Name       ; Value ; Type                                   ;
+----------------------+-------+----------------------------------------+
; custom_keyboard_scan ; 2     ; Signed Integer                         ;
+----------------------+-------+----------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:2:pokeyx|complete_address_decoder:decode_addr1 ;
+----------------+-------+------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                               ;
+----------------+-------+------------------------------------------------------------------------------------+
; width          ; 4     ; Signed Integer                                                                     ;
+----------------+-------+------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:2:pokeyx|wide_delay_line:audf0_delay ;
+----------------+-------+--------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                     ;
+----------------+-------+--------------------------------------------------------------------------+
; count          ; 1     ; Signed Integer                                                           ;
; width          ; 8     ; Signed Integer                                                           ;
+----------------+-------+--------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:2:pokeyx|wide_delay_line:audf1_delay ;
+----------------+-------+--------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                     ;
+----------------+-------+--------------------------------------------------------------------------+
; count          ; 1     ; Signed Integer                                                           ;
; width          ; 8     ; Signed Integer                                                           ;
+----------------+-------+--------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:2:pokeyx|wide_delay_line:audf2_delay ;
+----------------+-------+--------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                     ;
+----------------+-------+--------------------------------------------------------------------------+
; count          ; 1     ; Signed Integer                                                           ;
; width          ; 8     ; Signed Integer                                                           ;
+----------------+-------+--------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:2:pokeyx|wide_delay_line:audf3_delay ;
+----------------+-------+--------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                     ;
+----------------+-------+--------------------------------------------------------------------------+
; count          ; 1     ; Signed Integer                                                           ;
; width          ; 8     ; Signed Integer                                                           ;
+----------------+-------+--------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:2:pokeyx|wide_delay_line:audctl_delay ;
+----------------+-------+---------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                      ;
+----------------+-------+---------------------------------------------------------------------------+
; count          ; 1     ; Signed Integer                                                            ;
; width          ; 8     ; Signed Integer                                                            ;
+----------------+-------+---------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:2:pokeyx|pokey_countdown_timer:timer0 ;
+-----------------+-------+--------------------------------------------------------------------------+
; Parameter Name  ; Value ; Type                                                                     ;
+-----------------+-------+--------------------------------------------------------------------------+
; underflow_delay ; 3     ; Signed Integer                                                           ;
+-----------------+-------+--------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:2:pokeyx|pokey_countdown_timer:timer0|delay_line:underflow0_delay ;
+----------------+-------+-------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                  ;
+----------------+-------+-------------------------------------------------------------------------------------------------------+
; count          ; 3     ; Signed Integer                                                                                        ;
+----------------+-------+-------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:2:pokeyx|pokey_countdown_timer:timer1 ;
+-----------------+-------+--------------------------------------------------------------------------+
; Parameter Name  ; Value ; Type                                                                     ;
+-----------------+-------+--------------------------------------------------------------------------+
; underflow_delay ; 3     ; Signed Integer                                                           ;
+-----------------+-------+--------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:2:pokeyx|pokey_countdown_timer:timer1|delay_line:underflow0_delay ;
+----------------+-------+-------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                  ;
+----------------+-------+-------------------------------------------------------------------------------------------------------+
; count          ; 3     ; Signed Integer                                                                                        ;
+----------------+-------+-------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:2:pokeyx|pokey_countdown_timer:timer2 ;
+-----------------+-------+--------------------------------------------------------------------------+
; Parameter Name  ; Value ; Type                                                                     ;
+-----------------+-------+--------------------------------------------------------------------------+
; underflow_delay ; 3     ; Signed Integer                                                           ;
+-----------------+-------+--------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:2:pokeyx|pokey_countdown_timer:timer2|delay_line:underflow0_delay ;
+----------------+-------+-------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                  ;
+----------------+-------+-------------------------------------------------------------------------------------------------------+
; count          ; 3     ; Signed Integer                                                                                        ;
+----------------+-------+-------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:2:pokeyx|pokey_countdown_timer:timer3 ;
+-----------------+-------+--------------------------------------------------------------------------+
; Parameter Name  ; Value ; Type                                                                     ;
+-----------------+-------+--------------------------------------------------------------------------+
; underflow_delay ; 3     ; Signed Integer                                                           ;
+-----------------+-------+--------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:2:pokeyx|pokey_countdown_timer:timer3|delay_line:underflow0_delay ;
+----------------+-------+-------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                  ;
+----------------+-------+-------------------------------------------------------------------------------------------------------+
; count          ; 3     ; Signed Integer                                                                                        ;
+----------------+-------+-------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:2:pokeyx|latch_delay_line:twotone_del ;
+----------------+-------+---------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                      ;
+----------------+-------+---------------------------------------------------------------------------+
; count          ; 2     ; Signed Integer                                                            ;
+----------------+-------+---------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:2:pokeyx|latch_delay_line:stimer_delay ;
+----------------+-------+----------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                       ;
+----------------+-------+----------------------------------------------------------------------------+
; count          ; 3     ; Signed Integer                                                             ;
+----------------+-------+----------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:2:pokeyx|syncreset_enable_divider:enable_64_div ;
+----------------+-------+-------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------+
; count          ; 28    ; Signed Integer                                                                      ;
; resetcount     ; 7     ; Signed Integer                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:2:pokeyx|syncreset_enable_divider:enable_15_div ;
+----------------+-------+-------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------+
; count          ; 114   ; Signed Integer                                                                      ;
; resetcount     ; 34    ; Signed Integer                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:2:pokeyx|delay_line:serout_clock_delay ;
+----------------+-------+----------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                       ;
+----------------+-------+----------------------------------------------------------------------------+
; count          ; 2     ; Signed Integer                                                             ;
+----------------+-------+----------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:2:pokeyx|delay_line:serin_clock_delay ;
+----------------+-------+---------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                      ;
+----------------+-------+---------------------------------------------------------------------------+
; count          ; 5     ; Signed Integer                                                            ;
+----------------+-------+---------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: dc_blocker:\POKEY_ON:2:pokey_dc_blockerx ;
+----------------+-------+--------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                         ;
+----------------+-------+--------------------------------------------------------------+
; bits           ; 16    ; Signed Integer                                               ;
; extra_bits     ; 4     ; Signed Integer                                               ;
; k              ; 10    ; Signed Integer                                               ;
+----------------+-------+--------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:3:pokeyx ;
+----------------------+-------+----------------------------------------+
; Parameter Name       ; Value ; Type                                   ;
+----------------------+-------+----------------------------------------+
; custom_keyboard_scan ; 2     ; Signed Integer                         ;
+----------------------+-------+----------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:3:pokeyx|complete_address_decoder:decode_addr1 ;
+----------------+-------+------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                               ;
+----------------+-------+------------------------------------------------------------------------------------+
; width          ; 4     ; Signed Integer                                                                     ;
+----------------+-------+------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:3:pokeyx|wide_delay_line:audf0_delay ;
+----------------+-------+--------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                     ;
+----------------+-------+--------------------------------------------------------------------------+
; count          ; 1     ; Signed Integer                                                           ;
; width          ; 8     ; Signed Integer                                                           ;
+----------------+-------+--------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:3:pokeyx|wide_delay_line:audf1_delay ;
+----------------+-------+--------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                     ;
+----------------+-------+--------------------------------------------------------------------------+
; count          ; 1     ; Signed Integer                                                           ;
; width          ; 8     ; Signed Integer                                                           ;
+----------------+-------+--------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:3:pokeyx|wide_delay_line:audf2_delay ;
+----------------+-------+--------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                     ;
+----------------+-------+--------------------------------------------------------------------------+
; count          ; 1     ; Signed Integer                                                           ;
; width          ; 8     ; Signed Integer                                                           ;
+----------------+-------+--------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:3:pokeyx|wide_delay_line:audf3_delay ;
+----------------+-------+--------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                     ;
+----------------+-------+--------------------------------------------------------------------------+
; count          ; 1     ; Signed Integer                                                           ;
; width          ; 8     ; Signed Integer                                                           ;
+----------------+-------+--------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:3:pokeyx|wide_delay_line:audctl_delay ;
+----------------+-------+---------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                      ;
+----------------+-------+---------------------------------------------------------------------------+
; count          ; 1     ; Signed Integer                                                            ;
; width          ; 8     ; Signed Integer                                                            ;
+----------------+-------+---------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:3:pokeyx|pokey_countdown_timer:timer0 ;
+-----------------+-------+--------------------------------------------------------------------------+
; Parameter Name  ; Value ; Type                                                                     ;
+-----------------+-------+--------------------------------------------------------------------------+
; underflow_delay ; 3     ; Signed Integer                                                           ;
+-----------------+-------+--------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:3:pokeyx|pokey_countdown_timer:timer0|delay_line:underflow0_delay ;
+----------------+-------+-------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                  ;
+----------------+-------+-------------------------------------------------------------------------------------------------------+
; count          ; 3     ; Signed Integer                                                                                        ;
+----------------+-------+-------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:3:pokeyx|pokey_countdown_timer:timer1 ;
+-----------------+-------+--------------------------------------------------------------------------+
; Parameter Name  ; Value ; Type                                                                     ;
+-----------------+-------+--------------------------------------------------------------------------+
; underflow_delay ; 3     ; Signed Integer                                                           ;
+-----------------+-------+--------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:3:pokeyx|pokey_countdown_timer:timer1|delay_line:underflow0_delay ;
+----------------+-------+-------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                  ;
+----------------+-------+-------------------------------------------------------------------------------------------------------+
; count          ; 3     ; Signed Integer                                                                                        ;
+----------------+-------+-------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:3:pokeyx|pokey_countdown_timer:timer2 ;
+-----------------+-------+--------------------------------------------------------------------------+
; Parameter Name  ; Value ; Type                                                                     ;
+-----------------+-------+--------------------------------------------------------------------------+
; underflow_delay ; 3     ; Signed Integer                                                           ;
+-----------------+-------+--------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:3:pokeyx|pokey_countdown_timer:timer2|delay_line:underflow0_delay ;
+----------------+-------+-------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                  ;
+----------------+-------+-------------------------------------------------------------------------------------------------------+
; count          ; 3     ; Signed Integer                                                                                        ;
+----------------+-------+-------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:3:pokeyx|pokey_countdown_timer:timer3 ;
+-----------------+-------+--------------------------------------------------------------------------+
; Parameter Name  ; Value ; Type                                                                     ;
+-----------------+-------+--------------------------------------------------------------------------+
; underflow_delay ; 3     ; Signed Integer                                                           ;
+-----------------+-------+--------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:3:pokeyx|pokey_countdown_timer:timer3|delay_line:underflow0_delay ;
+----------------+-------+-------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                  ;
+----------------+-------+-------------------------------------------------------------------------------------------------------+
; count          ; 3     ; Signed Integer                                                                                        ;
+----------------+-------+-------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:3:pokeyx|latch_delay_line:twotone_del ;
+----------------+-------+---------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                      ;
+----------------+-------+---------------------------------------------------------------------------+
; count          ; 2     ; Signed Integer                                                            ;
+----------------+-------+---------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:3:pokeyx|latch_delay_line:stimer_delay ;
+----------------+-------+----------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                       ;
+----------------+-------+----------------------------------------------------------------------------+
; count          ; 3     ; Signed Integer                                                             ;
+----------------+-------+----------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:3:pokeyx|syncreset_enable_divider:enable_64_div ;
+----------------+-------+-------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------+
; count          ; 28    ; Signed Integer                                                                      ;
; resetcount     ; 7     ; Signed Integer                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:3:pokeyx|syncreset_enable_divider:enable_15_div ;
+----------------+-------+-------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------+
; count          ; 114   ; Signed Integer                                                                      ;
; resetcount     ; 34    ; Signed Integer                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:3:pokeyx|delay_line:serout_clock_delay ;
+----------------+-------+----------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                       ;
+----------------+-------+----------------------------------------------------------------------------+
; count          ; 2     ; Signed Integer                                                             ;
+----------------+-------+----------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pokey:\POKEY_ON:3:pokeyx|delay_line:serin_clock_delay ;
+----------------+-------+---------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                      ;
+----------------+-------+---------------------------------------------------------------------------+
; count          ; 5     ; Signed Integer                                                            ;
+----------------+-------+---------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: dc_blocker:\POKEY_ON:3:pokey_dc_blockerx ;
+----------------+-------+--------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                         ;
+----------------+-------+--------------------------------------------------------------+
; bits           ; 16    ; Signed Integer                                               ;
; extra_bits     ; 4     ; Signed Integer                                               ;
; k              ; 10    ; Signed Integer                                               ;
+----------------+-------+--------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: SID_top:\sid_on:sid1 ;
+----------------+-------------------+------------------------------+
; Parameter Name ; Value             ; Type                         ;
+----------------+-------------------+------------------------------+
; wave_base      ; 10011100000000000 ; Unsigned Binary              ;
+----------------+-------------------+------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: SID_top:\sid_on:sid1|complete_address_decoder:decode_addr1 ;
+----------------+-------+--------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                           ;
+----------------+-------+--------------------------------------------------------------------------------+
; width          ; 5     ; Signed Integer                                                                 ;
+----------------+-------+--------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: SID_top:\sid_on:sid2 ;
+----------------+-------------------+------------------------------+
; Parameter Name ; Value             ; Type                         ;
+----------------+-------------------+------------------------------+
; wave_base      ; 10011100000000000 ; Unsigned Binary              ;
+----------------+-------------------+------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: SID_top:\sid_on:sid2|complete_address_decoder:decode_addr1 ;
+----------------+-------+--------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                           ;
+----------------+-------+--------------------------------------------------------------------------------+
; width          ; 5     ; Signed Integer                                                                 ;
+----------------+-------+--------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: PSG_top:\psg_on:PSG_1|complete_address_decoder:decode_addr1 ;
+----------------+-------+---------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                            ;
+----------------+-------+---------------------------------------------------------------------------------+
; width          ; 4     ; Signed Integer                                                                  ;
+----------------+-------+---------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: PSG_top:\psg_on:PSG_1|PSG_freqdiv:core_ticker ;
+----------------+-------+-------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                              ;
+----------------+-------+-------------------------------------------------------------------+
; bits           ; 4     ; Signed Integer                                                    ;
+----------------+-------+-------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: PSG_top:\psg_on:PSG_1|PSG_freqdiv:channel_a_ticker ;
+----------------+-------+------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                   ;
+----------------+-------+------------------------------------------------------------------------+
; bits           ; 12    ; Signed Integer                                                         ;
+----------------+-------+------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: PSG_top:\psg_on:PSG_1|PSG_freqdiv:channel_b_ticker ;
+----------------+-------+------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                   ;
+----------------+-------+------------------------------------------------------------------------+
; bits           ; 12    ; Signed Integer                                                         ;
+----------------+-------+------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: PSG_top:\psg_on:PSG_1|PSG_freqdiv:channel_c_ticker ;
+----------------+-------+------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                   ;
+----------------+-------+------------------------------------------------------------------------+
; bits           ; 12    ; Signed Integer                                                         ;
+----------------+-------+------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: PSG_top:\psg_on:PSG_1|PSG_freqdiv:noise_preticker ;
+----------------+-------+-----------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                  ;
+----------------+-------+-----------------------------------------------------------------------+
; bits           ; 2     ; Signed Integer                                                        ;
+----------------+-------+-----------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: PSG_top:\psg_on:PSG_1|PSG_freqdiv:noise_ticker ;
+----------------+-------+--------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                               ;
+----------------+-------+--------------------------------------------------------------------+
; bits           ; 5     ; Signed Integer                                                     ;
+----------------+-------+--------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: PSG_top:\psg_on:PSG_1|PSG_envelope:envelope|PSG_freqdiv:envelope_ticker ;
+----------------+-------+---------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                        ;
+----------------+-------+---------------------------------------------------------------------------------------------+
; bits           ; 16    ; Signed Integer                                                                              ;
+----------------+-------+---------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: PSG_top:\psg_on:PSG_2|complete_address_decoder:decode_addr1 ;
+----------------+-------+---------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                            ;
+----------------+-------+---------------------------------------------------------------------------------+
; width          ; 4     ; Signed Integer                                                                  ;
+----------------+-------+---------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: PSG_top:\psg_on:PSG_2|PSG_freqdiv:core_ticker ;
+----------------+-------+-------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                              ;
+----------------+-------+-------------------------------------------------------------------+
; bits           ; 4     ; Signed Integer                                                    ;
+----------------+-------+-------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: PSG_top:\psg_on:PSG_2|PSG_freqdiv:channel_a_ticker ;
+----------------+-------+------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                   ;
+----------------+-------+------------------------------------------------------------------------+
; bits           ; 12    ; Signed Integer                                                         ;
+----------------+-------+------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: PSG_top:\psg_on:PSG_2|PSG_freqdiv:channel_b_ticker ;
+----------------+-------+------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                   ;
+----------------+-------+------------------------------------------------------------------------+
; bits           ; 12    ; Signed Integer                                                         ;
+----------------+-------+------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: PSG_top:\psg_on:PSG_2|PSG_freqdiv:channel_c_ticker ;
+----------------+-------+------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                   ;
+----------------+-------+------------------------------------------------------------------------+
; bits           ; 12    ; Signed Integer                                                         ;
+----------------+-------+------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: PSG_top:\psg_on:PSG_2|PSG_freqdiv:noise_preticker ;
+----------------+-------+-----------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                  ;
+----------------+-------+-----------------------------------------------------------------------+
; bits           ; 2     ; Signed Integer                                                        ;
+----------------+-------+-----------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: PSG_top:\psg_on:PSG_2|PSG_freqdiv:noise_ticker ;
+----------------+-------+--------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                               ;
+----------------+-------+--------------------------------------------------------------------+
; bits           ; 5     ; Signed Integer                                                     ;
+----------------+-------+--------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: PSG_top:\psg_on:PSG_2|PSG_envelope:envelope|PSG_freqdiv:envelope_ticker ;
+----------------+-------+---------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                        ;
+----------------+-------+---------------------------------------------------------------------------------------------+
; bits           ; 16    ; Signed Integer                                                                              ;
+----------------+-------+---------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: dc_blocker:\psg_on:psg1_dc_blocker ;
+----------------+-------+--------------------------------------------------------+
; Parameter Name ; Value ; Type                                                   ;
+----------------+-------+--------------------------------------------------------+
; bits           ; 16    ; Signed Integer                                         ;
; extra_bits     ; 4     ; Signed Integer                                         ;
; k              ; 10    ; Signed Integer                                         ;
+----------------+-------+--------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: dc_blocker:\psg_on:psg2_dc_blocker ;
+----------------+-------+--------------------------------------------------------+
; Parameter Name ; Value ; Type                                                   ;
+----------------+-------+--------------------------------------------------------+
; bits           ; 16    ; Signed Integer                                         ;
; extra_bits     ; 4     ; Signed Integer                                         ;
; k              ; 10    ; Signed Integer                                         ;
+----------------+-------+--------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: sample_top:\sample_on:sample1 ;
+----------------+-------+---------------------------------------------------+
; Parameter Name ; Value ; Type                                              ;
+----------------+-------+---------------------------------------------------+
; enable_record  ; 0     ; Signed Integer                                    ;
+----------------+-------+---------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: sample_top:\sample_on:sample1|complete_address_decoder:decode_addr2 ;
+----------------+-------+-----------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                    ;
+----------------+-------+-----------------------------------------------------------------------------------------+
; width          ; 5     ; Signed Integer                                                                          ;
+----------------+-------+-----------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst ;
+------------------+-------+-----------------------------------------------------------------------+
; Parameter Name   ; Value ; Type                                                                  ;
+------------------+-------+-----------------------------------------------------------------------+
; num_groups       ; 7     ; Signed Integer                                                        ;
; extra_ram_blocks ; 1     ; Signed Integer                                                        ;
+------------------+-------+-----------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:0:sample_ram_inst ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                  ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------+
; address_width  ; 10    ; Signed Integer                                                                                                        ;
; space          ; 1024  ; Signed Integer                                                                                                        ;
; data_width     ; 9     ; Signed Integer                                                                                                        ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:1:sample_ram_inst ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                  ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------+
; address_width  ; 10    ; Signed Integer                                                                                                        ;
; space          ; 1024  ; Signed Integer                                                                                                        ;
; data_width     ; 9     ; Signed Integer                                                                                                        ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:2:sample_ram_inst ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                  ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------+
; address_width  ; 10    ; Signed Integer                                                                                                        ;
; space          ; 1024  ; Signed Integer                                                                                                        ;
; data_width     ; 9     ; Signed Integer                                                                                                        ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:3:sample_ram_inst ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                  ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------+
; address_width  ; 10    ; Signed Integer                                                                                                        ;
; space          ; 1024  ; Signed Integer                                                                                                        ;
; data_width     ; 9     ; Signed Integer                                                                                                        ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:4:sample_ram_inst ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                  ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------+
; address_width  ; 10    ; Signed Integer                                                                                                        ;
; space          ; 1024  ; Signed Integer                                                                                                        ;
; data_width     ; 9     ; Signed Integer                                                                                                        ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:5:sample_ram_inst ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                  ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------+
; address_width  ; 10    ; Signed Integer                                                                                                        ;
; space          ; 1024  ; Signed Integer                                                                                                        ;
; data_width     ; 9     ; Signed Integer                                                                                                        ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:6:sample_ram_inst ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                  ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------+
; address_width  ; 10    ; Signed Integer                                                                                                        ;
; space          ; 1024  ; Signed Integer                                                                                                        ;
; data_width     ; 9     ; Signed Integer                                                                                                        ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:7:sample_ram_inst ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                  ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------+
; address_width  ; 10    ; Signed Integer                                                                                                        ;
; space          ; 1024  ; Signed Integer                                                                                                        ;
; data_width     ; 9     ; Signed Integer                                                                                                        ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:8:sample_ram_inst ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                  ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------+
; address_width  ; 10    ; Signed Integer                                                                                                        ;
; space          ; 1024  ; Signed Integer                                                                                                        ;
; data_width     ; 9     ; Signed Integer                                                                                                        ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:9:sample_ram_inst ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                  ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------+
; address_width  ; 10    ; Signed Integer                                                                                                        ;
; space          ; 1024  ; Signed Integer                                                                                                        ;
; data_width     ; 9     ; Signed Integer                                                                                                        ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:10:sample_ram_inst ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                   ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; address_width  ; 10    ; Signed Integer                                                                                                         ;
; space          ; 1024  ; Signed Integer                                                                                                         ;
; data_width     ; 9     ; Signed Integer                                                                                                         ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:11:sample_ram_inst ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                   ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; address_width  ; 10    ; Signed Integer                                                                                                         ;
; space          ; 1024  ; Signed Integer                                                                                                         ;
; data_width     ; 9     ; Signed Integer                                                                                                         ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:12:sample_ram_inst ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                   ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; address_width  ; 10    ; Signed Integer                                                                                                         ;
; space          ; 1024  ; Signed Integer                                                                                                         ;
; data_width     ; 9     ; Signed Integer                                                                                                         ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:13:sample_ram_inst ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                   ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; address_width  ; 10    ; Signed Integer                                                                                                         ;
; space          ; 1024  ; Signed Integer                                                                                                         ;
; data_width     ; 9     ; Signed Integer                                                                                                         ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:14:sample_ram_inst ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                   ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; address_width  ; 10    ; Signed Integer                                                                                                         ;
; space          ; 1024  ; Signed Integer                                                                                                         ;
; data_width     ; 9     ; Signed Integer                                                                                                         ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:15:sample_ram_inst ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                   ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; address_width  ; 10    ; Signed Integer                                                                                                         ;
; space          ; 1024  ; Signed Integer                                                                                                         ;
; data_width     ; 9     ; Signed Integer                                                                                                         ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:16:sample_ram_inst ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                   ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; address_width  ; 10    ; Signed Integer                                                                                                         ;
; space          ; 1024  ; Signed Integer                                                                                                         ;
; data_width     ; 9     ; Signed Integer                                                                                                         ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:17:sample_ram_inst ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                   ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; address_width  ; 10    ; Signed Integer                                                                                                         ;
; space          ; 1024  ; Signed Integer                                                                                                         ;
; data_width     ; 9     ; Signed Integer                                                                                                         ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:18:sample_ram_inst ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                   ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; address_width  ; 10    ; Signed Integer                                                                                                         ;
; space          ; 1024  ; Signed Integer                                                                                                         ;
; data_width     ; 9     ; Signed Integer                                                                                                         ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:19:sample_ram_inst ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                   ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; address_width  ; 10    ; Signed Integer                                                                                                         ;
; space          ; 1024  ; Signed Integer                                                                                                         ;
; data_width     ; 9     ; Signed Integer                                                                                                         ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:20:sample_ram_inst ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                   ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; address_width  ; 10    ; Signed Integer                                                                                                         ;
; space          ; 1024  ; Signed Integer                                                                                                         ;
; data_width     ; 9     ; Signed Integer                                                                                                         ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:21:sample_ram_inst ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                   ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; address_width  ; 10    ; Signed Integer                                                                                                         ;
; space          ; 1024  ; Signed Integer                                                                                                         ;
; data_width     ; 9     ; Signed Integer                                                                                                         ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:22:sample_ram_inst ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                   ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; address_width  ; 10    ; Signed Integer                                                                                                         ;
; space          ; 1024  ; Signed Integer                                                                                                         ;
; data_width     ; 9     ; Signed Integer                                                                                                         ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:23:sample_ram_inst ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                   ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; address_width  ; 10    ; Signed Integer                                                                                                         ;
; space          ; 1024  ; Signed Integer                                                                                                         ;
; data_width     ; 9     ; Signed Integer                                                                                                         ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:24:sample_ram_inst ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                   ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; address_width  ; 10    ; Signed Integer                                                                                                         ;
; space          ; 1024  ; Signed Integer                                                                                                         ;
; data_width     ; 9     ; Signed Integer                                                                                                         ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:25:sample_ram_inst ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                   ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; address_width  ; 10    ; Signed Integer                                                                                                         ;
; space          ; 1024  ; Signed Integer                                                                                                         ;
; data_width     ; 9     ; Signed Integer                                                                                                         ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:26:sample_ram_inst ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                   ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; address_width  ; 10    ; Signed Integer                                                                                                         ;
; space          ; 1024  ; Signed Integer                                                                                                         ;
; data_width     ; 9     ; Signed Integer                                                                                                         ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:27:sample_ram_inst ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                   ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; address_width  ; 10    ; Signed Integer                                                                                                         ;
; space          ; 1024  ; Signed Integer                                                                                                         ;
; data_width     ; 9     ; Signed Integer                                                                                                         ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:28:sample_ram_inst ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                   ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; address_width  ; 10    ; Signed Integer                                                                                                         ;
; space          ; 1024  ; Signed Integer                                                                                                         ;
; data_width     ; 9     ; Signed Integer                                                                                                         ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:29:sample_ram_inst ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                   ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; address_width  ; 10    ; Signed Integer                                                                                                         ;
; space          ; 1024  ; Signed Integer                                                                                                         ;
; data_width     ; 9     ; Signed Integer                                                                                                         ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:30:sample_ram_inst ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                   ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; address_width  ; 10    ; Signed Integer                                                                                                         ;
; space          ; 1024  ; Signed Integer                                                                                                         ;
; data_width     ; 9     ; Signed Integer                                                                                                         ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:31:sample_ram_inst ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                   ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; address_width  ; 10    ; Signed Integer                                                                                                         ;
; space          ; 1024  ; Signed Integer                                                                                                         ;
; data_width     ; 9     ; Signed Integer                                                                                                         ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:32:sample_ram_inst ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                   ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; address_width  ; 10    ; Signed Integer                                                                                                         ;
; space          ; 1024  ; Signed Integer                                                                                                         ;
; data_width     ; 9     ; Signed Integer                                                                                                         ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:33:sample_ram_inst ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                   ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; address_width  ; 10    ; Signed Integer                                                                                                         ;
; space          ; 1024  ; Signed Integer                                                                                                         ;
; data_width     ; 9     ; Signed Integer                                                                                                         ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:34:sample_ram_inst ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                   ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; address_width  ; 10    ; Signed Integer                                                                                                         ;
; space          ; 1024  ; Signed Integer                                                                                                         ;
; data_width     ; 9     ; Signed Integer                                                                                                         ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:35:sample_ram_inst ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                   ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; address_width  ; 10    ; Signed Integer                                                                                                         ;
; space          ; 1024  ; Signed Integer                                                                                                         ;
; data_width     ; 9     ; Signed Integer                                                                                                         ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:36:sample_ram_inst ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                   ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; address_width  ; 10    ; Signed Integer                                                                                                         ;
; space          ; 1024  ; Signed Integer                                                                                                         ;
; data_width     ; 9     ; Signed Integer                                                                                                         ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:37:sample_ram_inst ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                   ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; address_width  ; 10    ; Signed Integer                                                                                                         ;
; space          ; 1024  ; Signed Integer                                                                                                         ;
; data_width     ; 9     ; Signed Integer                                                                                                         ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:38:sample_ram_inst ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                   ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; address_width  ; 10    ; Signed Integer                                                                                                         ;
; space          ; 1024  ; Signed Integer                                                                                                         ;
; data_width     ; 9     ; Signed Integer                                                                                                         ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:39:sample_ram_inst ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                   ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; address_width  ; 10    ; Signed Integer                                                                                                         ;
; space          ; 1024  ; Signed Integer                                                                                                         ;
; data_width     ; 9     ; Signed Integer                                                                                                         ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:40:sample_ram_inst ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                   ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; address_width  ; 10    ; Signed Integer                                                                                                         ;
; space          ; 1024  ; Signed Integer                                                                                                         ;
; data_width     ; 9     ; Signed Integer                                                                                                         ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:41:sample_ram_inst ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                   ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; address_width  ; 10    ; Signed Integer                                                                                                         ;
; space          ; 1024  ; Signed Integer                                                                                                         ;
; data_width     ; 9     ; Signed Integer                                                                                                         ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:42:sample_ram_inst ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                   ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; address_width  ; 10    ; Signed Integer                                                                                                         ;
; space          ; 1024  ; Signed Integer                                                                                                         ;
; data_width     ; 9     ; Signed Integer                                                                                                         ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:43:sample_ram_inst ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                   ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; address_width  ; 10    ; Signed Integer                                                                                                         ;
; space          ; 1024  ; Signed Integer                                                                                                         ;
; data_width     ; 9     ; Signed Integer                                                                                                         ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:44:sample_ram_inst ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                   ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; address_width  ; 10    ; Signed Integer                                                                                                         ;
; space          ; 1024  ; Signed Integer                                                                                                         ;
; data_width     ; 9     ; Signed Integer                                                                                                         ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:45:sample_ram_inst ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                   ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; address_width  ; 10    ; Signed Integer                                                                                                         ;
; space          ; 1024  ; Signed Integer                                                                                                         ;
; data_width     ; 9     ; Signed Integer                                                                                                         ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:46:sample_ram_inst ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                   ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; address_width  ; 10    ; Signed Integer                                                                                                         ;
; space          ; 1024  ; Signed Integer                                                                                                         ;
; data_width     ; 9     ; Signed Integer                                                                                                         ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:47:sample_ram_inst ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                   ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; address_width  ; 10    ; Signed Integer                                                                                                         ;
; space          ; 1024  ; Signed Integer                                                                                                         ;
; data_width     ; 9     ; Signed Integer                                                                                                         ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:48:sample_ram_inst ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                   ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; address_width  ; 10    ; Signed Integer                                                                                                         ;
; space          ; 1024  ; Signed Integer                                                                                                         ;
; data_width     ; 9     ; Signed Integer                                                                                                         ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:49:sample_ram_inst ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                   ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; address_width  ; 10    ; Signed Integer                                                                                                         ;
; space          ; 1024  ; Signed Integer                                                                                                         ;
; data_width     ; 9     ; Signed Integer                                                                                                         ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:50:sample_ram_inst ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                   ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; address_width  ; 10    ; Signed Integer                                                                                                         ;
; space          ; 1024  ; Signed Integer                                                                                                         ;
; data_width     ; 9     ; Signed Integer                                                                                                         ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:51:sample_ram_inst ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                   ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; address_width  ; 10    ; Signed Integer                                                                                                         ;
; space          ; 1024  ; Signed Integer                                                                                                         ;
; data_width     ; 9     ; Signed Integer                                                                                                         ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:52:sample_ram_inst ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                   ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; address_width  ; 10    ; Signed Integer                                                                                                         ;
; space          ; 1024  ; Signed Integer                                                                                                         ;
; data_width     ; 9     ; Signed Integer                                                                                                         ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:53:sample_ram_inst ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                   ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; address_width  ; 10    ; Signed Integer                                                                                                         ;
; space          ; 1024  ; Signed Integer                                                                                                         ;
; data_width     ; 9     ; Signed Integer                                                                                                         ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:54:sample_ram_inst ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                   ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; address_width  ; 10    ; Signed Integer                                                                                                         ;
; space          ; 1024  ; Signed Integer                                                                                                         ;
; data_width     ; 9     ; Signed Integer                                                                                                         ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:55:sample_ram_inst ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                   ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; address_width  ; 10    ; Signed Integer                                                                                                         ;
; space          ; 1024  ; Signed Integer                                                                                                         ;
; data_width     ; 9     ; Signed Integer                                                                                                         ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:56:sample_ram_inst ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                   ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; address_width  ; 10    ; Signed Integer                                                                                                         ;
; space          ; 1024  ; Signed Integer                                                                                                         ;
; data_width     ; 9     ; Signed Integer                                                                                                         ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: complete_address_decoder:\gen_config:decode_addr1 ;
+----------------+-------+-----------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                  ;
+----------------+-------+-----------------------------------------------------------------------+
; width          ; 4     ; Signed Integer                                                        ;
+----------------+-------+-----------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: sigmadelta_dither:dac_dithergen ;
+----------------+------------------+------------------------------------------+
; Parameter Name ; Value            ; Type                                     ;
+----------------+------------------+------------------------------------------+
; lfsr_seed      ; 1010110011100001 ; Unsigned Binary                          ;
+----------------+------------------+------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: filtered_sigmadelta:dac_0 ;
+----------------+-------+-----------------------------------------------+
; Parameter Name ; Value ; Type                                          ;
+----------------+-------+-----------------------------------------------+
; implementation ; 2     ; Signed Integer                                ;
; lowpass        ; 0     ; Signed Integer                                ;
+----------------+-------+-----------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: filtered_sigmadelta:\audout2_on:dac_1 ;
+----------------+-------+-----------------------------------------------------------+
; Parameter Name ; Value ; Type                                                      ;
+----------------+-------+-----------------------------------------------------------+
; implementation ; 2     ; Signed Integer                                            ;
; lowpass        ; 0     ; Signed Integer                                            ;
+----------------+-------+-----------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: filtered_sigmadelta:dac_2 ;
+----------------+-------+-----------------------------------------------+
; Parameter Name ; Value ; Type                                          ;
+----------------+-------+-----------------------------------------------+
; implementation ; 2     ; Signed Integer                                ;
; lowpass        ; 0     ; Signed Integer                                ;
+----------------+-------+-----------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: filtered_sigmadelta:dac_3 ;
+----------------+-------+-----------------------------------------------+
; Parameter Name ; Value ; Type                                          ;
+----------------+-------+-----------------------------------------------+
; implementation ; 2     ; Signed Integer                                ;
; lowpass        ; 0     ; Signed Integer                                ;
+----------------+-------+-----------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: i2c_master:\iox_on:i2c_master0 ;
+----------------+----------+-------------------------------------------------+
; Parameter Name ; Value    ; Type                                            ;
+----------------+----------+-------------------------------------------------+
; input_clk      ; 58000000 ; Signed Integer                                  ;
; bus_clk        ; 2800000  ; Signed Integer                                  ;
+----------------+----------+-------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: ps2_to_atari800:\ps2_on:keyboard_map1 ;
+----------------+-------+-----------------------------------------------------------+
; Parameter Name ; Value ; Type                                                      ;
+----------------+-------+-----------------------------------------------------------+
; ps2_enable     ; 1     ; Signed Integer                                            ;
; direct_enable  ; 0     ; Signed Integer                                            ;
+----------------+-------+-----------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: ps2_to_atari800:\ps2_on:keyboard_map1|ps2_keyboard:\gen_ps2_on:keyboard1|enable_divider:enable_div ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                   ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; count          ; 256   ; Signed Integer                                                                                                         ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:2:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
+------------------------------------+----------------------+-------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                              ;
+------------------------------------+----------------------+-------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                           ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                        ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                      ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                      ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                    ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                           ;
; OPERATION_MODE                     ; SINGLE_PORT          ; Untyped                                                                                                           ;
; WIDTH_A                            ; 9                    ; Untyped                                                                                                           ;
; WIDTHAD_A                          ; 10                   ; Untyped                                                                                                           ;
; NUMWORDS_A                         ; 1024                 ; Untyped                                                                                                           ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                           ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                           ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                           ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                           ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                           ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                           ;
; WIDTH_B                            ; 1                    ; Untyped                                                                                                           ;
; WIDTHAD_B                          ; 1                    ; Untyped                                                                                                           ;
; NUMWORDS_B                         ; 1                    ; Untyped                                                                                                           ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                           ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                           ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                                           ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                                                           ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                           ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                           ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                           ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                           ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                           ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                           ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                           ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                           ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                           ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                           ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                           ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                           ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                                                                           ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                           ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                           ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                                           ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                           ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                                           ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                           ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                           ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                           ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                           ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                           ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                           ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                           ;
; ECC_PIPELINE_STAGE_ENABLED         ; FALSE                ; Untyped                                                                                                           ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                                                                           ;
; DEVICE_FAMILY                      ; MAX 10               ; Untyped                                                                                                           ;
; CBXI_PARAMETER                     ; altsyncram_9r31      ; Untyped                                                                                                           ;
+------------------------------------+----------------------+-------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:10:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                               ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                            ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                         ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                       ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                       ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                     ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                            ;
; OPERATION_MODE                     ; SINGLE_PORT          ; Untyped                                                                                                            ;
; WIDTH_A                            ; 9                    ; Untyped                                                                                                            ;
; WIDTHAD_A                          ; 10                   ; Untyped                                                                                                            ;
; NUMWORDS_A                         ; 1024                 ; Untyped                                                                                                            ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                            ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_B                            ; 1                    ; Untyped                                                                                                            ;
; WIDTHAD_B                          ; 1                    ; Untyped                                                                                                            ;
; NUMWORDS_B                         ; 1                    ; Untyped                                                                                                            ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                            ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                            ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                                            ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                            ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                            ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                                            ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                            ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                            ;
; ECC_PIPELINE_STAGE_ENABLED         ; FALSE                ; Untyped                                                                                                            ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                                                                            ;
; DEVICE_FAMILY                      ; MAX 10               ; Untyped                                                                                                            ;
; CBXI_PARAMETER                     ; altsyncram_9r31      ; Untyped                                                                                                            ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:18:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                               ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                            ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                         ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                       ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                       ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                     ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                            ;
; OPERATION_MODE                     ; SINGLE_PORT          ; Untyped                                                                                                            ;
; WIDTH_A                            ; 9                    ; Untyped                                                                                                            ;
; WIDTHAD_A                          ; 10                   ; Untyped                                                                                                            ;
; NUMWORDS_A                         ; 1024                 ; Untyped                                                                                                            ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                            ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_B                            ; 1                    ; Untyped                                                                                                            ;
; WIDTHAD_B                          ; 1                    ; Untyped                                                                                                            ;
; NUMWORDS_B                         ; 1                    ; Untyped                                                                                                            ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                            ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                            ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                                            ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                            ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                            ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                                            ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                            ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                            ;
; ECC_PIPELINE_STAGE_ENABLED         ; FALSE                ; Untyped                                                                                                            ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                                                                            ;
; DEVICE_FAMILY                      ; MAX 10               ; Untyped                                                                                                            ;
; CBXI_PARAMETER                     ; altsyncram_9r31      ; Untyped                                                                                                            ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:26:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                               ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                            ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                         ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                       ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                       ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                     ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                            ;
; OPERATION_MODE                     ; SINGLE_PORT          ; Untyped                                                                                                            ;
; WIDTH_A                            ; 9                    ; Untyped                                                                                                            ;
; WIDTHAD_A                          ; 10                   ; Untyped                                                                                                            ;
; NUMWORDS_A                         ; 1024                 ; Untyped                                                                                                            ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                            ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_B                            ; 1                    ; Untyped                                                                                                            ;
; WIDTHAD_B                          ; 1                    ; Untyped                                                                                                            ;
; NUMWORDS_B                         ; 1                    ; Untyped                                                                                                            ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                            ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                            ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                                            ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                            ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                            ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                                            ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                            ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                            ;
; ECC_PIPELINE_STAGE_ENABLED         ; FALSE                ; Untyped                                                                                                            ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                                                                            ;
; DEVICE_FAMILY                      ; MAX 10               ; Untyped                                                                                                            ;
; CBXI_PARAMETER                     ; altsyncram_9r31      ; Untyped                                                                                                            ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:34:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                               ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                            ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                         ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                       ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                       ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                     ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                            ;
; OPERATION_MODE                     ; SINGLE_PORT          ; Untyped                                                                                                            ;
; WIDTH_A                            ; 9                    ; Untyped                                                                                                            ;
; WIDTHAD_A                          ; 10                   ; Untyped                                                                                                            ;
; NUMWORDS_A                         ; 1024                 ; Untyped                                                                                                            ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                            ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_B                            ; 1                    ; Untyped                                                                                                            ;
; WIDTHAD_B                          ; 1                    ; Untyped                                                                                                            ;
; NUMWORDS_B                         ; 1                    ; Untyped                                                                                                            ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                            ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                            ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                                            ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                            ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                            ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                                            ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                            ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                            ;
; ECC_PIPELINE_STAGE_ENABLED         ; FALSE                ; Untyped                                                                                                            ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                                                                            ;
; DEVICE_FAMILY                      ; MAX 10               ; Untyped                                                                                                            ;
; CBXI_PARAMETER                     ; altsyncram_9r31      ; Untyped                                                                                                            ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:42:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                               ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                            ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                         ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                       ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                       ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                     ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                            ;
; OPERATION_MODE                     ; SINGLE_PORT          ; Untyped                                                                                                            ;
; WIDTH_A                            ; 9                    ; Untyped                                                                                                            ;
; WIDTHAD_A                          ; 10                   ; Untyped                                                                                                            ;
; NUMWORDS_A                         ; 1024                 ; Untyped                                                                                                            ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                            ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_B                            ; 1                    ; Untyped                                                                                                            ;
; WIDTHAD_B                          ; 1                    ; Untyped                                                                                                            ;
; NUMWORDS_B                         ; 1                    ; Untyped                                                                                                            ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                            ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                            ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                                            ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                            ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                            ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                                            ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                            ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                            ;
; ECC_PIPELINE_STAGE_ENABLED         ; FALSE                ; Untyped                                                                                                            ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                                                                            ;
; DEVICE_FAMILY                      ; MAX 10               ; Untyped                                                                                                            ;
; CBXI_PARAMETER                     ; altsyncram_9r31      ; Untyped                                                                                                            ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:50:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                               ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                            ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                         ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                       ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                       ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                     ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                            ;
; OPERATION_MODE                     ; SINGLE_PORT          ; Untyped                                                                                                            ;
; WIDTH_A                            ; 9                    ; Untyped                                                                                                            ;
; WIDTHAD_A                          ; 10                   ; Untyped                                                                                                            ;
; NUMWORDS_A                         ; 1024                 ; Untyped                                                                                                            ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                            ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_B                            ; 1                    ; Untyped                                                                                                            ;
; WIDTHAD_B                          ; 1                    ; Untyped                                                                                                            ;
; NUMWORDS_B                         ; 1                    ; Untyped                                                                                                            ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                            ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                            ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                                            ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                            ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                            ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                                            ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                            ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                            ;
; ECC_PIPELINE_STAGE_ENABLED         ; FALSE                ; Untyped                                                                                                            ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                                                                            ;
; DEVICE_FAMILY                      ; MAX 10               ; Untyped                                                                                                            ;
; CBXI_PARAMETER                     ; altsyncram_9r31      ; Untyped                                                                                                            ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:56:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                               ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                            ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                         ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                       ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                       ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                     ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                            ;
; OPERATION_MODE                     ; SINGLE_PORT          ; Untyped                                                                                                            ;
; WIDTH_A                            ; 9                    ; Untyped                                                                                                            ;
; WIDTHAD_A                          ; 10                   ; Untyped                                                                                                            ;
; NUMWORDS_A                         ; 1024                 ; Untyped                                                                                                            ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                            ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_B                            ; 1                    ; Untyped                                                                                                            ;
; WIDTHAD_B                          ; 1                    ; Untyped                                                                                                            ;
; NUMWORDS_B                         ; 1                    ; Untyped                                                                                                            ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                            ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                            ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                                            ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                            ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                            ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                                            ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                            ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                            ;
; ECC_PIPELINE_STAGE_ENABLED         ; FALSE                ; Untyped                                                                                                            ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                                                                            ;
; DEVICE_FAMILY                      ; MAX 10               ; Untyped                                                                                                            ;
; CBXI_PARAMETER                     ; altsyncram_9r31      ; Untyped                                                                                                            ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:0:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
+------------------------------------+----------------------+-------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                              ;
+------------------------------------+----------------------+-------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                           ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                        ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                      ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                      ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                    ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                           ;
; OPERATION_MODE                     ; SINGLE_PORT          ; Untyped                                                                                                           ;
; WIDTH_A                            ; 9                    ; Untyped                                                                                                           ;
; WIDTHAD_A                          ; 10                   ; Untyped                                                                                                           ;
; NUMWORDS_A                         ; 1024                 ; Untyped                                                                                                           ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                           ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                           ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                           ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                           ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                           ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                           ;
; WIDTH_B                            ; 1                    ; Untyped                                                                                                           ;
; WIDTHAD_B                          ; 1                    ; Untyped                                                                                                           ;
; NUMWORDS_B                         ; 1                    ; Untyped                                                                                                           ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                           ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                           ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                                           ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                                                           ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                           ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                           ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                           ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                           ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                           ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                           ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                           ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                           ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                           ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                           ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                           ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                           ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                                                                           ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                           ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                           ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                                           ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                           ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                                           ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                           ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                           ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                           ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                           ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                           ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                           ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                           ;
; ECC_PIPELINE_STAGE_ENABLED         ; FALSE                ; Untyped                                                                                                           ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                                                                           ;
; DEVICE_FAMILY                      ; MAX 10               ; Untyped                                                                                                           ;
; CBXI_PARAMETER                     ; altsyncram_9r31      ; Untyped                                                                                                           ;
+------------------------------------+----------------------+-------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:1:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
+------------------------------------+----------------------+-------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                              ;
+------------------------------------+----------------------+-------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                           ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                        ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                      ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                      ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                    ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                           ;
; OPERATION_MODE                     ; SINGLE_PORT          ; Untyped                                                                                                           ;
; WIDTH_A                            ; 9                    ; Untyped                                                                                                           ;
; WIDTHAD_A                          ; 10                   ; Untyped                                                                                                           ;
; NUMWORDS_A                         ; 1024                 ; Untyped                                                                                                           ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                           ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                           ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                           ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                           ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                           ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                           ;
; WIDTH_B                            ; 1                    ; Untyped                                                                                                           ;
; WIDTHAD_B                          ; 1                    ; Untyped                                                                                                           ;
; NUMWORDS_B                         ; 1                    ; Untyped                                                                                                           ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                           ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                           ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                                           ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                                                           ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                           ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                           ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                           ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                           ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                           ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                           ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                           ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                           ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                           ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                           ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                           ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                           ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                                                                           ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                           ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                           ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                                           ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                           ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                                           ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                           ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                           ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                           ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                           ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                           ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                           ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                           ;
; ECC_PIPELINE_STAGE_ENABLED         ; FALSE                ; Untyped                                                                                                           ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                                                                           ;
; DEVICE_FAMILY                      ; MAX 10               ; Untyped                                                                                                           ;
; CBXI_PARAMETER                     ; altsyncram_9r31      ; Untyped                                                                                                           ;
+------------------------------------+----------------------+-------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:3:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
+------------------------------------+----------------------+-------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                              ;
+------------------------------------+----------------------+-------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                           ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                        ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                      ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                      ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                    ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                           ;
; OPERATION_MODE                     ; SINGLE_PORT          ; Untyped                                                                                                           ;
; WIDTH_A                            ; 9                    ; Untyped                                                                                                           ;
; WIDTHAD_A                          ; 10                   ; Untyped                                                                                                           ;
; NUMWORDS_A                         ; 1024                 ; Untyped                                                                                                           ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                           ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                           ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                           ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                           ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                           ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                           ;
; WIDTH_B                            ; 1                    ; Untyped                                                                                                           ;
; WIDTHAD_B                          ; 1                    ; Untyped                                                                                                           ;
; NUMWORDS_B                         ; 1                    ; Untyped                                                                                                           ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                           ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                           ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                                           ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                                                           ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                           ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                           ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                           ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                           ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                           ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                           ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                           ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                           ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                           ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                           ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                           ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                           ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                                                                           ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                           ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                           ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                                           ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                           ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                                           ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                           ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                           ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                           ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                           ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                           ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                           ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                           ;
; ECC_PIPELINE_STAGE_ENABLED         ; FALSE                ; Untyped                                                                                                           ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                                                                           ;
; DEVICE_FAMILY                      ; MAX 10               ; Untyped                                                                                                           ;
; CBXI_PARAMETER                     ; altsyncram_9r31      ; Untyped                                                                                                           ;
+------------------------------------+----------------------+-------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:4:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
+------------------------------------+----------------------+-------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                              ;
+------------------------------------+----------------------+-------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                           ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                        ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                      ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                      ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                    ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                           ;
; OPERATION_MODE                     ; SINGLE_PORT          ; Untyped                                                                                                           ;
; WIDTH_A                            ; 9                    ; Untyped                                                                                                           ;
; WIDTHAD_A                          ; 10                   ; Untyped                                                                                                           ;
; NUMWORDS_A                         ; 1024                 ; Untyped                                                                                                           ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                           ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                           ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                           ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                           ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                           ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                           ;
; WIDTH_B                            ; 1                    ; Untyped                                                                                                           ;
; WIDTHAD_B                          ; 1                    ; Untyped                                                                                                           ;
; NUMWORDS_B                         ; 1                    ; Untyped                                                                                                           ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                           ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                           ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                                           ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                                                           ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                           ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                           ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                           ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                           ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                           ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                           ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                           ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                           ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                           ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                           ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                           ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                           ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                                                                           ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                           ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                           ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                                           ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                           ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                                           ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                           ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                           ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                           ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                           ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                           ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                           ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                           ;
; ECC_PIPELINE_STAGE_ENABLED         ; FALSE                ; Untyped                                                                                                           ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                                                                           ;
; DEVICE_FAMILY                      ; MAX 10               ; Untyped                                                                                                           ;
; CBXI_PARAMETER                     ; altsyncram_9r31      ; Untyped                                                                                                           ;
+------------------------------------+----------------------+-------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:5:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
+------------------------------------+----------------------+-------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                              ;
+------------------------------------+----------------------+-------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                           ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                        ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                      ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                      ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                    ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                           ;
; OPERATION_MODE                     ; SINGLE_PORT          ; Untyped                                                                                                           ;
; WIDTH_A                            ; 9                    ; Untyped                                                                                                           ;
; WIDTHAD_A                          ; 10                   ; Untyped                                                                                                           ;
; NUMWORDS_A                         ; 1024                 ; Untyped                                                                                                           ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                           ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                           ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                           ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                           ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                           ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                           ;
; WIDTH_B                            ; 1                    ; Untyped                                                                                                           ;
; WIDTHAD_B                          ; 1                    ; Untyped                                                                                                           ;
; NUMWORDS_B                         ; 1                    ; Untyped                                                                                                           ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                           ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                           ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                                           ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                                                           ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                           ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                           ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                           ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                           ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                           ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                           ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                           ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                           ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                           ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                           ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                           ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                           ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                                                                           ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                           ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                           ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                                           ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                           ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                                           ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                           ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                           ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                           ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                           ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                           ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                           ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                           ;
; ECC_PIPELINE_STAGE_ENABLED         ; FALSE                ; Untyped                                                                                                           ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                                                                           ;
; DEVICE_FAMILY                      ; MAX 10               ; Untyped                                                                                                           ;
; CBXI_PARAMETER                     ; altsyncram_9r31      ; Untyped                                                                                                           ;
+------------------------------------+----------------------+-------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:6:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
+------------------------------------+----------------------+-------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                              ;
+------------------------------------+----------------------+-------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                           ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                        ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                      ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                      ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                    ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                           ;
; OPERATION_MODE                     ; SINGLE_PORT          ; Untyped                                                                                                           ;
; WIDTH_A                            ; 9                    ; Untyped                                                                                                           ;
; WIDTHAD_A                          ; 10                   ; Untyped                                                                                                           ;
; NUMWORDS_A                         ; 1024                 ; Untyped                                                                                                           ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                           ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                           ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                           ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                           ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                           ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                           ;
; WIDTH_B                            ; 1                    ; Untyped                                                                                                           ;
; WIDTHAD_B                          ; 1                    ; Untyped                                                                                                           ;
; NUMWORDS_B                         ; 1                    ; Untyped                                                                                                           ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                           ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                           ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                                           ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                                                           ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                           ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                           ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                           ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                           ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                           ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                           ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                           ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                           ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                           ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                           ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                           ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                           ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                                                                           ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                           ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                           ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                                           ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                           ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                                           ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                           ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                           ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                           ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                           ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                           ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                           ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                           ;
; ECC_PIPELINE_STAGE_ENABLED         ; FALSE                ; Untyped                                                                                                           ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                                                                           ;
; DEVICE_FAMILY                      ; MAX 10               ; Untyped                                                                                                           ;
; CBXI_PARAMETER                     ; altsyncram_9r31      ; Untyped                                                                                                           ;
+------------------------------------+----------------------+-------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:7:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
+------------------------------------+----------------------+-------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                              ;
+------------------------------------+----------------------+-------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                           ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                        ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                      ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                      ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                    ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                           ;
; OPERATION_MODE                     ; SINGLE_PORT          ; Untyped                                                                                                           ;
; WIDTH_A                            ; 9                    ; Untyped                                                                                                           ;
; WIDTHAD_A                          ; 10                   ; Untyped                                                                                                           ;
; NUMWORDS_A                         ; 1024                 ; Untyped                                                                                                           ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                           ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                           ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                           ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                           ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                           ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                           ;
; WIDTH_B                            ; 1                    ; Untyped                                                                                                           ;
; WIDTHAD_B                          ; 1                    ; Untyped                                                                                                           ;
; NUMWORDS_B                         ; 1                    ; Untyped                                                                                                           ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                           ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                           ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                                           ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                                                           ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                           ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                           ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                           ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                           ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                           ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                           ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                           ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                           ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                           ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                           ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                           ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                           ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                                                                           ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                           ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                           ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                                           ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                           ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                                           ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                           ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                           ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                           ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                           ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                           ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                           ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                           ;
; ECC_PIPELINE_STAGE_ENABLED         ; FALSE                ; Untyped                                                                                                           ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                                                                           ;
; DEVICE_FAMILY                      ; MAX 10               ; Untyped                                                                                                           ;
; CBXI_PARAMETER                     ; altsyncram_9r31      ; Untyped                                                                                                           ;
+------------------------------------+----------------------+-------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:8:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
+------------------------------------+----------------------+-------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                              ;
+------------------------------------+----------------------+-------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                           ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                        ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                      ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                      ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                    ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                           ;
; OPERATION_MODE                     ; SINGLE_PORT          ; Untyped                                                                                                           ;
; WIDTH_A                            ; 9                    ; Untyped                                                                                                           ;
; WIDTHAD_A                          ; 10                   ; Untyped                                                                                                           ;
; NUMWORDS_A                         ; 1024                 ; Untyped                                                                                                           ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                           ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                           ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                           ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                           ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                           ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                           ;
; WIDTH_B                            ; 1                    ; Untyped                                                                                                           ;
; WIDTHAD_B                          ; 1                    ; Untyped                                                                                                           ;
; NUMWORDS_B                         ; 1                    ; Untyped                                                                                                           ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                           ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                           ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                                           ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                                                           ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                           ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                           ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                           ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                           ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                           ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                           ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                           ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                           ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                           ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                           ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                           ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                           ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                                                                           ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                           ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                           ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                                           ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                           ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                                           ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                           ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                           ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                           ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                           ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                           ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                           ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                           ;
; ECC_PIPELINE_STAGE_ENABLED         ; FALSE                ; Untyped                                                                                                           ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                                                                           ;
; DEVICE_FAMILY                      ; MAX 10               ; Untyped                                                                                                           ;
; CBXI_PARAMETER                     ; altsyncram_9r31      ; Untyped                                                                                                           ;
+------------------------------------+----------------------+-------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:9:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
+------------------------------------+----------------------+-------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                              ;
+------------------------------------+----------------------+-------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                           ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                        ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                      ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                      ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                    ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                           ;
; OPERATION_MODE                     ; SINGLE_PORT          ; Untyped                                                                                                           ;
; WIDTH_A                            ; 9                    ; Untyped                                                                                                           ;
; WIDTHAD_A                          ; 10                   ; Untyped                                                                                                           ;
; NUMWORDS_A                         ; 1024                 ; Untyped                                                                                                           ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                           ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                           ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                           ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                           ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                           ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                           ;
; WIDTH_B                            ; 1                    ; Untyped                                                                                                           ;
; WIDTHAD_B                          ; 1                    ; Untyped                                                                                                           ;
; NUMWORDS_B                         ; 1                    ; Untyped                                                                                                           ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                           ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                           ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                                           ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                                                           ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                           ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                           ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                           ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                           ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                           ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                           ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                           ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                           ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                           ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                           ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                           ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                           ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                                                                           ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                           ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                           ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                                           ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                           ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                                           ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                           ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                           ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                           ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                           ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                           ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                           ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                           ;
; ECC_PIPELINE_STAGE_ENABLED         ; FALSE                ; Untyped                                                                                                           ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                                                                           ;
; DEVICE_FAMILY                      ; MAX 10               ; Untyped                                                                                                           ;
; CBXI_PARAMETER                     ; altsyncram_9r31      ; Untyped                                                                                                           ;
+------------------------------------+----------------------+-------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:11:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                               ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                            ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                         ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                       ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                       ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                     ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                            ;
; OPERATION_MODE                     ; SINGLE_PORT          ; Untyped                                                                                                            ;
; WIDTH_A                            ; 9                    ; Untyped                                                                                                            ;
; WIDTHAD_A                          ; 10                   ; Untyped                                                                                                            ;
; NUMWORDS_A                         ; 1024                 ; Untyped                                                                                                            ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                            ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_B                            ; 1                    ; Untyped                                                                                                            ;
; WIDTHAD_B                          ; 1                    ; Untyped                                                                                                            ;
; NUMWORDS_B                         ; 1                    ; Untyped                                                                                                            ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                            ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                            ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                                            ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                            ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                            ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                                            ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                            ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                            ;
; ECC_PIPELINE_STAGE_ENABLED         ; FALSE                ; Untyped                                                                                                            ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                                                                            ;
; DEVICE_FAMILY                      ; MAX 10               ; Untyped                                                                                                            ;
; CBXI_PARAMETER                     ; altsyncram_9r31      ; Untyped                                                                                                            ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:12:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                               ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                            ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                         ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                       ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                       ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                     ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                            ;
; OPERATION_MODE                     ; SINGLE_PORT          ; Untyped                                                                                                            ;
; WIDTH_A                            ; 9                    ; Untyped                                                                                                            ;
; WIDTHAD_A                          ; 10                   ; Untyped                                                                                                            ;
; NUMWORDS_A                         ; 1024                 ; Untyped                                                                                                            ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                            ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_B                            ; 1                    ; Untyped                                                                                                            ;
; WIDTHAD_B                          ; 1                    ; Untyped                                                                                                            ;
; NUMWORDS_B                         ; 1                    ; Untyped                                                                                                            ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                            ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                            ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                                            ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                            ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                            ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                                            ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                            ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                            ;
; ECC_PIPELINE_STAGE_ENABLED         ; FALSE                ; Untyped                                                                                                            ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                                                                            ;
; DEVICE_FAMILY                      ; MAX 10               ; Untyped                                                                                                            ;
; CBXI_PARAMETER                     ; altsyncram_9r31      ; Untyped                                                                                                            ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:13:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                               ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                            ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                         ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                       ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                       ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                     ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                            ;
; OPERATION_MODE                     ; SINGLE_PORT          ; Untyped                                                                                                            ;
; WIDTH_A                            ; 9                    ; Untyped                                                                                                            ;
; WIDTHAD_A                          ; 10                   ; Untyped                                                                                                            ;
; NUMWORDS_A                         ; 1024                 ; Untyped                                                                                                            ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                            ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_B                            ; 1                    ; Untyped                                                                                                            ;
; WIDTHAD_B                          ; 1                    ; Untyped                                                                                                            ;
; NUMWORDS_B                         ; 1                    ; Untyped                                                                                                            ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                            ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                            ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                                            ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                            ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                            ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                                            ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                            ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                            ;
; ECC_PIPELINE_STAGE_ENABLED         ; FALSE                ; Untyped                                                                                                            ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                                                                            ;
; DEVICE_FAMILY                      ; MAX 10               ; Untyped                                                                                                            ;
; CBXI_PARAMETER                     ; altsyncram_9r31      ; Untyped                                                                                                            ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:14:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                               ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                            ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                         ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                       ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                       ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                     ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                            ;
; OPERATION_MODE                     ; SINGLE_PORT          ; Untyped                                                                                                            ;
; WIDTH_A                            ; 9                    ; Untyped                                                                                                            ;
; WIDTHAD_A                          ; 10                   ; Untyped                                                                                                            ;
; NUMWORDS_A                         ; 1024                 ; Untyped                                                                                                            ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                            ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_B                            ; 1                    ; Untyped                                                                                                            ;
; WIDTHAD_B                          ; 1                    ; Untyped                                                                                                            ;
; NUMWORDS_B                         ; 1                    ; Untyped                                                                                                            ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                            ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                            ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                                            ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                            ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                            ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                                            ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                            ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                            ;
; ECC_PIPELINE_STAGE_ENABLED         ; FALSE                ; Untyped                                                                                                            ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                                                                            ;
; DEVICE_FAMILY                      ; MAX 10               ; Untyped                                                                                                            ;
; CBXI_PARAMETER                     ; altsyncram_9r31      ; Untyped                                                                                                            ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:15:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                               ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                            ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                         ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                       ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                       ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                     ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                            ;
; OPERATION_MODE                     ; SINGLE_PORT          ; Untyped                                                                                                            ;
; WIDTH_A                            ; 9                    ; Untyped                                                                                                            ;
; WIDTHAD_A                          ; 10                   ; Untyped                                                                                                            ;
; NUMWORDS_A                         ; 1024                 ; Untyped                                                                                                            ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                            ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_B                            ; 1                    ; Untyped                                                                                                            ;
; WIDTHAD_B                          ; 1                    ; Untyped                                                                                                            ;
; NUMWORDS_B                         ; 1                    ; Untyped                                                                                                            ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                            ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                            ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                                            ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                            ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                            ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                                            ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                            ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                            ;
; ECC_PIPELINE_STAGE_ENABLED         ; FALSE                ; Untyped                                                                                                            ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                                                                            ;
; DEVICE_FAMILY                      ; MAX 10               ; Untyped                                                                                                            ;
; CBXI_PARAMETER                     ; altsyncram_9r31      ; Untyped                                                                                                            ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:16:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                               ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                            ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                         ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                       ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                       ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                     ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                            ;
; OPERATION_MODE                     ; SINGLE_PORT          ; Untyped                                                                                                            ;
; WIDTH_A                            ; 9                    ; Untyped                                                                                                            ;
; WIDTHAD_A                          ; 10                   ; Untyped                                                                                                            ;
; NUMWORDS_A                         ; 1024                 ; Untyped                                                                                                            ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                            ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_B                            ; 1                    ; Untyped                                                                                                            ;
; WIDTHAD_B                          ; 1                    ; Untyped                                                                                                            ;
; NUMWORDS_B                         ; 1                    ; Untyped                                                                                                            ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                            ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                            ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                                            ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                            ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                            ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                                            ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                            ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                            ;
; ECC_PIPELINE_STAGE_ENABLED         ; FALSE                ; Untyped                                                                                                            ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                                                                            ;
; DEVICE_FAMILY                      ; MAX 10               ; Untyped                                                                                                            ;
; CBXI_PARAMETER                     ; altsyncram_9r31      ; Untyped                                                                                                            ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:17:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                               ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                            ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                         ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                       ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                       ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                     ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                            ;
; OPERATION_MODE                     ; SINGLE_PORT          ; Untyped                                                                                                            ;
; WIDTH_A                            ; 9                    ; Untyped                                                                                                            ;
; WIDTHAD_A                          ; 10                   ; Untyped                                                                                                            ;
; NUMWORDS_A                         ; 1024                 ; Untyped                                                                                                            ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                            ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_B                            ; 1                    ; Untyped                                                                                                            ;
; WIDTHAD_B                          ; 1                    ; Untyped                                                                                                            ;
; NUMWORDS_B                         ; 1                    ; Untyped                                                                                                            ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                            ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                            ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                                            ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                            ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                            ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                                            ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                            ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                            ;
; ECC_PIPELINE_STAGE_ENABLED         ; FALSE                ; Untyped                                                                                                            ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                                                                            ;
; DEVICE_FAMILY                      ; MAX 10               ; Untyped                                                                                                            ;
; CBXI_PARAMETER                     ; altsyncram_9r31      ; Untyped                                                                                                            ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:19:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                               ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                            ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                         ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                       ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                       ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                     ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                            ;
; OPERATION_MODE                     ; SINGLE_PORT          ; Untyped                                                                                                            ;
; WIDTH_A                            ; 9                    ; Untyped                                                                                                            ;
; WIDTHAD_A                          ; 10                   ; Untyped                                                                                                            ;
; NUMWORDS_A                         ; 1024                 ; Untyped                                                                                                            ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                            ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_B                            ; 1                    ; Untyped                                                                                                            ;
; WIDTHAD_B                          ; 1                    ; Untyped                                                                                                            ;
; NUMWORDS_B                         ; 1                    ; Untyped                                                                                                            ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                            ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                            ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                                            ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                            ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                            ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                                            ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                            ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                            ;
; ECC_PIPELINE_STAGE_ENABLED         ; FALSE                ; Untyped                                                                                                            ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                                                                            ;
; DEVICE_FAMILY                      ; MAX 10               ; Untyped                                                                                                            ;
; CBXI_PARAMETER                     ; altsyncram_9r31      ; Untyped                                                                                                            ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:20:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                               ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                            ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                         ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                       ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                       ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                     ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                            ;
; OPERATION_MODE                     ; SINGLE_PORT          ; Untyped                                                                                                            ;
; WIDTH_A                            ; 9                    ; Untyped                                                                                                            ;
; WIDTHAD_A                          ; 10                   ; Untyped                                                                                                            ;
; NUMWORDS_A                         ; 1024                 ; Untyped                                                                                                            ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                            ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_B                            ; 1                    ; Untyped                                                                                                            ;
; WIDTHAD_B                          ; 1                    ; Untyped                                                                                                            ;
; NUMWORDS_B                         ; 1                    ; Untyped                                                                                                            ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                            ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                            ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                                            ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                            ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                            ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                                            ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                            ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                            ;
; ECC_PIPELINE_STAGE_ENABLED         ; FALSE                ; Untyped                                                                                                            ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                                                                            ;
; DEVICE_FAMILY                      ; MAX 10               ; Untyped                                                                                                            ;
; CBXI_PARAMETER                     ; altsyncram_9r31      ; Untyped                                                                                                            ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:21:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                               ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                            ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                         ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                       ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                       ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                     ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                            ;
; OPERATION_MODE                     ; SINGLE_PORT          ; Untyped                                                                                                            ;
; WIDTH_A                            ; 9                    ; Untyped                                                                                                            ;
; WIDTHAD_A                          ; 10                   ; Untyped                                                                                                            ;
; NUMWORDS_A                         ; 1024                 ; Untyped                                                                                                            ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                            ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_B                            ; 1                    ; Untyped                                                                                                            ;
; WIDTHAD_B                          ; 1                    ; Untyped                                                                                                            ;
; NUMWORDS_B                         ; 1                    ; Untyped                                                                                                            ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                            ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                            ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                                            ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                            ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                            ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                                            ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                            ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                            ;
; ECC_PIPELINE_STAGE_ENABLED         ; FALSE                ; Untyped                                                                                                            ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                                                                            ;
; DEVICE_FAMILY                      ; MAX 10               ; Untyped                                                                                                            ;
; CBXI_PARAMETER                     ; altsyncram_9r31      ; Untyped                                                                                                            ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:22:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                               ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                            ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                         ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                       ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                       ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                     ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                            ;
; OPERATION_MODE                     ; SINGLE_PORT          ; Untyped                                                                                                            ;
; WIDTH_A                            ; 9                    ; Untyped                                                                                                            ;
; WIDTHAD_A                          ; 10                   ; Untyped                                                                                                            ;
; NUMWORDS_A                         ; 1024                 ; Untyped                                                                                                            ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                            ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_B                            ; 1                    ; Untyped                                                                                                            ;
; WIDTHAD_B                          ; 1                    ; Untyped                                                                                                            ;
; NUMWORDS_B                         ; 1                    ; Untyped                                                                                                            ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                            ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                            ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                                            ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                            ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                            ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                                            ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                            ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                            ;
; ECC_PIPELINE_STAGE_ENABLED         ; FALSE                ; Untyped                                                                                                            ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                                                                            ;
; DEVICE_FAMILY                      ; MAX 10               ; Untyped                                                                                                            ;
; CBXI_PARAMETER                     ; altsyncram_9r31      ; Untyped                                                                                                            ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:23:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                               ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                            ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                         ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                       ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                       ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                     ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                            ;
; OPERATION_MODE                     ; SINGLE_PORT          ; Untyped                                                                                                            ;
; WIDTH_A                            ; 9                    ; Untyped                                                                                                            ;
; WIDTHAD_A                          ; 10                   ; Untyped                                                                                                            ;
; NUMWORDS_A                         ; 1024                 ; Untyped                                                                                                            ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                            ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_B                            ; 1                    ; Untyped                                                                                                            ;
; WIDTHAD_B                          ; 1                    ; Untyped                                                                                                            ;
; NUMWORDS_B                         ; 1                    ; Untyped                                                                                                            ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                            ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                            ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                                            ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                            ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                            ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                                            ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                            ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                            ;
; ECC_PIPELINE_STAGE_ENABLED         ; FALSE                ; Untyped                                                                                                            ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                                                                            ;
; DEVICE_FAMILY                      ; MAX 10               ; Untyped                                                                                                            ;
; CBXI_PARAMETER                     ; altsyncram_9r31      ; Untyped                                                                                                            ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:24:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                               ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                            ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                         ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                       ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                       ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                     ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                            ;
; OPERATION_MODE                     ; SINGLE_PORT          ; Untyped                                                                                                            ;
; WIDTH_A                            ; 9                    ; Untyped                                                                                                            ;
; WIDTHAD_A                          ; 10                   ; Untyped                                                                                                            ;
; NUMWORDS_A                         ; 1024                 ; Untyped                                                                                                            ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                            ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_B                            ; 1                    ; Untyped                                                                                                            ;
; WIDTHAD_B                          ; 1                    ; Untyped                                                                                                            ;
; NUMWORDS_B                         ; 1                    ; Untyped                                                                                                            ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                            ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                            ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                                            ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                            ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                            ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                                            ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                            ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                            ;
; ECC_PIPELINE_STAGE_ENABLED         ; FALSE                ; Untyped                                                                                                            ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                                                                            ;
; DEVICE_FAMILY                      ; MAX 10               ; Untyped                                                                                                            ;
; CBXI_PARAMETER                     ; altsyncram_9r31      ; Untyped                                                                                                            ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:25:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                               ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                            ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                         ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                       ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                       ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                     ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                            ;
; OPERATION_MODE                     ; SINGLE_PORT          ; Untyped                                                                                                            ;
; WIDTH_A                            ; 9                    ; Untyped                                                                                                            ;
; WIDTHAD_A                          ; 10                   ; Untyped                                                                                                            ;
; NUMWORDS_A                         ; 1024                 ; Untyped                                                                                                            ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                            ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_B                            ; 1                    ; Untyped                                                                                                            ;
; WIDTHAD_B                          ; 1                    ; Untyped                                                                                                            ;
; NUMWORDS_B                         ; 1                    ; Untyped                                                                                                            ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                            ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                            ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                                            ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                            ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                            ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                                            ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                            ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                            ;
; ECC_PIPELINE_STAGE_ENABLED         ; FALSE                ; Untyped                                                                                                            ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                                                                            ;
; DEVICE_FAMILY                      ; MAX 10               ; Untyped                                                                                                            ;
; CBXI_PARAMETER                     ; altsyncram_9r31      ; Untyped                                                                                                            ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:27:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                               ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                            ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                         ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                       ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                       ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                     ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                            ;
; OPERATION_MODE                     ; SINGLE_PORT          ; Untyped                                                                                                            ;
; WIDTH_A                            ; 9                    ; Untyped                                                                                                            ;
; WIDTHAD_A                          ; 10                   ; Untyped                                                                                                            ;
; NUMWORDS_A                         ; 1024                 ; Untyped                                                                                                            ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                            ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_B                            ; 1                    ; Untyped                                                                                                            ;
; WIDTHAD_B                          ; 1                    ; Untyped                                                                                                            ;
; NUMWORDS_B                         ; 1                    ; Untyped                                                                                                            ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                            ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                            ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                                            ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                            ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                            ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                                            ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                            ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                            ;
; ECC_PIPELINE_STAGE_ENABLED         ; FALSE                ; Untyped                                                                                                            ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                                                                            ;
; DEVICE_FAMILY                      ; MAX 10               ; Untyped                                                                                                            ;
; CBXI_PARAMETER                     ; altsyncram_9r31      ; Untyped                                                                                                            ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:28:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                               ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                            ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                         ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                       ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                       ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                     ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                            ;
; OPERATION_MODE                     ; SINGLE_PORT          ; Untyped                                                                                                            ;
; WIDTH_A                            ; 9                    ; Untyped                                                                                                            ;
; WIDTHAD_A                          ; 10                   ; Untyped                                                                                                            ;
; NUMWORDS_A                         ; 1024                 ; Untyped                                                                                                            ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                            ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_B                            ; 1                    ; Untyped                                                                                                            ;
; WIDTHAD_B                          ; 1                    ; Untyped                                                                                                            ;
; NUMWORDS_B                         ; 1                    ; Untyped                                                                                                            ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                            ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                            ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                                            ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                            ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                            ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                                            ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                            ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                            ;
; ECC_PIPELINE_STAGE_ENABLED         ; FALSE                ; Untyped                                                                                                            ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                                                                            ;
; DEVICE_FAMILY                      ; MAX 10               ; Untyped                                                                                                            ;
; CBXI_PARAMETER                     ; altsyncram_9r31      ; Untyped                                                                                                            ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:29:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                               ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                            ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                         ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                       ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                       ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                     ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                            ;
; OPERATION_MODE                     ; SINGLE_PORT          ; Untyped                                                                                                            ;
; WIDTH_A                            ; 9                    ; Untyped                                                                                                            ;
; WIDTHAD_A                          ; 10                   ; Untyped                                                                                                            ;
; NUMWORDS_A                         ; 1024                 ; Untyped                                                                                                            ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                            ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_B                            ; 1                    ; Untyped                                                                                                            ;
; WIDTHAD_B                          ; 1                    ; Untyped                                                                                                            ;
; NUMWORDS_B                         ; 1                    ; Untyped                                                                                                            ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                            ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                            ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                                            ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                            ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                            ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                                            ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                            ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                            ;
; ECC_PIPELINE_STAGE_ENABLED         ; FALSE                ; Untyped                                                                                                            ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                                                                            ;
; DEVICE_FAMILY                      ; MAX 10               ; Untyped                                                                                                            ;
; CBXI_PARAMETER                     ; altsyncram_9r31      ; Untyped                                                                                                            ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:30:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                               ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                            ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                         ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                       ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                       ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                     ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                            ;
; OPERATION_MODE                     ; SINGLE_PORT          ; Untyped                                                                                                            ;
; WIDTH_A                            ; 9                    ; Untyped                                                                                                            ;
; WIDTHAD_A                          ; 10                   ; Untyped                                                                                                            ;
; NUMWORDS_A                         ; 1024                 ; Untyped                                                                                                            ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                            ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_B                            ; 1                    ; Untyped                                                                                                            ;
; WIDTHAD_B                          ; 1                    ; Untyped                                                                                                            ;
; NUMWORDS_B                         ; 1                    ; Untyped                                                                                                            ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                            ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                            ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                                            ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                            ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                            ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                                            ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                            ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                            ;
; ECC_PIPELINE_STAGE_ENABLED         ; FALSE                ; Untyped                                                                                                            ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                                                                            ;
; DEVICE_FAMILY                      ; MAX 10               ; Untyped                                                                                                            ;
; CBXI_PARAMETER                     ; altsyncram_9r31      ; Untyped                                                                                                            ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:31:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                               ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                            ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                         ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                       ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                       ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                     ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                            ;
; OPERATION_MODE                     ; SINGLE_PORT          ; Untyped                                                                                                            ;
; WIDTH_A                            ; 9                    ; Untyped                                                                                                            ;
; WIDTHAD_A                          ; 10                   ; Untyped                                                                                                            ;
; NUMWORDS_A                         ; 1024                 ; Untyped                                                                                                            ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                            ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_B                            ; 1                    ; Untyped                                                                                                            ;
; WIDTHAD_B                          ; 1                    ; Untyped                                                                                                            ;
; NUMWORDS_B                         ; 1                    ; Untyped                                                                                                            ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                            ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                            ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                                            ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                            ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                            ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                                            ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                            ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                            ;
; ECC_PIPELINE_STAGE_ENABLED         ; FALSE                ; Untyped                                                                                                            ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                                                                            ;
; DEVICE_FAMILY                      ; MAX 10               ; Untyped                                                                                                            ;
; CBXI_PARAMETER                     ; altsyncram_9r31      ; Untyped                                                                                                            ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:32:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                               ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                            ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                         ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                       ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                       ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                     ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                            ;
; OPERATION_MODE                     ; SINGLE_PORT          ; Untyped                                                                                                            ;
; WIDTH_A                            ; 9                    ; Untyped                                                                                                            ;
; WIDTHAD_A                          ; 10                   ; Untyped                                                                                                            ;
; NUMWORDS_A                         ; 1024                 ; Untyped                                                                                                            ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                            ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_B                            ; 1                    ; Untyped                                                                                                            ;
; WIDTHAD_B                          ; 1                    ; Untyped                                                                                                            ;
; NUMWORDS_B                         ; 1                    ; Untyped                                                                                                            ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                            ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                            ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                                            ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                            ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                            ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                                            ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                            ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                            ;
; ECC_PIPELINE_STAGE_ENABLED         ; FALSE                ; Untyped                                                                                                            ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                                                                            ;
; DEVICE_FAMILY                      ; MAX 10               ; Untyped                                                                                                            ;
; CBXI_PARAMETER                     ; altsyncram_9r31      ; Untyped                                                                                                            ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:33:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                               ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                            ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                         ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                       ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                       ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                     ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                            ;
; OPERATION_MODE                     ; SINGLE_PORT          ; Untyped                                                                                                            ;
; WIDTH_A                            ; 9                    ; Untyped                                                                                                            ;
; WIDTHAD_A                          ; 10                   ; Untyped                                                                                                            ;
; NUMWORDS_A                         ; 1024                 ; Untyped                                                                                                            ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                            ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_B                            ; 1                    ; Untyped                                                                                                            ;
; WIDTHAD_B                          ; 1                    ; Untyped                                                                                                            ;
; NUMWORDS_B                         ; 1                    ; Untyped                                                                                                            ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                            ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                            ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                                            ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                            ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                            ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                                            ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                            ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                            ;
; ECC_PIPELINE_STAGE_ENABLED         ; FALSE                ; Untyped                                                                                                            ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                                                                            ;
; DEVICE_FAMILY                      ; MAX 10               ; Untyped                                                                                                            ;
; CBXI_PARAMETER                     ; altsyncram_9r31      ; Untyped                                                                                                            ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:35:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                               ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                            ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                         ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                       ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                       ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                     ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                            ;
; OPERATION_MODE                     ; SINGLE_PORT          ; Untyped                                                                                                            ;
; WIDTH_A                            ; 9                    ; Untyped                                                                                                            ;
; WIDTHAD_A                          ; 10                   ; Untyped                                                                                                            ;
; NUMWORDS_A                         ; 1024                 ; Untyped                                                                                                            ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                            ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_B                            ; 1                    ; Untyped                                                                                                            ;
; WIDTHAD_B                          ; 1                    ; Untyped                                                                                                            ;
; NUMWORDS_B                         ; 1                    ; Untyped                                                                                                            ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                            ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                            ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                                            ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                            ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                            ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                                            ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                            ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                            ;
; ECC_PIPELINE_STAGE_ENABLED         ; FALSE                ; Untyped                                                                                                            ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                                                                            ;
; DEVICE_FAMILY                      ; MAX 10               ; Untyped                                                                                                            ;
; CBXI_PARAMETER                     ; altsyncram_9r31      ; Untyped                                                                                                            ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:36:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                               ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                            ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                         ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                       ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                       ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                     ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                            ;
; OPERATION_MODE                     ; SINGLE_PORT          ; Untyped                                                                                                            ;
; WIDTH_A                            ; 9                    ; Untyped                                                                                                            ;
; WIDTHAD_A                          ; 10                   ; Untyped                                                                                                            ;
; NUMWORDS_A                         ; 1024                 ; Untyped                                                                                                            ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                            ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_B                            ; 1                    ; Untyped                                                                                                            ;
; WIDTHAD_B                          ; 1                    ; Untyped                                                                                                            ;
; NUMWORDS_B                         ; 1                    ; Untyped                                                                                                            ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                            ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                            ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                                            ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                            ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                            ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                                            ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                            ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                            ;
; ECC_PIPELINE_STAGE_ENABLED         ; FALSE                ; Untyped                                                                                                            ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                                                                            ;
; DEVICE_FAMILY                      ; MAX 10               ; Untyped                                                                                                            ;
; CBXI_PARAMETER                     ; altsyncram_9r31      ; Untyped                                                                                                            ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:37:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                               ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                            ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                         ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                       ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                       ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                     ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                            ;
; OPERATION_MODE                     ; SINGLE_PORT          ; Untyped                                                                                                            ;
; WIDTH_A                            ; 9                    ; Untyped                                                                                                            ;
; WIDTHAD_A                          ; 10                   ; Untyped                                                                                                            ;
; NUMWORDS_A                         ; 1024                 ; Untyped                                                                                                            ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                            ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_B                            ; 1                    ; Untyped                                                                                                            ;
; WIDTHAD_B                          ; 1                    ; Untyped                                                                                                            ;
; NUMWORDS_B                         ; 1                    ; Untyped                                                                                                            ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                            ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                            ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                                            ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                            ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                            ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                                            ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                            ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                            ;
; ECC_PIPELINE_STAGE_ENABLED         ; FALSE                ; Untyped                                                                                                            ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                                                                            ;
; DEVICE_FAMILY                      ; MAX 10               ; Untyped                                                                                                            ;
; CBXI_PARAMETER                     ; altsyncram_9r31      ; Untyped                                                                                                            ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:38:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                               ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                            ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                         ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                       ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                       ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                     ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                            ;
; OPERATION_MODE                     ; SINGLE_PORT          ; Untyped                                                                                                            ;
; WIDTH_A                            ; 9                    ; Untyped                                                                                                            ;
; WIDTHAD_A                          ; 10                   ; Untyped                                                                                                            ;
; NUMWORDS_A                         ; 1024                 ; Untyped                                                                                                            ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                            ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_B                            ; 1                    ; Untyped                                                                                                            ;
; WIDTHAD_B                          ; 1                    ; Untyped                                                                                                            ;
; NUMWORDS_B                         ; 1                    ; Untyped                                                                                                            ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                            ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                            ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                                            ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                            ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                            ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                                            ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                            ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                            ;
; ECC_PIPELINE_STAGE_ENABLED         ; FALSE                ; Untyped                                                                                                            ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                                                                            ;
; DEVICE_FAMILY                      ; MAX 10               ; Untyped                                                                                                            ;
; CBXI_PARAMETER                     ; altsyncram_9r31      ; Untyped                                                                                                            ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:39:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                               ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                            ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                         ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                       ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                       ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                     ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                            ;
; OPERATION_MODE                     ; SINGLE_PORT          ; Untyped                                                                                                            ;
; WIDTH_A                            ; 9                    ; Untyped                                                                                                            ;
; WIDTHAD_A                          ; 10                   ; Untyped                                                                                                            ;
; NUMWORDS_A                         ; 1024                 ; Untyped                                                                                                            ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                            ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_B                            ; 1                    ; Untyped                                                                                                            ;
; WIDTHAD_B                          ; 1                    ; Untyped                                                                                                            ;
; NUMWORDS_B                         ; 1                    ; Untyped                                                                                                            ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                            ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                            ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                                            ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                            ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                            ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                                            ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                            ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                            ;
; ECC_PIPELINE_STAGE_ENABLED         ; FALSE                ; Untyped                                                                                                            ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                                                                            ;
; DEVICE_FAMILY                      ; MAX 10               ; Untyped                                                                                                            ;
; CBXI_PARAMETER                     ; altsyncram_9r31      ; Untyped                                                                                                            ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:40:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                               ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                            ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                         ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                       ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                       ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                     ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                            ;
; OPERATION_MODE                     ; SINGLE_PORT          ; Untyped                                                                                                            ;
; WIDTH_A                            ; 9                    ; Untyped                                                                                                            ;
; WIDTHAD_A                          ; 10                   ; Untyped                                                                                                            ;
; NUMWORDS_A                         ; 1024                 ; Untyped                                                                                                            ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                            ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_B                            ; 1                    ; Untyped                                                                                                            ;
; WIDTHAD_B                          ; 1                    ; Untyped                                                                                                            ;
; NUMWORDS_B                         ; 1                    ; Untyped                                                                                                            ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                            ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                            ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                                            ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                            ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                            ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                                            ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                            ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                            ;
; ECC_PIPELINE_STAGE_ENABLED         ; FALSE                ; Untyped                                                                                                            ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                                                                            ;
; DEVICE_FAMILY                      ; MAX 10               ; Untyped                                                                                                            ;
; CBXI_PARAMETER                     ; altsyncram_9r31      ; Untyped                                                                                                            ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:41:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                               ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                            ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                         ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                       ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                       ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                     ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                            ;
; OPERATION_MODE                     ; SINGLE_PORT          ; Untyped                                                                                                            ;
; WIDTH_A                            ; 9                    ; Untyped                                                                                                            ;
; WIDTHAD_A                          ; 10                   ; Untyped                                                                                                            ;
; NUMWORDS_A                         ; 1024                 ; Untyped                                                                                                            ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                            ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_B                            ; 1                    ; Untyped                                                                                                            ;
; WIDTHAD_B                          ; 1                    ; Untyped                                                                                                            ;
; NUMWORDS_B                         ; 1                    ; Untyped                                                                                                            ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                            ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                            ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                                            ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                            ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                            ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                                            ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                            ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                            ;
; ECC_PIPELINE_STAGE_ENABLED         ; FALSE                ; Untyped                                                                                                            ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                                                                            ;
; DEVICE_FAMILY                      ; MAX 10               ; Untyped                                                                                                            ;
; CBXI_PARAMETER                     ; altsyncram_9r31      ; Untyped                                                                                                            ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:43:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                               ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                            ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                         ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                       ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                       ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                     ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                            ;
; OPERATION_MODE                     ; SINGLE_PORT          ; Untyped                                                                                                            ;
; WIDTH_A                            ; 9                    ; Untyped                                                                                                            ;
; WIDTHAD_A                          ; 10                   ; Untyped                                                                                                            ;
; NUMWORDS_A                         ; 1024                 ; Untyped                                                                                                            ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                            ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_B                            ; 1                    ; Untyped                                                                                                            ;
; WIDTHAD_B                          ; 1                    ; Untyped                                                                                                            ;
; NUMWORDS_B                         ; 1                    ; Untyped                                                                                                            ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                            ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                            ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                                            ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                            ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                            ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                                            ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                            ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                            ;
; ECC_PIPELINE_STAGE_ENABLED         ; FALSE                ; Untyped                                                                                                            ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                                                                            ;
; DEVICE_FAMILY                      ; MAX 10               ; Untyped                                                                                                            ;
; CBXI_PARAMETER                     ; altsyncram_9r31      ; Untyped                                                                                                            ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:44:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                               ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                            ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                         ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                       ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                       ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                     ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                            ;
; OPERATION_MODE                     ; SINGLE_PORT          ; Untyped                                                                                                            ;
; WIDTH_A                            ; 9                    ; Untyped                                                                                                            ;
; WIDTHAD_A                          ; 10                   ; Untyped                                                                                                            ;
; NUMWORDS_A                         ; 1024                 ; Untyped                                                                                                            ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                            ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_B                            ; 1                    ; Untyped                                                                                                            ;
; WIDTHAD_B                          ; 1                    ; Untyped                                                                                                            ;
; NUMWORDS_B                         ; 1                    ; Untyped                                                                                                            ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                            ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                            ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                                            ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                            ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                            ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                                            ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                            ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                            ;
; ECC_PIPELINE_STAGE_ENABLED         ; FALSE                ; Untyped                                                                                                            ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                                                                            ;
; DEVICE_FAMILY                      ; MAX 10               ; Untyped                                                                                                            ;
; CBXI_PARAMETER                     ; altsyncram_9r31      ; Untyped                                                                                                            ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:45:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                               ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                            ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                         ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                       ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                       ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                     ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                            ;
; OPERATION_MODE                     ; SINGLE_PORT          ; Untyped                                                                                                            ;
; WIDTH_A                            ; 9                    ; Untyped                                                                                                            ;
; WIDTHAD_A                          ; 10                   ; Untyped                                                                                                            ;
; NUMWORDS_A                         ; 1024                 ; Untyped                                                                                                            ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                            ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_B                            ; 1                    ; Untyped                                                                                                            ;
; WIDTHAD_B                          ; 1                    ; Untyped                                                                                                            ;
; NUMWORDS_B                         ; 1                    ; Untyped                                                                                                            ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                            ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                            ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                                            ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                            ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                            ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                                            ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                            ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                            ;
; ECC_PIPELINE_STAGE_ENABLED         ; FALSE                ; Untyped                                                                                                            ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                                                                            ;
; DEVICE_FAMILY                      ; MAX 10               ; Untyped                                                                                                            ;
; CBXI_PARAMETER                     ; altsyncram_9r31      ; Untyped                                                                                                            ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:46:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                               ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                            ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                         ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                       ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                       ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                     ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                            ;
; OPERATION_MODE                     ; SINGLE_PORT          ; Untyped                                                                                                            ;
; WIDTH_A                            ; 9                    ; Untyped                                                                                                            ;
; WIDTHAD_A                          ; 10                   ; Untyped                                                                                                            ;
; NUMWORDS_A                         ; 1024                 ; Untyped                                                                                                            ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                            ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_B                            ; 1                    ; Untyped                                                                                                            ;
; WIDTHAD_B                          ; 1                    ; Untyped                                                                                                            ;
; NUMWORDS_B                         ; 1                    ; Untyped                                                                                                            ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                            ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                            ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                                            ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                            ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                            ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                                            ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                            ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                            ;
; ECC_PIPELINE_STAGE_ENABLED         ; FALSE                ; Untyped                                                                                                            ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                                                                            ;
; DEVICE_FAMILY                      ; MAX 10               ; Untyped                                                                                                            ;
; CBXI_PARAMETER                     ; altsyncram_9r31      ; Untyped                                                                                                            ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:47:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                               ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                            ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                         ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                       ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                       ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                     ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                            ;
; OPERATION_MODE                     ; SINGLE_PORT          ; Untyped                                                                                                            ;
; WIDTH_A                            ; 9                    ; Untyped                                                                                                            ;
; WIDTHAD_A                          ; 10                   ; Untyped                                                                                                            ;
; NUMWORDS_A                         ; 1024                 ; Untyped                                                                                                            ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                            ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_B                            ; 1                    ; Untyped                                                                                                            ;
; WIDTHAD_B                          ; 1                    ; Untyped                                                                                                            ;
; NUMWORDS_B                         ; 1                    ; Untyped                                                                                                            ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                            ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                            ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                                            ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                            ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                            ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                                            ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                            ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                            ;
; ECC_PIPELINE_STAGE_ENABLED         ; FALSE                ; Untyped                                                                                                            ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                                                                            ;
; DEVICE_FAMILY                      ; MAX 10               ; Untyped                                                                                                            ;
; CBXI_PARAMETER                     ; altsyncram_9r31      ; Untyped                                                                                                            ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:48:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                               ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                            ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                         ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                       ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                       ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                     ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                            ;
; OPERATION_MODE                     ; SINGLE_PORT          ; Untyped                                                                                                            ;
; WIDTH_A                            ; 9                    ; Untyped                                                                                                            ;
; WIDTHAD_A                          ; 10                   ; Untyped                                                                                                            ;
; NUMWORDS_A                         ; 1024                 ; Untyped                                                                                                            ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                            ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_B                            ; 1                    ; Untyped                                                                                                            ;
; WIDTHAD_B                          ; 1                    ; Untyped                                                                                                            ;
; NUMWORDS_B                         ; 1                    ; Untyped                                                                                                            ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                            ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                            ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                                            ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                            ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                            ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                                            ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                            ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                            ;
; ECC_PIPELINE_STAGE_ENABLED         ; FALSE                ; Untyped                                                                                                            ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                                                                            ;
; DEVICE_FAMILY                      ; MAX 10               ; Untyped                                                                                                            ;
; CBXI_PARAMETER                     ; altsyncram_9r31      ; Untyped                                                                                                            ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:49:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                               ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                            ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                         ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                       ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                       ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                     ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                            ;
; OPERATION_MODE                     ; SINGLE_PORT          ; Untyped                                                                                                            ;
; WIDTH_A                            ; 9                    ; Untyped                                                                                                            ;
; WIDTHAD_A                          ; 10                   ; Untyped                                                                                                            ;
; NUMWORDS_A                         ; 1024                 ; Untyped                                                                                                            ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                            ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_B                            ; 1                    ; Untyped                                                                                                            ;
; WIDTHAD_B                          ; 1                    ; Untyped                                                                                                            ;
; NUMWORDS_B                         ; 1                    ; Untyped                                                                                                            ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                            ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                            ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                                            ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                            ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                            ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                                            ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                            ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                            ;
; ECC_PIPELINE_STAGE_ENABLED         ; FALSE                ; Untyped                                                                                                            ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                                                                            ;
; DEVICE_FAMILY                      ; MAX 10               ; Untyped                                                                                                            ;
; CBXI_PARAMETER                     ; altsyncram_9r31      ; Untyped                                                                                                            ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:51:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                               ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                            ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                         ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                       ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                       ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                     ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                            ;
; OPERATION_MODE                     ; SINGLE_PORT          ; Untyped                                                                                                            ;
; WIDTH_A                            ; 9                    ; Untyped                                                                                                            ;
; WIDTHAD_A                          ; 10                   ; Untyped                                                                                                            ;
; NUMWORDS_A                         ; 1024                 ; Untyped                                                                                                            ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                            ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_B                            ; 1                    ; Untyped                                                                                                            ;
; WIDTHAD_B                          ; 1                    ; Untyped                                                                                                            ;
; NUMWORDS_B                         ; 1                    ; Untyped                                                                                                            ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                            ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                            ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                                            ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                            ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                            ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                                            ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                            ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                            ;
; ECC_PIPELINE_STAGE_ENABLED         ; FALSE                ; Untyped                                                                                                            ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                                                                            ;
; DEVICE_FAMILY                      ; MAX 10               ; Untyped                                                                                                            ;
; CBXI_PARAMETER                     ; altsyncram_9r31      ; Untyped                                                                                                            ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:52:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                               ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                            ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                         ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                       ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                       ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                     ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                            ;
; OPERATION_MODE                     ; SINGLE_PORT          ; Untyped                                                                                                            ;
; WIDTH_A                            ; 9                    ; Untyped                                                                                                            ;
; WIDTHAD_A                          ; 10                   ; Untyped                                                                                                            ;
; NUMWORDS_A                         ; 1024                 ; Untyped                                                                                                            ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                            ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_B                            ; 1                    ; Untyped                                                                                                            ;
; WIDTHAD_B                          ; 1                    ; Untyped                                                                                                            ;
; NUMWORDS_B                         ; 1                    ; Untyped                                                                                                            ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                            ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                            ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                                            ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                            ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                            ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                                            ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                            ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                            ;
; ECC_PIPELINE_STAGE_ENABLED         ; FALSE                ; Untyped                                                                                                            ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                                                                            ;
; DEVICE_FAMILY                      ; MAX 10               ; Untyped                                                                                                            ;
; CBXI_PARAMETER                     ; altsyncram_9r31      ; Untyped                                                                                                            ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:53:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                               ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                            ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                         ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                       ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                       ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                     ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                            ;
; OPERATION_MODE                     ; SINGLE_PORT          ; Untyped                                                                                                            ;
; WIDTH_A                            ; 9                    ; Untyped                                                                                                            ;
; WIDTHAD_A                          ; 10                   ; Untyped                                                                                                            ;
; NUMWORDS_A                         ; 1024                 ; Untyped                                                                                                            ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                            ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_B                            ; 1                    ; Untyped                                                                                                            ;
; WIDTHAD_B                          ; 1                    ; Untyped                                                                                                            ;
; NUMWORDS_B                         ; 1                    ; Untyped                                                                                                            ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                            ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                            ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                                            ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                            ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                            ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                                            ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                            ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                            ;
; ECC_PIPELINE_STAGE_ENABLED         ; FALSE                ; Untyped                                                                                                            ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                                                                            ;
; DEVICE_FAMILY                      ; MAX 10               ; Untyped                                                                                                            ;
; CBXI_PARAMETER                     ; altsyncram_9r31      ; Untyped                                                                                                            ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:54:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                               ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                            ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                         ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                       ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                       ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                     ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                            ;
; OPERATION_MODE                     ; SINGLE_PORT          ; Untyped                                                                                                            ;
; WIDTH_A                            ; 9                    ; Untyped                                                                                                            ;
; WIDTHAD_A                          ; 10                   ; Untyped                                                                                                            ;
; NUMWORDS_A                         ; 1024                 ; Untyped                                                                                                            ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                            ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_B                            ; 1                    ; Untyped                                                                                                            ;
; WIDTHAD_B                          ; 1                    ; Untyped                                                                                                            ;
; NUMWORDS_B                         ; 1                    ; Untyped                                                                                                            ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                            ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                            ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                                            ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                            ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                            ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                                            ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                            ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                            ;
; ECC_PIPELINE_STAGE_ENABLED         ; FALSE                ; Untyped                                                                                                            ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                                                                            ;
; DEVICE_FAMILY                      ; MAX 10               ; Untyped                                                                                                            ;
; CBXI_PARAMETER                     ; altsyncram_9r31      ; Untyped                                                                                                            ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:55:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                               ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                            ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                         ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                       ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                       ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                     ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                            ;
; OPERATION_MODE                     ; SINGLE_PORT          ; Untyped                                                                                                            ;
; WIDTH_A                            ; 9                    ; Untyped                                                                                                            ;
; WIDTHAD_A                          ; 10                   ; Untyped                                                                                                            ;
; NUMWORDS_A                         ; 1024                 ; Untyped                                                                                                            ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                            ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_B                            ; 1                    ; Untyped                                                                                                            ;
; WIDTHAD_B                          ; 1                    ; Untyped                                                                                                            ;
; NUMWORDS_B                         ; 1                    ; Untyped                                                                                                            ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                            ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                            ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                                            ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                            ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                            ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                            ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                            ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                            ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                            ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                            ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                            ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                                            ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                            ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                            ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                            ;
; ECC_PIPELINE_STAGE_ENABLED         ; FALSE                ; Untyped                                                                                                            ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                                                                            ;
; DEVICE_FAMILY                      ; MAX 10               ; Untyped                                                                                                            ;
; CBXI_PARAMETER                     ; altsyncram_9r31      ; Untyped                                                                                                            ;
+------------------------------------+----------------------+--------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: SID_top:\sid_on:sid2|SID_envelope:envelope_a|altshift_taps:attack_del1_reg_rtl_0 ;
+----------------+----------------+-------------------------------------------------------------------------------------------------+
; Parameter Name ; Value          ; Type                                                                                            ;
+----------------+----------------+-------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA  ; 1              ; Untyped                                                                                         ;
; NUMBER_OF_TAPS ; 1              ; Untyped                                                                                         ;
; TAP_DISTANCE   ; 3              ; Untyped                                                                                         ;
; WIDTH          ; 72             ; Untyped                                                                                         ;
; POWER_UP_STATE ; CLEARED        ; Untyped                                                                                         ;
; CBXI_PARAMETER ; shift_taps_jgm ; Untyped                                                                                         ;
+----------------+----------------+-------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: clockgen:\sidpsg_on:clockgen1|lpm_mult:Mult0 ;
+------------------------------------------------+----------+-----------------------------------+
; Parameter Name                                 ; Value    ; Type                              ;
+------------------------------------------------+----------+-----------------------------------+
; AUTO_CARRY_CHAINS                              ; ON       ; AUTO_CARRY                        ;
; IGNORE_CARRY_BUFFERS                           ; OFF      ; IGNORE_CARRY                      ;
; AUTO_CASCADE_CHAINS                            ; ON       ; AUTO_CASCADE                      ;
; IGNORE_CASCADE_BUFFERS                         ; OFF      ; IGNORE_CASCADE                    ;
; LPM_WIDTHA                                     ; 7        ; Untyped                           ;
; LPM_WIDTHB                                     ; 9        ; Untyped                           ;
; LPM_WIDTHP                                     ; 16       ; Untyped                           ;
; LPM_WIDTHR                                     ; 16       ; Untyped                           ;
; LPM_WIDTHS                                     ; 1        ; Untyped                           ;
; LPM_REPRESENTATION                             ; UNSIGNED ; Untyped                           ;
; LPM_PIPELINE                                   ; 0        ; Untyped                           ;
; LATENCY                                        ; 0        ; Untyped                           ;
; INPUT_A_IS_CONSTANT                            ; NO       ; Untyped                           ;
; INPUT_B_IS_CONSTANT                            ; NO       ; Untyped                           ;
; USE_EAB                                        ; OFF      ; Untyped                           ;
; MAXIMIZE_SPEED                                 ; 5        ; Untyped                           ;
; DEVICE_FAMILY                                  ; MAX 10   ; Untyped                           ;
; CARRY_CHAIN                                    ; MANUAL   ; Untyped                           ;
; APEX20K_TECHNOLOGY_MAPPER                      ; LUT      ; TECH_MAPPER_APEX20K               ;
; DEDICATED_MULTIPLIER_CIRCUITRY                 ; AUTO     ; Untyped                           ;
; DEDICATED_MULTIPLIER_MIN_INPUT_WIDTH_FOR_AUTO  ; 0        ; Untyped                           ;
; DEDICATED_MULTIPLIER_MIN_OUTPUT_WIDTH_FOR_AUTO ; 0        ; Untyped                           ;
; CBXI_PARAMETER                                 ; mult_0ls ; Untyped                           ;
; INPUT_A_FIXED_VALUE                            ; Bx       ; Untyped                           ;
; INPUT_B_FIXED_VALUE                            ; Bx       ; Untyped                           ;
; USE_AHDL_IMPLEMENTATION                        ; OFF      ; Untyped                           ;
+------------------------------------------------+----------+-----------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: sample_top:\sample_on:sample1|lpm_mult:Mult3 ;
+------------------------------------------------+----------+-----------------------------------+
; Parameter Name                                 ; Value    ; Type                              ;
+------------------------------------------------+----------+-----------------------------------+
; AUTO_CARRY_CHAINS                              ; ON       ; AUTO_CARRY                        ;
; IGNORE_CARRY_BUFFERS                           ; OFF      ; IGNORE_CARRY                      ;
; AUTO_CASCADE_CHAINS                            ; ON       ; AUTO_CASCADE                      ;
; IGNORE_CASCADE_BUFFERS                         ; OFF      ; IGNORE_CASCADE                    ;
; LPM_WIDTHA                                     ; 13       ; Untyped                           ;
; LPM_WIDTHB                                     ; 7        ; Untyped                           ;
; LPM_WIDTHP                                     ; 20       ; Untyped                           ;
; LPM_WIDTHR                                     ; 20       ; Untyped                           ;
; LPM_WIDTHS                                     ; 1        ; Untyped                           ;
; LPM_REPRESENTATION                             ; SIGNED   ; Untyped                           ;
; LPM_PIPELINE                                   ; 0        ; Untyped                           ;
; LATENCY                                        ; 0        ; Untyped                           ;
; INPUT_A_IS_CONSTANT                            ; NO       ; Untyped                           ;
; INPUT_B_IS_CONSTANT                            ; NO       ; Untyped                           ;
; USE_EAB                                        ; OFF      ; Untyped                           ;
; MAXIMIZE_SPEED                                 ; 6        ; Untyped                           ;
; DEVICE_FAMILY                                  ; MAX 10   ; Untyped                           ;
; CARRY_CHAIN                                    ; MANUAL   ; Untyped                           ;
; APEX20K_TECHNOLOGY_MAPPER                      ; LUT      ; TECH_MAPPER_APEX20K               ;
; DEDICATED_MULTIPLIER_CIRCUITRY                 ; AUTO     ; Untyped                           ;
; DEDICATED_MULTIPLIER_MIN_INPUT_WIDTH_FOR_AUTO  ; 0        ; Untyped                           ;
; DEDICATED_MULTIPLIER_MIN_OUTPUT_WIDTH_FOR_AUTO ; 0        ; Untyped                           ;
; CBXI_PARAMETER                                 ; mult_4fs ; Untyped                           ;
; INPUT_A_FIXED_VALUE                            ; Bx       ; Untyped                           ;
; INPUT_B_FIXED_VALUE                            ; Bx       ; Untyped                           ;
; USE_AHDL_IMPLEMENTATION                        ; OFF      ; Untyped                           ;
+------------------------------------------------+----------+-----------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: sample_top:\sample_on:sample1|lpm_mult:Mult2 ;
+------------------------------------------------+----------+-----------------------------------+
; Parameter Name                                 ; Value    ; Type                              ;
+------------------------------------------------+----------+-----------------------------------+
; AUTO_CARRY_CHAINS                              ; ON       ; AUTO_CARRY                        ;
; IGNORE_CARRY_BUFFERS                           ; OFF      ; IGNORE_CARRY                      ;
; AUTO_CASCADE_CHAINS                            ; ON       ; AUTO_CASCADE                      ;
; IGNORE_CASCADE_BUFFERS                         ; OFF      ; IGNORE_CASCADE                    ;
; LPM_WIDTHA                                     ; 13       ; Untyped                           ;
; LPM_WIDTHB                                     ; 7        ; Untyped                           ;
; LPM_WIDTHP                                     ; 20       ; Untyped                           ;
; LPM_WIDTHR                                     ; 20       ; Untyped                           ;
; LPM_WIDTHS                                     ; 1        ; Untyped                           ;
; LPM_REPRESENTATION                             ; SIGNED   ; Untyped                           ;
; LPM_PIPELINE                                   ; 0        ; Untyped                           ;
; LATENCY                                        ; 0        ; Untyped                           ;
; INPUT_A_IS_CONSTANT                            ; NO       ; Untyped                           ;
; INPUT_B_IS_CONSTANT                            ; NO       ; Untyped                           ;
; USE_EAB                                        ; OFF      ; Untyped                           ;
; MAXIMIZE_SPEED                                 ; 6        ; Untyped                           ;
; DEVICE_FAMILY                                  ; MAX 10   ; Untyped                           ;
; CARRY_CHAIN                                    ; MANUAL   ; Untyped                           ;
; APEX20K_TECHNOLOGY_MAPPER                      ; LUT      ; TECH_MAPPER_APEX20K               ;
; DEDICATED_MULTIPLIER_CIRCUITRY                 ; AUTO     ; Untyped                           ;
; DEDICATED_MULTIPLIER_MIN_INPUT_WIDTH_FOR_AUTO  ; 0        ; Untyped                           ;
; DEDICATED_MULTIPLIER_MIN_OUTPUT_WIDTH_FOR_AUTO ; 0        ; Untyped                           ;
; CBXI_PARAMETER                                 ; mult_4fs ; Untyped                           ;
; INPUT_A_FIXED_VALUE                            ; Bx       ; Untyped                           ;
; INPUT_B_FIXED_VALUE                            ; Bx       ; Untyped                           ;
; USE_AHDL_IMPLEMENTATION                        ; OFF      ; Untyped                           ;
+------------------------------------------------+----------+-----------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: SID_top:\sid_on:sid1|SID_postFilterSum:postfilter|lpm_mult:Mult0 ;
+------------------------------------------------+----------+-------------------------------------------------------+
; Parameter Name                                 ; Value    ; Type                                                  ;
+------------------------------------------------+----------+-------------------------------------------------------+
; AUTO_CARRY_CHAINS                              ; ON       ; AUTO_CARRY                                            ;
; IGNORE_CARRY_BUFFERS                           ; OFF      ; IGNORE_CARRY                                          ;
; AUTO_CASCADE_CHAINS                            ; ON       ; AUTO_CASCADE                                          ;
; IGNORE_CASCADE_BUFFERS                         ; OFF      ; IGNORE_CASCADE                                        ;
; LPM_WIDTHA                                     ; 18       ; Untyped                                               ;
; LPM_WIDTHB                                     ; 8        ; Untyped                                               ;
; LPM_WIDTHP                                     ; 26       ; Untyped                                               ;
; LPM_WIDTHR                                     ; 26       ; Untyped                                               ;
; LPM_WIDTHS                                     ; 1        ; Untyped                                               ;
; LPM_REPRESENTATION                             ; SIGNED   ; Untyped                                               ;
; LPM_PIPELINE                                   ; 0        ; Untyped                                               ;
; LATENCY                                        ; 0        ; Untyped                                               ;
; INPUT_A_IS_CONSTANT                            ; NO       ; Untyped                                               ;
; INPUT_B_IS_CONSTANT                            ; NO       ; Untyped                                               ;
; USE_EAB                                        ; OFF      ; Untyped                                               ;
; MAXIMIZE_SPEED                                 ; 6        ; Untyped                                               ;
; DEVICE_FAMILY                                  ; MAX 10   ; Untyped                                               ;
; CARRY_CHAIN                                    ; MANUAL   ; Untyped                                               ;
; APEX20K_TECHNOLOGY_MAPPER                      ; LUT      ; TECH_MAPPER_APEX20K                                   ;
; DEDICATED_MULTIPLIER_CIRCUITRY                 ; AUTO     ; Untyped                                               ;
; DEDICATED_MULTIPLIER_MIN_INPUT_WIDTH_FOR_AUTO  ; 0        ; Untyped                                               ;
; DEDICATED_MULTIPLIER_MIN_OUTPUT_WIDTH_FOR_AUTO ; 0        ; Untyped                                               ;
; CBXI_PARAMETER                                 ; mult_gfs ; Untyped                                               ;
; INPUT_A_FIXED_VALUE                            ; Bx       ; Untyped                                               ;
; INPUT_B_FIXED_VALUE                            ; Bx       ; Untyped                                               ;
; USE_AHDL_IMPLEMENTATION                        ; OFF      ; Untyped                                               ;
+------------------------------------------------+----------+-------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: sample_top:\sample_on:sample1|lpm_mult:Mult1 ;
+------------------------------------------------+----------+-----------------------------------+
; Parameter Name                                 ; Value    ; Type                              ;
+------------------------------------------------+----------+-----------------------------------+
; AUTO_CARRY_CHAINS                              ; ON       ; AUTO_CARRY                        ;
; IGNORE_CARRY_BUFFERS                           ; OFF      ; IGNORE_CARRY                      ;
; AUTO_CASCADE_CHAINS                            ; ON       ; AUTO_CASCADE                      ;
; IGNORE_CASCADE_BUFFERS                         ; OFF      ; IGNORE_CASCADE                    ;
; LPM_WIDTHA                                     ; 13       ; Untyped                           ;
; LPM_WIDTHB                                     ; 7        ; Untyped                           ;
; LPM_WIDTHP                                     ; 20       ; Untyped                           ;
; LPM_WIDTHR                                     ; 20       ; Untyped                           ;
; LPM_WIDTHS                                     ; 1        ; Untyped                           ;
; LPM_REPRESENTATION                             ; SIGNED   ; Untyped                           ;
; LPM_PIPELINE                                   ; 0        ; Untyped                           ;
; LATENCY                                        ; 0        ; Untyped                           ;
; INPUT_A_IS_CONSTANT                            ; NO       ; Untyped                           ;
; INPUT_B_IS_CONSTANT                            ; NO       ; Untyped                           ;
; USE_EAB                                        ; OFF      ; Untyped                           ;
; MAXIMIZE_SPEED                                 ; 6        ; Untyped                           ;
; DEVICE_FAMILY                                  ; MAX 10   ; Untyped                           ;
; CARRY_CHAIN                                    ; MANUAL   ; Untyped                           ;
; APEX20K_TECHNOLOGY_MAPPER                      ; LUT      ; TECH_MAPPER_APEX20K               ;
; DEDICATED_MULTIPLIER_CIRCUITRY                 ; AUTO     ; Untyped                           ;
; DEDICATED_MULTIPLIER_MIN_INPUT_WIDTH_FOR_AUTO  ; 0        ; Untyped                           ;
; DEDICATED_MULTIPLIER_MIN_OUTPUT_WIDTH_FOR_AUTO ; 0        ; Untyped                           ;
; CBXI_PARAMETER                                 ; mult_4fs ; Untyped                           ;
; INPUT_A_FIXED_VALUE                            ; Bx       ; Untyped                           ;
; INPUT_B_FIXED_VALUE                            ; Bx       ; Untyped                           ;
; USE_AHDL_IMPLEMENTATION                        ; OFF      ; Untyped                           ;
+------------------------------------------------+----------+-----------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: sample_top:\sample_on:sample1|lpm_mult:Mult0 ;
+------------------------------------------------+----------+-----------------------------------+
; Parameter Name                                 ; Value    ; Type                              ;
+------------------------------------------------+----------+-----------------------------------+
; AUTO_CARRY_CHAINS                              ; ON       ; AUTO_CARRY                        ;
; IGNORE_CARRY_BUFFERS                           ; OFF      ; IGNORE_CARRY                      ;
; AUTO_CASCADE_CHAINS                            ; ON       ; AUTO_CASCADE                      ;
; IGNORE_CASCADE_BUFFERS                         ; OFF      ; IGNORE_CASCADE                    ;
; LPM_WIDTHA                                     ; 13       ; Untyped                           ;
; LPM_WIDTHB                                     ; 7        ; Untyped                           ;
; LPM_WIDTHP                                     ; 20       ; Untyped                           ;
; LPM_WIDTHR                                     ; 20       ; Untyped                           ;
; LPM_WIDTHS                                     ; 1        ; Untyped                           ;
; LPM_REPRESENTATION                             ; SIGNED   ; Untyped                           ;
; LPM_PIPELINE                                   ; 0        ; Untyped                           ;
; LATENCY                                        ; 0        ; Untyped                           ;
; INPUT_A_IS_CONSTANT                            ; NO       ; Untyped                           ;
; INPUT_B_IS_CONSTANT                            ; NO       ; Untyped                           ;
; USE_EAB                                        ; OFF      ; Untyped                           ;
; MAXIMIZE_SPEED                                 ; 6        ; Untyped                           ;
; DEVICE_FAMILY                                  ; MAX 10   ; Untyped                           ;
; CARRY_CHAIN                                    ; MANUAL   ; Untyped                           ;
; APEX20K_TECHNOLOGY_MAPPER                      ; LUT      ; TECH_MAPPER_APEX20K               ;
; DEDICATED_MULTIPLIER_CIRCUITRY                 ; AUTO     ; Untyped                           ;
; DEDICATED_MULTIPLIER_MIN_INPUT_WIDTH_FOR_AUTO  ; 0        ; Untyped                           ;
; DEDICATED_MULTIPLIER_MIN_OUTPUT_WIDTH_FOR_AUTO ; 0        ; Untyped                           ;
; CBXI_PARAMETER                                 ; mult_4fs ; Untyped                           ;
; INPUT_A_FIXED_VALUE                            ; Bx       ; Untyped                           ;
; INPUT_B_FIXED_VALUE                            ; Bx       ; Untyped                           ;
; USE_AHDL_IMPLEMENTATION                        ; OFF      ; Untyped                           ;
+------------------------------------------------+----------+-----------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: SID_top:\sid_on:sid2|SID_postFilterSum:postfilter|lpm_mult:Mult0 ;
+------------------------------------------------+----------+-------------------------------------------------------+
; Parameter Name                                 ; Value    ; Type                                                  ;
+------------------------------------------------+----------+-------------------------------------------------------+
; AUTO_CARRY_CHAINS                              ; ON       ; AUTO_CARRY                                            ;
; IGNORE_CARRY_BUFFERS                           ; OFF      ; IGNORE_CARRY                                          ;
; AUTO_CASCADE_CHAINS                            ; ON       ; AUTO_CASCADE                                          ;
; IGNORE_CASCADE_BUFFERS                         ; OFF      ; IGNORE_CASCADE                                        ;
; LPM_WIDTHA                                     ; 18       ; Untyped                                               ;
; LPM_WIDTHB                                     ; 8        ; Untyped                                               ;
; LPM_WIDTHP                                     ; 26       ; Untyped                                               ;
; LPM_WIDTHR                                     ; 26       ; Untyped                                               ;
; LPM_WIDTHS                                     ; 1        ; Untyped                                               ;
; LPM_REPRESENTATION                             ; SIGNED   ; Untyped                                               ;
; LPM_PIPELINE                                   ; 0        ; Untyped                                               ;
; LATENCY                                        ; 0        ; Untyped                                               ;
; INPUT_A_IS_CONSTANT                            ; NO       ; Untyped                                               ;
; INPUT_B_IS_CONSTANT                            ; NO       ; Untyped                                               ;
; USE_EAB                                        ; OFF      ; Untyped                                               ;
; MAXIMIZE_SPEED                                 ; 6        ; Untyped                                               ;
; DEVICE_FAMILY                                  ; MAX 10   ; Untyped                                               ;
; CARRY_CHAIN                                    ; MANUAL   ; Untyped                                               ;
; APEX20K_TECHNOLOGY_MAPPER                      ; LUT      ; TECH_MAPPER_APEX20K                                   ;
; DEDICATED_MULTIPLIER_CIRCUITRY                 ; AUTO     ; Untyped                                               ;
; DEDICATED_MULTIPLIER_MIN_INPUT_WIDTH_FOR_AUTO  ; 0        ; Untyped                                               ;
; DEDICATED_MULTIPLIER_MIN_OUTPUT_WIDTH_FOR_AUTO ; 0        ; Untyped                                               ;
; CBXI_PARAMETER                                 ; mult_gfs ; Untyped                                               ;
; INPUT_A_FIXED_VALUE                            ; Bx       ; Untyped                                               ;
; INPUT_B_FIXED_VALUE                            ; Bx       ; Untyped                                               ;
; USE_AHDL_IMPLEMENTATION                        ; OFF      ; Untyped                                               ;
+------------------------------------------------+----------+-------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: sample_top:\sample_on:sample1|sample_adpcm:adpcm_decoder|lpm_mult:Mult0 ;
+------------------------------------------------+----------+--------------------------------------------------------------+
; Parameter Name                                 ; Value    ; Type                                                         ;
+------------------------------------------------+----------+--------------------------------------------------------------+
; AUTO_CARRY_CHAINS                              ; ON       ; AUTO_CARRY                                                   ;
; IGNORE_CARRY_BUFFERS                           ; OFF      ; IGNORE_CARRY                                                 ;
; AUTO_CASCADE_CHAINS                            ; ON       ; AUTO_CASCADE                                                 ;
; IGNORE_CASCADE_BUFFERS                         ; OFF      ; IGNORE_CASCADE                                               ;
; LPM_WIDTHA                                     ; 5        ; Untyped                                                      ;
; LPM_WIDTHB                                     ; 16       ; Untyped                                                      ;
; LPM_WIDTHP                                     ; 21       ; Untyped                                                      ;
; LPM_WIDTHR                                     ; 21       ; Untyped                                                      ;
; LPM_WIDTHS                                     ; 1        ; Untyped                                                      ;
; LPM_REPRESENTATION                             ; SIGNED   ; Untyped                                                      ;
; LPM_PIPELINE                                   ; 0        ; Untyped                                                      ;
; LATENCY                                        ; 0        ; Untyped                                                      ;
; INPUT_A_IS_CONSTANT                            ; NO       ; Untyped                                                      ;
; INPUT_B_IS_CONSTANT                            ; NO       ; Untyped                                                      ;
; USE_EAB                                        ; OFF      ; Untyped                                                      ;
; MAXIMIZE_SPEED                                 ; 5        ; Untyped                                                      ;
; DEVICE_FAMILY                                  ; MAX 10   ; Untyped                                                      ;
; CARRY_CHAIN                                    ; MANUAL   ; Untyped                                                      ;
; APEX20K_TECHNOLOGY_MAPPER                      ; LUT      ; TECH_MAPPER_APEX20K                                          ;
; DEDICATED_MULTIPLIER_CIRCUITRY                 ; AUTO     ; Untyped                                                      ;
; DEDICATED_MULTIPLIER_MIN_INPUT_WIDTH_FOR_AUTO  ; 0        ; Untyped                                                      ;
; DEDICATED_MULTIPLIER_MIN_OUTPUT_WIDTH_FOR_AUTO ; 0        ; Untyped                                                      ;
; CBXI_PARAMETER                                 ; mult_5fs ; Untyped                                                      ;
; INPUT_A_FIXED_VALUE                            ; Bx       ; Untyped                                                      ;
; INPUT_B_FIXED_VALUE                            ; Bx       ; Untyped                                                      ;
; USE_AHDL_IMPLEMENTATION                        ; OFF      ; Untyped                                                      ;
+------------------------------------------------+----------+--------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: SID_top:\sid_on:sid1|SID_amplitudeModulator:vol_abc|lpm_mult:Mult0 ;
+------------------------------------------------+----------+---------------------------------------------------------+
; Parameter Name                                 ; Value    ; Type                                                    ;
+------------------------------------------------+----------+---------------------------------------------------------+
; AUTO_CARRY_CHAINS                              ; ON       ; AUTO_CARRY                                              ;
; IGNORE_CARRY_BUFFERS                           ; OFF      ; IGNORE_CARRY                                            ;
; AUTO_CASCADE_CHAINS                            ; ON       ; AUTO_CASCADE                                            ;
; IGNORE_CASCADE_BUFFERS                         ; OFF      ; IGNORE_CASCADE                                          ;
; LPM_WIDTHA                                     ; 9        ; Untyped                                                 ;
; LPM_WIDTHB                                     ; 12       ; Untyped                                                 ;
; LPM_WIDTHP                                     ; 21       ; Untyped                                                 ;
; LPM_WIDTHR                                     ; 21       ; Untyped                                                 ;
; LPM_WIDTHS                                     ; 1        ; Untyped                                                 ;
; LPM_REPRESENTATION                             ; SIGNED   ; Untyped                                                 ;
; LPM_PIPELINE                                   ; 0        ; Untyped                                                 ;
; LATENCY                                        ; 0        ; Untyped                                                 ;
; INPUT_A_IS_CONSTANT                            ; NO       ; Untyped                                                 ;
; INPUT_B_IS_CONSTANT                            ; NO       ; Untyped                                                 ;
; USE_EAB                                        ; OFF      ; Untyped                                                 ;
; MAXIMIZE_SPEED                                 ; 6        ; Untyped                                                 ;
; DEVICE_FAMILY                                  ; MAX 10   ; Untyped                                                 ;
; CARRY_CHAIN                                    ; MANUAL   ; Untyped                                                 ;
; APEX20K_TECHNOLOGY_MAPPER                      ; LUT      ; TECH_MAPPER_APEX20K                                     ;
; DEDICATED_MULTIPLIER_CIRCUITRY                 ; AUTO     ; Untyped                                                 ;
; DEDICATED_MULTIPLIER_MIN_INPUT_WIDTH_FOR_AUTO  ; 0        ; Untyped                                                 ;
; DEDICATED_MULTIPLIER_MIN_OUTPUT_WIDTH_FOR_AUTO ; 0        ; Untyped                                                 ;
; CBXI_PARAMETER                                 ; mult_6fs ; Untyped                                                 ;
; INPUT_A_FIXED_VALUE                            ; Bx       ; Untyped                                                 ;
; INPUT_B_FIXED_VALUE                            ; Bx       ; Untyped                                                 ;
; USE_AHDL_IMPLEMENTATION                        ; OFF      ; Untyped                                                 ;
+------------------------------------------------+----------+---------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: SID_top:\sid_on:sid1|SID_filter:variable_state_filter|lpm_mult:Mult4 ;
+------------------------------------------------+----------+-----------------------------------------------------------+
; Parameter Name                                 ; Value    ; Type                                                      ;
+------------------------------------------------+----------+-----------------------------------------------------------+
; AUTO_CARRY_CHAINS                              ; ON       ; AUTO_CARRY                                                ;
; IGNORE_CARRY_BUFFERS                           ; OFF      ; IGNORE_CARRY                                              ;
; AUTO_CASCADE_CHAINS                            ; ON       ; AUTO_CASCADE                                              ;
; IGNORE_CASCADE_BUFFERS                         ; OFF      ; IGNORE_CASCADE                                            ;
; LPM_WIDTHA                                     ; 14       ; Untyped                                                   ;
; LPM_WIDTHB                                     ; 36       ; Untyped                                                   ;
; LPM_WIDTHP                                     ; 50       ; Untyped                                                   ;
; LPM_WIDTHR                                     ; 50       ; Untyped                                                   ;
; LPM_WIDTHS                                     ; 1        ; Untyped                                                   ;
; LPM_REPRESENTATION                             ; SIGNED   ; Untyped                                                   ;
; LPM_PIPELINE                                   ; 0        ; Untyped                                                   ;
; LATENCY                                        ; 0        ; Untyped                                                   ;
; INPUT_A_IS_CONSTANT                            ; NO       ; Untyped                                                   ;
; INPUT_B_IS_CONSTANT                            ; NO       ; Untyped                                                   ;
; USE_EAB                                        ; OFF      ; Untyped                                                   ;
; MAXIMIZE_SPEED                                 ; 5        ; Untyped                                                   ;
; DEVICE_FAMILY                                  ; MAX 10   ; Untyped                                                   ;
; CARRY_CHAIN                                    ; MANUAL   ; Untyped                                                   ;
; APEX20K_TECHNOLOGY_MAPPER                      ; LUT      ; TECH_MAPPER_APEX20K                                       ;
; DEDICATED_MULTIPLIER_CIRCUITRY                 ; AUTO     ; Untyped                                                   ;
; DEDICATED_MULTIPLIER_MIN_INPUT_WIDTH_FOR_AUTO  ; 0        ; Untyped                                                   ;
; DEDICATED_MULTIPLIER_MIN_OUTPUT_WIDTH_FOR_AUTO ; 0        ; Untyped                                                   ;
; CBXI_PARAMETER                                 ; mult_pgs ; Untyped                                                   ;
; INPUT_A_FIXED_VALUE                            ; Bx       ; Untyped                                                   ;
; INPUT_B_FIXED_VALUE                            ; Bx       ; Untyped                                                   ;
; USE_AHDL_IMPLEMENTATION                        ; OFF      ; Untyped                                                   ;
+------------------------------------------------+----------+-----------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: SID_top:\sid_on:sid2|SID_amplitudeModulator:vol_abc|lpm_mult:Mult0 ;
+------------------------------------------------+----------+---------------------------------------------------------+
; Parameter Name                                 ; Value    ; Type                                                    ;
+------------------------------------------------+----------+---------------------------------------------------------+
; AUTO_CARRY_CHAINS                              ; ON       ; AUTO_CARRY                                              ;
; IGNORE_CARRY_BUFFERS                           ; OFF      ; IGNORE_CARRY                                            ;
; AUTO_CASCADE_CHAINS                            ; ON       ; AUTO_CASCADE                                            ;
; IGNORE_CASCADE_BUFFERS                         ; OFF      ; IGNORE_CASCADE                                          ;
; LPM_WIDTHA                                     ; 9        ; Untyped                                                 ;
; LPM_WIDTHB                                     ; 12       ; Untyped                                                 ;
; LPM_WIDTHP                                     ; 21       ; Untyped                                                 ;
; LPM_WIDTHR                                     ; 21       ; Untyped                                                 ;
; LPM_WIDTHS                                     ; 1        ; Untyped                                                 ;
; LPM_REPRESENTATION                             ; SIGNED   ; Untyped                                                 ;
; LPM_PIPELINE                                   ; 0        ; Untyped                                                 ;
; LATENCY                                        ; 0        ; Untyped                                                 ;
; INPUT_A_IS_CONSTANT                            ; NO       ; Untyped                                                 ;
; INPUT_B_IS_CONSTANT                            ; NO       ; Untyped                                                 ;
; USE_EAB                                        ; OFF      ; Untyped                                                 ;
; MAXIMIZE_SPEED                                 ; 6        ; Untyped                                                 ;
; DEVICE_FAMILY                                  ; MAX 10   ; Untyped                                                 ;
; CARRY_CHAIN                                    ; MANUAL   ; Untyped                                                 ;
; APEX20K_TECHNOLOGY_MAPPER                      ; LUT      ; TECH_MAPPER_APEX20K                                     ;
; DEDICATED_MULTIPLIER_CIRCUITRY                 ; AUTO     ; Untyped                                                 ;
; DEDICATED_MULTIPLIER_MIN_INPUT_WIDTH_FOR_AUTO  ; 0        ; Untyped                                                 ;
; DEDICATED_MULTIPLIER_MIN_OUTPUT_WIDTH_FOR_AUTO ; 0        ; Untyped                                                 ;
; CBXI_PARAMETER                                 ; mult_6fs ; Untyped                                                 ;
; INPUT_A_FIXED_VALUE                            ; Bx       ; Untyped                                                 ;
; INPUT_B_FIXED_VALUE                            ; Bx       ; Untyped                                                 ;
; USE_AHDL_IMPLEMENTATION                        ; OFF      ; Untyped                                                 ;
+------------------------------------------------+----------+---------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: SID_top:\sid_on:sid2|SID_filter:variable_state_filter|lpm_mult:Mult4 ;
+------------------------------------------------+----------+-----------------------------------------------------------+
; Parameter Name                                 ; Value    ; Type                                                      ;
+------------------------------------------------+----------+-----------------------------------------------------------+
; AUTO_CARRY_CHAINS                              ; ON       ; AUTO_CARRY                                                ;
; IGNORE_CARRY_BUFFERS                           ; OFF      ; IGNORE_CARRY                                              ;
; AUTO_CASCADE_CHAINS                            ; ON       ; AUTO_CASCADE                                              ;
; IGNORE_CASCADE_BUFFERS                         ; OFF      ; IGNORE_CASCADE                                            ;
; LPM_WIDTHA                                     ; 14       ; Untyped                                                   ;
; LPM_WIDTHB                                     ; 36       ; Untyped                                                   ;
; LPM_WIDTHP                                     ; 50       ; Untyped                                                   ;
; LPM_WIDTHR                                     ; 50       ; Untyped                                                   ;
; LPM_WIDTHS                                     ; 1        ; Untyped                                                   ;
; LPM_REPRESENTATION                             ; SIGNED   ; Untyped                                                   ;
; LPM_PIPELINE                                   ; 0        ; Untyped                                                   ;
; LATENCY                                        ; 0        ; Untyped                                                   ;
; INPUT_A_IS_CONSTANT                            ; NO       ; Untyped                                                   ;
; INPUT_B_IS_CONSTANT                            ; NO       ; Untyped                                                   ;
; USE_EAB                                        ; OFF      ; Untyped                                                   ;
; MAXIMIZE_SPEED                                 ; 5        ; Untyped                                                   ;
; DEVICE_FAMILY                                  ; MAX 10   ; Untyped                                                   ;
; CARRY_CHAIN                                    ; MANUAL   ; Untyped                                                   ;
; APEX20K_TECHNOLOGY_MAPPER                      ; LUT      ; TECH_MAPPER_APEX20K                                       ;
; DEDICATED_MULTIPLIER_CIRCUITRY                 ; AUTO     ; Untyped                                                   ;
; DEDICATED_MULTIPLIER_MIN_INPUT_WIDTH_FOR_AUTO  ; 0        ; Untyped                                                   ;
; DEDICATED_MULTIPLIER_MIN_OUTPUT_WIDTH_FOR_AUTO ; 0        ; Untyped                                                   ;
; CBXI_PARAMETER                                 ; mult_pgs ; Untyped                                                   ;
; INPUT_A_FIXED_VALUE                            ; Bx       ; Untyped                                                   ;
; INPUT_B_FIXED_VALUE                            ; Bx       ; Untyped                                                   ;
; USE_AHDL_IMPLEMENTATION                        ; OFF      ; Untyped                                                   ;
+------------------------------------------------+----------+-----------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: SID_top:\sid_on:sid1|SID_filter:variable_state_filter|lpm_mult:Mult3 ;
+------------------------------------------------+----------+-----------------------------------------------------------+
; Parameter Name                                 ; Value    ; Type                                                      ;
+------------------------------------------------+----------+-----------------------------------------------------------+
; AUTO_CARRY_CHAINS                              ; ON       ; AUTO_CARRY                                                ;
; IGNORE_CARRY_BUFFERS                           ; OFF      ; IGNORE_CARRY                                              ;
; AUTO_CASCADE_CHAINS                            ; ON       ; AUTO_CASCADE                                              ;
; IGNORE_CASCADE_BUFFERS                         ; OFF      ; IGNORE_CASCADE                                            ;
; LPM_WIDTHA                                     ; 14       ; Untyped                                                   ;
; LPM_WIDTHB                                     ; 36       ; Untyped                                                   ;
; LPM_WIDTHP                                     ; 50       ; Untyped                                                   ;
; LPM_WIDTHR                                     ; 50       ; Untyped                                                   ;
; LPM_WIDTHS                                     ; 1        ; Untyped                                                   ;
; LPM_REPRESENTATION                             ; SIGNED   ; Untyped                                                   ;
; LPM_PIPELINE                                   ; 0        ; Untyped                                                   ;
; LATENCY                                        ; 0        ; Untyped                                                   ;
; INPUT_A_IS_CONSTANT                            ; NO       ; Untyped                                                   ;
; INPUT_B_IS_CONSTANT                            ; NO       ; Untyped                                                   ;
; USE_EAB                                        ; OFF      ; Untyped                                                   ;
; MAXIMIZE_SPEED                                 ; 5        ; Untyped                                                   ;
; DEVICE_FAMILY                                  ; MAX 10   ; Untyped                                                   ;
; CARRY_CHAIN                                    ; MANUAL   ; Untyped                                                   ;
; APEX20K_TECHNOLOGY_MAPPER                      ; LUT      ; TECH_MAPPER_APEX20K                                       ;
; DEDICATED_MULTIPLIER_CIRCUITRY                 ; AUTO     ; Untyped                                                   ;
; DEDICATED_MULTIPLIER_MIN_INPUT_WIDTH_FOR_AUTO  ; 0        ; Untyped                                                   ;
; DEDICATED_MULTIPLIER_MIN_OUTPUT_WIDTH_FOR_AUTO ; 0        ; Untyped                                                   ;
; CBXI_PARAMETER                                 ; mult_pgs ; Untyped                                                   ;
; INPUT_A_FIXED_VALUE                            ; Bx       ; Untyped                                                   ;
; INPUT_B_FIXED_VALUE                            ; Bx       ; Untyped                                                   ;
; USE_AHDL_IMPLEMENTATION                        ; OFF      ; Untyped                                                   ;
+------------------------------------------------+----------+-----------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: SID_top:\sid_on:sid2|SID_filter:variable_state_filter|lpm_mult:Mult3 ;
+------------------------------------------------+----------+-----------------------------------------------------------+
; Parameter Name                                 ; Value    ; Type                                                      ;
+------------------------------------------------+----------+-----------------------------------------------------------+
; AUTO_CARRY_CHAINS                              ; ON       ; AUTO_CARRY                                                ;
; IGNORE_CARRY_BUFFERS                           ; OFF      ; IGNORE_CARRY                                              ;
; AUTO_CASCADE_CHAINS                            ; ON       ; AUTO_CASCADE                                              ;
; IGNORE_CASCADE_BUFFERS                         ; OFF      ; IGNORE_CASCADE                                            ;
; LPM_WIDTHA                                     ; 14       ; Untyped                                                   ;
; LPM_WIDTHB                                     ; 36       ; Untyped                                                   ;
; LPM_WIDTHP                                     ; 50       ; Untyped                                                   ;
; LPM_WIDTHR                                     ; 50       ; Untyped                                                   ;
; LPM_WIDTHS                                     ; 1        ; Untyped                                                   ;
; LPM_REPRESENTATION                             ; SIGNED   ; Untyped                                                   ;
; LPM_PIPELINE                                   ; 0        ; Untyped                                                   ;
; LATENCY                                        ; 0        ; Untyped                                                   ;
; INPUT_A_IS_CONSTANT                            ; NO       ; Untyped                                                   ;
; INPUT_B_IS_CONSTANT                            ; NO       ; Untyped                                                   ;
; USE_EAB                                        ; OFF      ; Untyped                                                   ;
; MAXIMIZE_SPEED                                 ; 5        ; Untyped                                                   ;
; DEVICE_FAMILY                                  ; MAX 10   ; Untyped                                                   ;
; CARRY_CHAIN                                    ; MANUAL   ; Untyped                                                   ;
; APEX20K_TECHNOLOGY_MAPPER                      ; LUT      ; TECH_MAPPER_APEX20K                                       ;
; DEDICATED_MULTIPLIER_CIRCUITRY                 ; AUTO     ; Untyped                                                   ;
; DEDICATED_MULTIPLIER_MIN_INPUT_WIDTH_FOR_AUTO  ; 0        ; Untyped                                                   ;
; DEDICATED_MULTIPLIER_MIN_OUTPUT_WIDTH_FOR_AUTO ; 0        ; Untyped                                                   ;
; CBXI_PARAMETER                                 ; mult_pgs ; Untyped                                                   ;
; INPUT_A_FIXED_VALUE                            ; Bx       ; Untyped                                                   ;
; INPUT_B_FIXED_VALUE                            ; Bx       ; Untyped                                                   ;
; USE_AHDL_IMPLEMENTATION                        ; OFF      ; Untyped                                                   ;
+------------------------------------------------+----------+-----------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: SID_top:\sid_on:sid1|SID_filter:variable_state_filter|lpm_mult:Mult0 ;
+------------------------------------------------+----------+-----------------------------------------------------------+
; Parameter Name                                 ; Value    ; Type                                                      ;
+------------------------------------------------+----------+-----------------------------------------------------------+
; AUTO_CARRY_CHAINS                              ; ON       ; AUTO_CARRY                                                ;
; IGNORE_CARRY_BUFFERS                           ; OFF      ; IGNORE_CARRY                                              ;
; AUTO_CASCADE_CHAINS                            ; ON       ; AUTO_CASCADE                                              ;
; IGNORE_CASCADE_BUFFERS                         ; OFF      ; IGNORE_CASCADE                                            ;
; LPM_WIDTHA                                     ; 36       ; Untyped                                                   ;
; LPM_WIDTHB                                     ; 18       ; Untyped                                                   ;
; LPM_WIDTHP                                     ; 54       ; Untyped                                                   ;
; LPM_WIDTHR                                     ; 54       ; Untyped                                                   ;
; LPM_WIDTHS                                     ; 1        ; Untyped                                                   ;
; LPM_REPRESENTATION                             ; SIGNED   ; Untyped                                                   ;
; LPM_PIPELINE                                   ; 0        ; Untyped                                                   ;
; LATENCY                                        ; 0        ; Untyped                                                   ;
; INPUT_A_IS_CONSTANT                            ; NO       ; Untyped                                                   ;
; INPUT_B_IS_CONSTANT                            ; NO       ; Untyped                                                   ;
; USE_EAB                                        ; OFF      ; Untyped                                                   ;
; MAXIMIZE_SPEED                                 ; 5        ; Untyped                                                   ;
; DEVICE_FAMILY                                  ; MAX 10   ; Untyped                                                   ;
; CARRY_CHAIN                                    ; MANUAL   ; Untyped                                                   ;
; APEX20K_TECHNOLOGY_MAPPER                      ; LUT      ; TECH_MAPPER_APEX20K                                       ;
; DEDICATED_MULTIPLIER_CIRCUITRY                 ; AUTO     ; Untyped                                                   ;
; DEDICATED_MULTIPLIER_MIN_INPUT_WIDTH_FOR_AUTO  ; 0        ; Untyped                                                   ;
; DEDICATED_MULTIPLIER_MIN_OUTPUT_WIDTH_FOR_AUTO ; 0        ; Untyped                                                   ;
; CBXI_PARAMETER                                 ; mult_1hs ; Untyped                                                   ;
; INPUT_A_FIXED_VALUE                            ; Bx       ; Untyped                                                   ;
; INPUT_B_FIXED_VALUE                            ; Bx       ; Untyped                                                   ;
; USE_AHDL_IMPLEMENTATION                        ; OFF      ; Untyped                                                   ;
+------------------------------------------------+----------+-----------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: SID_top:\sid_on:sid2|SID_filter:variable_state_filter|lpm_mult:Mult0 ;
+------------------------------------------------+----------+-----------------------------------------------------------+
; Parameter Name                                 ; Value    ; Type                                                      ;
+------------------------------------------------+----------+-----------------------------------------------------------+
; AUTO_CARRY_CHAINS                              ; ON       ; AUTO_CARRY                                                ;
; IGNORE_CARRY_BUFFERS                           ; OFF      ; IGNORE_CARRY                                              ;
; AUTO_CASCADE_CHAINS                            ; ON       ; AUTO_CASCADE                                              ;
; IGNORE_CASCADE_BUFFERS                         ; OFF      ; IGNORE_CASCADE                                            ;
; LPM_WIDTHA                                     ; 36       ; Untyped                                                   ;
; LPM_WIDTHB                                     ; 18       ; Untyped                                                   ;
; LPM_WIDTHP                                     ; 54       ; Untyped                                                   ;
; LPM_WIDTHR                                     ; 54       ; Untyped                                                   ;
; LPM_WIDTHS                                     ; 1        ; Untyped                                                   ;
; LPM_REPRESENTATION                             ; SIGNED   ; Untyped                                                   ;
; LPM_PIPELINE                                   ; 0        ; Untyped                                                   ;
; LATENCY                                        ; 0        ; Untyped                                                   ;
; INPUT_A_IS_CONSTANT                            ; NO       ; Untyped                                                   ;
; INPUT_B_IS_CONSTANT                            ; NO       ; Untyped                                                   ;
; USE_EAB                                        ; OFF      ; Untyped                                                   ;
; MAXIMIZE_SPEED                                 ; 5        ; Untyped                                                   ;
; DEVICE_FAMILY                                  ; MAX 10   ; Untyped                                                   ;
; CARRY_CHAIN                                    ; MANUAL   ; Untyped                                                   ;
; APEX20K_TECHNOLOGY_MAPPER                      ; LUT      ; TECH_MAPPER_APEX20K                                       ;
; DEDICATED_MULTIPLIER_CIRCUITRY                 ; AUTO     ; Untyped                                                   ;
; DEDICATED_MULTIPLIER_MIN_INPUT_WIDTH_FOR_AUTO  ; 0        ; Untyped                                                   ;
; DEDICATED_MULTIPLIER_MIN_OUTPUT_WIDTH_FOR_AUTO ; 0        ; Untyped                                                   ;
; CBXI_PARAMETER                                 ; mult_1hs ; Untyped                                                   ;
; INPUT_A_FIXED_VALUE                            ; Bx       ; Untyped                                                   ;
; INPUT_B_FIXED_VALUE                            ; Bx       ; Untyped                                                   ;
; USE_AHDL_IMPLEMENTATION                        ; OFF      ; Untyped                                                   ;
+------------------------------------------------+----------+-----------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: SID_f_distortion_mux:\sid_on:f_distortion_mux|SID_f_distortion:f_distortion|lpm_mult:Mult0 ;
+------------------------------------------------+----------+---------------------------------------------------------------------------------+
; Parameter Name                                 ; Value    ; Type                                                                            ;
+------------------------------------------------+----------+---------------------------------------------------------------------------------+
; AUTO_CARRY_CHAINS                              ; ON       ; AUTO_CARRY                                                                      ;
; IGNORE_CARRY_BUFFERS                           ; OFF      ; IGNORE_CARRY                                                                    ;
; AUTO_CASCADE_CHAINS                            ; ON       ; AUTO_CASCADE                                                                    ;
; IGNORE_CASCADE_BUFFERS                         ; OFF      ; IGNORE_CASCADE                                                                  ;
; LPM_WIDTHA                                     ; 13       ; Untyped                                                                         ;
; LPM_WIDTHB                                     ; 12       ; Untyped                                                                         ;
; LPM_WIDTHP                                     ; 25       ; Untyped                                                                         ;
; LPM_WIDTHR                                     ; 25       ; Untyped                                                                         ;
; LPM_WIDTHS                                     ; 1        ; Untyped                                                                         ;
; LPM_REPRESENTATION                             ; UNSIGNED ; Untyped                                                                         ;
; LPM_PIPELINE                                   ; 0        ; Untyped                                                                         ;
; LATENCY                                        ; 0        ; Untyped                                                                         ;
; INPUT_A_IS_CONSTANT                            ; NO       ; Untyped                                                                         ;
; INPUT_B_IS_CONSTANT                            ; NO       ; Untyped                                                                         ;
; USE_EAB                                        ; OFF      ; Untyped                                                                         ;
; MAXIMIZE_SPEED                                 ; 6        ; Untyped                                                                         ;
; DEVICE_FAMILY                                  ; MAX 10   ; Untyped                                                                         ;
; CARRY_CHAIN                                    ; MANUAL   ; Untyped                                                                         ;
; APEX20K_TECHNOLOGY_MAPPER                      ; LUT      ; TECH_MAPPER_APEX20K                                                             ;
; DEDICATED_MULTIPLIER_CIRCUITRY                 ; AUTO     ; Untyped                                                                         ;
; DEDICATED_MULTIPLIER_MIN_INPUT_WIDTH_FOR_AUTO  ; 0        ; Untyped                                                                         ;
; DEDICATED_MULTIPLIER_MIN_OUTPUT_WIDTH_FOR_AUTO ; 0        ; Untyped                                                                         ;
; CBXI_PARAMETER                                 ; mult_ons ; Untyped                                                                         ;
; INPUT_A_FIXED_VALUE                            ; Bx       ; Untyped                                                                         ;
; INPUT_B_FIXED_VALUE                            ; Bx       ; Untyped                                                                         ;
; USE_AHDL_IMPLEMENTATION                        ; OFF      ; Untyped                                                                         ;
+------------------------------------------------+----------+---------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; lpm_shiftreg Parameter Settings by Entity Instance                                                                                                                                                                         ;
+----------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Name                       ; Value                                                                                                                                                                                         ;
+----------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Number of entity instances ; 1                                                                                                                                                                                             ;
; Entity Instance            ; flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|lpm_shiftreg:ufm_data_shiftreg ;
;     -- LPM_WIDTH           ; 32                                                                                                                                                                                            ;
;     -- LPM_DIRECTION       ; LEFT                                                                                                                                                                                          ;
+----------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------+
; altshift_taps Parameter Settings by Entity Instance                                                           ;
+----------------------------+----------------------------------------------------------------------------------+
; Name                       ; Value                                                                            ;
+----------------------------+----------------------------------------------------------------------------------+
; Number of entity instances ; 1                                                                                ;
; Entity Instance            ; SID_top:\sid_on:sid2|SID_envelope:envelope_a|altshift_taps:attack_del1_reg_rtl_0 ;
;     -- NUMBER_OF_TAPS      ; 1                                                                                ;
;     -- TAP_DISTANCE        ; 3                                                                                ;
;     -- WIDTH               ; 72                                                                               ;
+----------------------------+----------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------+
; altpll Parameter Settings by Entity Instance                                        ;
+-------------------------------+-----------------------------------------------------+
; Name                          ; Value                                               ;
+-------------------------------+-----------------------------------------------------+
; Number of entity instances    ; 1                                                   ;
; Entity Instance               ; pllv3:\pll_v3_inst:pll_inst|altpll:altpll_component ;
;     -- OPERATION_MODE         ; NORMAL                                              ;
;     -- PLL_TYPE               ; AUTO                                                ;
;     -- PRIMARY_CLOCK          ; INCLK0                                              ;
;     -- INCLK0_INPUT_FREQUENCY ; 20345                                               ;
;     -- INCLK1_INPUT_FREQUENCY ; 0                                                   ;
;     -- VCO_MULTIPLY_BY        ; 0                                                   ;
;     -- VCO_DIVIDE_BY          ; 0                                                   ;
+-------------------------------+-----------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; altsyncram Parameter Settings by Entity Instance                                                                                                                          ;
+-------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------+
; Name                                      ; Value                                                                                                                         ;
+-------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------+
; Number of entity instances                ; 57                                                                                                                            ;
; Entity Instance                           ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:2:sample_ram_inst|altsyncram:ram_block_rtl_0  ;
;     -- OPERATION_MODE                     ; SINGLE_PORT                                                                                                                   ;
;     -- WIDTH_A                            ; 9                                                                                                                             ;
;     -- NUMWORDS_A                         ; 1024                                                                                                                          ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                  ;
;     -- WIDTH_B                            ; 1                                                                                                                             ;
;     -- NUMWORDS_B                         ; 1                                                                                                                             ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                        ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                  ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                          ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                     ;
; Entity Instance                           ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:10:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
;     -- OPERATION_MODE                     ; SINGLE_PORT                                                                                                                   ;
;     -- WIDTH_A                            ; 9                                                                                                                             ;
;     -- NUMWORDS_A                         ; 1024                                                                                                                          ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                  ;
;     -- WIDTH_B                            ; 1                                                                                                                             ;
;     -- NUMWORDS_B                         ; 1                                                                                                                             ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                        ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                  ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                          ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                     ;
; Entity Instance                           ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:18:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
;     -- OPERATION_MODE                     ; SINGLE_PORT                                                                                                                   ;
;     -- WIDTH_A                            ; 9                                                                                                                             ;
;     -- NUMWORDS_A                         ; 1024                                                                                                                          ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                  ;
;     -- WIDTH_B                            ; 1                                                                                                                             ;
;     -- NUMWORDS_B                         ; 1                                                                                                                             ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                        ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                  ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                          ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                     ;
; Entity Instance                           ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:26:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
;     -- OPERATION_MODE                     ; SINGLE_PORT                                                                                                                   ;
;     -- WIDTH_A                            ; 9                                                                                                                             ;
;     -- NUMWORDS_A                         ; 1024                                                                                                                          ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                  ;
;     -- WIDTH_B                            ; 1                                                                                                                             ;
;     -- NUMWORDS_B                         ; 1                                                                                                                             ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                        ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                  ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                          ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                     ;
; Entity Instance                           ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:34:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
;     -- OPERATION_MODE                     ; SINGLE_PORT                                                                                                                   ;
;     -- WIDTH_A                            ; 9                                                                                                                             ;
;     -- NUMWORDS_A                         ; 1024                                                                                                                          ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                  ;
;     -- WIDTH_B                            ; 1                                                                                                                             ;
;     -- NUMWORDS_B                         ; 1                                                                                                                             ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                        ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                  ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                          ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                     ;
; Entity Instance                           ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:42:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
;     -- OPERATION_MODE                     ; SINGLE_PORT                                                                                                                   ;
;     -- WIDTH_A                            ; 9                                                                                                                             ;
;     -- NUMWORDS_A                         ; 1024                                                                                                                          ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                  ;
;     -- WIDTH_B                            ; 1                                                                                                                             ;
;     -- NUMWORDS_B                         ; 1                                                                                                                             ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                        ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                  ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                          ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                     ;
; Entity Instance                           ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:50:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
;     -- OPERATION_MODE                     ; SINGLE_PORT                                                                                                                   ;
;     -- WIDTH_A                            ; 9                                                                                                                             ;
;     -- NUMWORDS_A                         ; 1024                                                                                                                          ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                  ;
;     -- WIDTH_B                            ; 1                                                                                                                             ;
;     -- NUMWORDS_B                         ; 1                                                                                                                             ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                        ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                  ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                          ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                     ;
; Entity Instance                           ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:56:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
;     -- OPERATION_MODE                     ; SINGLE_PORT                                                                                                                   ;
;     -- WIDTH_A                            ; 9                                                                                                                             ;
;     -- NUMWORDS_A                         ; 1024                                                                                                                          ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                  ;
;     -- WIDTH_B                            ; 1                                                                                                                             ;
;     -- NUMWORDS_B                         ; 1                                                                                                                             ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                        ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                  ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                          ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                     ;
; Entity Instance                           ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:0:sample_ram_inst|altsyncram:ram_block_rtl_0  ;
;     -- OPERATION_MODE                     ; SINGLE_PORT                                                                                                                   ;
;     -- WIDTH_A                            ; 9                                                                                                                             ;
;     -- NUMWORDS_A                         ; 1024                                                                                                                          ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                  ;
;     -- WIDTH_B                            ; 1                                                                                                                             ;
;     -- NUMWORDS_B                         ; 1                                                                                                                             ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                        ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                  ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                          ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                     ;
; Entity Instance                           ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:1:sample_ram_inst|altsyncram:ram_block_rtl_0  ;
;     -- OPERATION_MODE                     ; SINGLE_PORT                                                                                                                   ;
;     -- WIDTH_A                            ; 9                                                                                                                             ;
;     -- NUMWORDS_A                         ; 1024                                                                                                                          ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                  ;
;     -- WIDTH_B                            ; 1                                                                                                                             ;
;     -- NUMWORDS_B                         ; 1                                                                                                                             ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                        ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                  ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                          ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                     ;
; Entity Instance                           ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:3:sample_ram_inst|altsyncram:ram_block_rtl_0  ;
;     -- OPERATION_MODE                     ; SINGLE_PORT                                                                                                                   ;
;     -- WIDTH_A                            ; 9                                                                                                                             ;
;     -- NUMWORDS_A                         ; 1024                                                                                                                          ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                  ;
;     -- WIDTH_B                            ; 1                                                                                                                             ;
;     -- NUMWORDS_B                         ; 1                                                                                                                             ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                        ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                  ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                          ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                     ;
; Entity Instance                           ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:4:sample_ram_inst|altsyncram:ram_block_rtl_0  ;
;     -- OPERATION_MODE                     ; SINGLE_PORT                                                                                                                   ;
;     -- WIDTH_A                            ; 9                                                                                                                             ;
;     -- NUMWORDS_A                         ; 1024                                                                                                                          ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                  ;
;     -- WIDTH_B                            ; 1                                                                                                                             ;
;     -- NUMWORDS_B                         ; 1                                                                                                                             ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                        ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                  ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                          ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                     ;
; Entity Instance                           ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:5:sample_ram_inst|altsyncram:ram_block_rtl_0  ;
;     -- OPERATION_MODE                     ; SINGLE_PORT                                                                                                                   ;
;     -- WIDTH_A                            ; 9                                                                                                                             ;
;     -- NUMWORDS_A                         ; 1024                                                                                                                          ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                  ;
;     -- WIDTH_B                            ; 1                                                                                                                             ;
;     -- NUMWORDS_B                         ; 1                                                                                                                             ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                        ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                  ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                          ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                     ;
; Entity Instance                           ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:6:sample_ram_inst|altsyncram:ram_block_rtl_0  ;
;     -- OPERATION_MODE                     ; SINGLE_PORT                                                                                                                   ;
;     -- WIDTH_A                            ; 9                                                                                                                             ;
;     -- NUMWORDS_A                         ; 1024                                                                                                                          ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                  ;
;     -- WIDTH_B                            ; 1                                                                                                                             ;
;     -- NUMWORDS_B                         ; 1                                                                                                                             ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                        ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                  ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                          ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                     ;
; Entity Instance                           ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:7:sample_ram_inst|altsyncram:ram_block_rtl_0  ;
;     -- OPERATION_MODE                     ; SINGLE_PORT                                                                                                                   ;
;     -- WIDTH_A                            ; 9                                                                                                                             ;
;     -- NUMWORDS_A                         ; 1024                                                                                                                          ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                  ;
;     -- WIDTH_B                            ; 1                                                                                                                             ;
;     -- NUMWORDS_B                         ; 1                                                                                                                             ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                        ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                  ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                          ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                     ;
; Entity Instance                           ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:8:sample_ram_inst|altsyncram:ram_block_rtl_0  ;
;     -- OPERATION_MODE                     ; SINGLE_PORT                                                                                                                   ;
;     -- WIDTH_A                            ; 9                                                                                                                             ;
;     -- NUMWORDS_A                         ; 1024                                                                                                                          ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                  ;
;     -- WIDTH_B                            ; 1                                                                                                                             ;
;     -- NUMWORDS_B                         ; 1                                                                                                                             ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                        ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                  ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                          ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                     ;
; Entity Instance                           ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:9:sample_ram_inst|altsyncram:ram_block_rtl_0  ;
;     -- OPERATION_MODE                     ; SINGLE_PORT                                                                                                                   ;
;     -- WIDTH_A                            ; 9                                                                                                                             ;
;     -- NUMWORDS_A                         ; 1024                                                                                                                          ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                  ;
;     -- WIDTH_B                            ; 1                                                                                                                             ;
;     -- NUMWORDS_B                         ; 1                                                                                                                             ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                        ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                  ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                          ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                     ;
; Entity Instance                           ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:11:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
;     -- OPERATION_MODE                     ; SINGLE_PORT                                                                                                                   ;
;     -- WIDTH_A                            ; 9                                                                                                                             ;
;     -- NUMWORDS_A                         ; 1024                                                                                                                          ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                  ;
;     -- WIDTH_B                            ; 1                                                                                                                             ;
;     -- NUMWORDS_B                         ; 1                                                                                                                             ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                        ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                  ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                          ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                     ;
; Entity Instance                           ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:12:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
;     -- OPERATION_MODE                     ; SINGLE_PORT                                                                                                                   ;
;     -- WIDTH_A                            ; 9                                                                                                                             ;
;     -- NUMWORDS_A                         ; 1024                                                                                                                          ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                  ;
;     -- WIDTH_B                            ; 1                                                                                                                             ;
;     -- NUMWORDS_B                         ; 1                                                                                                                             ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                        ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                  ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                          ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                     ;
; Entity Instance                           ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:13:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
;     -- OPERATION_MODE                     ; SINGLE_PORT                                                                                                                   ;
;     -- WIDTH_A                            ; 9                                                                                                                             ;
;     -- NUMWORDS_A                         ; 1024                                                                                                                          ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                  ;
;     -- WIDTH_B                            ; 1                                                                                                                             ;
;     -- NUMWORDS_B                         ; 1                                                                                                                             ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                        ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                  ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                          ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                     ;
; Entity Instance                           ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:14:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
;     -- OPERATION_MODE                     ; SINGLE_PORT                                                                                                                   ;
;     -- WIDTH_A                            ; 9                                                                                                                             ;
;     -- NUMWORDS_A                         ; 1024                                                                                                                          ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                  ;
;     -- WIDTH_B                            ; 1                                                                                                                             ;
;     -- NUMWORDS_B                         ; 1                                                                                                                             ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                        ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                  ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                          ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                     ;
; Entity Instance                           ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:15:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
;     -- OPERATION_MODE                     ; SINGLE_PORT                                                                                                                   ;
;     -- WIDTH_A                            ; 9                                                                                                                             ;
;     -- NUMWORDS_A                         ; 1024                                                                                                                          ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                  ;
;     -- WIDTH_B                            ; 1                                                                                                                             ;
;     -- NUMWORDS_B                         ; 1                                                                                                                             ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                        ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                  ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                          ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                     ;
; Entity Instance                           ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:16:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
;     -- OPERATION_MODE                     ; SINGLE_PORT                                                                                                                   ;
;     -- WIDTH_A                            ; 9                                                                                                                             ;
;     -- NUMWORDS_A                         ; 1024                                                                                                                          ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                  ;
;     -- WIDTH_B                            ; 1                                                                                                                             ;
;     -- NUMWORDS_B                         ; 1                                                                                                                             ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                        ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                  ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                          ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                     ;
; Entity Instance                           ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:17:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
;     -- OPERATION_MODE                     ; SINGLE_PORT                                                                                                                   ;
;     -- WIDTH_A                            ; 9                                                                                                                             ;
;     -- NUMWORDS_A                         ; 1024                                                                                                                          ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                  ;
;     -- WIDTH_B                            ; 1                                                                                                                             ;
;     -- NUMWORDS_B                         ; 1                                                                                                                             ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                        ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                  ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                          ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                     ;
; Entity Instance                           ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:19:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
;     -- OPERATION_MODE                     ; SINGLE_PORT                                                                                                                   ;
;     -- WIDTH_A                            ; 9                                                                                                                             ;
;     -- NUMWORDS_A                         ; 1024                                                                                                                          ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                  ;
;     -- WIDTH_B                            ; 1                                                                                                                             ;
;     -- NUMWORDS_B                         ; 1                                                                                                                             ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                        ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                  ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                          ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                     ;
; Entity Instance                           ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:20:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
;     -- OPERATION_MODE                     ; SINGLE_PORT                                                                                                                   ;
;     -- WIDTH_A                            ; 9                                                                                                                             ;
;     -- NUMWORDS_A                         ; 1024                                                                                                                          ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                  ;
;     -- WIDTH_B                            ; 1                                                                                                                             ;
;     -- NUMWORDS_B                         ; 1                                                                                                                             ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                        ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                  ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                          ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                     ;
; Entity Instance                           ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:21:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
;     -- OPERATION_MODE                     ; SINGLE_PORT                                                                                                                   ;
;     -- WIDTH_A                            ; 9                                                                                                                             ;
;     -- NUMWORDS_A                         ; 1024                                                                                                                          ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                  ;
;     -- WIDTH_B                            ; 1                                                                                                                             ;
;     -- NUMWORDS_B                         ; 1                                                                                                                             ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                        ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                  ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                          ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                     ;
; Entity Instance                           ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:22:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
;     -- OPERATION_MODE                     ; SINGLE_PORT                                                                                                                   ;
;     -- WIDTH_A                            ; 9                                                                                                                             ;
;     -- NUMWORDS_A                         ; 1024                                                                                                                          ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                  ;
;     -- WIDTH_B                            ; 1                                                                                                                             ;
;     -- NUMWORDS_B                         ; 1                                                                                                                             ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                        ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                  ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                          ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                     ;
; Entity Instance                           ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:23:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
;     -- OPERATION_MODE                     ; SINGLE_PORT                                                                                                                   ;
;     -- WIDTH_A                            ; 9                                                                                                                             ;
;     -- NUMWORDS_A                         ; 1024                                                                                                                          ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                  ;
;     -- WIDTH_B                            ; 1                                                                                                                             ;
;     -- NUMWORDS_B                         ; 1                                                                                                                             ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                        ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                  ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                          ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                     ;
; Entity Instance                           ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:24:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
;     -- OPERATION_MODE                     ; SINGLE_PORT                                                                                                                   ;
;     -- WIDTH_A                            ; 9                                                                                                                             ;
;     -- NUMWORDS_A                         ; 1024                                                                                                                          ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                  ;
;     -- WIDTH_B                            ; 1                                                                                                                             ;
;     -- NUMWORDS_B                         ; 1                                                                                                                             ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                        ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                  ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                          ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                     ;
; Entity Instance                           ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:25:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
;     -- OPERATION_MODE                     ; SINGLE_PORT                                                                                                                   ;
;     -- WIDTH_A                            ; 9                                                                                                                             ;
;     -- NUMWORDS_A                         ; 1024                                                                                                                          ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                  ;
;     -- WIDTH_B                            ; 1                                                                                                                             ;
;     -- NUMWORDS_B                         ; 1                                                                                                                             ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                        ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                  ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                          ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                     ;
; Entity Instance                           ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:27:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
;     -- OPERATION_MODE                     ; SINGLE_PORT                                                                                                                   ;
;     -- WIDTH_A                            ; 9                                                                                                                             ;
;     -- NUMWORDS_A                         ; 1024                                                                                                                          ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                  ;
;     -- WIDTH_B                            ; 1                                                                                                                             ;
;     -- NUMWORDS_B                         ; 1                                                                                                                             ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                        ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                  ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                          ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                     ;
; Entity Instance                           ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:28:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
;     -- OPERATION_MODE                     ; SINGLE_PORT                                                                                                                   ;
;     -- WIDTH_A                            ; 9                                                                                                                             ;
;     -- NUMWORDS_A                         ; 1024                                                                                                                          ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                  ;
;     -- WIDTH_B                            ; 1                                                                                                                             ;
;     -- NUMWORDS_B                         ; 1                                                                                                                             ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                        ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                  ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                          ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                     ;
; Entity Instance                           ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:29:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
;     -- OPERATION_MODE                     ; SINGLE_PORT                                                                                                                   ;
;     -- WIDTH_A                            ; 9                                                                                                                             ;
;     -- NUMWORDS_A                         ; 1024                                                                                                                          ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                  ;
;     -- WIDTH_B                            ; 1                                                                                                                             ;
;     -- NUMWORDS_B                         ; 1                                                                                                                             ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                        ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                  ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                          ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                     ;
; Entity Instance                           ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:30:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
;     -- OPERATION_MODE                     ; SINGLE_PORT                                                                                                                   ;
;     -- WIDTH_A                            ; 9                                                                                                                             ;
;     -- NUMWORDS_A                         ; 1024                                                                                                                          ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                  ;
;     -- WIDTH_B                            ; 1                                                                                                                             ;
;     -- NUMWORDS_B                         ; 1                                                                                                                             ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                        ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                  ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                          ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                     ;
; Entity Instance                           ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:31:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
;     -- OPERATION_MODE                     ; SINGLE_PORT                                                                                                                   ;
;     -- WIDTH_A                            ; 9                                                                                                                             ;
;     -- NUMWORDS_A                         ; 1024                                                                                                                          ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                  ;
;     -- WIDTH_B                            ; 1                                                                                                                             ;
;     -- NUMWORDS_B                         ; 1                                                                                                                             ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                        ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                  ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                          ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                     ;
; Entity Instance                           ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:32:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
;     -- OPERATION_MODE                     ; SINGLE_PORT                                                                                                                   ;
;     -- WIDTH_A                            ; 9                                                                                                                             ;
;     -- NUMWORDS_A                         ; 1024                                                                                                                          ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                  ;
;     -- WIDTH_B                            ; 1                                                                                                                             ;
;     -- NUMWORDS_B                         ; 1                                                                                                                             ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                        ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                  ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                          ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                     ;
; Entity Instance                           ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:33:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
;     -- OPERATION_MODE                     ; SINGLE_PORT                                                                                                                   ;
;     -- WIDTH_A                            ; 9                                                                                                                             ;
;     -- NUMWORDS_A                         ; 1024                                                                                                                          ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                  ;
;     -- WIDTH_B                            ; 1                                                                                                                             ;
;     -- NUMWORDS_B                         ; 1                                                                                                                             ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                        ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                  ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                          ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                     ;
; Entity Instance                           ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:35:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
;     -- OPERATION_MODE                     ; SINGLE_PORT                                                                                                                   ;
;     -- WIDTH_A                            ; 9                                                                                                                             ;
;     -- NUMWORDS_A                         ; 1024                                                                                                                          ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                  ;
;     -- WIDTH_B                            ; 1                                                                                                                             ;
;     -- NUMWORDS_B                         ; 1                                                                                                                             ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                        ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                  ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                          ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                     ;
; Entity Instance                           ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:36:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
;     -- OPERATION_MODE                     ; SINGLE_PORT                                                                                                                   ;
;     -- WIDTH_A                            ; 9                                                                                                                             ;
;     -- NUMWORDS_A                         ; 1024                                                                                                                          ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                  ;
;     -- WIDTH_B                            ; 1                                                                                                                             ;
;     -- NUMWORDS_B                         ; 1                                                                                                                             ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                        ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                  ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                          ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                     ;
; Entity Instance                           ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:37:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
;     -- OPERATION_MODE                     ; SINGLE_PORT                                                                                                                   ;
;     -- WIDTH_A                            ; 9                                                                                                                             ;
;     -- NUMWORDS_A                         ; 1024                                                                                                                          ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                  ;
;     -- WIDTH_B                            ; 1                                                                                                                             ;
;     -- NUMWORDS_B                         ; 1                                                                                                                             ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                        ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                  ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                          ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                     ;
; Entity Instance                           ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:38:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
;     -- OPERATION_MODE                     ; SINGLE_PORT                                                                                                                   ;
;     -- WIDTH_A                            ; 9                                                                                                                             ;
;     -- NUMWORDS_A                         ; 1024                                                                                                                          ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                  ;
;     -- WIDTH_B                            ; 1                                                                                                                             ;
;     -- NUMWORDS_B                         ; 1                                                                                                                             ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                        ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                  ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                          ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                     ;
; Entity Instance                           ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:39:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
;     -- OPERATION_MODE                     ; SINGLE_PORT                                                                                                                   ;
;     -- WIDTH_A                            ; 9                                                                                                                             ;
;     -- NUMWORDS_A                         ; 1024                                                                                                                          ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                  ;
;     -- WIDTH_B                            ; 1                                                                                                                             ;
;     -- NUMWORDS_B                         ; 1                                                                                                                             ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                        ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                  ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                          ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                     ;
; Entity Instance                           ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:40:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
;     -- OPERATION_MODE                     ; SINGLE_PORT                                                                                                                   ;
;     -- WIDTH_A                            ; 9                                                                                                                             ;
;     -- NUMWORDS_A                         ; 1024                                                                                                                          ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                  ;
;     -- WIDTH_B                            ; 1                                                                                                                             ;
;     -- NUMWORDS_B                         ; 1                                                                                                                             ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                        ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                  ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                          ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                     ;
; Entity Instance                           ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:41:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
;     -- OPERATION_MODE                     ; SINGLE_PORT                                                                                                                   ;
;     -- WIDTH_A                            ; 9                                                                                                                             ;
;     -- NUMWORDS_A                         ; 1024                                                                                                                          ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                  ;
;     -- WIDTH_B                            ; 1                                                                                                                             ;
;     -- NUMWORDS_B                         ; 1                                                                                                                             ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                        ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                  ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                          ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                     ;
; Entity Instance                           ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:43:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
;     -- OPERATION_MODE                     ; SINGLE_PORT                                                                                                                   ;
;     -- WIDTH_A                            ; 9                                                                                                                             ;
;     -- NUMWORDS_A                         ; 1024                                                                                                                          ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                  ;
;     -- WIDTH_B                            ; 1                                                                                                                             ;
;     -- NUMWORDS_B                         ; 1                                                                                                                             ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                        ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                  ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                          ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                     ;
; Entity Instance                           ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:44:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
;     -- OPERATION_MODE                     ; SINGLE_PORT                                                                                                                   ;
;     -- WIDTH_A                            ; 9                                                                                                                             ;
;     -- NUMWORDS_A                         ; 1024                                                                                                                          ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                  ;
;     -- WIDTH_B                            ; 1                                                                                                                             ;
;     -- NUMWORDS_B                         ; 1                                                                                                                             ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                        ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                  ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                          ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                     ;
; Entity Instance                           ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:45:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
;     -- OPERATION_MODE                     ; SINGLE_PORT                                                                                                                   ;
;     -- WIDTH_A                            ; 9                                                                                                                             ;
;     -- NUMWORDS_A                         ; 1024                                                                                                                          ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                  ;
;     -- WIDTH_B                            ; 1                                                                                                                             ;
;     -- NUMWORDS_B                         ; 1                                                                                                                             ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                        ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                  ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                          ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                     ;
; Entity Instance                           ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:46:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
;     -- OPERATION_MODE                     ; SINGLE_PORT                                                                                                                   ;
;     -- WIDTH_A                            ; 9                                                                                                                             ;
;     -- NUMWORDS_A                         ; 1024                                                                                                                          ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                  ;
;     -- WIDTH_B                            ; 1                                                                                                                             ;
;     -- NUMWORDS_B                         ; 1                                                                                                                             ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                        ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                  ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                          ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                     ;
; Entity Instance                           ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:47:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
;     -- OPERATION_MODE                     ; SINGLE_PORT                                                                                                                   ;
;     -- WIDTH_A                            ; 9                                                                                                                             ;
;     -- NUMWORDS_A                         ; 1024                                                                                                                          ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                  ;
;     -- WIDTH_B                            ; 1                                                                                                                             ;
;     -- NUMWORDS_B                         ; 1                                                                                                                             ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                        ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                  ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                          ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                     ;
; Entity Instance                           ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:48:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
;     -- OPERATION_MODE                     ; SINGLE_PORT                                                                                                                   ;
;     -- WIDTH_A                            ; 9                                                                                                                             ;
;     -- NUMWORDS_A                         ; 1024                                                                                                                          ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                  ;
;     -- WIDTH_B                            ; 1                                                                                                                             ;
;     -- NUMWORDS_B                         ; 1                                                                                                                             ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                        ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                  ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                          ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                     ;
; Entity Instance                           ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:49:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
;     -- OPERATION_MODE                     ; SINGLE_PORT                                                                                                                   ;
;     -- WIDTH_A                            ; 9                                                                                                                             ;
;     -- NUMWORDS_A                         ; 1024                                                                                                                          ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                  ;
;     -- WIDTH_B                            ; 1                                                                                                                             ;
;     -- NUMWORDS_B                         ; 1                                                                                                                             ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                        ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                  ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                          ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                     ;
; Entity Instance                           ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:51:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
;     -- OPERATION_MODE                     ; SINGLE_PORT                                                                                                                   ;
;     -- WIDTH_A                            ; 9                                                                                                                             ;
;     -- NUMWORDS_A                         ; 1024                                                                                                                          ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                  ;
;     -- WIDTH_B                            ; 1                                                                                                                             ;
;     -- NUMWORDS_B                         ; 1                                                                                                                             ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                        ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                  ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                          ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                     ;
; Entity Instance                           ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:52:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
;     -- OPERATION_MODE                     ; SINGLE_PORT                                                                                                                   ;
;     -- WIDTH_A                            ; 9                                                                                                                             ;
;     -- NUMWORDS_A                         ; 1024                                                                                                                          ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                  ;
;     -- WIDTH_B                            ; 1                                                                                                                             ;
;     -- NUMWORDS_B                         ; 1                                                                                                                             ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                        ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                  ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                          ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                     ;
; Entity Instance                           ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:53:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
;     -- OPERATION_MODE                     ; SINGLE_PORT                                                                                                                   ;
;     -- WIDTH_A                            ; 9                                                                                                                             ;
;     -- NUMWORDS_A                         ; 1024                                                                                                                          ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                  ;
;     -- WIDTH_B                            ; 1                                                                                                                             ;
;     -- NUMWORDS_B                         ; 1                                                                                                                             ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                        ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                  ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                          ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                     ;
; Entity Instance                           ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:54:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
;     -- OPERATION_MODE                     ; SINGLE_PORT                                                                                                                   ;
;     -- WIDTH_A                            ; 9                                                                                                                             ;
;     -- NUMWORDS_A                         ; 1024                                                                                                                          ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                  ;
;     -- WIDTH_B                            ; 1                                                                                                                             ;
;     -- NUMWORDS_B                         ; 1                                                                                                                             ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                        ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                  ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                          ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                     ;
; Entity Instance                           ; m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:55:sample_ram_inst|altsyncram:ram_block_rtl_0 ;
;     -- OPERATION_MODE                     ; SINGLE_PORT                                                                                                                   ;
;     -- WIDTH_A                            ; 9                                                                                                                             ;
;     -- NUMWORDS_A                         ; 1024                                                                                                                          ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                  ;
;     -- WIDTH_B                            ; 1                                                                                                                             ;
;     -- NUMWORDS_B                         ; 1                                                                                                                             ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                        ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                  ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                          ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                     ;
+-------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------+
; lpm_mult Parameter Settings by Entity Instance                                                                                     ;
+---------------------------------------+--------------------------------------------------------------------------------------------+
; Name                                  ; Value                                                                                      ;
+---------------------------------------+--------------------------------------------------------------------------------------------+
; Number of entity instances            ; 17                                                                                         ;
; Entity Instance                       ; clockgen:\sidpsg_on:clockgen1|lpm_mult:Mult0                                               ;
;     -- LPM_WIDTHA                     ; 7                                                                                          ;
;     -- LPM_WIDTHB                     ; 9                                                                                          ;
;     -- LPM_WIDTHP                     ; 16                                                                                         ;
;     -- LPM_REPRESENTATION             ; UNSIGNED                                                                                   ;
;     -- INPUT_A_IS_CONSTANT            ; NO                                                                                         ;
;     -- INPUT_B_IS_CONSTANT            ; NO                                                                                         ;
;     -- USE_EAB                        ; OFF                                                                                        ;
;     -- DEDICATED_MULTIPLIER_CIRCUITRY ; AUTO                                                                                       ;
;     -- INPUT_A_FIXED_VALUE            ; Bx                                                                                         ;
;     -- INPUT_B_FIXED_VALUE            ; Bx                                                                                         ;
; Entity Instance                       ; sample_top:\sample_on:sample1|lpm_mult:Mult3                                               ;
;     -- LPM_WIDTHA                     ; 13                                                                                         ;
;     -- LPM_WIDTHB                     ; 7                                                                                          ;
;     -- LPM_WIDTHP                     ; 20                                                                                         ;
;     -- LPM_REPRESENTATION             ; SIGNED                                                                                     ;
;     -- INPUT_A_IS_CONSTANT            ; NO                                                                                         ;
;     -- INPUT_B_IS_CONSTANT            ; NO                                                                                         ;
;     -- USE_EAB                        ; OFF                                                                                        ;
;     -- DEDICATED_MULTIPLIER_CIRCUITRY ; AUTO                                                                                       ;
;     -- INPUT_A_FIXED_VALUE            ; Bx                                                                                         ;
;     -- INPUT_B_FIXED_VALUE            ; Bx                                                                                         ;
; Entity Instance                       ; sample_top:\sample_on:sample1|lpm_mult:Mult2                                               ;
;     -- LPM_WIDTHA                     ; 13                                                                                         ;
;     -- LPM_WIDTHB                     ; 7                                                                                          ;
;     -- LPM_WIDTHP                     ; 20                                                                                         ;
;     -- LPM_REPRESENTATION             ; SIGNED                                                                                     ;
;     -- INPUT_A_IS_CONSTANT            ; NO                                                                                         ;
;     -- INPUT_B_IS_CONSTANT            ; NO                                                                                         ;
;     -- USE_EAB                        ; OFF                                                                                        ;
;     -- DEDICATED_MULTIPLIER_CIRCUITRY ; AUTO                                                                                       ;
;     -- INPUT_A_FIXED_VALUE            ; Bx                                                                                         ;
;     -- INPUT_B_FIXED_VALUE            ; Bx                                                                                         ;
; Entity Instance                       ; SID_top:\sid_on:sid1|SID_postFilterSum:postfilter|lpm_mult:Mult0                           ;
;     -- LPM_WIDTHA                     ; 18                                                                                         ;
;     -- LPM_WIDTHB                     ; 8                                                                                          ;
;     -- LPM_WIDTHP                     ; 26                                                                                         ;
;     -- LPM_REPRESENTATION             ; SIGNED                                                                                     ;
;     -- INPUT_A_IS_CONSTANT            ; NO                                                                                         ;
;     -- INPUT_B_IS_CONSTANT            ; NO                                                                                         ;
;     -- USE_EAB                        ; OFF                                                                                        ;
;     -- DEDICATED_MULTIPLIER_CIRCUITRY ; AUTO                                                                                       ;
;     -- INPUT_A_FIXED_VALUE            ; Bx                                                                                         ;
;     -- INPUT_B_FIXED_VALUE            ; Bx                                                                                         ;
; Entity Instance                       ; sample_top:\sample_on:sample1|lpm_mult:Mult1                                               ;
;     -- LPM_WIDTHA                     ; 13                                                                                         ;
;     -- LPM_WIDTHB                     ; 7                                                                                          ;
;     -- LPM_WIDTHP                     ; 20                                                                                         ;
;     -- LPM_REPRESENTATION             ; SIGNED                                                                                     ;
;     -- INPUT_A_IS_CONSTANT            ; NO                                                                                         ;
;     -- INPUT_B_IS_CONSTANT            ; NO                                                                                         ;
;     -- USE_EAB                        ; OFF                                                                                        ;
;     -- DEDICATED_MULTIPLIER_CIRCUITRY ; AUTO                                                                                       ;
;     -- INPUT_A_FIXED_VALUE            ; Bx                                                                                         ;
;     -- INPUT_B_FIXED_VALUE            ; Bx                                                                                         ;
; Entity Instance                       ; sample_top:\sample_on:sample1|lpm_mult:Mult0                                               ;
;     -- LPM_WIDTHA                     ; 13                                                                                         ;
;     -- LPM_WIDTHB                     ; 7                                                                                          ;
;     -- LPM_WIDTHP                     ; 20                                                                                         ;
;     -- LPM_REPRESENTATION             ; SIGNED                                                                                     ;
;     -- INPUT_A_IS_CONSTANT            ; NO                                                                                         ;
;     -- INPUT_B_IS_CONSTANT            ; NO                                                                                         ;
;     -- USE_EAB                        ; OFF                                                                                        ;
;     -- DEDICATED_MULTIPLIER_CIRCUITRY ; AUTO                                                                                       ;
;     -- INPUT_A_FIXED_VALUE            ; Bx                                                                                         ;
;     -- INPUT_B_FIXED_VALUE            ; Bx                                                                                         ;
; Entity Instance                       ; SID_top:\sid_on:sid2|SID_postFilterSum:postfilter|lpm_mult:Mult0                           ;
;     -- LPM_WIDTHA                     ; 18                                                                                         ;
;     -- LPM_WIDTHB                     ; 8                                                                                          ;
;     -- LPM_WIDTHP                     ; 26                                                                                         ;
;     -- LPM_REPRESENTATION             ; SIGNED                                                                                     ;
;     -- INPUT_A_IS_CONSTANT            ; NO                                                                                         ;
;     -- INPUT_B_IS_CONSTANT            ; NO                                                                                         ;
;     -- USE_EAB                        ; OFF                                                                                        ;
;     -- DEDICATED_MULTIPLIER_CIRCUITRY ; AUTO                                                                                       ;
;     -- INPUT_A_FIXED_VALUE            ; Bx                                                                                         ;
;     -- INPUT_B_FIXED_VALUE            ; Bx                                                                                         ;
; Entity Instance                       ; sample_top:\sample_on:sample1|sample_adpcm:adpcm_decoder|lpm_mult:Mult0                    ;
;     -- LPM_WIDTHA                     ; 5                                                                                          ;
;     -- LPM_WIDTHB                     ; 16                                                                                         ;
;     -- LPM_WIDTHP                     ; 21                                                                                         ;
;     -- LPM_REPRESENTATION             ; SIGNED                                                                                     ;
;     -- INPUT_A_IS_CONSTANT            ; NO                                                                                         ;
;     -- INPUT_B_IS_CONSTANT            ; NO                                                                                         ;
;     -- USE_EAB                        ; OFF                                                                                        ;
;     -- DEDICATED_MULTIPLIER_CIRCUITRY ; AUTO                                                                                       ;
;     -- INPUT_A_FIXED_VALUE            ; Bx                                                                                         ;
;     -- INPUT_B_FIXED_VALUE            ; Bx                                                                                         ;
; Entity Instance                       ; SID_top:\sid_on:sid1|SID_amplitudeModulator:vol_abc|lpm_mult:Mult0                         ;
;     -- LPM_WIDTHA                     ; 9                                                                                          ;
;     -- LPM_WIDTHB                     ; 12                                                                                         ;
;     -- LPM_WIDTHP                     ; 21                                                                                         ;
;     -- LPM_REPRESENTATION             ; SIGNED                                                                                     ;
;     -- INPUT_A_IS_CONSTANT            ; NO                                                                                         ;
;     -- INPUT_B_IS_CONSTANT            ; NO                                                                                         ;
;     -- USE_EAB                        ; OFF                                                                                        ;
;     -- DEDICATED_MULTIPLIER_CIRCUITRY ; AUTO                                                                                       ;
;     -- INPUT_A_FIXED_VALUE            ; Bx                                                                                         ;
;     -- INPUT_B_FIXED_VALUE            ; Bx                                                                                         ;
; Entity Instance                       ; SID_top:\sid_on:sid1|SID_filter:variable_state_filter|lpm_mult:Mult4                       ;
;     -- LPM_WIDTHA                     ; 14                                                                                         ;
;     -- LPM_WIDTHB                     ; 36                                                                                         ;
;     -- LPM_WIDTHP                     ; 50                                                                                         ;
;     -- LPM_REPRESENTATION             ; SIGNED                                                                                     ;
;     -- INPUT_A_IS_CONSTANT            ; NO                                                                                         ;
;     -- INPUT_B_IS_CONSTANT            ; NO                                                                                         ;
;     -- USE_EAB                        ; OFF                                                                                        ;
;     -- DEDICATED_MULTIPLIER_CIRCUITRY ; AUTO                                                                                       ;
;     -- INPUT_A_FIXED_VALUE            ; Bx                                                                                         ;
;     -- INPUT_B_FIXED_VALUE            ; Bx                                                                                         ;
; Entity Instance                       ; SID_top:\sid_on:sid2|SID_amplitudeModulator:vol_abc|lpm_mult:Mult0                         ;
;     -- LPM_WIDTHA                     ; 9                                                                                          ;
;     -- LPM_WIDTHB                     ; 12                                                                                         ;
;     -- LPM_WIDTHP                     ; 21                                                                                         ;
;     -- LPM_REPRESENTATION             ; SIGNED                                                                                     ;
;     -- INPUT_A_IS_CONSTANT            ; NO                                                                                         ;
;     -- INPUT_B_IS_CONSTANT            ; NO                                                                                         ;
;     -- USE_EAB                        ; OFF                                                                                        ;
;     -- DEDICATED_MULTIPLIER_CIRCUITRY ; AUTO                                                                                       ;
;     -- INPUT_A_FIXED_VALUE            ; Bx                                                                                         ;
;     -- INPUT_B_FIXED_VALUE            ; Bx                                                                                         ;
; Entity Instance                       ; SID_top:\sid_on:sid2|SID_filter:variable_state_filter|lpm_mult:Mult4                       ;
;     -- LPM_WIDTHA                     ; 14                                                                                         ;
;     -- LPM_WIDTHB                     ; 36                                                                                         ;
;     -- LPM_WIDTHP                     ; 50                                                                                         ;
;     -- LPM_REPRESENTATION             ; SIGNED                                                                                     ;
;     -- INPUT_A_IS_CONSTANT            ; NO                                                                                         ;
;     -- INPUT_B_IS_CONSTANT            ; NO                                                                                         ;
;     -- USE_EAB                        ; OFF                                                                                        ;
;     -- DEDICATED_MULTIPLIER_CIRCUITRY ; AUTO                                                                                       ;
;     -- INPUT_A_FIXED_VALUE            ; Bx                                                                                         ;
;     -- INPUT_B_FIXED_VALUE            ; Bx                                                                                         ;
; Entity Instance                       ; SID_top:\sid_on:sid1|SID_filter:variable_state_filter|lpm_mult:Mult3                       ;
;     -- LPM_WIDTHA                     ; 14                                                                                         ;
;     -- LPM_WIDTHB                     ; 36                                                                                         ;
;     -- LPM_WIDTHP                     ; 50                                                                                         ;
;     -- LPM_REPRESENTATION             ; SIGNED                                                                                     ;
;     -- INPUT_A_IS_CONSTANT            ; NO                                                                                         ;
;     -- INPUT_B_IS_CONSTANT            ; NO                                                                                         ;
;     -- USE_EAB                        ; OFF                                                                                        ;
;     -- DEDICATED_MULTIPLIER_CIRCUITRY ; AUTO                                                                                       ;
;     -- INPUT_A_FIXED_VALUE            ; Bx                                                                                         ;
;     -- INPUT_B_FIXED_VALUE            ; Bx                                                                                         ;
; Entity Instance                       ; SID_top:\sid_on:sid2|SID_filter:variable_state_filter|lpm_mult:Mult3                       ;
;     -- LPM_WIDTHA                     ; 14                                                                                         ;
;     -- LPM_WIDTHB                     ; 36                                                                                         ;
;     -- LPM_WIDTHP                     ; 50                                                                                         ;
;     -- LPM_REPRESENTATION             ; SIGNED                                                                                     ;
;     -- INPUT_A_IS_CONSTANT            ; NO                                                                                         ;
;     -- INPUT_B_IS_CONSTANT            ; NO                                                                                         ;
;     -- USE_EAB                        ; OFF                                                                                        ;
;     -- DEDICATED_MULTIPLIER_CIRCUITRY ; AUTO                                                                                       ;
;     -- INPUT_A_FIXED_VALUE            ; Bx                                                                                         ;
;     -- INPUT_B_FIXED_VALUE            ; Bx                                                                                         ;
; Entity Instance                       ; SID_top:\sid_on:sid1|SID_filter:variable_state_filter|lpm_mult:Mult0                       ;
;     -- LPM_WIDTHA                     ; 36                                                                                         ;
;     -- LPM_WIDTHB                     ; 18                                                                                         ;
;     -- LPM_WIDTHP                     ; 54                                                                                         ;
;     -- LPM_REPRESENTATION             ; SIGNED                                                                                     ;
;     -- INPUT_A_IS_CONSTANT            ; NO                                                                                         ;
;     -- INPUT_B_IS_CONSTANT            ; NO                                                                                         ;
;     -- USE_EAB                        ; OFF                                                                                        ;
;     -- DEDICATED_MULTIPLIER_CIRCUITRY ; AUTO                                                                                       ;
;     -- INPUT_A_FIXED_VALUE            ; Bx                                                                                         ;
;     -- INPUT_B_FIXED_VALUE            ; Bx                                                                                         ;
; Entity Instance                       ; SID_top:\sid_on:sid2|SID_filter:variable_state_filter|lpm_mult:Mult0                       ;
;     -- LPM_WIDTHA                     ; 36                                                                                         ;
;     -- LPM_WIDTHB                     ; 18                                                                                         ;
;     -- LPM_WIDTHP                     ; 54                                                                                         ;
;     -- LPM_REPRESENTATION             ; SIGNED                                                                                     ;
;     -- INPUT_A_IS_CONSTANT            ; NO                                                                                         ;
;     -- INPUT_B_IS_CONSTANT            ; NO                                                                                         ;
;     -- USE_EAB                        ; OFF                                                                                        ;
;     -- DEDICATED_MULTIPLIER_CIRCUITRY ; AUTO                                                                                       ;
;     -- INPUT_A_FIXED_VALUE            ; Bx                                                                                         ;
;     -- INPUT_B_FIXED_VALUE            ; Bx                                                                                         ;
; Entity Instance                       ; SID_f_distortion_mux:\sid_on:f_distortion_mux|SID_f_distortion:f_distortion|lpm_mult:Mult0 ;
;     -- LPM_WIDTHA                     ; 13                                                                                         ;
;     -- LPM_WIDTHB                     ; 12                                                                                         ;
;     -- LPM_WIDTHP                     ; 25                                                                                         ;
;     -- LPM_REPRESENTATION             ; UNSIGNED                                                                                   ;
;     -- INPUT_A_IS_CONSTANT            ; NO                                                                                         ;
;     -- INPUT_B_IS_CONSTANT            ; NO                                                                                         ;
;     -- USE_EAB                        ; OFF                                                                                        ;
;     -- DEDICATED_MULTIPLIER_CIRCUITRY ; AUTO                                                                                       ;
;     -- INPUT_A_FIXED_VALUE            ; Bx                                                                                         ;
;     -- INPUT_B_FIXED_VALUE            ; Bx                                                                                         ;
+---------------------------------------+--------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "synchronizer:synchronizer_SIO"                                                      ;
+------+--------+----------+-------------------------------------------------------------------------------------+
; Port ; Type   ; Severity ; Details                                                                             ;
+------+--------+----------+-------------------------------------------------------------------------------------+
; sync ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+------+--------+----------+-------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "ps2_to_atari800:\ps2_on:keyboard_map1|ps2_keyboard:\gen_ps2_on:keyboard1|enable_divider:enable_div" ;
+-----------+-------+----------+-------------------------------------------------------------------------------------------------+
; Port      ; Type  ; Severity ; Details                                                                                         ;
+-----------+-------+----------+-------------------------------------------------------------------------------------------------+
; enable_in ; Input ; Info     ; Stuck at VCC                                                                                    ;
+-----------+-------+----------+-------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "ps2_to_atari800:\ps2_on:keyboard_map1"                                                            ;
+--------------------+--------+----------+-------------------------------------------------------------------------------------+
; Port               ; Type   ; Severity ; Details                                                                             ;
+--------------------+--------+----------+-------------------------------------------------------------------------------------+
; input              ; Input  ; Info     ; Stuck at GND                                                                        ;
; atari_keyboard_out ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; key_type           ; Input  ; Info     ; Stuck at GND                                                                        ;
; consol_start       ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; consol_select      ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; consol_option      ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; fkeys              ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; freezer_activate   ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; ps2_keys           ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; ps2_keys_next_out  ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+--------------------+--------+----------+-------------------------------------------------------------------------------------+


+---------------------------------------------------------------+
; Port Connectivity Checks: "spdif_transmitter:\spdif_on:spdif" ;
+----------------+-------+----------+---------------------------+
; Port           ; Type  ; Severity ; Details                   ;
+----------------+-------+----------+---------------------------+
; left_in[7..0]  ; Input ; Info     ; Stuck at GND              ;
; right_in[7..0] ; Input ; Info     ; Stuck at GND              ;
+----------------+-------+----------+---------------------------+


+----------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "filtered_sigmadelta:dac_0|sigmadelta_2ndorder:\gen_2ndorder_on:dac_2nd" ;
+--------+-------+----------+------------------------------------------------------------------------+
; Port   ; Type  ; Severity ; Details                                                                ;
+--------+-------+----------+------------------------------------------------------------------------+
; enable ; Input ; Info     ; Stuck at VCC                                                           ;
+--------+-------+----------+------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "mixer:mixer1"                                                                                 ;
+----------------+--------+----------+-------------------------------------------------------------------------------------+
; Port           ; Type   ; Severity ; Details                                                                             ;
+----------------+--------+----------+-------------------------------------------------------------------------------------+
; b_ch1_en[3..2] ; Input  ; Info     ; Stuck at VCC                                                                        ;
; b_ch1_en[1..0] ; Input  ; Info     ; Stuck at GND                                                                        ;
; b_ch0[9..0]    ; Input  ; Info     ; Stuck at GND                                                                        ;
; b_ch0[10]      ; Input  ; Info     ; Stuck at VCC                                                                        ;
; mute_channel   ; Input  ; Info     ; Stuck at GND                                                                        ;
; s_audio        ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; s_left         ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; s_right        ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; s_channel      ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+----------------+--------+----------+-------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "complete_address_decoder:\gen_config:decode_addr1"                                              ;
+------------------+--------+----------+-------------------------------------------------------------------------------------+
; Port             ; Type   ; Severity ; Details                                                                             ;
+------------------+--------+----------+-------------------------------------------------------------------------------------+
; addr_decoded[10] ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; addr_decoded[8]  ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+------------------+--------+----------+-------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "sample_top:\sample_on:sample1|sample_adpcm:adpcm_decoder"                                     ;
+----------------+--------+----------+-------------------------------------------------------------------------------------+
; Port           ; Type   ; Severity ; Details                                                                             ;
+----------------+--------+----------+-------------------------------------------------------------------------------------+
; data_out[2..0] ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+----------------+--------+----------+-------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "sample_top:\sample_on:sample1|complete_address_decoder:decode_addr2"                                ;
+----------------------+--------+----------+-------------------------------------------------------------------------------------+
; Port                 ; Type   ; Severity ; Details                                                                             ;
+----------------------+--------+----------+-------------------------------------------------------------------------------------+
; addr_decoded[31..20] ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+----------------------+--------+----------+-------------------------------------------------------------------------------------+


+-----------------------------------------------------------+
; Port Connectivity Checks: "sample_top:\sample_on:sample1" ;
+-----------+-------+----------+----------------------------+
; Port      ; Type  ; Severity ; Details                    ;
+-----------+-------+----------+----------------------------+
; audio_in0 ; Input ; Info     ; Stuck at GND               ;
; audio_in1 ; Input ; Info     ; Stuck at GND               ;
; audio_in2 ; Input ; Info     ; Stuck at GND               ;
; audio_in3 ; Input ; Info     ; Stuck at GND               ;
+-----------+-------+----------+----------------------------+


+---------------------------------------------------------------------+
; Port Connectivity Checks: "PSG_volume_profile:\psg_on:vol_profile1" ;
+----------------------+-------+----------+---------------------------+
; Port                 ; Type  ; Severity ; Details                   ;
+----------------------+-------+----------+---------------------------+
; channel_mask_1[5]    ; Input ; Info     ; Stuck at VCC              ;
; channel_mask_2[1..0] ; Input ; Info     ; Stuck at VCC              ;
+----------------------+-------+----------+---------------------------+


+-------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "PSG_top:\psg_on:PSG_2"                                                                 ;
+---------+--------+----------+-------------------------------------------------------------------------------------+
; Port    ; Type   ; Severity ; Details                                                                             ;
+---------+--------+----------+-------------------------------------------------------------------------------------+
; ioa_in  ; Input  ; Info     ; Stuck at GND                                                                        ;
; iob_in  ; Input  ; Info     ; Stuck at GND                                                                        ;
; ioa_out ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; iob_out ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; ioa_oe  ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; iob_oe  ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+---------+--------+----------+-------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------+
; Port Connectivity Checks: "PSG_top:\psg_on:PSG_1|PSG_freqdiv:noise_ticker" ;
+------------+-------+----------+--------------------------------------------+
; Port       ; Type  ; Severity ; Details                                    ;
+------------+-------+----------+--------------------------------------------+
; sync_reset ; Input ; Info     ; Stuck at GND                               ;
+------------+-------+----------+--------------------------------------------+


+-------------------------------------------------------------------------------+
; Port Connectivity Checks: "PSG_top:\psg_on:PSG_1|PSG_freqdiv:noise_preticker" ;
+--------------+-------+----------+---------------------------------------------+
; Port         ; Type  ; Severity ; Details                                     ;
+--------------+-------+----------+---------------------------------------------+
; sync_reset   ; Input ; Info     ; Stuck at GND                                ;
; threshold[1] ; Input ; Info     ; Stuck at VCC                                ;
; threshold[0] ; Input ; Info     ; Stuck at GND                                ;
+--------------+-------+----------+---------------------------------------------+


+--------------------------------------------------------------------------------+
; Port Connectivity Checks: "PSG_top:\psg_on:PSG_1|PSG_freqdiv:channel_c_ticker" ;
+------------+-------+----------+------------------------------------------------+
; Port       ; Type  ; Severity ; Details                                        ;
+------------+-------+----------+------------------------------------------------+
; sync_reset ; Input ; Info     ; Stuck at GND                                   ;
+------------+-------+----------+------------------------------------------------+


+--------------------------------------------------------------------------------+
; Port Connectivity Checks: "PSG_top:\psg_on:PSG_1|PSG_freqdiv:channel_b_ticker" ;
+------------+-------+----------+------------------------------------------------+
; Port       ; Type  ; Severity ; Details                                        ;
+------------+-------+----------+------------------------------------------------+
; sync_reset ; Input ; Info     ; Stuck at GND                                   ;
+------------+-------+----------+------------------------------------------------+


+--------------------------------------------------------------------------------+
; Port Connectivity Checks: "PSG_top:\psg_on:PSG_1|PSG_freqdiv:channel_a_ticker" ;
+------------+-------+----------+------------------------------------------------+
; Port       ; Type  ; Severity ; Details                                        ;
+------------+-------+----------+------------------------------------------------+
; sync_reset ; Input ; Info     ; Stuck at GND                                   ;
+------------+-------+----------+------------------------------------------------+


+---------------------------------------------------------------------------+
; Port Connectivity Checks: "PSG_top:\psg_on:PSG_1|PSG_freqdiv:core_ticker" ;
+-----------------+-------+----------+--------------------------------------+
; Port            ; Type  ; Severity ; Details                              ;
+-----------------+-------+----------+--------------------------------------+
; sync_reset      ; Input ; Info     ; Stuck at GND                         ;
; threshold[2..0] ; Input ; Info     ; Stuck at GND                         ;
; threshold[3]    ; Input ; Info     ; Stuck at VCC                         ;
+-----------------+-------+----------+--------------------------------------+


+-------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "PSG_top:\psg_on:PSG_1"                                                                 ;
+---------+--------+----------+-------------------------------------------------------------------------------------+
; Port    ; Type   ; Severity ; Details                                                                             ;
+---------+--------+----------+-------------------------------------------------------------------------------------+
; ioa_in  ; Input  ; Info     ; Stuck at GND                                                                        ;
; iob_in  ; Input  ; Info     ; Stuck at GND                                                                        ;
; ioa_out ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; iob_out ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; ioa_oe  ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; iob_oe  ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+---------+--------+----------+-------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "SID_top:\sid_on:sid2"                                                                         ;
+----------------+--------+----------+-------------------------------------------------------------------------------------+
; Port           ; Type   ; Severity ; Details                                                                             ;
+----------------+--------+----------+-------------------------------------------------------------------------------------+
; pot_x          ; Input  ; Info     ; Stuck at GND                                                                        ;
; pot_y          ; Input  ; Info     ; Stuck at GND                                                                        ;
; pot_reset      ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; debug_wv1      ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; debug_ev1      ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; debug_am1      ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; ext_adc[14..0] ; Input  ; Info     ; Stuck at GND                                                                        ;
; ext_adc[15]    ; Input  ; Info     ; Stuck at VCC                                                                        ;
+----------------+--------+----------+-------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "SID_top:\sid_on:sid1|complete_address_decoder:decode_addr1"                                         ;
+----------------------+--------+----------+-------------------------------------------------------------------------------------+
; Port                 ; Type   ; Severity ; Details                                                                             ;
+----------------------+--------+----------+-------------------------------------------------------------------------------------+
; addr_decoded[31..29] ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+----------------------+--------+----------+-------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "SID_top:\sid_on:sid1"                                                                         ;
+----------------+--------+----------+-------------------------------------------------------------------------------------+
; Port           ; Type   ; Severity ; Details                                                                             ;
+----------------+--------+----------+-------------------------------------------------------------------------------------+
; pot_x          ; Input  ; Info     ; Stuck at GND                                                                        ;
; pot_y          ; Input  ; Info     ; Stuck at GND                                                                        ;
; pot_reset      ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; debug_wv1      ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; debug_ev1      ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; debug_am1      ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; ext_adc[14..0] ; Input  ; Info     ; Stuck at GND                                                                        ;
; ext_adc[15]    ; Input  ; Info     ; Stuck at VCC                                                                        ;
+----------------+--------+----------+-------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "pokey:\POKEY_ON:3:pokeyx"                                                                           ;
+----------------------+--------+----------+-------------------------------------------------------------------------------------+
; Port                 ; Type   ; Severity ; Details                                                                             ;
+----------------------+--------+----------+-------------------------------------------------------------------------------------+
; keyboard_scan_enable ; Input  ; Info     ; Stuck at GND                                                                        ;
; keyboard_scan        ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; keyboard_scan_update ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; keyboard_response    ; Input  ; Info     ; Stuck at GND                                                                        ;
; pot_in               ; Input  ; Info     ; Stuck at GND                                                                        ;
; sio_in1              ; Input  ; Info     ; Stuck at VCC                                                                        ;
; sio_out1             ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; sio_out2             ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; sio_out3             ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; sio_clockin_in       ; Input  ; Info     ; Stuck at VCC                                                                        ;
; sio_clockin_out      ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; sio_clockin_oe       ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; sio_clockout         ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; pot_reset            ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+----------------------+--------+----------+-------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "pokey:\POKEY_ON:2:pokeyx"                                                                           ;
+----------------------+--------+----------+-------------------------------------------------------------------------------------+
; Port                 ; Type   ; Severity ; Details                                                                             ;
+----------------------+--------+----------+-------------------------------------------------------------------------------------+
; keyboard_scan_enable ; Input  ; Info     ; Stuck at GND                                                                        ;
; keyboard_scan        ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; keyboard_scan_update ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; keyboard_response    ; Input  ; Info     ; Stuck at GND                                                                        ;
; pot_in               ; Input  ; Info     ; Stuck at GND                                                                        ;
; sio_in1              ; Input  ; Info     ; Stuck at VCC                                                                        ;
; sio_out1             ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; sio_out2             ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; sio_out3             ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; sio_clockin_in       ; Input  ; Info     ; Stuck at VCC                                                                        ;
; sio_clockin_out      ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; sio_clockin_oe       ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; sio_clockout         ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; pot_reset            ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+----------------------+--------+----------+-------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------+
; Port Connectivity Checks: "pokey:\POKEY_ON:1:pokeyx|latch_delay_line:stimer_delay" ;
+------------+-------+----------+----------------------------------------------------+
; Port       ; Type  ; Severity ; Details                                            ;
+------------+-------+----------+----------------------------------------------------+
; sync_reset ; Input ; Info     ; Stuck at GND                                       ;
+------------+-------+----------+----------------------------------------------------+


+-----------------------------------------------------------------------------------+
; Port Connectivity Checks: "pokey:\POKEY_ON:1:pokeyx|latch_delay_line:twotone_del" ;
+------------+-------+----------+---------------------------------------------------+
; Port       ; Type  ; Severity ; Details                                           ;
+------------+-------+----------+---------------------------------------------------+
; sync_reset ; Input ; Info     ; Stuck at GND                                      ;
+------------+-------+----------+---------------------------------------------------+


+-----------------------------------------------------------------------------------+
; Port Connectivity Checks: "pokey:\POKEY_ON:1:pokeyx|wide_delay_line:audctl_delay" ;
+------------+-------+----------+---------------------------------------------------+
; Port       ; Type  ; Severity ; Details                                           ;
+------------+-------+----------+---------------------------------------------------+
; sync_reset ; Input ; Info     ; Stuck at GND                                      ;
+------------+-------+----------+---------------------------------------------------+


+----------------------------------------------------------------------------------+
; Port Connectivity Checks: "pokey:\POKEY_ON:1:pokeyx|wide_delay_line:audf3_delay" ;
+------------+-------+----------+--------------------------------------------------+
; Port       ; Type  ; Severity ; Details                                          ;
+------------+-------+----------+--------------------------------------------------+
; sync_reset ; Input ; Info     ; Stuck at GND                                     ;
+------------+-------+----------+--------------------------------------------------+


+----------------------------------------------------------------------------------+
; Port Connectivity Checks: "pokey:\POKEY_ON:1:pokeyx|wide_delay_line:audf2_delay" ;
+------------+-------+----------+--------------------------------------------------+
; Port       ; Type  ; Severity ; Details                                          ;
+------------+-------+----------+--------------------------------------------------+
; sync_reset ; Input ; Info     ; Stuck at GND                                     ;
+------------+-------+----------+--------------------------------------------------+


+----------------------------------------------------------------------------------+
; Port Connectivity Checks: "pokey:\POKEY_ON:1:pokeyx|wide_delay_line:audf1_delay" ;
+------------+-------+----------+--------------------------------------------------+
; Port       ; Type  ; Severity ; Details                                          ;
+------------+-------+----------+--------------------------------------------------+
; sync_reset ; Input ; Info     ; Stuck at GND                                     ;
+------------+-------+----------+--------------------------------------------------+


+----------------------------------------------------------------------------------+
; Port Connectivity Checks: "pokey:\POKEY_ON:1:pokeyx|wide_delay_line:audf0_delay" ;
+------------+-------+----------+--------------------------------------------------+
; Port       ; Type  ; Severity ; Details                                          ;
+------------+-------+----------+--------------------------------------------------+
; sync_reset ; Input ; Info     ; Stuck at GND                                     ;
+------------+-------+----------+--------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "pokey:\POKEY_ON:1:pokeyx|complete_address_decoder:decode_addr1"                                 ;
+------------------+--------+----------+-------------------------------------------------------------------------------------+
; Port             ; Type   ; Severity ; Details                                                                             ;
+------------------+--------+----------+-------------------------------------------------------------------------------------+
; addr_decoded[12] ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+------------------+--------+----------+-------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "pokey:\POKEY_ON:1:pokeyx"                                                                           ;
+----------------------+--------+----------+-------------------------------------------------------------------------------------+
; Port                 ; Type   ; Severity ; Details                                                                             ;
+----------------------+--------+----------+-------------------------------------------------------------------------------------+
; keyboard_scan_enable ; Input  ; Info     ; Stuck at GND                                                                        ;
; keyboard_scan        ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; keyboard_scan_update ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; keyboard_response    ; Input  ; Info     ; Stuck at GND                                                                        ;
; pot_in               ; Input  ; Info     ; Stuck at GND                                                                        ;
; sio_in1              ; Input  ; Info     ; Stuck at VCC                                                                        ;
; sio_out1             ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; sio_out2             ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; sio_out3             ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; sio_clockin_in       ; Input  ; Info     ; Stuck at VCC                                                                        ;
; sio_clockin_out      ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; sio_clockin_oe       ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; sio_clockout         ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; pot_reset            ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+----------------------+--------+----------+-------------------------------------------------------------------------------------+


+------------------------------------------------------------------------+
; Port Connectivity Checks: "pokey:pokey1|latch_delay_line:stimer_delay" ;
+------------+-------+----------+----------------------------------------+
; Port       ; Type  ; Severity ; Details                                ;
+------------+-------+----------+----------------------------------------+
; sync_reset ; Input ; Info     ; Stuck at GND                           ;
+------------+-------+----------+----------------------------------------+


+-----------------------------------------------------------------------+
; Port Connectivity Checks: "pokey:pokey1|latch_delay_line:twotone_del" ;
+------------+-------+----------+---------------------------------------+
; Port       ; Type  ; Severity ; Details                               ;
+------------+-------+----------+---------------------------------------+
; sync_reset ; Input ; Info     ; Stuck at GND                          ;
+------------+-------+----------+---------------------------------------+


+-----------------------------------------------------------------------+
; Port Connectivity Checks: "pokey:pokey1|wide_delay_line:audctl_delay" ;
+------------+-------+----------+---------------------------------------+
; Port       ; Type  ; Severity ; Details                               ;
+------------+-------+----------+---------------------------------------+
; sync_reset ; Input ; Info     ; Stuck at GND                          ;
+------------+-------+----------+---------------------------------------+


+----------------------------------------------------------------------+
; Port Connectivity Checks: "pokey:pokey1|wide_delay_line:audf3_delay" ;
+------------+-------+----------+--------------------------------------+
; Port       ; Type  ; Severity ; Details                              ;
+------------+-------+----------+--------------------------------------+
; sync_reset ; Input ; Info     ; Stuck at GND                         ;
+------------+-------+----------+--------------------------------------+


+----------------------------------------------------------------------+
; Port Connectivity Checks: "pokey:pokey1|wide_delay_line:audf2_delay" ;
+------------+-------+----------+--------------------------------------+
; Port       ; Type  ; Severity ; Details                              ;
+------------+-------+----------+--------------------------------------+
; sync_reset ; Input ; Info     ; Stuck at GND                         ;
+------------+-------+----------+--------------------------------------+


+----------------------------------------------------------------------+
; Port Connectivity Checks: "pokey:pokey1|wide_delay_line:audf1_delay" ;
+------------+-------+----------+--------------------------------------+
; Port       ; Type  ; Severity ; Details                              ;
+------------+-------+----------+--------------------------------------+
; sync_reset ; Input ; Info     ; Stuck at GND                         ;
+------------+-------+----------+--------------------------------------+


+----------------------------------------------------------------------+
; Port Connectivity Checks: "pokey:pokey1|wide_delay_line:audf0_delay" ;
+------------+-------+----------+--------------------------------------+
; Port       ; Type  ; Severity ; Details                              ;
+------------+-------+----------+--------------------------------------+
; sync_reset ; Input ; Info     ; Stuck at GND                         ;
+------------+-------+----------+--------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "pokey:pokey1|complete_address_decoder:decode_addr1"                                             ;
+------------------+--------+----------+-------------------------------------------------------------------------------------+
; Port             ; Type   ; Severity ; Details                                                                             ;
+------------------+--------+----------+-------------------------------------------------------------------------------------+
; addr_decoded[12] ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+------------------+--------+----------+-------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "pokey:pokey1"                                                                           ;
+----------+--------+----------+-------------------------------------------------------------------------------------+
; Port     ; Type   ; Severity ; Details                                                                             ;
+----------+--------+----------+-------------------------------------------------------------------------------------+
; sio_out2 ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; sio_out3 ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+----------+--------+----------+-------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "slave_timing_6502:bus_adapt"                                                        ;
+------+--------+----------+-------------------------------------------------------------------------------------+
; Port ; Type   ; Severity ; Details                                                                             ;
+------+--------+----------+-------------------------------------------------------------------------------------+
; cs   ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+------+--------+----------+-------------------------------------------------------------------------------------+


+--------------------------------------------------------------------+
; Port Connectivity Checks: "synchronizer:synchronizer_fancy_enable" ;
+------+-------+----------+------------------------------------------+
; Port ; Type  ; Severity ; Details                                  ;
+------+-------+----------+------------------------------------------+
; raw  ; Input ; Info     ; Stuck at VCC                             ;
+------+-------+----------+------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_block:altera_onchip_flash_block" ;
+----------+-------+----------+----------------------------------------------------------------------------------------------------------------------------------------------------+
; Port     ; Type  ; Severity ; Details                                                                                                                                            ;
+----------+-------+----------+----------------------------------------------------------------------------------------------------------------------------------------------------+
; nosc_ena ; Input ; Info     ; Stuck at GND                                                                                                                                       ;
; par_en   ; Input ; Info     ; Stuck at VCC                                                                                                                                       ;
+----------+-------+----------+----------------------------------------------------------------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|altera_onchip_flash_address_range_check:address_range_checker" ;
+-----------------+-------+----------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port            ; Type  ; Severity ; Details                                                                                                                                                                                                             ;
+-----------------+-------+----------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; address[22..17] ; Input ; Info     ; Stuck at GND                                                                                                                                                                                                        ;
+-----------------+-------+----------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "flash_controller:\flash_on:flash_controller_inst|flash:flash1" ;
+-------------------------+-------+----------+----------------------------------------------+
; Port                    ; Type  ; Severity ; Details                                      ;
+-------------------------+-------+----------+----------------------------------------------+
; avmm_data_burstcount[1] ; Input ; Info     ; Stuck at GND                                 ;
; avmm_data_burstcount[0] ; Input ; Info     ; Stuck at VCC                                 ;
+-------------------------+-------+----------+----------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "flash_controller:\flash_on:flash_controller_inst"                                                         ;
+----------------------------+--------+----------+-------------------------------------------------------------------------------------+
; Port                       ; Type   ; Severity ; Details                                                                             ;
+----------------------------+--------+----------+-------------------------------------------------------------------------------------+
; flash_req_complete         ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; flash_req_complete_slow[7] ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; flash_req2_addr[12..1]     ; Input  ; Info     ; Stuck at GND                                                                        ;
; flash_req3_addr[12..8]     ; Input  ; Info     ; Stuck at GND                                                                        ;
; flash_req3_addr[7]         ; Input  ; Info     ; Stuck at VCC                                                                        ;
; flash_req6_addr[12..9]     ; Input  ; Info     ; Stuck at GND                                                                        ;
; flash_req6_addr[8]         ; Input  ; Info     ; Stuck at VCC                                                                        ;
; flash_req6_addr[7]         ; Input  ; Info     ; Stuck at GND                                                                        ;
; flash_req7_addr[8..7]      ; Input  ; Info     ; Stuck at VCC                                                                        ;
; flash_req7_addr[12..9]     ; Input  ; Info     ; Stuck at GND                                                                        ;
; flash_req8_addr[11..10]    ; Input  ; Info     ; Stuck at VCC                                                                        ;
; flash_req8_addr[12]        ; Input  ; Info     ; Stuck at GND                                                                        ;
; flash_data_out             ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+----------------------------+--------+----------+-------------------------------------------------------------------------------------+


+------------------------------------------------+
; Port Connectivity Checks: "int_osc:oscillator" ;
+--------+-------+----------+--------------------+
; Port   ; Type  ; Severity ; Details            ;
+--------+-------+----------+--------------------+
; oscena ; Input ; Info     ; Stuck at VCC       ;
+--------+-------+----------+--------------------+


+-----------------------------------------------------+
; Post-Synthesis Netlist Statistics for Top Partition ;
+------------------------+----------------------------+
; Type                   ; Count                      ;
+------------------------+----------------------------+
; boundary_port          ; 57                         ;
; cycloneiii_ff          ; 6162                       ;
;     CLR                ; 1595                       ;
;     CLR SCLR           ; 9                          ;
;     CLR SLD            ; 39                         ;
;     ENA                ; 257                        ;
;     ENA CLR            ; 3619                       ;
;     ENA CLR SCLR       ; 38                         ;
;     ENA CLR SCLR SLD   ; 24                         ;
;     ENA CLR SLD        ; 366                        ;
;     ENA SCLR           ; 11                         ;
;     ENA SLD            ; 4                          ;
;     SCLR               ; 29                         ;
;     SCLR SLD           ; 10                         ;
;     SLD                ; 1                          ;
;     plain              ; 160                        ;
; cycloneiii_io_obuf     ; 25                         ;
; cycloneiii_lcell_comb  ; 10385                      ;
;     arith              ; 2828                       ;
;         1 data inputs  ; 1                          ;
;         2 data inputs  ; 1098                       ;
;         3 data inputs  ; 1729                       ;
;     normal             ; 7557                       ;
;         0 data inputs  ; 44                         ;
;         1 data inputs  ; 266                        ;
;         2 data inputs  ; 801                        ;
;         3 data inputs  ; 1687                       ;
;         4 data inputs  ; 4759                       ;
; cycloneiii_mac_mult    ; 23                         ;
; cycloneiii_mac_out     ; 23                         ;
; cycloneiii_pll         ; 1                          ;
; cycloneiii_ram_block   ; 585                        ;
; fiftyfivenm_oscillator ; 1                          ;
; fiftyfivenm_unvm       ; 1                          ;
;                        ;                            ;
; Max LUT depth          ; 21.00                      ;
; Average LUT depth      ; 5.44                       ;
+------------------------+----------------------------+


+-------------------------------+
; Elapsed Time Per Partition    ;
+----------------+--------------+
; Partition Name ; Elapsed Time ;
+----------------+--------------+
; Top            ; 00:00:13     ;
+----------------+--------------+


+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus Prime Analysis & Synthesis
    Info: Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition
    Info: Processing started: Fri Jun 19 21:53:31 2026
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off pokeymax -c pokeymax
Warning (18236): Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
Info (20030): Parallel compilation is enabled and will use 16 of the 24 processors detected
Info (12021): Found 2 design units, including 1 entities, in source file audio_signal_detector.vhd
    Info (12022): Found design unit 1: audio_signal_detector-vhdl File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/audio_signal_detector.vhd Line: 31
    Info (12023): Found entity 1: audio_signal_detector File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/audio_signal_detector.vhd Line: 18
Info (12021): Found 2 design units, including 1 entities, in source file flash_controller.vhd
    Info (12022): Found design unit 1: flash_controller-vhdl File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/flash_controller.vhd Line: 54
    Info (12023): Found entity 1: flash_controller File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/flash_controller.vhd Line: 19
Info (12021): Found 2 design units, including 1 entities, in source file stereo_detect.vhd
    Info (12022): Found design unit 1: stereo_detect-vhdl File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/stereo_detect.vhd Line: 24
    Info (12023): Found entity 1: stereo_detect File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/stereo_detect.vhd Line: 13
Info (12021): Found 2 design units, including 1 entities, in source file iox_glue.vhdl
    Info (12022): Found design unit 1: iox_glue-vhdl File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/iox_glue.vhdl Line: 46
    Info (12023): Found entity 1: iox_glue File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/iox_glue.vhdl Line: 22
Info (12021): Found 2 design units, including 1 entities, in source file i2c_master.vhd
    Info (12022): Found design unit 1: i2c_master-logic File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/i2c_master.vhd Line: 54
    Info (12023): Found entity 1: i2c_master File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/i2c_master.vhd Line: 36
Info (12021): Found 2 design units, including 1 entities, in source file slave_timing_6502.vhd
    Info (12022): Found design unit 1: slave_timing_6502-vhdl File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/slave_timing_6502.vhd Line: 40
    Info (12023): Found entity 1: slave_timing_6502 File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/slave_timing_6502.vhd Line: 6
Info (12021): Found 2 design units, including 1 entities, in source file pll_reset_sync.vhdl
    Info (12022): Found design unit 1: pll_reset_sync-rtl File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pll_reset_sync.vhdl Line: 16
    Info (12023): Found entity 1: pll_reset_sync File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pll_reset_sync.vhdl Line: 5
Info (12021): Found 2 design units, including 1 entities, in source file complete_address_decoder.vhdl
    Info (12022): Found design unit 1: complete_address_decoder-tree File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/complete_address_decoder.vhdl Line: 30
    Info (12023): Found entity 1: complete_address_decoder File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/complete_address_decoder.vhdl Line: 12
Info (12021): Found 2 design units, including 1 entities, in source file syncreset_enable_divider.vhd
    Info (12022): Found design unit 1: syncreset_enable_divider-vhdl File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/syncreset_enable_divider.vhd Line: 25
    Info (12023): Found entity 1: syncreset_enable_divider File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/syncreset_enable_divider.vhd Line: 12
Info (12021): Found 2 design units, including 1 entities, in source file enable_divider.vhdl
    Info (12022): Found design unit 1: enable_divider-vhdl File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/enable_divider.vhdl Line: 24
    Info (12023): Found entity 1: enable_divider File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/enable_divider.vhdl Line: 12
Info (12021): Found 2 design units, including 1 entities, in source file delay_line.vhdl
    Info (12022): Found design unit 1: delay_line-vhdl File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/delay_line.vhdl Line: 26
    Info (12023): Found entity 1: delay_line File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/delay_line.vhdl Line: 12
Info (12021): Found 2 design units, including 1 entities, in source file wide_delay_line.vhdl
    Info (12022): Found design unit 1: wide_delay_line-vhdl File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/wide_delay_line.vhdl Line: 26
    Info (12023): Found entity 1: wide_delay_line File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/wide_delay_line.vhdl Line: 12
Info (12021): Found 2 design units, including 1 entities, in source file latch_delay_line.vhdl
    Info (12022): Found design unit 1: latch_delay_line-vhdl File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/latch_delay_line.vhdl Line: 26
    Info (12023): Found entity 1: latch_delay_line File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/latch_delay_line.vhdl Line: 12
Info (12021): Found 2 design units, including 1 entities, in source file sigmadelta_1storder.vhd
    Info (12022): Found design unit 1: sigmadelta_1storder-vhdl File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/sigmadelta_1storder.vhd Line: 27
    Info (12023): Found entity 1: sigmadelta_1storder File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/sigmadelta_1storder.vhd Line: 16
Info (12021): Found 2 design units, including 1 entities, in source file sigmadelta_2ndorder.vhd
    Info (12022): Found design unit 1: sigmadelta_2ndorder-vhdl File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/sigmadelta_2ndorder.vhd Line: 27
    Info (12023): Found entity 1: sigmadelta_2ndorder File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/sigmadelta_2ndorder.vhd Line: 14
Info (12021): Found 2 design units, including 1 entities, in source file sigmadelta_dither.vhd
    Info (12022): Found design unit 1: sigmadelta_dither-vhdl File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/sigmadelta_dither.vhd Line: 32
    Info (12023): Found entity 1: sigmadelta_dither File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/sigmadelta_dither.vhd Line: 14
Info (12021): Found 2 design units, including 1 entities, in source file sigmadelta_2ndorder_dither.vhd
    Info (12022): Found design unit 1: sigmadelta_2ndorder_dither-vhdl File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/sigmadelta_2ndorder_dither.vhd Line: 32
    Info (12023): Found entity 1: sigmadelta_2ndorder_dither File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/sigmadelta_2ndorder_dither.vhd Line: 14
Info (12021): Found 2 design units, including 1 entities, in source file filtered_sigmadelta.vhd
    Info (12022): Found design unit 1: filtered_sigmadelta-vhdl File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/filtered_sigmadelta.vhd Line: 34
    Info (12023): Found entity 1: filtered_sigmadelta File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/filtered_sigmadelta.vhd Line: 13
Info (12021): Found 2 design units, including 1 entities, in source file fir_filter.vhdl
    Info (12022): Found design unit 1: fir_filter-vhdl File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/fir_filter.vhdl Line: 40
    Info (12023): Found entity 1: fir_filter File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/fir_filter.vhdl Line: 15
Warning (12019): Can't analyze file -- file fir_rom.vhdl is missing
Info (12021): Found 2 design units, including 1 entities, in source file generic_ram_infer.vhdl
    Info (12022): Found design unit 1: generic_ram_infer-rtl File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/generic_ram_infer.vhdl Line: 30
    Info (12023): Found entity 1: generic_ram_infer File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/generic_ram_infer.vhdl Line: 12
Info (12021): Found 2 design units, including 1 entities, in source file m9k_grouped.vhdl
    Info (12022): Found design unit 1: m9k_grouped-rtl File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/m9k_grouped.vhdl Line: 38
    Info (12023): Found entity 1: m9k_grouped File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/m9k_grouped.vhdl Line: 14
Info (12021): Found 2 design units, including 1 entities, in source file simple_low_pass_filter.vhdl
    Info (12022): Found design unit 1: simple_low_pass_filter-vhdl File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/simple_low_pass_filter.vhdl Line: 29
    Info (12023): Found entity 1: simple_low_pass_filter File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/simple_low_pass_filter.vhdl Line: 19
Info (12021): Found 2 design units, including 1 entities, in source file pokey/pokey_poly_17_9.vhdl
    Info (12022): Found design unit 1: pokey_poly_17_9-vhdl File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokey/pokey_poly_17_9.vhdl Line: 27
    Info (12023): Found entity 1: pokey_poly_17_9 File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokey/pokey_poly_17_9.vhdl Line: 12
Info (12021): Found 2 design units, including 1 entities, in source file pokey/pokey_poly_5.vhdl
    Info (12022): Found design unit 1: pokey_poly_5-vhdl File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokey/pokey_poly_5.vhdl Line: 24
    Info (12023): Found entity 1: pokey_poly_5 File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokey/pokey_poly_5.vhdl Line: 12
Info (12021): Found 2 design units, including 1 entities, in source file pokey/pokey_poly_4.vhdl
    Info (12022): Found design unit 1: pokey_poly_4-vhdl File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokey/pokey_poly_4.vhdl Line: 24
    Info (12023): Found entity 1: pokey_poly_4 File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokey/pokey_poly_4.vhdl Line: 12
Info (12021): Found 2 design units, including 1 entities, in source file pokey/pokey_noise_filter.vhdl
    Info (12022): Found design unit 1: pokey_noise_filter-vhdl File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokey/pokey_noise_filter.vhdl Line: 32
    Info (12023): Found entity 1: pokey_noise_filter File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokey/pokey_noise_filter.vhdl Line: 12
Info (12021): Found 2 design units, including 1 entities, in source file pokey/pokey_mixer_mux.vhdl
    Info (12022): Found design unit 1: pokey_mixer_mux-vhdl File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokey/pokey_mixer_mux.vhdl Line: 36
    Info (12023): Found entity 1: pokey_mixer_mux File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokey/pokey_mixer_mux.vhdl Line: 13
Info (12021): Found 2 design units, including 1 entities, in source file pokey/pokey_mixer.vhdl
    Info (12022): Found design unit 1: pokey_mixer-vhdl File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokey/pokey_mixer.vhdl Line: 24
    Info (12023): Found entity 1: pokey_mixer File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokey/pokey_mixer.vhdl Line: 13
Info (12021): Found 2 design units, including 1 entities, in source file pokey/pokey_keyboard_scanner.vhdl
    Info (12022): Found design unit 1: pokey_keyboard_scanner-vhdl File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokey/pokey_keyboard_scanner.vhdl Line: 33
    Info (12023): Found entity 1: pokey_keyboard_scanner File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokey/pokey_keyboard_scanner.vhdl Line: 12
Info (12021): Found 2 design units, including 1 entities, in source file pokey/pokey_countdown_timer.vhdl
    Info (12022): Found design unit 1: pokey_countdown_timer-vhdl File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokey/pokey_countdown_timer.vhdl Line: 28
    Info (12023): Found entity 1: pokey_countdown_timer File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokey/pokey_countdown_timer.vhdl Line: 12
Info (12021): Found 2 design units, including 1 entities, in source file pokey/pokey.vhdl
    Info (12022): Found design unit 1: pokey-vhdl File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokey/pokey.vhdl Line: 63
    Info (12023): Found entity 1: pokey File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokey/pokey.vhdl Line: 14
Info (12021): Found 2 design units, including 1 entities, in source file phi_mult.vhdl
    Info (12022): Found design unit 1: phi_mult-vhdl File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/phi_mult.vhdl Line: 21
    Info (12023): Found entity 1: phi_mult File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/phi_mult.vhdl Line: 12
Info (12021): Found 2 design units, including 1 entities, in source file synchronizer.vhdl
    Info (12022): Found design unit 1: synchronizer-vhdl File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/synchronizer.vhdl Line: 21
    Info (12023): Found entity 1: synchronizer File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/synchronizer.vhdl Line: 12
Info (12021): Found 1 design units, including 0 entities, in source file audiotypes.vhdl
    Info (12022): Found design unit 1: AudioTypes File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/audiotypes.vhdl Line: 5
Info (12021): Found 2 design units, including 1 entities, in source file dc_blocker.vhdl
    Info (12022): Found design unit 1: dc_blocker-vhdl File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/dc_blocker.vhdl Line: 42
    Info (12023): Found entity 1: dc_blocker File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/dc_blocker.vhdl Line: 24
Info (12021): Found 2 design units, including 1 entities, in source file mixer.vhdl
    Info (12022): Found design unit 1: mixer-vhdl File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/mixer.vhdl Line: 58
    Info (12023): Found entity 1: mixer File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/mixer.vhdl Line: 17
Info (12021): Found 2 design units, including 1 entities, in source file clockgen.vhd
    Info (12022): Found design unit 1: clockgen-vhdl File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/clockgen.vhd Line: 35
    Info (12023): Found entity 1: clockgen File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/clockgen.vhd Line: 17
Info (12021): Found 2 design units, including 1 entities, in source file spdif_transmitter.vhdl
    Info (12022): Found design unit 1: spdif_transmitter-behavioral File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/spdif_transmitter.vhdl Line: 16
    Info (12023): Found entity 1: spdif_transmitter File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/spdif_transmitter.vhdl Line: 7
Info (12021): Found 2 design units, including 1 entities, in source file ps2_keyboard.vhdl
    Info (12022): Found design unit 1: ps2_keyboard-vhdl File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/ps2_keyboard.vhdl Line: 35
    Info (12023): Found entity 1: ps2_keyboard File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/ps2_keyboard.vhdl Line: 20
Info (12021): Found 2 design units, including 1 entities, in source file ps2_to_atari800.vhdl
    Info (12022): Found design unit 1: ps2_to_atari800-vhdl File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/ps2_to_atari800.vhdl Line: 51
    Info (12023): Found entity 1: ps2_to_atari800 File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/ps2_to_atari800.vhdl Line: 18
Info (12021): Found 2 design units, including 1 entities, in source file pokeymax.vhd
    Info (12022): Found design unit 1: pokeymax-vhdl File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd Line: 119
    Info (12023): Found entity 1: pokeymax File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd Line: 18
Info (12021): Found 2 design units, including 1 entities, in source file PSG/envelope.vhdl
    Info (12022): Found design unit 1: PSG_envelope-vhdl File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/PSG/envelope.vhdl Line: 28
    Info (12023): Found entity 1: PSG_envelope File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/PSG/envelope.vhdl Line: 12
Info (12021): Found 2 design units, including 1 entities, in source file PSG/noise.vhdl
    Info (12022): Found design unit 1: PSG_noise-vhdl File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/PSG/noise.vhdl Line: 24
    Info (12023): Found entity 1: PSG_noise File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/PSG/noise.vhdl Line: 12
Info (12021): Found 2 design units, including 1 entities, in source file PSG/top.vhdl
    Info (12022): Found design unit 1: PSG_top-vhdl File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/PSG/top.vhdl Line: 49
    Info (12023): Found entity 1: PSG_top File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/PSG/top.vhdl Line: 18
Info (12021): Found 2 design units, including 1 entities, in source file PSG/freqdiv.vhdl
    Info (12022): Found design unit 1: PSG_freqdiv-vhdl File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/PSG/freqdiv.vhdl Line: 31
    Info (12023): Found entity 1: PSG_freqdiv File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/PSG/freqdiv.vhdl Line: 12
Info (12021): Found 2 design units, including 1 entities, in source file PSG/mixer.vhdl
    Info (12022): Found design unit 1: PSG_mixer-vhdl File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/PSG/mixer.vhdl Line: 29
    Info (12023): Found entity 1: PSG_mixer File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/PSG/mixer.vhdl Line: 12
Info (12021): Found 2 design units, including 1 entities, in source file PSG/volume.vhdl
    Info (12022): Found design unit 1: PSG_volume-vhdl File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/PSG/volume.vhdl Line: 28
    Info (12023): Found entity 1: PSG_volume File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/PSG/volume.vhdl Line: 12
Info (12021): Found 2 design units, including 1 entities, in source file PSG/volume_profile.vhdl
    Info (12022): Found design unit 1: PSG_volume_profile-vhdl File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/PSG/volume_profile.vhdl Line: 41
    Info (12023): Found entity 1: PSG_volume_profile File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/PSG/volume_profile.vhdl Line: 13
Info (12021): Found 2 design units, including 1 entities, in source file SID/top.vhdl
    Info (12022): Found design unit 1: SID_top-vhdl File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/top.vhdl Line: 64
    Info (12023): Found entity 1: SID_top File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/top.vhdl Line: 17
Info (12021): Found 2 design units, including 1 entities, in source file SID/oscillator.vhdl
    Info (12022): Found design unit 1: SID_oscillator-vhdl File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/oscillator.vhdl Line: 31
    Info (12023): Found entity 1: SID_oscillator File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/oscillator.vhdl Line: 12
Info (12021): Found 2 design units, including 1 entities, in source file SID/wavegen.vhdl
    Info (12022): Found design unit 1: SID_wavegen-vhdl File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/wavegen.vhdl Line: 43
    Info (12023): Found entity 1: SID_wavegen File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/wavegen.vhdl Line: 16
Info (12021): Found 2 design units, including 1 entities, in source file SID/envelope.vhdl
    Info (12022): Found design unit 1: SID_envelope-vhdl File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/envelope.vhdl Line: 36
    Info (12023): Found entity 1: SID_envelope File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/envelope.vhdl Line: 13
Info (12021): Found 2 design units, including 1 entities, in source file SID/envelope_tapmatch.vhdl
    Info (12022): Found design unit 1: SID_envelope_tapmatch-vhdl File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/envelope_tapmatch.vhdl Line: 31
    Info (12023): Found entity 1: SID_envelope_tapmatch File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/envelope_tapmatch.vhdl Line: 13
Info (12021): Found 2 design units, including 1 entities, in source file SID/amplitudeModulator.vhdl
    Info (12022): Found design unit 1: SID_amplitudeModulator-vhdl File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/amplitudeModulator.vhdl Line: 29
    Info (12023): Found entity 1: SID_amplitudeModulator File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/amplitudeModulator.vhdl Line: 12
Info (12021): Found 2 design units, including 1 entities, in source file SID/preFilterSum.vhdl
    Info (12022): Found design unit 1: SID_preFilterSum-vhdl File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/preFilterSum.vhdl Line: 31
    Info (12023): Found entity 1: SID_preFilterSum File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/preFilterSum.vhdl Line: 12
Info (12021): Found 2 design units, including 1 entities, in source file SID/filter.vhdl
    Info (12022): Found design unit 1: SID_filter-vhdl File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/filter.vhdl Line: 147
    Info (12023): Found entity 1: SID_filter File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/filter.vhdl Line: 48
Info (12021): Found 2 design units, including 1 entities, in source file SID/f_distortion.vhdl
    Info (12022): Found design unit 1: SID_f_distortion-vhdl File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/f_distortion.vhdl Line: 24
    Info (12023): Found entity 1: SID_f_distortion File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/f_distortion.vhdl Line: 12
Info (12021): Found 2 design units, including 1 entities, in source file SID/f_distortion_mux.vhdl
    Info (12022): Found design unit 1: SID_f_distortion_mux-vhdl File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/f_distortion_mux.vhdl Line: 33
    Info (12023): Found entity 1: SID_f_distortion_mux File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/f_distortion_mux.vhdl Line: 12
Info (12021): Found 2 design units, including 1 entities, in source file SID/postFilterSum.vhdl
    Info (12022): Found design unit 1: SID_postFilterSum-vhdl File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/postFilterSum.vhdl Line: 30
    Info (12023): Found entity 1: SID_postFilterSum File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/postFilterSum.vhdl Line: 12
Info (12021): Found 2 design units, including 1 entities, in source file sample/channel.vhdl
    Info (12022): Found design unit 1: sample_channel-vhdl File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/sample/channel.vhdl Line: 33
    Info (12023): Found entity 1: sample_channel File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/sample/channel.vhdl Line: 13
Info (12021): Found 2 design units, including 1 entities, in source file sample/adpcm.vhdl
    Info (12022): Found design unit 1: sample_adpcm-vhdl File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/sample/adpcm.vhdl Line: 39
    Info (12023): Found entity 1: sample_adpcm File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/sample/adpcm.vhdl Line: 13
Info (12021): Found 2 design units, including 1 entities, in source file sample/top.vhdl
    Info (12022): Found design unit 1: sample_top-vhdl File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/sample/top.vhdl Line: 56
    Info (12023): Found entity 1: sample_top File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/sample/top.vhdl Line: 17
Info (12021): Found 2 design units, including 1 entities, in source file covox/top.vhdl
    Info (12022): Found design unit 1: covox_top-vhdl File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/covox/top.vhdl Line: 33
    Info (12023): Found entity 1: covox_top File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/covox/top.vhdl Line: 17
Info (12021): Found 2 design units, including 1 entities, in source file int_osc/synthesis/int_osc.vhd
    Info (12022): Found design unit 1: int_osc-rtl File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/int_osc/synthesis/int_osc.vhd Line: 16
    Info (12023): Found entity 1: int_osc File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/int_osc/synthesis/int_osc.vhd Line: 9
Info (12021): Found 1 design units, including 1 entities, in source file int_osc/synthesis/submodules/altera_int_osc.v
    Info (12023): Found entity 1: altera_int_osc File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/int_osc/synthesis/submodules/altera_int_osc.v Line: 38
Info (12021): Found 2 design units, including 1 entities, in source file pll.vhd
    Info (12022): Found design unit 1: pll-SYN File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pll.vhd Line: 55
    Info (12023): Found entity 1: pll File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pll.vhd Line: 43
Info (12021): Found 2 design units, including 1 entities, in source file flash/synthesis/flash.vhd
    Info (12022): Found design unit 1: flash-rtl File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/flash/synthesis/flash.vhd Line: 29
    Info (12023): Found entity 1: flash File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/flash/synthesis/flash.vhd Line: 9
Info (12021): Found 7 design units, including 7 entities, in source file flash/synthesis/submodules/altera_onchip_flash_util.v
    Info (12023): Found entity 1: altera_onchip_flash_address_range_check File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/flash/synthesis/submodules/altera_onchip_flash_util.v Line: 38
    Info (12023): Found entity 2: altera_onchip_flash_address_write_protection_check File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/flash/synthesis/submodules/altera_onchip_flash_util.v Line: 55
    Info (12023): Found entity 3: altera_onchip_flash_s_address_write_protection_check File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/flash/synthesis/submodules/altera_onchip_flash_util.v Line: 109
    Info (12023): Found entity 4: altera_onchip_flash_a_address_write_protection_check File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/flash/synthesis/submodules/altera_onchip_flash_util.v Line: 147
    Info (12023): Found entity 5: altera_onchip_flash_convert_address File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/flash/synthesis/submodules/altera_onchip_flash_util.v Line: 197
    Info (12023): Found entity 6: altera_onchip_flash_convert_sector File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/flash/synthesis/submodules/altera_onchip_flash_util.v Line: 219
    Info (12023): Found entity 7: altera_onchip_flash_counter File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/flash/synthesis/submodules/altera_onchip_flash_util.v Line: 244
Info (12021): Found 1 design units, including 1 entities, in source file flash/synthesis/submodules/altera_onchip_flash.v
    Info (12023): Found entity 1: altera_onchip_flash File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/flash/synthesis/submodules/altera_onchip_flash.v Line: 38
Info (12021): Found 1 design units, including 1 entities, in source file flash/synthesis/submodules/altera_onchip_flash_avmm_data_controller.v
    Info (12023): Found entity 1: altera_onchip_flash_avmm_data_controller File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/flash/synthesis/submodules/altera_onchip_flash_avmm_data_controller.v Line: 38
Info (12021): Found 1 design units, including 1 entities, in source file flash/synthesis/submodules/altera_onchip_flash_avmm_csr_controller.v
    Info (12023): Found entity 1: altera_onchip_flash_avmm_csr_controller File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/flash/synthesis/submodules/altera_onchip_flash_avmm_csr_controller.v Line: 38
Info (12021): Found 1 design units, including 1 entities, in source file flash/synthesis/submodules/rtl/altera_onchip_flash_block.v
    Info (12023): Found entity 1: altera_onchip_flash_block File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/flash/synthesis/submodules/rtl/altera_onchip_flash_block.v Line: 38
Info (12021): Found 2 design units, including 1 entities, in source file fir_sample_buffer.vhd
    Info (12022): Found design unit 1: fir_sample_buffer-SYN File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/fir_sample_buffer.vhd Line: 59
    Info (12023): Found entity 1: fir_sample_buffer File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/fir_sample_buffer.vhd Line: 43
Info (12021): Found 2 design units, including 1 entities, in source file fir_buffer.vhd
    Info (12022): Found design unit 1: fir_buffer-SYN File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/fir_buffer.vhd Line: 57
    Info (12023): Found entity 1: fir_buffer File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/fir_buffer.vhd Line: 43
Info (12127): Elaborating entity "pokeymax" for the top level hierarchy
Warning (10445): VHDL Subtype or Type Declaration warning at pokeymax.vhd(98): subtype or type has null range File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd Line: 98
Warning (10445): VHDL Subtype or Type Declaration warning at pokeymax.vhd(99): subtype or type has null range File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd Line: 99
Warning (10445): VHDL Subtype or Type Declaration warning at pokeymax.vhd(100): subtype or type has null range File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd Line: 100
Warning (10445): VHDL Subtype or Type Declaration warning at pokeymax.vhd(919): subtype or type has null range File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd Line: 919
Warning (10036): Verilog HDL or VHDL warning at pokeymax.vhd(404): object "mixer_audio_out" assigned a value but never read File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd Line: 404
Warning (10036): Verilog HDL or VHDL warning at pokeymax.vhd(405): object "mixer_l_enable" assigned a value but never read File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd Line: 405
Warning (10036): Verilog HDL or VHDL warning at pokeymax.vhd(406): object "mixer_r_enable" assigned a value but never read File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd Line: 406
Warning (10036): Verilog HDL or VHDL warning at pokeymax.vhd(407): object "mixer_audio_out_channel" assigned a value but never read File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd Line: 407
Warning (10036): Verilog HDL or VHDL warning at pokeymax.vhd(409): object "MIXER_SIGNED_REG" assigned a value but never read File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd Line: 409
Warning (10541): VHDL Signal Declaration warning at pokeymax.vhd(410): used implicit default value for signal "MIXER_SIGNED_NEXT" because signal was never assigned a value or an explicit default value. Use of implicit default value may introduce unintended design optimizations. File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd Line: 410
Warning (10541): VHDL Signal Declaration warning at pokeymax.vhd(505): used implicit default value for signal "fir_data_request" because signal was never assigned a value or an explicit default value. Use of implicit default value may introduce unintended design optimizations. File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd Line: 505
Warning (10541): VHDL Signal Declaration warning at pokeymax.vhd(506): used implicit default value for signal "fir_data_address" because signal was never assigned a value or an explicit default value. Use of implicit default value may introduce unintended design optimizations. File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd Line: 506
Warning (10036): Verilog HDL or VHDL warning at pokeymax.vhd(507): object "fir_data_ready" assigned a value but never read File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd Line: 507
Warning (10036): Verilog HDL or VHDL warning at pokeymax.vhd(509): object "SIO_AUDIO_UNSIGNED" assigned a value but never read File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd Line: 509
Warning (10541): VHDL Signal Declaration warning at pokeymax.vhd(510): used implicit default value for signal "SIO_AUDIO_SIGNED" because signal was never assigned a value or an explicit default value. Use of implicit default value may introduce unintended design optimizations. File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd Line: 510
Warning (10445): VHDL Subtype or Type Declaration warning at pokeymax.vhd(604): subtype or type has null range File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd Line: 604
Warning (10296): VHDL warning at pokeymax.vhd(604): ignored assignment of value to null range File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd Line: 604
Warning (10445): VHDL Subtype or Type Declaration warning at pokeymax.vhd(607): subtype or type has null range File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd Line: 607
Warning (10296): VHDL warning at pokeymax.vhd(607): ignored assignment of value to null range File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd Line: 607
Warning (10492): VHDL Process Statement warning at pokeymax.vhd(2448): signal "SIO_RXD_ADC" is read inside the Process Statement but isn't in the Process Statement's sensitivity list File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd Line: 2448
Warning (10492): VHDL Process Statement warning at pokeymax.vhd(2450): signal "SIO_RXD_ADC" is read inside the Process Statement but isn't in the Process Statement's sensitivity list File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd Line: 2450
Warning (10492): VHDL Process Statement warning at pokeymax.vhd(2452): signal "SIO_RXD_ADC" is read inside the Process Statement but isn't in the Process Statement's sensitivity list File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd Line: 2452
Warning (10873): Using initial value X (don't care) for net "SAMPLE_AUDIO_IN_SIGNED[3..2]" at pokeymax.vhd(392) File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd Line: 392
Warning (10873): Using initial value X (don't care) for net "ADC_TX_P" at pokeymax.vhd(103) File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd Line: 103
Info (12128): Elaborating entity "int_osc" for hierarchy "int_osc:oscillator" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd Line: 550
Info (12128): Elaborating entity "altera_int_osc" for hierarchy "int_osc:oscillator|altera_int_osc:int_osc_0" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/int_osc/synthesis/int_osc.vhd Line: 31
Info (12128): Elaborating entity "flash_controller" for hierarchy "flash_controller:\flash_on:flash_controller_inst" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd Line: 581
Info (12128): Elaborating entity "flash" for hierarchy "flash_controller:\flash_on:flash_controller_inst|flash:flash1" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/flash_controller.vhd Line: 141
Warning (10296): VHDL warning at flash.vhd(102): ignored assignment of value to null range File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/flash/synthesis/flash.vhd Line: 102
Warning (10296): VHDL warning at flash.vhd(103): ignored assignment of value to null range File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/flash/synthesis/flash.vhd Line: 103
Info (12128): Elaborating entity "altera_onchip_flash" for hierarchy "flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/flash/synthesis/flash.vhd Line: 100
Info (12128): Elaborating entity "altera_onchip_flash_avmm_csr_controller" for hierarchy "flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_csr_controller:avmm_csr_controller" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/flash/synthesis/submodules/altera_onchip_flash.v Line: 203
Info (12128): Elaborating entity "altera_onchip_flash_avmm_data_controller" for hierarchy "flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/flash/synthesis/submodules/altera_onchip_flash.v Line: 282
Info (12128): Elaborating entity "altera_std_synchronizer" for hierarchy "flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|altera_std_synchronizer:stdsync_busy" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/flash/synthesis/submodules/altera_onchip_flash_avmm_data_controller.v Line: 570
Info (12130): Elaborated megafunction instantiation "flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|altera_std_synchronizer:stdsync_busy" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/flash/synthesis/submodules/altera_onchip_flash_avmm_data_controller.v Line: 570
Info (12133): Instantiated megafunction "flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|altera_std_synchronizer:stdsync_busy" with the following parameter: File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/flash/synthesis/submodules/altera_onchip_flash_avmm_data_controller.v Line: 570
    Info (12134): Parameter "depth" = "2"
Info (12128): Elaborating entity "lpm_shiftreg" for hierarchy "flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|lpm_shiftreg:ufm_data_shiftreg" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/flash/synthesis/submodules/altera_onchip_flash_avmm_data_controller.v Line: 1183
Info (12130): Elaborated megafunction instantiation "flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|lpm_shiftreg:ufm_data_shiftreg" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/flash/synthesis/submodules/altera_onchip_flash_avmm_data_controller.v Line: 1183
Info (12133): Instantiated megafunction "flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|lpm_shiftreg:ufm_data_shiftreg" with the following parameter: File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/flash/synthesis/submodules/altera_onchip_flash_avmm_data_controller.v Line: 1183
    Info (12134): Parameter "lpm_type" = "LPM_SHIFTREG"
    Info (12134): Parameter "lpm_width" = "32"
    Info (12134): Parameter "lpm_direction" = "LEFT"
Info (12128): Elaborating entity "altera_onchip_flash_address_range_check" for hierarchy "flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|altera_onchip_flash_address_range_check:address_range_checker" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/flash/synthesis/submodules/altera_onchip_flash_avmm_data_controller.v Line: 1193
Info (12128): Elaborating entity "altera_onchip_flash_convert_address" for hierarchy "flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|altera_onchip_flash_convert_address:address_convertor" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/flash/synthesis/submodules/altera_onchip_flash_avmm_data_controller.v Line: 1204
Info (12128): Elaborating entity "altera_onchip_flash_a_address_write_protection_check" for hierarchy "flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|altera_onchip_flash_a_address_write_protection_check:access_address_write_protection_checker" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/flash/synthesis/submodules/altera_onchip_flash_avmm_data_controller.v Line: 1246
Info (12128): Elaborating entity "altera_onchip_flash_s_address_write_protection_check" for hierarchy "flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|altera_onchip_flash_s_address_write_protection_check:sector_address_write_protection_checker" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/flash/synthesis/submodules/altera_onchip_flash_avmm_data_controller.v Line: 1256
Info (12128): Elaborating entity "altera_onchip_flash_convert_sector" for hierarchy "flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_avmm_data_controller:avmm_data_controller|altera_onchip_flash_convert_sector:sector_convertor" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/flash/synthesis/submodules/altera_onchip_flash_avmm_data_controller.v Line: 1267
Info (12128): Elaborating entity "altera_onchip_flash_block" for hierarchy "flash_controller:\flash_on:flash_controller_inst|flash:flash1|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_block:altera_onchip_flash_block" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/flash/synthesis/submodules/altera_onchip_flash.v Line: 327
Info (12128): Elaborating entity "synchronizer" for hierarchy "synchronizer:synchronizer_gtia_audio" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd Line: 682
Warning (12125): Using design file pllv3.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project
    Info (12022): Found design unit 1: pllv3-SYN File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pllv3.vhd Line: 56
    Info (12023): Found entity 1: pllv3 File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pllv3.vhd Line: 43
Info (12128): Elaborating entity "pllv3" for hierarchy "pllv3:\pll_v3_inst:pll_inst" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd Line: 703
Info (12128): Elaborating entity "altpll" for hierarchy "pllv3:\pll_v3_inst:pll_inst|altpll:altpll_component" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pllv3.vhd Line: 163
Info (12130): Elaborated megafunction instantiation "pllv3:\pll_v3_inst:pll_inst|altpll:altpll_component" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pllv3.vhd Line: 163
Info (12133): Instantiated megafunction "pllv3:\pll_v3_inst:pll_inst|altpll:altpll_component" with the following parameter: File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pllv3.vhd Line: 163
    Info (12134): Parameter "bandwidth_type" = "AUTO"
    Info (12134): Parameter "clk0_divide_by" = "6"
    Info (12134): Parameter "clk0_duty_cycle" = "50"
    Info (12134): Parameter "clk0_multiply_by" = "7"
    Info (12134): Parameter "clk0_phase_shift" = "0"
    Info (12134): Parameter "clk1_divide_by" = "3"
    Info (12134): Parameter "clk1_duty_cycle" = "50"
    Info (12134): Parameter "clk1_multiply_by" = "7"
    Info (12134): Parameter "clk1_phase_shift" = "0"
    Info (12134): Parameter "clk2_divide_by" = "1"
    Info (12134): Parameter "clk2_duty_cycle" = "50"
    Info (12134): Parameter "clk2_multiply_by" = "2"
    Info (12134): Parameter "clk2_phase_shift" = "0"
    Info (12134): Parameter "clk3_divide_by" = "8"
    Info (12134): Parameter "clk3_duty_cycle" = "50"
    Info (12134): Parameter "clk3_multiply_by" = "1"
    Info (12134): Parameter "clk3_phase_shift" = "0"
    Info (12134): Parameter "compensate_clock" = "CLK0"
    Info (12134): Parameter "inclk0_input_frequency" = "20345"
    Info (12134): Parameter "intended_device_family" = "MAX 10"
    Info (12134): Parameter "lpm_hint" = "CBX_MODULE_PREFIX=pllv3"
    Info (12134): Parameter "lpm_type" = "altpll"
    Info (12134): Parameter "operation_mode" = "NORMAL"
    Info (12134): Parameter "pll_type" = "AUTO"
    Info (12134): Parameter "port_activeclock" = "PORT_UNUSED"
    Info (12134): Parameter "port_areset" = "PORT_UNUSED"
    Info (12134): Parameter "port_clkbad0" = "PORT_UNUSED"
    Info (12134): Parameter "port_clkbad1" = "PORT_UNUSED"
    Info (12134): Parameter "port_clkloss" = "PORT_UNUSED"
    Info (12134): Parameter "port_clkswitch" = "PORT_UNUSED"
    Info (12134): Parameter "port_configupdate" = "PORT_UNUSED"
    Info (12134): Parameter "port_fbin" = "PORT_UNUSED"
    Info (12134): Parameter "port_inclk0" = "PORT_USED"
    Info (12134): Parameter "port_inclk1" = "PORT_UNUSED"
    Info (12134): Parameter "port_locked" = "PORT_USED"
    Info (12134): Parameter "port_pfdena" = "PORT_UNUSED"
    Info (12134): Parameter "port_phasecounterselect" = "PORT_UNUSED"
    Info (12134): Parameter "port_phasedone" = "PORT_UNUSED"
    Info (12134): Parameter "port_phasestep" = "PORT_UNUSED"
    Info (12134): Parameter "port_phaseupdown" = "PORT_UNUSED"
    Info (12134): Parameter "port_pllena" = "PORT_UNUSED"
    Info (12134): Parameter "port_scanaclr" = "PORT_UNUSED"
    Info (12134): Parameter "port_scanclk" = "PORT_UNUSED"
    Info (12134): Parameter "port_scanclkena" = "PORT_UNUSED"
    Info (12134): Parameter "port_scandata" = "PORT_UNUSED"
    Info (12134): Parameter "port_scandataout" = "PORT_UNUSED"
    Info (12134): Parameter "port_scandone" = "PORT_UNUSED"
    Info (12134): Parameter "port_scanread" = "PORT_UNUSED"
    Info (12134): Parameter "port_scanwrite" = "PORT_UNUSED"
    Info (12134): Parameter "port_clk0" = "PORT_USED"
    Info (12134): Parameter "port_clk1" = "PORT_USED"
    Info (12134): Parameter "port_clk2" = "PORT_USED"
    Info (12134): Parameter "port_clk3" = "PORT_USED"
    Info (12134): Parameter "port_clk4" = "PORT_UNUSED"
    Info (12134): Parameter "port_clk5" = "PORT_UNUSED"
    Info (12134): Parameter "port_clkena0" = "PORT_UNUSED"
    Info (12134): Parameter "port_clkena1" = "PORT_UNUSED"
    Info (12134): Parameter "port_clkena2" = "PORT_UNUSED"
    Info (12134): Parameter "port_clkena3" = "PORT_UNUSED"
    Info (12134): Parameter "port_clkena4" = "PORT_UNUSED"
    Info (12134): Parameter "port_clkena5" = "PORT_UNUSED"
    Info (12134): Parameter "port_extclk0" = "PORT_UNUSED"
    Info (12134): Parameter "port_extclk1" = "PORT_UNUSED"
    Info (12134): Parameter "port_extclk2" = "PORT_UNUSED"
    Info (12134): Parameter "port_extclk3" = "PORT_UNUSED"
    Info (12134): Parameter "self_reset_on_loss_lock" = "ON"
    Info (12134): Parameter "width_clock" = "5"
Info (12021): Found 1 design units, including 1 entities, in source file db/pllv3_altpll.v
    Info (12023): Found entity 1: pllv3_altpll File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/db/pllv3_altpll.v Line: 30
Info (12128): Elaborating entity "pllv3_altpll" for hierarchy "pllv3:\pll_v3_inst:pll_inst|altpll:altpll_component|pllv3_altpll:auto_generated" File: /home/markw/intelFPGA_lite/25.1std/quartus/libraries/megafunctions/altpll.tdf Line: 898
Info (12128): Elaborating entity "pll_reset_sync" for hierarchy "pll_reset_sync:pll_sync" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd Line: 713
Info (12128): Elaborating entity "slave_timing_6502" for hierarchy "slave_timing_6502:bus_adapt" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd Line: 726
Info (12128): Elaborating entity "stereo_detect" for hierarchy "stereo_detect:\auto_stereo:a4" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd Line: 762
Info (12128): Elaborating entity "pokey_mixer_mux" for hierarchy "pokey_mixer_mux:pokey_mixer_both" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd Line: 839
Info (12128): Elaborating entity "pokey" for hierarchy "pokey:pokey1" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd Line: 872
Info (12128): Elaborating entity "complete_address_decoder" for hierarchy "pokey:pokey1|complete_address_decoder:decode_addr1" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokey/pokey.vhdl Line: 621
Info (12128): Elaborating entity "wide_delay_line" for hierarchy "pokey:pokey1|wide_delay_line:audf0_delay" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokey/pokey.vhdl Line: 657
Warning (10445): VHDL Subtype or Type Declaration warning at wide_delay_line.vhdl(47): subtype or type has null range File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/wide_delay_line.vhdl Line: 47
Info (12128): Elaborating entity "pokey_countdown_timer" for hierarchy "pokey:pokey1|pokey_countdown_timer:timer0" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokey/pokey.vhdl Line: 674
Info (12128): Elaborating entity "delay_line" for hierarchy "pokey:pokey1|pokey_countdown_timer:timer0|delay_line:underflow0_delay" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokey/pokey_countdown_timer.vhdl Line: 62
Info (12128): Elaborating entity "latch_delay_line" for hierarchy "pokey:pokey1|latch_delay_line:twotone_del" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokey/pokey.vhdl Line: 701
Info (12128): Elaborating entity "latch_delay_line" for hierarchy "pokey:pokey1|latch_delay_line:stimer_delay" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokey/pokey.vhdl Line: 914
Info (12128): Elaborating entity "pokey_noise_filter" for hierarchy "pokey:pokey1|pokey_noise_filter:pokey_noise_filter0" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokey/pokey.vhdl Line: 921
Info (12128): Elaborating entity "syncreset_enable_divider" for hierarchy "pokey:pokey1|syncreset_enable_divider:enable_64_div" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokey/pokey.vhdl Line: 981
Info (12128): Elaborating entity "syncreset_enable_divider" for hierarchy "pokey:pokey1|syncreset_enable_divider:enable_15_div" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokey/pokey.vhdl Line: 985
Info (12128): Elaborating entity "pokey_poly_17_9" for hierarchy "pokey:pokey1|pokey_poly_17_9:poly_17_19_lfsr" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokey/pokey.vhdl Line: 992
Info (12128): Elaborating entity "pokey_poly_5" for hierarchy "pokey:pokey1|pokey_poly_5:poly_5_lfsr" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokey/pokey.vhdl Line: 995
Info (12128): Elaborating entity "pokey_poly_4" for hierarchy "pokey:pokey1|pokey_poly_4:poly_4_lfsr" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokey/pokey.vhdl Line: 998
Info (12128): Elaborating entity "delay_line" for hierarchy "pokey:pokey1|delay_line:serout_clock_delay" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokey/pokey.vhdl Line: 1044
Info (12128): Elaborating entity "delay_line" for hierarchy "pokey:pokey1|delay_line:serin_clock_delay" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokey/pokey.vhdl Line: 1048
Info (12128): Elaborating entity "pokey_keyboard_scanner" for hierarchy "pokey:pokey1|pokey_keyboard_scanner:\gen_custom_scan:pokey_keyboard_scanner1" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokey/pokey.vhdl Line: 1279
Info (12128): Elaborating entity "dc_blocker" for hierarchy "dc_blocker:pokey1_dc_blocker" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd Line: 904
Info (12128): Elaborating entity "pokey" for hierarchy "pokey:\POKEY_ON:1:pokeyx" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd Line: 932
Info (12128): Elaborating entity "clockgen" for hierarchy "clockgen:\sidpsg_on:clockgen1" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd Line: 969
Info (12128): Elaborating entity "SID_f_distortion_mux" for hierarchy "SID_f_distortion_mux:\sid_on:f_distortion_mux" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd Line: 1016
Info (12128): Elaborating entity "SID_f_distortion" for hierarchy "SID_f_distortion_mux:\sid_on:f_distortion_mux|SID_f_distortion:f_distortion" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/f_distortion_mux.vhdl Line: 50
Info (12128): Elaborating entity "SID_top" for hierarchy "SID_top:\sid_on:sid1" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd Line: 1035
Info (12128): Elaborating entity "complete_address_decoder" for hierarchy "SID_top:\sid_on:sid1|complete_address_decoder:decode_addr1" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/top.vhdl Line: 340
Info (12128): Elaborating entity "SID_oscillator" for hierarchy "SID_top:\sid_on:sid1|SID_oscillator:osc_a" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/top.vhdl Line: 571
Info (12128): Elaborating entity "SID_wavegen" for hierarchy "SID_top:\sid_on:sid1|SID_wavegen:wavegen_a" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/top.vhdl Line: 631
Info (12128): Elaborating entity "SID_envelope" for hierarchy "SID_top:\sid_on:sid1|SID_envelope:envelope_a" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/top.vhdl Line: 708
Info (12128): Elaborating entity "SID_envelope_tapmatch" for hierarchy "SID_top:\sid_on:sid1|SID_envelope_tapmatch:envelope_tapmatcher" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/top.vhdl Line: 771
Info (12128): Elaborating entity "SID_amplitudeModulator" for hierarchy "SID_top:\sid_on:sid1|SID_amplitudeModulator:vol_abc" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/top.vhdl Line: 789
Info (12128): Elaborating entity "SID_preFilterSum" for hierarchy "SID_top:\sid_on:sid1|SID_preFilterSum:prefilter" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/top.vhdl Line: 805
Info (12128): Elaborating entity "SID_filter" for hierarchy "SID_top:\sid_on:sid1|SID_filter:variable_state_filter" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/top.vhdl Line: 966
Info (12128): Elaborating entity "SID_postFilterSum" for hierarchy "SID_top:\sid_on:sid1|SID_postFilterSum:postfilter" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/top.vhdl Line: 986
Info (12128): Elaborating entity "PSG_top" for hierarchy "PSG_top:\psg_on:PSG_1" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd Line: 1183
Info (12128): Elaborating entity "PSG_freqdiv" for hierarchy "PSG_top:\psg_on:PSG_1|PSG_freqdiv:core_ticker" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/PSG/top.vhdl Line: 318
Info (12128): Elaborating entity "PSG_freqdiv" for hierarchy "PSG_top:\psg_on:PSG_1|PSG_freqdiv:channel_a_ticker" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/PSG/top.vhdl Line: 335
Info (12128): Elaborating entity "PSG_freqdiv" for hierarchy "PSG_top:\psg_on:PSG_1|PSG_freqdiv:noise_preticker" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/PSG/top.vhdl Line: 388
Info (12128): Elaborating entity "PSG_freqdiv" for hierarchy "PSG_top:\psg_on:PSG_1|PSG_freqdiv:noise_ticker" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/PSG/top.vhdl Line: 404
Info (12128): Elaborating entity "PSG_noise" for hierarchy "PSG_top:\psg_on:PSG_1|PSG_noise:noise" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/PSG/top.vhdl Line: 420
Info (12128): Elaborating entity "PSG_mixer" for hierarchy "PSG_top:\psg_on:PSG_1|PSG_mixer:mix_a" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/PSG/top.vhdl Line: 432
Info (12128): Elaborating entity "PSG_envelope" for hierarchy "PSG_top:\psg_on:PSG_1|PSG_envelope:envelope" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/PSG/top.vhdl Line: 481
Info (12128): Elaborating entity "PSG_freqdiv" for hierarchy "PSG_top:\psg_on:PSG_1|PSG_envelope:envelope|PSG_freqdiv:envelope_ticker" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/PSG/envelope.vhdl Line: 49
Info (12128): Elaborating entity "PSG_volume" for hierarchy "PSG_top:\psg_on:PSG_1|PSG_volume:vol_a" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/PSG/top.vhdl Line: 497
Info (12128): Elaborating entity "PSG_volume_profile" for hierarchy "PSG_volume_profile:\psg_on:vol_profile1" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd Line: 1215
Info (12128): Elaborating entity "sample_top" for hierarchy "sample_top:\sample_on:sample1" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd Line: 1299
Info (12128): Elaborating entity "sample_adpcm" for hierarchy "sample_top:\sample_on:sample1|sample_adpcm:adpcm_decoder" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/sample/top.vhdl Line: 279
Info (12128): Elaborating entity "sample_channel" for hierarchy "sample_top:\sample_on:sample1|sample_channel:ch0_inst" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/sample/top.vhdl Line: 493
Info (12128): Elaborating entity "m9k_grouped" for hierarchy "m9k_grouped:\sample_on:packed_ram64:sample_ram_inst" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd Line: 1354
Info (12128): Elaborating entity "generic_ram_infer" for hierarchy "m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:0:sample_ram_inst" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/m9k_grouped.vhdl Line: 118
Info (12128): Elaborating entity "mixer" for hierarchy "mixer:mixer1" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd Line: 1974
Info (12128): Elaborating entity "sigmadelta_dither" for hierarchy "sigmadelta_dither:dac_dithergen" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd Line: 2067
Info (12128): Elaborating entity "filtered_sigmadelta" for hierarchy "filtered_sigmadelta:dac_0" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd Line: 2080
Info (12128): Elaborating entity "sigmadelta_2ndorder" for hierarchy "filtered_sigmadelta:dac_0|sigmadelta_2ndorder:\gen_2ndorder_on:dac_2nd" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/filtered_sigmadelta.vhd Line: 96
Info (12128): Elaborating entity "simple_low_pass_filter" for hierarchy "simple_low_pass_filter:\spdif_on:filter_left" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd Line: 2159
Info (12128): Elaborating entity "spdif_transmitter" for hierarchy "spdif_transmitter:\spdif_on:spdif" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd Line: 2178
Warning (10540): VHDL Signal Declaration warning at spdif_transmitter.vhdl(25): used explicit default value for signal "channel_status" because signal was never assigned a value File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/spdif_transmitter.vhdl Line: 25
Info (12128): Elaborating entity "i2c_master" for hierarchy "i2c_master:\iox_on:i2c_master0" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd Line: 2197
Info (12128): Elaborating entity "iox_glue" for hierarchy "iox_glue:\iox_on:iox_glue" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd Line: 2215
Info (12128): Elaborating entity "ps2_to_atari800" for hierarchy "ps2_to_atari800:\ps2_on:keyboard_map1" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd Line: 2253
Info (12128): Elaborating entity "ps2_keyboard" for hierarchy "ps2_to_atari800:\ps2_on:keyboard_map1|ps2_keyboard:\gen_ps2_on:keyboard1" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/ps2_to_atari800.vhdl Line: 93
Info (12128): Elaborating entity "enable_divider" for hierarchy "ps2_to_atari800:\ps2_on:keyboard_map1|ps2_keyboard:\gen_ps2_on:keyboard1|enable_divider:enable_div" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/ps2_keyboard.vhdl Line: 190
Info (19000): Inferred 58 megafunctions from design logic
    Info (276029): Inferred altsyncram megafunction from the following design logic: "m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:2:sample_ram_inst|ram_block_rtl_0" 
        Info (286033): Parameter OPERATION_MODE set to SINGLE_PORT
        Info (286033): Parameter WIDTH_A set to 9
        Info (286033): Parameter WIDTHAD_A set to 10
        Info (286033): Parameter NUMWORDS_A set to 1024
        Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED
        Info (286033): Parameter ADDRESS_ACLR_A set to NONE
        Info (286033): Parameter OUTDATA_ACLR_A set to NONE
        Info (286033): Parameter INDATA_ACLR_A set to NONE
        Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
    Info (276029): Inferred altsyncram megafunction from the following design logic: "m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:10:sample_ram_inst|ram_block_rtl_0" 
        Info (286033): Parameter OPERATION_MODE set to SINGLE_PORT
        Info (286033): Parameter WIDTH_A set to 9
        Info (286033): Parameter WIDTHAD_A set to 10
        Info (286033): Parameter NUMWORDS_A set to 1024
        Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED
        Info (286033): Parameter ADDRESS_ACLR_A set to NONE
        Info (286033): Parameter OUTDATA_ACLR_A set to NONE
        Info (286033): Parameter INDATA_ACLR_A set to NONE
        Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
    Info (276029): Inferred altsyncram megafunction from the following design logic: "m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:18:sample_ram_inst|ram_block_rtl_0" 
        Info (286033): Parameter OPERATION_MODE set to SINGLE_PORT
        Info (286033): Parameter WIDTH_A set to 9
        Info (286033): Parameter WIDTHAD_A set to 10
        Info (286033): Parameter NUMWORDS_A set to 1024
        Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED
        Info (286033): Parameter ADDRESS_ACLR_A set to NONE
        Info (286033): Parameter OUTDATA_ACLR_A set to NONE
        Info (286033): Parameter INDATA_ACLR_A set to NONE
        Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
    Info (276029): Inferred altsyncram megafunction from the following design logic: "m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:26:sample_ram_inst|ram_block_rtl_0" 
        Info (286033): Parameter OPERATION_MODE set to SINGLE_PORT
        Info (286033): Parameter WIDTH_A set to 9
        Info (286033): Parameter WIDTHAD_A set to 10
        Info (286033): Parameter NUMWORDS_A set to 1024
        Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED
        Info (286033): Parameter ADDRESS_ACLR_A set to NONE
        Info (286033): Parameter OUTDATA_ACLR_A set to NONE
        Info (286033): Parameter INDATA_ACLR_A set to NONE
        Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
    Info (276029): Inferred altsyncram megafunction from the following design logic: "m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:34:sample_ram_inst|ram_block_rtl_0" 
        Info (286033): Parameter OPERATION_MODE set to SINGLE_PORT
        Info (286033): Parameter WIDTH_A set to 9
        Info (286033): Parameter WIDTHAD_A set to 10
        Info (286033): Parameter NUMWORDS_A set to 1024
        Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED
        Info (286033): Parameter ADDRESS_ACLR_A set to NONE
        Info (286033): Parameter OUTDATA_ACLR_A set to NONE
        Info (286033): Parameter INDATA_ACLR_A set to NONE
        Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
    Info (276029): Inferred altsyncram megafunction from the following design logic: "m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:42:sample_ram_inst|ram_block_rtl_0" 
        Info (286033): Parameter OPERATION_MODE set to SINGLE_PORT
        Info (286033): Parameter WIDTH_A set to 9
        Info (286033): Parameter WIDTHAD_A set to 10
        Info (286033): Parameter NUMWORDS_A set to 1024
        Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED
        Info (286033): Parameter ADDRESS_ACLR_A set to NONE
        Info (286033): Parameter OUTDATA_ACLR_A set to NONE
        Info (286033): Parameter INDATA_ACLR_A set to NONE
        Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
    Info (276029): Inferred altsyncram megafunction from the following design logic: "m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:50:sample_ram_inst|ram_block_rtl_0" 
        Info (286033): Parameter OPERATION_MODE set to SINGLE_PORT
        Info (286033): Parameter WIDTH_A set to 9
        Info (286033): Parameter WIDTHAD_A set to 10
        Info (286033): Parameter NUMWORDS_A set to 1024
        Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED
        Info (286033): Parameter ADDRESS_ACLR_A set to NONE
        Info (286033): Parameter OUTDATA_ACLR_A set to NONE
        Info (286033): Parameter INDATA_ACLR_A set to NONE
        Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
    Info (276029): Inferred altsyncram megafunction from the following design logic: "m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:56:sample_ram_inst|ram_block_rtl_0" 
        Info (286033): Parameter OPERATION_MODE set to SINGLE_PORT
        Info (286033): Parameter WIDTH_A set to 9
        Info (286033): Parameter WIDTHAD_A set to 10
        Info (286033): Parameter NUMWORDS_A set to 1024
        Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED
        Info (286033): Parameter ADDRESS_ACLR_A set to NONE
        Info (286033): Parameter OUTDATA_ACLR_A set to NONE
        Info (286033): Parameter INDATA_ACLR_A set to NONE
        Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
    Info (276029): Inferred altsyncram megafunction from the following design logic: "m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:0:sample_ram_inst|ram_block_rtl_0" 
        Info (286033): Parameter OPERATION_MODE set to SINGLE_PORT
        Info (286033): Parameter WIDTH_A set to 9
        Info (286033): Parameter WIDTHAD_A set to 10
        Info (286033): Parameter NUMWORDS_A set to 1024
        Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED
        Info (286033): Parameter ADDRESS_ACLR_A set to NONE
        Info (286033): Parameter OUTDATA_ACLR_A set to NONE
        Info (286033): Parameter INDATA_ACLR_A set to NONE
        Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
    Info (276029): Inferred altsyncram megafunction from the following design logic: "m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:1:sample_ram_inst|ram_block_rtl_0" 
        Info (286033): Parameter OPERATION_MODE set to SINGLE_PORT
        Info (286033): Parameter WIDTH_A set to 9
        Info (286033): Parameter WIDTHAD_A set to 10
        Info (286033): Parameter NUMWORDS_A set to 1024
        Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED
        Info (286033): Parameter ADDRESS_ACLR_A set to NONE
        Info (286033): Parameter OUTDATA_ACLR_A set to NONE
        Info (286033): Parameter INDATA_ACLR_A set to NONE
        Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
    Info (276029): Inferred altsyncram megafunction from the following design logic: "m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:3:sample_ram_inst|ram_block_rtl_0" 
        Info (286033): Parameter OPERATION_MODE set to SINGLE_PORT
        Info (286033): Parameter WIDTH_A set to 9
        Info (286033): Parameter WIDTHAD_A set to 10
        Info (286033): Parameter NUMWORDS_A set to 1024
        Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED
        Info (286033): Parameter ADDRESS_ACLR_A set to NONE
        Info (286033): Parameter OUTDATA_ACLR_A set to NONE
        Info (286033): Parameter INDATA_ACLR_A set to NONE
        Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
    Info (276029): Inferred altsyncram megafunction from the following design logic: "m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:4:sample_ram_inst|ram_block_rtl_0" 
        Info (286033): Parameter OPERATION_MODE set to SINGLE_PORT
        Info (286033): Parameter WIDTH_A set to 9
        Info (286033): Parameter WIDTHAD_A set to 10
        Info (286033): Parameter NUMWORDS_A set to 1024
        Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED
        Info (286033): Parameter ADDRESS_ACLR_A set to NONE
        Info (286033): Parameter OUTDATA_ACLR_A set to NONE
        Info (286033): Parameter INDATA_ACLR_A set to NONE
        Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
    Info (276029): Inferred altsyncram megafunction from the following design logic: "m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:5:sample_ram_inst|ram_block_rtl_0" 
        Info (286033): Parameter OPERATION_MODE set to SINGLE_PORT
        Info (286033): Parameter WIDTH_A set to 9
        Info (286033): Parameter WIDTHAD_A set to 10
        Info (286033): Parameter NUMWORDS_A set to 1024
        Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED
        Info (286033): Parameter ADDRESS_ACLR_A set to NONE
        Info (286033): Parameter OUTDATA_ACLR_A set to NONE
        Info (286033): Parameter INDATA_ACLR_A set to NONE
        Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
    Info (276029): Inferred altsyncram megafunction from the following design logic: "m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:6:sample_ram_inst|ram_block_rtl_0" 
        Info (286033): Parameter OPERATION_MODE set to SINGLE_PORT
        Info (286033): Parameter WIDTH_A set to 9
        Info (286033): Parameter WIDTHAD_A set to 10
        Info (286033): Parameter NUMWORDS_A set to 1024
        Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED
        Info (286033): Parameter ADDRESS_ACLR_A set to NONE
        Info (286033): Parameter OUTDATA_ACLR_A set to NONE
        Info (286033): Parameter INDATA_ACLR_A set to NONE
        Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
    Info (276029): Inferred altsyncram megafunction from the following design logic: "m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:7:sample_ram_inst|ram_block_rtl_0" 
        Info (286033): Parameter OPERATION_MODE set to SINGLE_PORT
        Info (286033): Parameter WIDTH_A set to 9
        Info (286033): Parameter WIDTHAD_A set to 10
        Info (286033): Parameter NUMWORDS_A set to 1024
        Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED
        Info (286033): Parameter ADDRESS_ACLR_A set to NONE
        Info (286033): Parameter OUTDATA_ACLR_A set to NONE
        Info (286033): Parameter INDATA_ACLR_A set to NONE
        Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
    Info (276029): Inferred altsyncram megafunction from the following design logic: "m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:8:sample_ram_inst|ram_block_rtl_0" 
        Info (286033): Parameter OPERATION_MODE set to SINGLE_PORT
        Info (286033): Parameter WIDTH_A set to 9
        Info (286033): Parameter WIDTHAD_A set to 10
        Info (286033): Parameter NUMWORDS_A set to 1024
        Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED
        Info (286033): Parameter ADDRESS_ACLR_A set to NONE
        Info (286033): Parameter OUTDATA_ACLR_A set to NONE
        Info (286033): Parameter INDATA_ACLR_A set to NONE
        Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
    Info (276029): Inferred altsyncram megafunction from the following design logic: "m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:9:sample_ram_inst|ram_block_rtl_0" 
        Info (286033): Parameter OPERATION_MODE set to SINGLE_PORT
        Info (286033): Parameter WIDTH_A set to 9
        Info (286033): Parameter WIDTHAD_A set to 10
        Info (286033): Parameter NUMWORDS_A set to 1024
        Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED
        Info (286033): Parameter ADDRESS_ACLR_A set to NONE
        Info (286033): Parameter OUTDATA_ACLR_A set to NONE
        Info (286033): Parameter INDATA_ACLR_A set to NONE
        Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
    Info (276029): Inferred altsyncram megafunction from the following design logic: "m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:11:sample_ram_inst|ram_block_rtl_0" 
        Info (286033): Parameter OPERATION_MODE set to SINGLE_PORT
        Info (286033): Parameter WIDTH_A set to 9
        Info (286033): Parameter WIDTHAD_A set to 10
        Info (286033): Parameter NUMWORDS_A set to 1024
        Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED
        Info (286033): Parameter ADDRESS_ACLR_A set to NONE
        Info (286033): Parameter OUTDATA_ACLR_A set to NONE
        Info (286033): Parameter INDATA_ACLR_A set to NONE
        Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
    Info (276029): Inferred altsyncram megafunction from the following design logic: "m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:12:sample_ram_inst|ram_block_rtl_0" 
        Info (286033): Parameter OPERATION_MODE set to SINGLE_PORT
        Info (286033): Parameter WIDTH_A set to 9
        Info (286033): Parameter WIDTHAD_A set to 10
        Info (286033): Parameter NUMWORDS_A set to 1024
        Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED
        Info (286033): Parameter ADDRESS_ACLR_A set to NONE
        Info (286033): Parameter OUTDATA_ACLR_A set to NONE
        Info (286033): Parameter INDATA_ACLR_A set to NONE
        Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
    Info (276029): Inferred altsyncram megafunction from the following design logic: "m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:13:sample_ram_inst|ram_block_rtl_0" 
        Info (286033): Parameter OPERATION_MODE set to SINGLE_PORT
        Info (286033): Parameter WIDTH_A set to 9
        Info (286033): Parameter WIDTHAD_A set to 10
        Info (286033): Parameter NUMWORDS_A set to 1024
        Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED
        Info (286033): Parameter ADDRESS_ACLR_A set to NONE
        Info (286033): Parameter OUTDATA_ACLR_A set to NONE
        Info (286033): Parameter INDATA_ACLR_A set to NONE
        Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
    Info (276029): Inferred altsyncram megafunction from the following design logic: "m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:14:sample_ram_inst|ram_block_rtl_0" 
        Info (286033): Parameter OPERATION_MODE set to SINGLE_PORT
        Info (286033): Parameter WIDTH_A set to 9
        Info (286033): Parameter WIDTHAD_A set to 10
        Info (286033): Parameter NUMWORDS_A set to 1024
        Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED
        Info (286033): Parameter ADDRESS_ACLR_A set to NONE
        Info (286033): Parameter OUTDATA_ACLR_A set to NONE
        Info (286033): Parameter INDATA_ACLR_A set to NONE
        Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
    Info (276029): Inferred altsyncram megafunction from the following design logic: "m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:15:sample_ram_inst|ram_block_rtl_0" 
        Info (286033): Parameter OPERATION_MODE set to SINGLE_PORT
        Info (286033): Parameter WIDTH_A set to 9
        Info (286033): Parameter WIDTHAD_A set to 10
        Info (286033): Parameter NUMWORDS_A set to 1024
        Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED
        Info (286033): Parameter ADDRESS_ACLR_A set to NONE
        Info (286033): Parameter OUTDATA_ACLR_A set to NONE
        Info (286033): Parameter INDATA_ACLR_A set to NONE
        Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
    Info (276029): Inferred altsyncram megafunction from the following design logic: "m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:16:sample_ram_inst|ram_block_rtl_0" 
        Info (286033): Parameter OPERATION_MODE set to SINGLE_PORT
        Info (286033): Parameter WIDTH_A set to 9
        Info (286033): Parameter WIDTHAD_A set to 10
        Info (286033): Parameter NUMWORDS_A set to 1024
        Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED
        Info (286033): Parameter ADDRESS_ACLR_A set to NONE
        Info (286033): Parameter OUTDATA_ACLR_A set to NONE
        Info (286033): Parameter INDATA_ACLR_A set to NONE
        Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
    Info (276029): Inferred altsyncram megafunction from the following design logic: "m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:17:sample_ram_inst|ram_block_rtl_0" 
        Info (286033): Parameter OPERATION_MODE set to SINGLE_PORT
        Info (286033): Parameter WIDTH_A set to 9
        Info (286033): Parameter WIDTHAD_A set to 10
        Info (286033): Parameter NUMWORDS_A set to 1024
        Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED
        Info (286033): Parameter ADDRESS_ACLR_A set to NONE
        Info (286033): Parameter OUTDATA_ACLR_A set to NONE
        Info (286033): Parameter INDATA_ACLR_A set to NONE
        Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
    Info (276029): Inferred altsyncram megafunction from the following design logic: "m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:19:sample_ram_inst|ram_block_rtl_0" 
        Info (286033): Parameter OPERATION_MODE set to SINGLE_PORT
        Info (286033): Parameter WIDTH_A set to 9
        Info (286033): Parameter WIDTHAD_A set to 10
        Info (286033): Parameter NUMWORDS_A set to 1024
        Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED
        Info (286033): Parameter ADDRESS_ACLR_A set to NONE
        Info (286033): Parameter OUTDATA_ACLR_A set to NONE
        Info (286033): Parameter INDATA_ACLR_A set to NONE
        Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
    Info (276029): Inferred altsyncram megafunction from the following design logic: "m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:20:sample_ram_inst|ram_block_rtl_0" 
        Info (286033): Parameter OPERATION_MODE set to SINGLE_PORT
        Info (286033): Parameter WIDTH_A set to 9
        Info (286033): Parameter WIDTHAD_A set to 10
        Info (286033): Parameter NUMWORDS_A set to 1024
        Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED
        Info (286033): Parameter ADDRESS_ACLR_A set to NONE
        Info (286033): Parameter OUTDATA_ACLR_A set to NONE
        Info (286033): Parameter INDATA_ACLR_A set to NONE
        Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
    Info (276029): Inferred altsyncram megafunction from the following design logic: "m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:21:sample_ram_inst|ram_block_rtl_0" 
        Info (286033): Parameter OPERATION_MODE set to SINGLE_PORT
        Info (286033): Parameter WIDTH_A set to 9
        Info (286033): Parameter WIDTHAD_A set to 10
        Info (286033): Parameter NUMWORDS_A set to 1024
        Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED
        Info (286033): Parameter ADDRESS_ACLR_A set to NONE
        Info (286033): Parameter OUTDATA_ACLR_A set to NONE
        Info (286033): Parameter INDATA_ACLR_A set to NONE
        Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
    Info (276029): Inferred altsyncram megafunction from the following design logic: "m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:22:sample_ram_inst|ram_block_rtl_0" 
        Info (286033): Parameter OPERATION_MODE set to SINGLE_PORT
        Info (286033): Parameter WIDTH_A set to 9
        Info (286033): Parameter WIDTHAD_A set to 10
        Info (286033): Parameter NUMWORDS_A set to 1024
        Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED
        Info (286033): Parameter ADDRESS_ACLR_A set to NONE
        Info (286033): Parameter OUTDATA_ACLR_A set to NONE
        Info (286033): Parameter INDATA_ACLR_A set to NONE
        Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
    Info (276029): Inferred altsyncram megafunction from the following design logic: "m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:23:sample_ram_inst|ram_block_rtl_0" 
        Info (286033): Parameter OPERATION_MODE set to SINGLE_PORT
        Info (286033): Parameter WIDTH_A set to 9
        Info (286033): Parameter WIDTHAD_A set to 10
        Info (286033): Parameter NUMWORDS_A set to 1024
        Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED
        Info (286033): Parameter ADDRESS_ACLR_A set to NONE
        Info (286033): Parameter OUTDATA_ACLR_A set to NONE
        Info (286033): Parameter INDATA_ACLR_A set to NONE
        Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
    Info (276029): Inferred altsyncram megafunction from the following design logic: "m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:24:sample_ram_inst|ram_block_rtl_0" 
        Info (286033): Parameter OPERATION_MODE set to SINGLE_PORT
        Info (286033): Parameter WIDTH_A set to 9
        Info (286033): Parameter WIDTHAD_A set to 10
        Info (286033): Parameter NUMWORDS_A set to 1024
        Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED
        Info (286033): Parameter ADDRESS_ACLR_A set to NONE
        Info (286033): Parameter OUTDATA_ACLR_A set to NONE
        Info (286033): Parameter INDATA_ACLR_A set to NONE
        Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
    Info (276029): Inferred altsyncram megafunction from the following design logic: "m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:25:sample_ram_inst|ram_block_rtl_0" 
        Info (286033): Parameter OPERATION_MODE set to SINGLE_PORT
        Info (286033): Parameter WIDTH_A set to 9
        Info (286033): Parameter WIDTHAD_A set to 10
        Info (286033): Parameter NUMWORDS_A set to 1024
        Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED
        Info (286033): Parameter ADDRESS_ACLR_A set to NONE
        Info (286033): Parameter OUTDATA_ACLR_A set to NONE
        Info (286033): Parameter INDATA_ACLR_A set to NONE
        Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
    Info (276029): Inferred altsyncram megafunction from the following design logic: "m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:27:sample_ram_inst|ram_block_rtl_0" 
        Info (286033): Parameter OPERATION_MODE set to SINGLE_PORT
        Info (286033): Parameter WIDTH_A set to 9
        Info (286033): Parameter WIDTHAD_A set to 10
        Info (286033): Parameter NUMWORDS_A set to 1024
        Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED
        Info (286033): Parameter ADDRESS_ACLR_A set to NONE
        Info (286033): Parameter OUTDATA_ACLR_A set to NONE
        Info (286033): Parameter INDATA_ACLR_A set to NONE
        Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
    Info (276029): Inferred altsyncram megafunction from the following design logic: "m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:28:sample_ram_inst|ram_block_rtl_0" 
        Info (286033): Parameter OPERATION_MODE set to SINGLE_PORT
        Info (286033): Parameter WIDTH_A set to 9
        Info (286033): Parameter WIDTHAD_A set to 10
        Info (286033): Parameter NUMWORDS_A set to 1024
        Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED
        Info (286033): Parameter ADDRESS_ACLR_A set to NONE
        Info (286033): Parameter OUTDATA_ACLR_A set to NONE
        Info (286033): Parameter INDATA_ACLR_A set to NONE
        Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
    Info (276029): Inferred altsyncram megafunction from the following design logic: "m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:29:sample_ram_inst|ram_block_rtl_0" 
        Info (286033): Parameter OPERATION_MODE set to SINGLE_PORT
        Info (286033): Parameter WIDTH_A set to 9
        Info (286033): Parameter WIDTHAD_A set to 10
        Info (286033): Parameter NUMWORDS_A set to 1024
        Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED
        Info (286033): Parameter ADDRESS_ACLR_A set to NONE
        Info (286033): Parameter OUTDATA_ACLR_A set to NONE
        Info (286033): Parameter INDATA_ACLR_A set to NONE
        Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
    Info (276029): Inferred altsyncram megafunction from the following design logic: "m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:30:sample_ram_inst|ram_block_rtl_0" 
        Info (286033): Parameter OPERATION_MODE set to SINGLE_PORT
        Info (286033): Parameter WIDTH_A set to 9
        Info (286033): Parameter WIDTHAD_A set to 10
        Info (286033): Parameter NUMWORDS_A set to 1024
        Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED
        Info (286033): Parameter ADDRESS_ACLR_A set to NONE
        Info (286033): Parameter OUTDATA_ACLR_A set to NONE
        Info (286033): Parameter INDATA_ACLR_A set to NONE
        Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
    Info (276029): Inferred altsyncram megafunction from the following design logic: "m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:31:sample_ram_inst|ram_block_rtl_0" 
        Info (286033): Parameter OPERATION_MODE set to SINGLE_PORT
        Info (286033): Parameter WIDTH_A set to 9
        Info (286033): Parameter WIDTHAD_A set to 10
        Info (286033): Parameter NUMWORDS_A set to 1024
        Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED
        Info (286033): Parameter ADDRESS_ACLR_A set to NONE
        Info (286033): Parameter OUTDATA_ACLR_A set to NONE
        Info (286033): Parameter INDATA_ACLR_A set to NONE
        Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
    Info (276029): Inferred altsyncram megafunction from the following design logic: "m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:32:sample_ram_inst|ram_block_rtl_0" 
        Info (286033): Parameter OPERATION_MODE set to SINGLE_PORT
        Info (286033): Parameter WIDTH_A set to 9
        Info (286033): Parameter WIDTHAD_A set to 10
        Info (286033): Parameter NUMWORDS_A set to 1024
        Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED
        Info (286033): Parameter ADDRESS_ACLR_A set to NONE
        Info (286033): Parameter OUTDATA_ACLR_A set to NONE
        Info (286033): Parameter INDATA_ACLR_A set to NONE
        Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
    Info (276029): Inferred altsyncram megafunction from the following design logic: "m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:33:sample_ram_inst|ram_block_rtl_0" 
        Info (286033): Parameter OPERATION_MODE set to SINGLE_PORT
        Info (286033): Parameter WIDTH_A set to 9
        Info (286033): Parameter WIDTHAD_A set to 10
        Info (286033): Parameter NUMWORDS_A set to 1024
        Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED
        Info (286033): Parameter ADDRESS_ACLR_A set to NONE
        Info (286033): Parameter OUTDATA_ACLR_A set to NONE
        Info (286033): Parameter INDATA_ACLR_A set to NONE
        Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
    Info (276029): Inferred altsyncram megafunction from the following design logic: "m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:35:sample_ram_inst|ram_block_rtl_0" 
        Info (286033): Parameter OPERATION_MODE set to SINGLE_PORT
        Info (286033): Parameter WIDTH_A set to 9
        Info (286033): Parameter WIDTHAD_A set to 10
        Info (286033): Parameter NUMWORDS_A set to 1024
        Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED
        Info (286033): Parameter ADDRESS_ACLR_A set to NONE
        Info (286033): Parameter OUTDATA_ACLR_A set to NONE
        Info (286033): Parameter INDATA_ACLR_A set to NONE
        Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
    Info (276029): Inferred altsyncram megafunction from the following design logic: "m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:36:sample_ram_inst|ram_block_rtl_0" 
        Info (286033): Parameter OPERATION_MODE set to SINGLE_PORT
        Info (286033): Parameter WIDTH_A set to 9
        Info (286033): Parameter WIDTHAD_A set to 10
        Info (286033): Parameter NUMWORDS_A set to 1024
        Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED
        Info (286033): Parameter ADDRESS_ACLR_A set to NONE
        Info (286033): Parameter OUTDATA_ACLR_A set to NONE
        Info (286033): Parameter INDATA_ACLR_A set to NONE
        Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
    Info (276029): Inferred altsyncram megafunction from the following design logic: "m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:37:sample_ram_inst|ram_block_rtl_0" 
        Info (286033): Parameter OPERATION_MODE set to SINGLE_PORT
        Info (286033): Parameter WIDTH_A set to 9
        Info (286033): Parameter WIDTHAD_A set to 10
        Info (286033): Parameter NUMWORDS_A set to 1024
        Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED
        Info (286033): Parameter ADDRESS_ACLR_A set to NONE
        Info (286033): Parameter OUTDATA_ACLR_A set to NONE
        Info (286033): Parameter INDATA_ACLR_A set to NONE
        Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
    Info (276029): Inferred altsyncram megafunction from the following design logic: "m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:38:sample_ram_inst|ram_block_rtl_0" 
        Info (286033): Parameter OPERATION_MODE set to SINGLE_PORT
        Info (286033): Parameter WIDTH_A set to 9
        Info (286033): Parameter WIDTHAD_A set to 10
        Info (286033): Parameter NUMWORDS_A set to 1024
        Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED
        Info (286033): Parameter ADDRESS_ACLR_A set to NONE
        Info (286033): Parameter OUTDATA_ACLR_A set to NONE
        Info (286033): Parameter INDATA_ACLR_A set to NONE
        Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
    Info (276029): Inferred altsyncram megafunction from the following design logic: "m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:39:sample_ram_inst|ram_block_rtl_0" 
        Info (286033): Parameter OPERATION_MODE set to SINGLE_PORT
        Info (286033): Parameter WIDTH_A set to 9
        Info (286033): Parameter WIDTHAD_A set to 10
        Info (286033): Parameter NUMWORDS_A set to 1024
        Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED
        Info (286033): Parameter ADDRESS_ACLR_A set to NONE
        Info (286033): Parameter OUTDATA_ACLR_A set to NONE
        Info (286033): Parameter INDATA_ACLR_A set to NONE
        Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
    Info (276029): Inferred altsyncram megafunction from the following design logic: "m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:40:sample_ram_inst|ram_block_rtl_0" 
        Info (286033): Parameter OPERATION_MODE set to SINGLE_PORT
        Info (286033): Parameter WIDTH_A set to 9
        Info (286033): Parameter WIDTHAD_A set to 10
        Info (286033): Parameter NUMWORDS_A set to 1024
        Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED
        Info (286033): Parameter ADDRESS_ACLR_A set to NONE
        Info (286033): Parameter OUTDATA_ACLR_A set to NONE
        Info (286033): Parameter INDATA_ACLR_A set to NONE
        Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
    Info (276029): Inferred altsyncram megafunction from the following design logic: "m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:41:sample_ram_inst|ram_block_rtl_0" 
        Info (286033): Parameter OPERATION_MODE set to SINGLE_PORT
        Info (286033): Parameter WIDTH_A set to 9
        Info (286033): Parameter WIDTHAD_A set to 10
        Info (286033): Parameter NUMWORDS_A set to 1024
        Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED
        Info (286033): Parameter ADDRESS_ACLR_A set to NONE
        Info (286033): Parameter OUTDATA_ACLR_A set to NONE
        Info (286033): Parameter INDATA_ACLR_A set to NONE
        Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
    Info (276029): Inferred altsyncram megafunction from the following design logic: "m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:43:sample_ram_inst|ram_block_rtl_0" 
        Info (286033): Parameter OPERATION_MODE set to SINGLE_PORT
        Info (286033): Parameter WIDTH_A set to 9
        Info (286033): Parameter WIDTHAD_A set to 10
        Info (286033): Parameter NUMWORDS_A set to 1024
        Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED
        Info (286033): Parameter ADDRESS_ACLR_A set to NONE
        Info (286033): Parameter OUTDATA_ACLR_A set to NONE
        Info (286033): Parameter INDATA_ACLR_A set to NONE
        Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
    Info (276029): Inferred altsyncram megafunction from the following design logic: "m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:44:sample_ram_inst|ram_block_rtl_0" 
        Info (286033): Parameter OPERATION_MODE set to SINGLE_PORT
        Info (286033): Parameter WIDTH_A set to 9
        Info (286033): Parameter WIDTHAD_A set to 10
        Info (286033): Parameter NUMWORDS_A set to 1024
        Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED
        Info (286033): Parameter ADDRESS_ACLR_A set to NONE
        Info (286033): Parameter OUTDATA_ACLR_A set to NONE
        Info (286033): Parameter INDATA_ACLR_A set to NONE
        Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
    Info (276029): Inferred altsyncram megafunction from the following design logic: "m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:45:sample_ram_inst|ram_block_rtl_0" 
        Info (286033): Parameter OPERATION_MODE set to SINGLE_PORT
        Info (286033): Parameter WIDTH_A set to 9
        Info (286033): Parameter WIDTHAD_A set to 10
        Info (286033): Parameter NUMWORDS_A set to 1024
        Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED
        Info (286033): Parameter ADDRESS_ACLR_A set to NONE
        Info (286033): Parameter OUTDATA_ACLR_A set to NONE
        Info (286033): Parameter INDATA_ACLR_A set to NONE
        Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
    Info (276029): Inferred altsyncram megafunction from the following design logic: "m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:46:sample_ram_inst|ram_block_rtl_0" 
        Info (286033): Parameter OPERATION_MODE set to SINGLE_PORT
        Info (286033): Parameter WIDTH_A set to 9
        Info (286033): Parameter WIDTHAD_A set to 10
        Info (286033): Parameter NUMWORDS_A set to 1024
        Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED
        Info (286033): Parameter ADDRESS_ACLR_A set to NONE
        Info (286033): Parameter OUTDATA_ACLR_A set to NONE
        Info (286033): Parameter INDATA_ACLR_A set to NONE
        Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
    Info (276029): Inferred altsyncram megafunction from the following design logic: "m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:47:sample_ram_inst|ram_block_rtl_0" 
        Info (286033): Parameter OPERATION_MODE set to SINGLE_PORT
        Info (286033): Parameter WIDTH_A set to 9
        Info (286033): Parameter WIDTHAD_A set to 10
        Info (286033): Parameter NUMWORDS_A set to 1024
        Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED
        Info (286033): Parameter ADDRESS_ACLR_A set to NONE
        Info (286033): Parameter OUTDATA_ACLR_A set to NONE
        Info (286033): Parameter INDATA_ACLR_A set to NONE
        Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
    Info (276029): Inferred altsyncram megafunction from the following design logic: "m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:48:sample_ram_inst|ram_block_rtl_0" 
        Info (286033): Parameter OPERATION_MODE set to SINGLE_PORT
        Info (286033): Parameter WIDTH_A set to 9
        Info (286033): Parameter WIDTHAD_A set to 10
        Info (286033): Parameter NUMWORDS_A set to 1024
        Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED
        Info (286033): Parameter ADDRESS_ACLR_A set to NONE
        Info (286033): Parameter OUTDATA_ACLR_A set to NONE
        Info (286033): Parameter INDATA_ACLR_A set to NONE
        Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
    Info (276029): Inferred altsyncram megafunction from the following design logic: "m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:49:sample_ram_inst|ram_block_rtl_0" 
        Info (286033): Parameter OPERATION_MODE set to SINGLE_PORT
        Info (286033): Parameter WIDTH_A set to 9
        Info (286033): Parameter WIDTHAD_A set to 10
        Info (286033): Parameter NUMWORDS_A set to 1024
        Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED
        Info (286033): Parameter ADDRESS_ACLR_A set to NONE
        Info (286033): Parameter OUTDATA_ACLR_A set to NONE
        Info (286033): Parameter INDATA_ACLR_A set to NONE
        Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
    Info (276029): Inferred altsyncram megafunction from the following design logic: "m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:51:sample_ram_inst|ram_block_rtl_0" 
        Info (286033): Parameter OPERATION_MODE set to SINGLE_PORT
        Info (286033): Parameter WIDTH_A set to 9
        Info (286033): Parameter WIDTHAD_A set to 10
        Info (286033): Parameter NUMWORDS_A set to 1024
        Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED
        Info (286033): Parameter ADDRESS_ACLR_A set to NONE
        Info (286033): Parameter OUTDATA_ACLR_A set to NONE
        Info (286033): Parameter INDATA_ACLR_A set to NONE
        Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
    Info (276029): Inferred altsyncram megafunction from the following design logic: "m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:52:sample_ram_inst|ram_block_rtl_0" 
        Info (286033): Parameter OPERATION_MODE set to SINGLE_PORT
        Info (286033): Parameter WIDTH_A set to 9
        Info (286033): Parameter WIDTHAD_A set to 10
        Info (286033): Parameter NUMWORDS_A set to 1024
        Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED
        Info (286033): Parameter ADDRESS_ACLR_A set to NONE
        Info (286033): Parameter OUTDATA_ACLR_A set to NONE
        Info (286033): Parameter INDATA_ACLR_A set to NONE
        Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
    Info (276029): Inferred altsyncram megafunction from the following design logic: "m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:53:sample_ram_inst|ram_block_rtl_0" 
        Info (286033): Parameter OPERATION_MODE set to SINGLE_PORT
        Info (286033): Parameter WIDTH_A set to 9
        Info (286033): Parameter WIDTHAD_A set to 10
        Info (286033): Parameter NUMWORDS_A set to 1024
        Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED
        Info (286033): Parameter ADDRESS_ACLR_A set to NONE
        Info (286033): Parameter OUTDATA_ACLR_A set to NONE
        Info (286033): Parameter INDATA_ACLR_A set to NONE
        Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
    Info (276029): Inferred altsyncram megafunction from the following design logic: "m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:54:sample_ram_inst|ram_block_rtl_0" 
        Info (286033): Parameter OPERATION_MODE set to SINGLE_PORT
        Info (286033): Parameter WIDTH_A set to 9
        Info (286033): Parameter WIDTHAD_A set to 10
        Info (286033): Parameter NUMWORDS_A set to 1024
        Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED
        Info (286033): Parameter ADDRESS_ACLR_A set to NONE
        Info (286033): Parameter OUTDATA_ACLR_A set to NONE
        Info (286033): Parameter INDATA_ACLR_A set to NONE
        Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
    Info (276029): Inferred altsyncram megafunction from the following design logic: "m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:55:sample_ram_inst|ram_block_rtl_0" 
        Info (286033): Parameter OPERATION_MODE set to SINGLE_PORT
        Info (286033): Parameter WIDTH_A set to 9
        Info (286033): Parameter WIDTHAD_A set to 10
        Info (286033): Parameter NUMWORDS_A set to 1024
        Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED
        Info (286033): Parameter ADDRESS_ACLR_A set to NONE
        Info (286033): Parameter OUTDATA_ACLR_A set to NONE
        Info (286033): Parameter INDATA_ACLR_A set to NONE
        Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
    Info (276034): Inferred altshift_taps megafunction from the following design logic: "SID_top:\sid_on:sid2|SID_envelope:envelope_a|attack_del1_reg_rtl_0"
        Info (286033): Parameter NUMBER_OF_TAPS set to 1
        Info (286033): Parameter TAP_DISTANCE set to 3
        Info (286033): Parameter WIDTH set to 72
Info (278001): Inferred 17 megafunctions from design logic
    Info (278003): Inferred multiplier megafunction ("lpm_mult") from the following logic: "clockgen:\sidpsg_on:clockgen1|Mult0" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/clockgen.vhd Line: 99
    Info (278003): Inferred multiplier megafunction ("lpm_mult") from the following logic: "sample_top:\sample_on:sample1|Mult3" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/sample/top.vhdl Line: 577
    Info (278003): Inferred multiplier megafunction ("lpm_mult") from the following logic: "sample_top:\sample_on:sample1|Mult2" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/sample/top.vhdl Line: 576
    Info (278003): Inferred multiplier megafunction ("lpm_mult") from the following logic: "SID_top:\sid_on:sid1|SID_postFilterSum:postfilter|Mult0" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/postFilterSum.vhdl Line: 87
    Info (278003): Inferred multiplier megafunction ("lpm_mult") from the following logic: "sample_top:\sample_on:sample1|Mult1" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/sample/top.vhdl Line: 575
    Info (278003): Inferred multiplier megafunction ("lpm_mult") from the following logic: "sample_top:\sample_on:sample1|Mult0" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/sample/top.vhdl Line: 574
    Info (278003): Inferred multiplier megafunction ("lpm_mult") from the following logic: "SID_top:\sid_on:sid2|SID_postFilterSum:postfilter|Mult0" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/postFilterSum.vhdl Line: 87
    Info (278003): Inferred multiplier megafunction ("lpm_mult") from the following logic: "sample_top:\sample_on:sample1|sample_adpcm:adpcm_decoder|Mult0" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/sample/adpcm.vhdl Line: 343
    Info (278003): Inferred multiplier megafunction ("lpm_mult") from the following logic: "SID_top:\sid_on:sid1|SID_amplitudeModulator:vol_abc|Mult0" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/amplitudeModulator.vhdl Line: 65
    Info (278003): Inferred multiplier megafunction ("lpm_mult") from the following logic: "SID_top:\sid_on:sid1|SID_filter:variable_state_filter|Mult4" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/filter.vhdl Line: 220
    Info (278003): Inferred multiplier megafunction ("lpm_mult") from the following logic: "SID_top:\sid_on:sid2|SID_amplitudeModulator:vol_abc|Mult0" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/amplitudeModulator.vhdl Line: 65
    Info (278003): Inferred multiplier megafunction ("lpm_mult") from the following logic: "SID_top:\sid_on:sid2|SID_filter:variable_state_filter|Mult4" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/filter.vhdl Line: 220
    Info (278003): Inferred multiplier megafunction ("lpm_mult") from the following logic: "SID_top:\sid_on:sid1|SID_filter:variable_state_filter|Mult3" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/filter.vhdl Line: 213
    Info (278003): Inferred multiplier megafunction ("lpm_mult") from the following logic: "SID_top:\sid_on:sid2|SID_filter:variable_state_filter|Mult3" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/filter.vhdl Line: 213
    Info (278003): Inferred multiplier megafunction ("lpm_mult") from the following logic: "SID_top:\sid_on:sid1|SID_filter:variable_state_filter|Mult0" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/filter.vhdl Line: 198
    Info (278003): Inferred multiplier megafunction ("lpm_mult") from the following logic: "SID_top:\sid_on:sid2|SID_filter:variable_state_filter|Mult0" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/filter.vhdl Line: 198
    Info (278003): Inferred multiplier megafunction ("lpm_mult") from the following logic: "SID_f_distortion_mux:\sid_on:f_distortion_mux|SID_f_distortion:f_distortion|Mult0" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/f_distortion.vhdl Line: 84
Info (12130): Elaborated megafunction instantiation "m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:2:sample_ram_inst|altsyncram:ram_block_rtl_0"
Info (12133): Instantiated megafunction "m9k_grouped:\sample_on:packed_ram64:sample_ram_inst|generic_ram_infer:\m9k_loop:2:sample_ram_inst|altsyncram:ram_block_rtl_0" with the following parameter:
    Info (12134): Parameter "OPERATION_MODE" = "SINGLE_PORT"
    Info (12134): Parameter "WIDTH_A" = "9"
    Info (12134): Parameter "WIDTHAD_A" = "10"
    Info (12134): Parameter "NUMWORDS_A" = "1024"
    Info (12134): Parameter "OUTDATA_REG_A" = "UNREGISTERED"
    Info (12134): Parameter "ADDRESS_ACLR_A" = "NONE"
    Info (12134): Parameter "OUTDATA_ACLR_A" = "NONE"
    Info (12134): Parameter "INDATA_ACLR_A" = "NONE"
    Info (12134): Parameter "WRCONTROL_ACLR_A" = "NONE"
Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_9r31.tdf
    Info (12023): Found entity 1: altsyncram_9r31 File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/db/altsyncram_9r31.tdf Line: 28
Info (12130): Elaborated megafunction instantiation "SID_top:\sid_on:sid2|SID_envelope:envelope_a|altshift_taps:attack_del1_reg_rtl_0"
Info (12133): Instantiated megafunction "SID_top:\sid_on:sid2|SID_envelope:envelope_a|altshift_taps:attack_del1_reg_rtl_0" with the following parameter:
    Info (12134): Parameter "NUMBER_OF_TAPS" = "1"
    Info (12134): Parameter "TAP_DISTANCE" = "3"
    Info (12134): Parameter "WIDTH" = "72"
Info (12021): Found 1 design units, including 1 entities, in source file db/shift_taps_jgm.tdf
    Info (12023): Found entity 1: shift_taps_jgm File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/db/shift_taps_jgm.tdf Line: 31
Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_rj51.tdf
    Info (12023): Found entity 1: altsyncram_rj51 File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/db/altsyncram_rj51.tdf Line: 28
Info (12021): Found 1 design units, including 1 entities, in source file db/add_sub_oed.tdf
    Info (12023): Found entity 1: add_sub_oed File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/db/add_sub_oed.tdf Line: 23
Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_s3f.tdf
    Info (12023): Found entity 1: cntr_s3f File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/db/cntr_s3f.tdf Line: 25
Info (12021): Found 1 design units, including 1 entities, in source file db/cmpr_erb.tdf
    Info (12023): Found entity 1: cmpr_erb File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/db/cmpr_erb.tdf Line: 23
Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_fjg.tdf
    Info (12023): Found entity 1: cntr_fjg File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/db/cntr_fjg.tdf Line: 26
Info (12130): Elaborated megafunction instantiation "clockgen:\sidpsg_on:clockgen1|lpm_mult:Mult0" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/clockgen.vhd Line: 99
Info (12133): Instantiated megafunction "clockgen:\sidpsg_on:clockgen1|lpm_mult:Mult0" with the following parameter: File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/clockgen.vhd Line: 99
    Info (12134): Parameter "LPM_WIDTHA" = "7"
    Info (12134): Parameter "LPM_WIDTHB" = "9"
    Info (12134): Parameter "LPM_WIDTHP" = "16"
    Info (12134): Parameter "LPM_WIDTHR" = "16"
    Info (12134): Parameter "LPM_WIDTHS" = "1"
    Info (12134): Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info (12134): Parameter "INPUT_A_IS_CONSTANT" = "NO"
    Info (12134): Parameter "INPUT_B_IS_CONSTANT" = "NO"
    Info (12134): Parameter "MAXIMIZE_SPEED" = "5"
Info (12021): Found 1 design units, including 1 entities, in source file db/mult_0ls.tdf
    Info (12023): Found entity 1: mult_0ls File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/db/mult_0ls.tdf Line: 29
Info (12130): Elaborated megafunction instantiation "sample_top:\sample_on:sample1|lpm_mult:Mult3" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/sample/top.vhdl Line: 577
Info (12133): Instantiated megafunction "sample_top:\sample_on:sample1|lpm_mult:Mult3" with the following parameter: File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/sample/top.vhdl Line: 577
    Info (12134): Parameter "LPM_WIDTHA" = "13"
    Info (12134): Parameter "LPM_WIDTHB" = "7"
    Info (12134): Parameter "LPM_WIDTHP" = "20"
    Info (12134): Parameter "LPM_WIDTHR" = "20"
    Info (12134): Parameter "LPM_WIDTHS" = "1"
    Info (12134): Parameter "LPM_REPRESENTATION" = "SIGNED"
    Info (12134): Parameter "INPUT_A_IS_CONSTANT" = "NO"
    Info (12134): Parameter "INPUT_B_IS_CONSTANT" = "NO"
    Info (12134): Parameter "MAXIMIZE_SPEED" = "6"
Info (12021): Found 1 design units, including 1 entities, in source file db/mult_4fs.tdf
    Info (12023): Found entity 1: mult_4fs File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/db/mult_4fs.tdf Line: 29
Info (12130): Elaborated megafunction instantiation "SID_top:\sid_on:sid1|SID_postFilterSum:postfilter|lpm_mult:Mult0" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/postFilterSum.vhdl Line: 87
Info (12133): Instantiated megafunction "SID_top:\sid_on:sid1|SID_postFilterSum:postfilter|lpm_mult:Mult0" with the following parameter: File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/postFilterSum.vhdl Line: 87
    Info (12134): Parameter "LPM_WIDTHA" = "18"
    Info (12134): Parameter "LPM_WIDTHB" = "8"
    Info (12134): Parameter "LPM_WIDTHP" = "26"
    Info (12134): Parameter "LPM_WIDTHR" = "26"
    Info (12134): Parameter "LPM_WIDTHS" = "1"
    Info (12134): Parameter "LPM_REPRESENTATION" = "SIGNED"
    Info (12134): Parameter "INPUT_A_IS_CONSTANT" = "NO"
    Info (12134): Parameter "INPUT_B_IS_CONSTANT" = "NO"
    Info (12134): Parameter "MAXIMIZE_SPEED" = "6"
Info (12021): Found 1 design units, including 1 entities, in source file db/mult_gfs.tdf
    Info (12023): Found entity 1: mult_gfs File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/db/mult_gfs.tdf Line: 29
Info (12130): Elaborated megafunction instantiation "sample_top:\sample_on:sample1|sample_adpcm:adpcm_decoder|lpm_mult:Mult0" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/sample/adpcm.vhdl Line: 343
Info (12133): Instantiated megafunction "sample_top:\sample_on:sample1|sample_adpcm:adpcm_decoder|lpm_mult:Mult0" with the following parameter: File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/sample/adpcm.vhdl Line: 343
    Info (12134): Parameter "LPM_WIDTHA" = "5"
    Info (12134): Parameter "LPM_WIDTHB" = "16"
    Info (12134): Parameter "LPM_WIDTHP" = "21"
    Info (12134): Parameter "LPM_WIDTHR" = "21"
    Info (12134): Parameter "LPM_WIDTHS" = "1"
    Info (12134): Parameter "LPM_REPRESENTATION" = "SIGNED"
    Info (12134): Parameter "INPUT_A_IS_CONSTANT" = "NO"
    Info (12134): Parameter "INPUT_B_IS_CONSTANT" = "NO"
    Info (12134): Parameter "MAXIMIZE_SPEED" = "5"
Info (12021): Found 1 design units, including 1 entities, in source file db/mult_5fs.tdf
    Info (12023): Found entity 1: mult_5fs File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/db/mult_5fs.tdf Line: 29
Info (12130): Elaborated megafunction instantiation "SID_top:\sid_on:sid1|SID_amplitudeModulator:vol_abc|lpm_mult:Mult0" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/amplitudeModulator.vhdl Line: 65
Info (12133): Instantiated megafunction "SID_top:\sid_on:sid1|SID_amplitudeModulator:vol_abc|lpm_mult:Mult0" with the following parameter: File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/amplitudeModulator.vhdl Line: 65
    Info (12134): Parameter "LPM_WIDTHA" = "9"
    Info (12134): Parameter "LPM_WIDTHB" = "12"
    Info (12134): Parameter "LPM_WIDTHP" = "21"
    Info (12134): Parameter "LPM_WIDTHR" = "21"
    Info (12134): Parameter "LPM_WIDTHS" = "1"
    Info (12134): Parameter "LPM_REPRESENTATION" = "SIGNED"
    Info (12134): Parameter "INPUT_A_IS_CONSTANT" = "NO"
    Info (12134): Parameter "INPUT_B_IS_CONSTANT" = "NO"
    Info (12134): Parameter "MAXIMIZE_SPEED" = "6"
Info (12021): Found 1 design units, including 1 entities, in source file db/mult_6fs.tdf
    Info (12023): Found entity 1: mult_6fs File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/db/mult_6fs.tdf Line: 29
Info (12130): Elaborated megafunction instantiation "SID_top:\sid_on:sid1|SID_filter:variable_state_filter|lpm_mult:Mult4" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/filter.vhdl Line: 220
Info (12133): Instantiated megafunction "SID_top:\sid_on:sid1|SID_filter:variable_state_filter|lpm_mult:Mult4" with the following parameter: File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/filter.vhdl Line: 220
    Info (12134): Parameter "LPM_WIDTHA" = "14"
    Info (12134): Parameter "LPM_WIDTHB" = "36"
    Info (12134): Parameter "LPM_WIDTHP" = "50"
    Info (12134): Parameter "LPM_WIDTHR" = "50"
    Info (12134): Parameter "LPM_WIDTHS" = "1"
    Info (12134): Parameter "LPM_REPRESENTATION" = "SIGNED"
    Info (12134): Parameter "INPUT_A_IS_CONSTANT" = "NO"
    Info (12134): Parameter "INPUT_B_IS_CONSTANT" = "NO"
    Info (12134): Parameter "MAXIMIZE_SPEED" = "5"
Info (12021): Found 1 design units, including 1 entities, in source file db/mult_pgs.tdf
    Info (12023): Found entity 1: mult_pgs File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/db/mult_pgs.tdf Line: 31
Info (12130): Elaborated megafunction instantiation "SID_top:\sid_on:sid1|SID_filter:variable_state_filter|lpm_mult:Mult0" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/filter.vhdl Line: 198
Info (12133): Instantiated megafunction "SID_top:\sid_on:sid1|SID_filter:variable_state_filter|lpm_mult:Mult0" with the following parameter: File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/filter.vhdl Line: 198
    Info (12134): Parameter "LPM_WIDTHA" = "36"
    Info (12134): Parameter "LPM_WIDTHB" = "18"
    Info (12134): Parameter "LPM_WIDTHP" = "54"
    Info (12134): Parameter "LPM_WIDTHR" = "54"
    Info (12134): Parameter "LPM_WIDTHS" = "1"
    Info (12134): Parameter "LPM_REPRESENTATION" = "SIGNED"
    Info (12134): Parameter "INPUT_A_IS_CONSTANT" = "NO"
    Info (12134): Parameter "INPUT_B_IS_CONSTANT" = "NO"
    Info (12134): Parameter "MAXIMIZE_SPEED" = "5"
Info (12021): Found 1 design units, including 1 entities, in source file db/mult_1hs.tdf
    Info (12023): Found entity 1: mult_1hs File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/db/mult_1hs.tdf Line: 31
Info (12130): Elaborated megafunction instantiation "SID_f_distortion_mux:\sid_on:f_distortion_mux|SID_f_distortion:f_distortion|lpm_mult:Mult0" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/f_distortion.vhdl Line: 84
Info (12133): Instantiated megafunction "SID_f_distortion_mux:\sid_on:f_distortion_mux|SID_f_distortion:f_distortion|lpm_mult:Mult0" with the following parameter: File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/SID/f_distortion.vhdl Line: 84
    Info (12134): Parameter "LPM_WIDTHA" = "13"
    Info (12134): Parameter "LPM_WIDTHB" = "12"
    Info (12134): Parameter "LPM_WIDTHP" = "25"
    Info (12134): Parameter "LPM_WIDTHR" = "25"
    Info (12134): Parameter "LPM_WIDTHS" = "1"
    Info (12134): Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info (12134): Parameter "INPUT_A_IS_CONSTANT" = "NO"
    Info (12134): Parameter "INPUT_B_IS_CONSTANT" = "NO"
    Info (12134): Parameter "MAXIMIZE_SPEED" = "6"
Info (12021): Found 1 design units, including 1 entities, in source file db/mult_ons.tdf
    Info (12023): Found entity 1: mult_ons File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/db/mult_ons.tdf Line: 29
Info (13014): Ignored 502 buffer(s)
    Info (13019): Ignored 502 SOFT buffer(s)
Warning (13027): Removed fan-outs from the following always-disabled I/O buffers
    Warning (13028): Removed fan-out from the always-disabled I/O buffer "EXT[6]" to the node "EXT[6]" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd Line: 95
Info (13000): Registers with preset signals will power-up high File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd Line: 1516
Info (13003): DEV_CLRn pin will set, and not reset, register with preset signal due to NOT Gate Push-Back
Warning (13024): Output pins are stuck at VCC or GND
    Warning (13410): Pin "ADC_TX_P" is stuck at GND File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd Line: 103
Info (286030): Timing-Driven Synthesis is running
Info (17049): 19 registers lost all their fanouts during netlist optimizations.
Info (16010): Generating hard_block partition "hard_block:auto_generated_inst"
    Info (16011): Adding 1 node(s), including 0 DDIO, 1 PLL, 0 transceiver and 0 LCELL
Warning (21074): Design contains 6 input pin(s) that do not drive logic
    Warning (15610): No output dependent on input pin "CLK_SLOW" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd Line: 77
    Warning (15610): No output dependent on input pin "CLK1" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd Line: 80
    Warning (15610): No output dependent on input pin "CS1" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd Line: 91
    Warning (15610): No output dependent on input pin "KR1" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd Line: 101
    Warning (15610): No output dependent on input pin "KR2" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd Line: 102
    Warning (15610): No output dependent on input pin "ADC_RX_P" File: /home/markw/fpga/svn/repo/trunk/atari_800xl/atari_chips/pokeyv2/build_pokeymax_v3_M16_313016QF_full_xel/pokeymax.vhd Line: 105
Info (21057): Implemented 13982 device resources after synthesis - the final resource count might be different
    Info (21058): Implemented 24 input pins
    Info (21059): Implemented 10 output pins
    Info (21060): Implemented 23 bidirectional pins
    Info (21061): Implemented 13292 logic cells
    Info (21064): Implemented 585 RAM segments
    Info (21065): Implemented 1 PLLs
    Info (21062): Implemented 45 DSP elements
    Info (21070): Implemented 1 User Flash Memory blocks
Info: Quartus Prime Analysis & Synthesis was successful. 0 errors, 42 warnings
    Info: Peak virtual memory: 633 megabytes
    Info: Processing ended: Fri Jun 19 21:53:51 2026
    Info: Elapsed time: 00:00:20
    Info: Total CPU time (on all processors): 00:00:24


