Received my board today.
I tried to understand the flash chip problems. All I found so far is that it has a 64KB sector size, so I've added detection by id so that we can have one v2 core for both different flash chips.
- Detect flash chip by id (sector size)
- Added 1 cycle delay on pokey highpass filter input (makes settings 5/7 work on PDM)
- Run pokey on final sub-cycle, rather than on memory access completed sub-cycle (reduces sample jitter)
- Convert audio to signed for HDMI output
- Display some flash chip info on F11 screen (chip id1/ chip id2/ sector size)
I have not received my new board yet so have yet to test the new flash chip (S25FL127SABMFV000). So, unless you have a USB blaster, I suggest not using any of the flash settings until I ensure it is stable.
I should add that if you do not have a USB blaster, I strongly advise you to get one. They are only about 10USD for a compatible one and they make it much harder to accidentally (temporarily) brick your eclaire!
Not so many features on this version, but I think it is a worthwhile one!
So what is it? Well it allows flashing a new core from the sd card. So its possible to upgrade without a USB blaster.
So now there are 3 files published:
i) .sof - new core that is applied only until powered off. Applied to FPGA itself via USB blaster and Quartus.
ii) .jic - new core and OS and settings. Applied to flash memory via USB blaster and Quartus.
iii) .rpd - new core that may be programmed from sd card. Copy it to the SD card press F11 and select 'Program RPD'. Then wait until it finished before powering off. It will print .E.W.V.E.W.V. over several lines first. This is Erase (set all bits to 1), Write (set some to 0) and Verify (double check it worked). It takes about 1 minute, though I can speed that up in future.
The nice thing about using the .rpd is that there is no need to dig out the USB blaster or open the case. Also it does not blow away all the OS, system and video settings, as the .jic currently does.
I added the board pinouts the wiki (Pinouts), so if you are building into a custom case and would like to make your own cart/pbi/joystick boards etc. All the logic is on the main board so its all just wiring to do that.
A year or so back I built a Veronica clone using Robert Finch's 65816 core.
It never worked, but I didn't debug it at the time. I just spent a few days debugging it this work and its running well on the ÉclaireXL and the 600XL.
Details on AtariAge: http://atariage.com/forums/topic/277736-using-the-ultimate-cart-as-a-65816/
Anyway, is there any interest in a 65816 cpu in the ÉclaireXL? Now I have it running I guess it wouldn't be too hard, though I'm not sure how the linear ram access should work. Is there a standard memory map of any kind?
The new revision of the boards are with the manufacturer. The PCBs themselves have been made and next they will be working on assembling the main board.
As a reminder of the changes on these:
- Remove video DAC and audio ADC power supplies, these did not work anyway so needed a patch wire.
- Verify footprint of main board IO area vs standard, the power supply was outside the IO area by some mm.
- Adjust paddle voltage level potential divider, if the power supply is <5V (many USB chargers are) the paddles did not work. This allows the level to be adjusted.
- Fix black 'éclaireXL' (cosmetic)
- Widen cutout next to pbi from 3.7 to 4.75mm (or more), some devices could not be connected easily.
- Change REF_N pull up from 4k7 to about 2k. Improves PBI stability.
- Header to connect SIO LED to case.
- Power on switch invert up/down on/off to match 800XL!
- Attempt to reduce cross talk on audio ADC
I got a few extra made, so if you hear from anyone who wants to help in the coming months then do let me know.
I've not done much work on improving the core recently. I've mostly been looking at merging the code back to trunk. I started by trying to build the branch for the other boards, so I have the mist back out on my desk.
It was nice to see the EclaireXL get a mention by Joe Decuir (thanks Joe!) in his talk at the PRGE. 18 mins in! By mentioning how much more ram we have it reminds me we really should use some of that 32MB for something...
https://www.youtube.com/watch?v=p1PqdXSHckA
Now that the flash chip works I've been doing a few long overdue firmware improvements.
So v20 is out with:
- Devices and settings split. Settings is on F11, Devices on F12.
- Hotkeys to go to file selectors quickly on devices (1,2,3,4,C)
- Filtering in file selectors (Up to 5 chars case insensitive)
- 4x settings profiles, including all settings and OS/Basic roms
- Settings profiles can be flashed (settings and roms) or written to SD (settings part only)
- Basic or OS roms can be loaded (based on size only)
- Added status line on settings with board, core version and date
Continuing the theme...
I checked that I can read/write from the spi flash chip. Had to use the altera serial flash loader since the pins are not directly exposed. Turned out I could use the existing spi master I'm using for the SD card, just needed a 2nd chip select line.
Anyway I've put out the release v19 with:
- Default settings (when SD card not present or does not have settings file) are loaded from the SPI flash.
- Possible to save settings to all (flash and sd, if file present), or just sd.
- Fix for v1 board (was hanging due to changes in v18 core)
I've been trying out some other parts of the hardware in advance of the new boards. The clock generator and the i2c video support are confirmed as working. Also the sd card detection line.
I've put these to initial use in v18 as follows:
- Requests DDC data over VGA and HDMI and shows if they are detected as connected in video settings.
- Handles SD card being changed
- Handles SD card not being present on boot. In this case starts as 320KB compy 1x speed NTSC. Attempts basic video connection detection, HDMI first, then VGA, then falls back to 15KHz RGB.
- Increased ZPU rom from 32KB to 40KB.