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From 10/12/2018 to 11/10/2018

10/13/2018

08:57 PM Feature #76: Merge down to trunk
Easy part done, merged down.
For now I branched firmware into firmware_eclairexl and firmware_legacy (for other pl...
foft
08:32 PM Feature #76 (In Progress): Merge down to trunk
Made an svn copy of existing trunk (branches/releases/trunk_20181013_premerge)
Also made a backup of lots of random ...
foft

10/12/2018

09:45 PM Bug #33 (Closed): Wizard of Wor
I modeled this by adding a 1 cycle delay on sel9bitpoly going high. The game then works! foft
09:04 PM Bug #33: Wizard of Wor
The high bit of audctl is sel9bitpoly. In the original chip is is delayed and then combined with itself. So I need a ... foft
08:44 PM Bug #33: Wizard of Wor
Altirra has two massive poly tables and selects between them with this flag. So, not really much help since here we a... foft
08:34 PM Bug #33: Wizard of Wor
I think the 17/9 bit lsfr is based on the decap schematics, so this is probably down to the number of cycles to delay... foft
08:33 PM Bug #33: Wizard of Wor
I set them to nop ... then the game works and no longer crashes! foft
08:19 PM Bug #33: Wizard of Wor
easier to set memory on xex or atx version...
36FD: A9 8F LDA #$8F
36FF: 8D 08 D2 STA AUDCTL...
foft
08:10 PM Bug #33: Wizard of Wor
Will try nopping these to see (on cart!!)
A0BB: A9 8F LDA #$8F
A0BD: 8D 08 D2 STA AUDCTL
A0...
foft
08:03 PM Bug #33: Wizard of Wor
With 8f for only ... 6 cycles foft
07:57 PM Bug #33: Wizard of Wor
It writes 8f and 00 often to audctl. This switches the shift register from 17 bit to 9 bit and back. Could there be s... foft
07:45 PM Bug #33: Wizard of Wor
No Pokey IRQs
Reads pots, writes potgo
Reads random
Reads skstat
+ plays some music
Nothing out of the ordinar...
foft
 

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