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# -------------------------------------------------------------------------- #
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#
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# Copyright (C) 2017 Intel Corporation. All rights reserved.
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# Your use of Intel Corporation's design tools, logic functions
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# and other software and tools, and its AMPP partner logic
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# functions, and any output files from any of the foregoing
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# (including device programming or simulation files), and any
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# associated documentation or information are expressly subject
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# to the terms and conditions of the Intel Program License
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# Subscription Agreement, the Intel Quartus Prime License Agreement,
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# the Intel MegaCore Function License Agreement, or other
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# applicable license agreement, including, without limitation,
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# that your use is for the sole purpose of programming logic
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# devices manufactured by Intel and sold by Intel or its
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# authorized distributors. Please refer to the applicable
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# agreement for further details.
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#
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# -------------------------------------------------------------------------- #
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#
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# Quartus Prime
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# Version 17.0.0 Build 595 04/25/2017 SJ Lite Edition
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# Date created = 19:35:48 June 01, 2018
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#
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# -------------------------------------------------------------------------- #
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#
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# Notes:
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#
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# 1) The default values for assignments are stored in the file:
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# sidmax_assignment_defaults.qdf
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# If this file doesn't exist, see file:
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# assignment_defaults.qdf
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#
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# 2) Altera recommends that you do not modify this file. This
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# file is updated automatically by the Quartus Prime software
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# and any changes you make may be lost or overwritten.
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#
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# -------------------------------------------------------------------------- #
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set_global_assignment -name FAMILY "MAX 10"
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set_global_assignment -name TOP_LEVEL_ENTITY sidmax
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set_global_assignment -name ORIGINAL_QUARTUS_VERSION 17.0.0
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set_global_assignment -name PROJECT_CREATION_TIME_DATE "19:35:48 JUNE 01, 2018"
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set_global_assignment -name LAST_QUARTUS_VERSION "18.0.0 Lite Edition"
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set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
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set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
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set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
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set_global_assignment -name DEVICE_FILTER_PACKAGE UFBGA
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set_global_assignment -name DEVICE_FILTER_PIN_COUNT 169
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set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 8
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set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 256
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set_location_assignment PIN_B1 -to PHI2 #B1,LIN0,P6,PHI
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set_location_assignment PIN_A2 -to RST_N #A2,LIN1,P5,RST
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set_location_assignment PIN_B2 -to CS_N #B2,LIN2,P8,CS_N
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set_location_assignment PIN_A3 -to W_N #A3,LIN3,P7,RW_N
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set_location_assignment PIN_B3 -to A[0] #B3,LIN4,P9,A0
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set_location_assignment PIN_A4 -to A[1] #A4,LIN5,P10,A1
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set_location_assignment PIN_B4 -to A[2] #B4,LIN6,P11,A2
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set_location_assignment PIN_A5 -to A[3] #A5,LIN7,P12,A3
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set_location_assignment PIN_B5 -to A[4] #B5,LIN8,P13,A4
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set_location_assignment PIN_A6 -to D[0] #A6,LIN9,P15,D0
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set_location_assignment PIN_B6 -to D[1] #B6,LIN10,P16,D1
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set_location_assignment PIN_A7 -to D[2] #A7,LIN11,P17,D2
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set_location_assignment PIN_B7 -to D[3] #B7,LIN12,P18,D3
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set_location_assignment PIN_A8 -to D[4] #A8,LIN13,P19,D4
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set_location_assignment PIN_A9 -to D[7] #A9,LIN14,P22,D7
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set_location_assignment PIN_A10 -to D[6] #A10,LIN15,P21,D6
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set_location_assignment PIN_B10 -to D[5] #B10,LIN16,P20,D5
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set_location_assignment PIN_A11 -to EXT[3] #A11,LIN17,EXT1
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set_location_assignment PIN_B11 -to EXT[2] #B11,LIN18,EXT2
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set_location_assignment PIN_A12 -to EXT[1] #A12,LIN19,EXT3
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set_location_assignment PIN_B12 -to EXT[4] #B12,LIN20,EXT4
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set_location_assignment PIN_C9 -to AUDIO_LEFT ###C9,AUD3,AUDIO_LEFT
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set_location_assignment PIN_D9 -to AUDIO_RIGHT ###D9,AUD4,AUDIO_RIGHT
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set_location_assignment PIN_C10 -to AUDIO_INT ###C10,AUD1,AUDIO_INT
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set_location_assignment PIN_L10 -to EXT_IN_p #L10,LIN22,P26,EXT_IN
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set_location_assignment PIN_M10 -to EXT_IN_n #ADC_RX #M10,ADC_RX,
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set_location_assignment PIN_K8 -to ADC_TX_p #K8,ADC_TX,
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set_location_assignment PIN_J8 -to ADC_TX_n #K8,ADC_TX,
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set_location_assignment PIN_K7 -to POTY_p #K7,LIN21,P23,POTY
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set_location_assignment PIN_J7 -to POTY_n #K7,LIN21,P23,POTY
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set_location_assignment PIN_K6 -to POTY_RESET #K6,POTY_RESET,
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#set_location_assignment PIN_J6 -to POTY_RESET(n) ###J6,NC3,
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set_location_assignment PIN_L11 -to POTX_p #L11,LIN23,P24,POTX
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set_location_assignment PIN_M11 -to POTX_n #L11,LIN23,P24,POTX
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set_location_assignment PIN_M12 -to POTX_RESET #M12,POTX_RESET,
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#set_location_assignment PIN_M13 -to POTX_RESET(n) ###M13,NC2,
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set_instance_assignment -name IO_STANDARD LVDS -to ADC_TX_p
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#set_instance_assignment -name IO_STANDARD LVDS -to ADC_TX_n
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set_instance_assignment -name IO_STANDARD LVDS -to EXT_IN_p
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#set_instance_assignment -name IO_STANDARD LVDS -to EXT_IN_n
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set_instance_assignment -name IO_STANDARD LVDS -to POTX_p
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#set_instance_assignment -name IO_STANDARD LVDS -to POTX_n
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set_instance_assignment -name IO_STANDARD "2.5 V" -to POTX_RESET
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set_instance_assignment -name IO_STANDARD LVDS -to POTY_p
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#set_instance_assignment -name IO_STANDARD LVDS -to POTY_n
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set_instance_assignment -name IO_STANDARD "2.5 V" -to POTY_RESET
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set_instance_assignment -name IO_STANDARD LVDS -to VDDREDUCED_p
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#set_instance_assignment -name IO_STANDARD LVDS -to VDDREDUCED_n
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set_location_assignment PIN_M7 -to VDDREDUCED_p #M7,VDDREDUCED,P28
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set_location_assignment PIN_N6 -to VDDREDUCED_n #M7,VDDREDUCED,P28
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set_location_assignment PIN_G9 -to CLK_SLOW #CLK2 - G9
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set_location_assignment PIN_H8 -to CLK_OUT #OUT - H8
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#set_location_assignment PIN_H6 -to CLK0 #CLK0 - H6
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#set_location_assignment PIN_H4 -to CLK1 #CLK1 - H4
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#set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to PADDLE[0]
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set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to AUDIO_INT
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set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to AUDIO_LEFT
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set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to AUDIO_RIGHT
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set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
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set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
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set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
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set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
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set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
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set_global_assignment -name FLOW_ENABLE_POWER_ANALYZER ON
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set_global_assignment -name POWER_DEFAULT_INPUT_IO_TOGGLE_RATE "12.5 %"
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set_global_assignment -name ENABLE_OCT_DONE OFF
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set_global_assignment -name ENABLE_BOOT_SEL_PIN OFF
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set_global_assignment -name STRATIXV_CONFIGURATION_SCHEME "PASSIVE SERIAL"
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set_global_assignment -name USE_CONFIGURATION_DEVICE ON
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set_global_assignment -name CRC_ERROR_OPEN_DRAIN OFF
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set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL"
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set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -rise
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set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -fall
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set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -rise
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set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -fall
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set_global_assignment -name ENABLE_SIGNALTAP ON
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set_global_assignment -name USE_SIGNALTAP_FILE output_files/stp1.stp
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set_instance_assignment -name CURRENT_STRENGTH_NEW "MINIMUM CURRENT" -to CLK_OUT
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set_global_assignment -name OPTIMIZATION_MODE BALANCED
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set_global_assignment -name VHDL_FILE flash_controller.vhd
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set_global_assignment -name VHDL_FILE stereo_detect.vhd
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set_global_assignment -name VHDL_FILE slave_timing_6502.vhd
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set_global_assignment -name SDC_FILE sidmax.sdc
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set_global_assignment -name VHDL_FILE complete_address_decoder.vhdl
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set_global_assignment -name VHDL_FILE syncreset_enable_divider.vhd
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set_global_assignment -name VHDL_FILE enable_divider.vhdl
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set_global_assignment -name VHDL_FILE delay_line.vhdl
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set_global_assignment -name VHDL_FILE wide_delay_line.vhdl
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set_global_assignment -name VHDL_FILE latch_delay_line.vhdl
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set_global_assignment -name VHDL_FILE sigmadelta_1storder.vhd
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set_global_assignment -name VHDL_FILE sigmadelta_2ndorder.vhd
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set_global_assignment -name VHDL_FILE filtered_sigmadelta.vhd
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set_global_assignment -name VHDL_FILE generic_ram_infer.vhdl
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set_global_assignment -name VHDL_FILE simple_low_pass_filter.vhdl
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set_global_assignment -name VHDL_FILE pokey/pokey_poly_17_9.vhdl
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set_global_assignment -name VHDL_FILE pokey/pokey_poly_5.vhdl
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set_global_assignment -name VHDL_FILE pokey/pokey_poly_4.vhdl
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set_global_assignment -name VHDL_FILE pokey/pokey_noise_filter.vhdl
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set_global_assignment -name VHDL_FILE pokey/pokey_mixer_mux.vhdl
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set_global_assignment -name VHDL_FILE pokey/pokey_mixer.vhdl
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set_global_assignment -name VHDL_FILE pokey/pokey_keyboard_scanner.vhdl
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set_global_assignment -name VHDL_FILE pokey/pokey_countdown_timer.vhdl
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set_global_assignment -name VHDL_FILE pokey/pokey.vhdl
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set_global_assignment -name VHDL_FILE phi_mult.vhdl
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set_global_assignment -name VHDL_FILE synchronizer.vhdl
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set_global_assignment -name VHDL_FILE audiotypes.vhdl
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set_global_assignment -name VHDL_FILE mixer.vhdl
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set_global_assignment -name VHDL_FILE clockgensid.vhd
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set_global_assignment -name VHDL_FILE spdif_transmitter.vhdl
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set_global_assignment -name VHDL_FILE sidmax.vhd
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set_global_assignment -name VHDL_FILE PSG/envelope.vhdl
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set_global_assignment -name VHDL_FILE PSG/noise.vhdl
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set_global_assignment -name VHDL_FILE PSG/top.vhdl
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set_global_assignment -name VHDL_FILE PSG/freqdiv.vhdl
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set_global_assignment -name VHDL_FILE PSG/mixer.vhdl
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set_global_assignment -name VHDL_FILE PSG/volume.vhdl
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set_global_assignment -name VHDL_FILE PSG/volume_profile.vhdl
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set_global_assignment -name VHDL_FILE SID/top.vhdl
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set_global_assignment -name VHDL_FILE SID/oscillator.vhdl
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set_global_assignment -name VHDL_FILE SID/wavegen.vhdl
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set_global_assignment -name VHDL_FILE SID/envelope.vhdl
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set_global_assignment -name VHDL_FILE SID/envelope_tapmatch.vhdl
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set_global_assignment -name VHDL_FILE SID/amplitudeModulator.vhdl
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set_global_assignment -name VHDL_FILE SID/preFilterSum.vhdl
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set_global_assignment -name VHDL_FILE SID/filter.vhdl
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set_global_assignment -name VHDL_FILE SID/f_distortion.vhdl
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set_global_assignment -name VHDL_FILE SID/f_distortion_mux.vhdl
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set_global_assignment -name VHDL_FILE SID/postFilterSum.vhdl
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set_global_assignment -name VHDL_FILE sample/channel.vhdl
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set_global_assignment -name VHDL_FILE sample/adpcm.vhdl
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set_global_assignment -name VHDL_FILE sample/top.vhdl
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set_global_assignment -name VHDL_FILE covox/top.vhdl
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set_global_assignment -name QIP_FILE int_osc/synthesis/int_osc.qip
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set_global_assignment -name QIP_FILE pll.qip
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set_global_assignment -name QIP_FILE flash/synthesis/flash.qip
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set_global_assignment -name QIP_FILE lvds_tx.qip
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set_global_assignment -name QIP_FILE lvds_rx.qip
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set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
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#CLK
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#OUT - H8
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#CLK2 - G9
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#B1,LIN0,P6,PHI
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#A2,LIN1,P5,RST
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#B2,LIN2,P8,CS_N
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#A3,LIN3,P7,RW_N
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#B3,LIN4,P9,A0
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#A4,LIN5,P10,A1
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#B4,LIN6,P11,A2
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#A5,LIN7,P12,A3
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#B5,LIN8,P13,A4
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#A6,LIN9,P15,D0
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#B6,LIN10,P16,D1
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#A7,LIN11,P17,D2
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#B7,LIN12,P18,D3
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#A8,LIN13,P19,D4
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#A9,LIN14,P22,D7
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#A10,LIN15,P21,D6
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#B10,LIN16,P20,D5
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#A11,LIN17,EXT1
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#B11,LIN18,EXT2
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#A12,LIN19,EXT3
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#B12,LIN20,EXT4
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#
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###C9,AUD3,AUDIO_LEFT
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###D9,AUD4,AUDIO_RIGHT
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###C10,AUD1,AUDIO_INT
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#
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###J8,NC1,
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###J7,2V5,
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###J6,NC3,
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###M13,NC2,
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###M11,2V5
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###N6,2V5,
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#L10,LIN22,P26,EXT_IN
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#K8,ADC_TX,
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#M10,ADC_RX,
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#
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#K7,LIN21,P23,POTY
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#K6,POTY_RESET,
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#L11,LIN23,P24,POTX
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#M12,POTX_RESET,
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#
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#M7,VDDREDUCED,P28
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#
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