Revision 7
Added by markw over 11 years ago
zpu_glue.vhdl | ||
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ZPU_DI : in std_logic_vector(31 downto 0); -- response from general memory - for areas that only support 8/16 bit set top bits to 0
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ZPU_ROM_DI : in std_logic_vector(31 downto 0); -- response from own program memory
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ZPU_RAM_DI : in std_logic_vector(31 downto 0); -- response from own stack
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ZPU_SECTOR_DI : IN STD_LOGIC_VECTOR(31 DOWNTO 0);
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ZPU_CONFIG_DI : in std_logic_vector(31 downto 0); -- response from config registers
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ZPU_DO : out std_logic_vector(31 downto 0);
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ZPU_ADDR_ROM_RAM : out std_logic_vector(23 downto 0); -- direct from zpu, for short paths
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ZPU_ADDR_ROM_RAM : out std_logic_vector(15 downto 0); -- direct from zpu, for short paths
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ZPU_ADDR_FETCH : out std_logic_vector(23 downto 0); -- clk->q, for longer paths
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-- request
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... | ... | |
constant result_rom_8bit_3 : std_logic_vector(4 downto 0) := "01010";
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constant result_config : std_logic_vector(4 downto 0) := "01011";
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constant result_external_special : std_logic_vector(4 downto 0) := "01100";
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constant result_sec : std_logic_vector(4 downto 0) := "01101";
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constant result_sec_8bit_0 : std_logic_vector(4 downto 0) := "01110";
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constant result_sec_8bit_1 : std_logic_vector(4 downto 0) := "01111";
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constant result_sec_8bit_2 : std_logic_vector(4 downto 0) := "10000";
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constant result_sec_8bit_3 : std_logic_vector(4 downto 0) := "10001";
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signal request_type : std_logic_vector(4 downto 0);
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... | ... | |
zpu_16bit_write_enable_next <= zpu_16bit_write_enable_temp;
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zpu_32bit_write_enable_next <= zpu_32bit_write_enable_temp;
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when "01010" =>
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-- TODO - addr(14) should just feed 1 bit in result reg!
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if (zpu_addr_unsigned(14) = '1') then
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if (zpu_8bit_read_enable_temp='1') then
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case (zpu_addr_unsigned(1 downto 0)) is
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when "00" =>
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result_next <= result_sec_8bit_0;
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when "01" =>
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result_next <= result_sec_8bit_1;
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when "10" =>
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result_next <= result_sec_8bit_2;
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when "11" =>
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result_next <= result_sec_8bit_3;
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when others =>
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--nop
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end case;
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else
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result_next <= result_sec;
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end if;
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if (zpu_8bit_read_enable_temp='1') then
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case (zpu_addr_unsigned(1 downto 0)) is
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when "00" =>
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result_next <= result_rom_8bit_3;
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when "01" =>
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result_next <= result_rom_8bit_2;
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when "10" =>
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result_next <= result_rom_8bit_1;
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when "11" =>
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result_next <= result_rom_8bit_0;
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when others =>
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--nop
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end case;
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else
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if (zpu_8bit_read_enable_temp='1') then
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case (zpu_addr_unsigned(1 downto 0)) is
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when "00" =>
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result_next <= result_rom_8bit_3;
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when "01" =>
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result_next <= result_rom_8bit_2;
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when "10" =>
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result_next <= result_rom_8bit_1;
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when "11" =>
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result_next <= result_rom_8bit_0;
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when others =>
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--nop
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end case;
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else
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result_next <= result_rom;
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end if;
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result_next <= result_rom;
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end if;
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ZPU_MEM_BUSY <= '1';
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zpu_addr_next <= std_logic_vector(zpu_addr_unsigned);
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... | ... | |
end process;
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zpu_di_next <= zpu_di;
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process(result_reg, zpu_di_reg, zpu_rom_di, zpu_ram_di, zpu_config_di, zpu_sector_di)
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process(result_reg, zpu_di_reg, zpu_rom_di, zpu_ram_di, zpu_config_di)
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begin
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zpu_di_use <= (others=>'0');
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case result_reg is
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... | ... | |
zpu_di_use(7 downto 0) <= zpu_ram_DI(23 downto 16);
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when result_ram_8bit_3 =>
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zpu_di_use(7 downto 0) <= zpu_ram_DI(31 downto 24);
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when result_sec =>
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zpu_di_use <= zpu_sector_DI;
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when result_sec_8bit_0 =>
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zpu_di_use(7 downto 0) <= zpu_sector_DI(7 downto 0);
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when result_sec_8bit_1 =>
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zpu_di_use(7 downto 0) <= zpu_sector_DI(15 downto 8);
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when result_sec_8bit_2 =>
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zpu_di_use(7 downto 0) <= zpu_sector_DI(23 downto 16);
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when result_sec_8bit_3 =>
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zpu_di_use(7 downto 0) <= zpu_sector_DI(31 downto 24);
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when result_config =>
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zpu_di_use <= zpu_config_di;
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when others =>
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... | ... | |
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zpu_di_unsigned <= unsigned(zpu_di_use);
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zpu_do <= zpu_do_next;
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ZPU_ADDR_ROM_RAM <= zpu_addr_next;
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ZPU_ADDR_ROM_RAM <= zpu_addr_next(15 downto 0);
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ZPU_ADDR_FETCH <= zpu_addr_reg;
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zpu_read_enable <= zpu_read_reg;
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Cleaned up ZPU into slightly more generic form, though still clearly atari core targetted. Added inital tb, though needs rom to verify more. MIST sector side removed, but should be possible with external changes. Now ZPU instead has lots of GPIO.