Pinouts » History » Version 5
foft, 04/15/2018 07:25 PM
| 1 | 1 | foft | h1. Pinouts |
|---|---|---|---|
| 2 | 3 | foft | |
| 3 | 2 | foft | h2. V1 |
| 4 | 3 | foft | |
| 5 | 2 | foft | h2. V2 |
| 6 | 3 | foft | |
| 7 | 1 | foft | h3. Use in core |
| 8 | |||
| 9 | h3. By connection to FPGA |
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| 10 | 4 | foft | |
| 11 | 5 | foft | *GPIO:* |
| 12 | 1 | foft | 1-17: direct to FPGA |
| 13 | 18: SDA (i2c) - clock gen also on here |
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| 14 | 19: SCL (i2c) - clock gen also on here |
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| 15 | 20-22: GND |
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| 16 | 23-34: 3.3V |
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| 17 | 25-26: 5.0V |
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| 18 | |||
| 19 | 5 | foft | *Interface 1:* |
| 20 | 1 | foft | All level shifted to 3.3V. |
| 21 | Special pins: |
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| 22 | 37:RD4: 10k pulldown |
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| 23 | 40:RD5: 10k pulldown |
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| 24 | 34:MPD_N: 4.7k pullup to 5V |
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| 25 | 28:IRQ_N: 4.7k pullup to 5V |
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| 26 | 32:REF_N: 2k pullup to 5V |
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| 27 | |||
| 28 | 5 | foft | *Interface 2:* |
| 29 | 1 | foft | 1-3: USB to FTDI |
| 30 | 4: GND |
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| 31 | 5,6: 5V |
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| 32 | 7-10: Charge cap, FPGA compares with ref voltage |
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| 33 | 11-30: level shifted to 3.3V. 4.7k pullup to 5V. Direction pins have extra 220 ohm resistance (needed?) |
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| 34 | 31: GND |
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| 35 | 32-33: level shifted to 3.3V. 4.7k pullup to 5V |
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| 36 | 34: 5V transistor drive (for tape motor) |
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| 37 | 35-49: level shifted to 3.3V. 4.7k pullup o 5V |
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| 38 | 40: EXTSEL_N: level shifted to 3.3V. 4.7k pullup to 5V |