Bug #52
closed
Added by Stephen over 7 years ago.
Updated about 6 years ago.
Description
CORE14, PAL & NTSC exhibit the same behaviour. When displaying the attached Atari Control Picture, the colour blocks in column 0 are only displaying the rightmost 4 pixels, not the entire 8.
Altirra (and real hardware) : ACP.png
Eclaire : ACP.jgp
Atari file for testing : acp.xex
Files
acp.xex (15.7 KB)
acp.xex |
Run this on Atari |
Stephen, 06/29/2017 11:28 PM
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ACP.jpg (1.54 MB)
ACP.jpg |
Eclaire screenshot - column 0 clipped |
Stephen, 06/29/2017 11:28 PM
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apc.png (60.7 KB)
apc.png |
Expected behaviour - real hardware |
Stephen, 06/29/2017 11:29 PM
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I checked an older core in case I introduced it with the antic timing changes for pbi. Was bad then, so unrelated.
This is a nice static picture to debug in sim or signaltap. I like this kind of test case:-)
foft wrote:
I checked an older core in case I introduced it with the antic timing changes for pbi. Was bad then, so unrelated.
This is a nice static picture to debug in sim or signaltap. I like this kind of test case:-)
Excellent - glad it will be of help. I only recently discovered this cool program.
- Status changed from New to In Progress
Managed to capture in the logic analyzer with lots of info... Now just need to understand it then I can fix!
I fixed this by adjusting the delay on turning off the highres flag when switching into gtia mode. However it broke the Pseudo mode E acid test. So need to investigate some more! It looks like I'd put a 2 cycle delay in here specifically to pass that test. Removing it fixes the picture but breaks the test.
I'm aware that the timing isn't perfect on the dynamic gtia mode switching. I remember when I looked into this it was ... odd. With some very strange mode-dependent results on the edges.
For reference, the relevant passage from the Altirra hardware reference manual:
GTIA mode changes
A change to bits 6-7 of PRIOR takes place between 3-5 color clocks after the write, primarily after 4 color clocks
with a possible cycle of artifact on each side. For a write on cycle 65, the change takes place at positions $83-
$85. The nature of the artifact on-screen depends on the exact transition:
·
Mode 8 to mode 9/11:
Clean transition after 4 color clocks.
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Mode 8 to mode 10:
Clean transition after 3 color clocks.
·
Mode 9/11 to mode 8:
1-2 color clock transition after 3 color clocks. At $83, the mode 9/11 pixel is cut in
half and the playfield is absent, showing background color if there are no players or missiles.
Pseudo
mode E display begins at $84, but the data from $83 is displayed instead. (Presumably this is an artifact
of timing sensitivity in disabling the mode 10 delay line.)
·
Mode 10 to mode 8:
One color clock transition after 4 color clocks.
Machine-specific Behavior Warning
On some systems, the artifact at $84 does not occur when switching from mode 9/11 to mode 8
Also a great blog post from Avery: http://www.virtualdub.org/blog/pivot/entry.php?id=243
So this is mode 8 to mode 9. 'clean transition after 4 colour clocks'.
The Eclaire takes 5 colour clocks here and the real hardware seems to take 2-3 colour clocks I think. Though possibly I'm confused:-)
- Status changed from In Progress to Closed
Fixed by giving gtia modes priority over the high-res mode. This fixes the acp while acid still passes.
Still aware that gtia mode switching timing is a colour clock or so off, but in practical terms this is unlikely to be a problem.
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