Activity
From 04/23/2017 to 05/22/2017
05/22/2017
- 09:55 PM Feature #2: PBI support
- PBI looking good on simulation (bit itself). Based timings on the Freddie data sheet.
Made a start on wiring it up t...
05/21/2017
- 02:37 PM Feature #2: PBI support
- Started on a PBI component that will correctly communicate with the bus. Then this can be checked/simulated - and as ...
05/20/2017
- 10:39 PM Bug #17: NTSC crashing on some builds
- I've still had bad builds since registering the sdram input directly.
I tried to specify an externally switchable ... - 10:36 PM Feature #8: Implement 4 channel ADC
- So I guess we should have some more passive components here. On the other hand I'm kind of attached to SIO noise down...
- 10:35 PM Feature #8: Implement 4 channel ADC
- Pretty sure this is down to floating inputs. Since there is no driver and low capacitance the input picks up the prev...
05/18/2017
- 11:01 PM Feature #8: Implement 4 channel ADC
- Sigh, it definitely works but if I read say channel 1 - I still receive input from the other channels
- 09:00 PM Feature #8: Implement 4 channel ADC
- Debugged and now working.
PBI and SIO audio will be mixed. For now I'm not feeding MIC_L and MIC_R anywhere - thes... - 06:56 AM Feature #8: Implement 4 channel ADC
- Now I have the board its clear this needs debugging.
- 06:58 AM Feature #1: Svideo sync line support
- Received the board and gave this a go. svideo and composite look nice and bright now. However saturation is too low, ...
05/16/2017
- 09:24 PM Feature #13: 32x speed cpu without wait states
- I enabled 32x mode in the core and sorted out single cycle writes from the block ram for now. Hardly any difference i...
- 09:22 PM Bug #17: NTSC crashing on some builds
- Ijor recommended I try registering the input directly from SDRAM. I've done this and see if it helps.
He is also k... - 08:30 PM It is time!
- Panos will be in touch about shipping...
05/12/2017
- 09:52 PM Bug #17 (Closed): NTSC crashing on some builds
- Investigate why... On the v1 core this occurred when running the PLL at very high fVCO. However we already fixed that...
- 07:48 PM Bug #16 (Closed): Audio bug report for Altirra
- One for the coders, please can you check if these bugs are present?
From post on atariage...
http://atariage.com/...
05/11/2017
- 09:42 PM Feature #15: Implement programmable PLL
- Attaching PLL chip datasheet
- 09:41 PM Feature #15 (New): Implement programmable PLL
- See if the programmable PLL works. This will allow us to support different/custom VGA modes, once we have EDID/DDC wo...
- 08:38 PM Feature #13: 32x speed cpu without wait states
- So thinking about options...
Double the main clock speed and pipeline a bit
or
Output next address from antic a... - 08:34 PM Feature #7: Implement I2C vga/hdmi support
- Used this controller for the ADC on v1: https://eewiki.net/pages/viewpage.action?pageId=10125324
So I guess I just n... - 08:30 PM Feature #7: Implement I2C vga/hdmi support
- DDC looks a little funkier
- 08:28 PM Feature #7: Implement I2C vga/hdmi support
- EDID is apparently one of these I can access at address 0x50
- 08:26 PM Feature #7: Implement I2C vga/hdmi support
- Attached mux/level converter chip data sheet
- 08:27 PM Feature #8: Implement 4 channel ADC
- Attached ADC data sheet
- 08:25 PM No sign of FT232 chips
- Panos is chasing up - and if not good news he will order from somewhere quicker!
In the meantime I've added ADC su...
05/08/2017
- 10:08 PM Feature #8 (In Progress): Implement 4 channel ADC
- Written initial support based on data sheet and simulated. Not yet built into test core or tried on real hardware.
...
05/04/2017
- 09:25 PM Feature #13: 32x speed cpu without wait states
- Nope, this is not going to be so simple... Massive timing violations.
05/03/2017
- 08:27 PM Missing parts
- Panos is waiting for the last few remaining parts to arrive. Most notably the FT232 USB chip. We're expecting they wi...
05/02/2017
- 10:15 PM Feature #14: Svideo core for first prototype
- Debugged in isim to get lots of overflow/underflow/blanking/burst incorrect cases!
Added colour bars and asserts for... - 06:40 AM Feature #14: Svideo core for first prototype
- Scaled luma with 64 space for chroma - when in composite mode only. No point throwing away svideo brightness.
Adde... - 06:38 AM Sub PCB - now populated!
- !sub-board-pop.jpg!
04/30/2017
- 09:06 PM Sub-board
- Here is the first picture of a sub-board, which also arrived in Greece. None completed yet but all the parts fit - an...
- 09:01 PM Video DAC regulator patch
- Here is a picture of the patch Panos has skillfully applied to the boards.
!patch.jpg! - 08:58 PM Boards received
- The boards arrived in Greece. Panos is in the process of adding some final parts and trying them out.
Some good n...
04/26/2017
- 11:43 PM Document: Eclaire XL v1.0 Board Spec
- Eclaire XL v1.0 Board Spec
- 08:54 PM Feature #14: Svideo core for first prototype
- Setting this up in the simulator so I can understand chroma better.
The problem seems to be that I've used all the... - 08:51 PM Feature #13: 32x speed cpu without wait states
- I have something working on the simulator - alone. Now need to plug it into the core proper to see if it works. Will ...
04/24/2017
- 10:14 PM Feature #14: Svideo core for first prototype
- Should add that this should not be done for direct chroma output for svideo... Since that is still on a 0-0.7V DAC ou...
- 10:14 PM Feature #14: Svideo core for first prototype
- Panos tried out a new core with composite only - on green using the sync pin. Looks brighter but just black and white...
- 07:58 PM Feature #14 (Closed): Svideo core for first prototype
- Waiting the Chinese sun to rising, I decide to proceed with the "video mod" of our v 1.0 board. So I desolder the "vs...
- 07:56 PM Pictures!
- The PCB company sent us an initial picture!
!v3board_small.jpg!
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