Project

General

Profile

« Previous | Next » 

Revision 1316

Added by markw over 4 years ago

Mistification from slingshot, many many many thanks!

View differences:

firmware_eclairexl/mist/diskio_sectorrequest.c
#include "diskio.h"
#include "regs.h"
#include "printf.h"
extern int debug_pos;
void mmcReadCached(u32 sector);
u32 n_actual_mmc_sector;
unsigned char * mmc_sector_buffer;
void mmcReadCached(u32 sector)
{
//debug("mmcReadCached");
//plotnext(toatarichar(' '));
//plotnextnumber(sector);
//debug("\n");
if(sector==n_actual_mmc_sector) return;
//debug("mmcReadREAL");
//plotnext(toatarichar(' '));
//plotnextnumber(sector);
//debug("\n");
//u08 ret,retry;
//predtim nez nacte jiny, musi ulozit soucasny
// TODO mmcWriteCachedFlush();
//az ted nacte novy
//retry=0; //zkusi to maximalne 256x
/*do
{
ret = mmcRead(sector); //vraci 0 kdyz ok
retry--;
} while (ret && retry);
while(ret); //a pokud se vubec nepovedlo, tady zustane zablokovany cely SDrive!
*/
//printf("Reading sector:%d", sector);
*zpu_out4 = sector|0x04000000;
while (!*zpu_in4)
{
// Wait until ready
}
*zpu_out4 = 0;
//printf(" RD1 ");
while (*zpu_in4)
{
// Wait until ready cleared
}
//printf(" RD2 ");
n_actual_mmc_sector=sector;
}
/*-----------------------------------------------------------------------*/
/* Initialize Disk Drive */
/*-----------------------------------------------------------------------*/
DSTATUS disk_initialize (void)
{
DSTATUS stat;
n_actual_mmc_sector = 0xffffffff;
//do
//{
// mmcInit();
//}
//while(mmcReset()); //dokud nenulove, tak smycka (return 0 => ok!)
//set_spi_clock_freq();
// no longer in ram (yet!), misuse will break us...
mmc_sector_buffer = (unsigned char *)0x4000; // 512 bytes in the middle of memory space!
stat = RES_OK;
return stat;
}
/*-----------------------------------------------------------------------*/
/* Read Partial Sector */
/*-----------------------------------------------------------------------*/
DRESULT disk_readp (
BYTE* dest, /* Pointer to the destination object */
DWORD sector, /* Sector number (LBA) */
WORD sofs, /* Offset in the sector */
WORD count /* Byte count (bit15:destination) */
)
{
DRESULT res;
/*debug("readp:");
plotnextnumber(sector);
debug(" ");
plotnextnumber((int)dest);
debug(" ");
plotnextnumber(sofs);
debug(" ");
plotnextnumber(count);
debug(" ");
plotnextnumber(atari_sector_buffer);
debug(" ");
plotnextnumber(mmc_sector_buffer);
debug("\n");
*/
// Put your code here
mmcReadCached(sector);
for(;count>0;++sofs,--count)
{
unsigned char x = mmc_sector_buffer[sofs];
//printf("char:%02x loc:%d", x,sofs);
*dest++ = x;
}
res = RES_OK;
return res;
}
/*-----------------------------------------------------------------------*/
/* Write Partial Sector */
/*-----------------------------------------------------------------------*/
DRESULT disk_writep (const BYTE* buff, DWORD sofs, DWORD count)
{
DRESULT res;
int i=sofs;
int end=sofs+count;
int pos = 0;
/* debug_pos = 0;
printf("WP:%x %d %d"),buff,sofs,count;
debug_pos = -1;*/
for (;i!=end;++i,++pos)
{
unsigned char temp = buff[pos];
unsigned int volatile* addr = (unsigned int volatile *)&mmc_sector_buffer[i&~3];
unsigned int prev = *(unsigned int volatile*)addr;
((char unsigned *)&prev)[i&3] = temp;
*addr = prev;
//mmc_sector_buffer[i] = buff[pos];
//printf("char:%c loc:%d,", buff[pos],i);
}
/* debug_pos = 40;
printf("WP DONE:%x %d %d"),buff,sofs,count;
debug_pos = -1;*/
res = RES_OK;
return res;
}
void disk_writeflush()
{
/* // Finalize write process
int retry=16; //zkusi to maximalne 16x
int ret;
//printf(":WSECT:%d",n_actual_mmc_sector);
do
{
ret = mmcWrite(n_actual_mmc_sector); //vraci 0 kdyz ok
retry--;
} while (ret && retry);
//printf(":WD:");
*/
/*debug_pos = 0;
printf("WF");
debug_pos = -1;*/
//printf(" WTF:%d:%x ", n_actual_mmc_sector, ((unsigned int *)mmc_sector_buffer)[0]);
*zpu_out4 = n_actual_mmc_sector|0x08000000;
while (!*zpu_in4)
{
// Wait until ready
}
*zpu_out4 = 0;
//printf(" PT1 ");
while (*zpu_in4)
{
// Wait until ready cleared
}
//printf(" PT2 ");
/*debug_pos = 40;
printf("DONE");
debug_pos = -1;*/
}
firmware_eclairexl/Makefile
MCCTV_5200_OBJ = $(patsubst %.c,$(MCCTV_5200_BUILD_DIR)/%.o,$(MCCTV_5200_SRC))
MIST_PRJ = MIST
MIST_SRC = $(COMMON_SRC) $(SDCARD_SRC) $(A800_SRC) mist/dirs.c sdram_common/rom_location.c sdfakeflash/sdflash.c mcc/spibase.c
MIST_SRC = fileutils.c uart/uart.c hexdump.c common/utils.c printf/printf.c a800/freeze.c atari_drive_emulator.c atx.c atx_eclaire.c libgcc_divmod.c mist/dirs.c mist/mainmenu.c mist/file.c sdram_common/rom_location.c
MIST_OBJ = $(patsubst %.c,$(MIST_BUILD_DIR)/%.o,$(MIST_SRC))
MIST_5200_PRJ = MIST_5200
......
$(MIST_BUILD_DIR)/%.o: %.c Makefile
mkdir -p `dirname $@`
$(CC) -I$(MIST_DIR) $(CFLAGS) -DNO_VID2I2C -DMAX_VIDEO_MODE=3 -DMIST_VIDEO_MODE -o $@ -c $<
$(CC) -I$(MIST_DIR) $(CFLAGS) -DNO_FLASH -DNO_VID2I2C -DMAX_VIDEO_MODE=3 -DMIST -o $@ -c $<
$(MIST_5200_BUILD_DIR)/%.o: %.c Makefile
mkdir -p `dirname $@`
firmware_eclairexl/main.h
// reserve 2 bits for extending cart_select
BIT_REG(,0x01,25,freezer_enable,zpu_out1)
BIT_REG(,0x03,26,key_type,zpu_out1) // ansi,iso,custom1,custom2
#ifndef MIST
BIT_REG(,0x07,28,turbo_drive,zpu_out1)
#endif
BIT_REG(,0x01,31,turbo_6502_vblank_only,zpu_out1)
BIT_REG(,0x07,0,video,zpu_out6) // 4 bits,3 used... what to do...
......
BIT_REG_RO(,0x1,18,sd_detect,zpu_in1) // sd_detect
BIT_REG_RO(,0x1,19,sd_writeprotect,zpu_in1) // sd_writeprotect
//MiST file IO
#ifdef MIST
BIT_REG_RO(,0x07,26,turbo_drive,zpu_in1)
BIT_REG_RO(,0x1,29,sd_ack,zpu_in1)
BIT_REG_RO(,0x3,30,sd_mounted,zpu_in1)
BIT_REG(,0x3,30,sd_read,zpu_out3)
BIT_REG(,0x3,28,sd_write,zpu_out3)
BIT_REG(,0x1,18,sd_secbuf_rd,zpu_out3)
BIT_REG(,0x1,17,sd_secbuf_we,zpu_out3)
BIT_REG(,0x1ff,8,sd_secbuf_addr,zpu_out3)
BIT_REG(,0xff,0,sd_secbuf_d,zpu_out3)
#endif
#define VIDEO_RGB 0
#define VIDEO_SCANDOUBLE 1
#define VIDEO_SVIDEO 2
......
set_cart_select(0);
set_freezer_enable(0);
set_key_type(0);
#ifndef MIST
set_turbo_drive(0);
#endif
set_atari800mode(0);
*atari_colbk = 0xc8;
......
char const * get_video_mode(int video_mode)
{
#ifndef MIST_VIDEO_MODE
static char const * videotxt[] =
{
"RGB",
......
"VGA",
"COMPOSITE"
};
#else
static char const * videotxt[] =
{
"RGB",
"SCANDOUBLE",
"YPBPR 240",
"YPBPR 480",
"",
"",
""
};
#endif
return videotxt[video_mode];
}
firmware_eclairexl/mist/file.c
#include "integer.h"
#include "regs.h"
#include "file.h"
#include "simplefile.h"
/* these constants are just to satisfy menu.h */
char const * fil_type_rom;
char const * fil_type_bin;
char const * fil_type_car;
char const * fil_type_mem;
char const * fil_type_rpd;
int file_struct_size()
{
return sizeof(struct SimpleFile);
}
void file_init(struct SimpleFile * file)
{
file->num = 0;
file->size = 0;
file->type = 0;
file->is_readonly = 1;
file->offset = -1;
}
char *fname = "";
char const * file_name(struct SimpleFile * file)
{
return fname;
}
enum SimpleFileStatus file_open_name_in_dir(struct SimpleDirEntry * entry, char const * filename, struct SimpleFile * file)
{
return SimpleFile_FAIL;
}
enum SimpleFileStatus file_open_name(char const * path, struct SimpleFile * file)
{
return SimpleFile_FAIL;
}
enum SimpleFileStatus dir_init(void * mem, int space)
{
return SimpleFile_FAIL;
}
struct SimpleDirEntry * dir_entries(char const * dirPath)
{
return NULL;
}
DWORD cur_offset;
int cur_file;
BYTE sect_buffer[512];
BYTE cache_read(DWORD offset, int file)
{
if(((offset & ~0x1FF) != (cur_offset & ~0x1FF)) || (cur_file != file))
{
int i;
*zpu_out2 = offset >> 9;
set_sd_read(0);
set_sd_read(1 << file);
while(!get_sd_ack()) {};
set_sd_read(0);
set_sd_secbuf_rd(1);
for(i=0; i<512; i++) {
set_sd_secbuf_addr(i);
sect_buffer[i] = *zpu_in2;
}
set_sd_secbuf_rd(0);
cur_offset = offset;
cur_file = file;
}
return sect_buffer[offset & 0x1FF];
}
void cache_write(int file)
{
int i;
*zpu_out2 = cur_offset >> 9;
set_sd_secbuf_we(1);
for(i=0; i<512; i++) {
set_sd_secbuf_addr(i);
set_sd_secbuf_d(sect_buffer[i]);
}
set_sd_secbuf_we(0);
set_sd_write(0);
set_sd_write(1 << file);
while(!get_sd_ack()) {};
set_sd_write(0);
while(get_sd_ack()) {};
}
void file_reset()
{
cur_file = -1;
cur_offset = -1;
}
int file_size(struct SimpleFile * file)
{
return file->size;
}
int file_readonly(struct SimpleFile * file)
{
return file->is_readonly;
}
int file_type(struct SimpleFile * file)
{
return file->type;
}
enum SimpleFileStatus file_read(struct SimpleFile *file, void *buffer, int bytes, int *bytesread)
{
if((file->offset >= 0) && (file->size > file->offset) && (bytes > 0))
{
if((file->offset + bytes) > file->size) bytes = file->size - file->offset;
*bytesread = bytes;
while(bytes--) *(unsigned char *)buffer++ = cache_read(file->offset++, file->num);
return SimpleFile_OK;
}
*bytesread = 0;
return SimpleFile_FAIL;
}
enum SimpleFileStatus file_seek(struct SimpleFile * file, int offsetFromStart)
{
if((file->size > 0) && (file->size >= offsetFromStart))
{
file->offset = offsetFromStart;
return SimpleFile_OK;
}
return SimpleFile_FAIL;
}
enum SimpleFileStatus file_write(struct SimpleFile *file, void *buffer, int bytes, int *byteswritten)
{
if((file->offset >= 0) && (file->size > file->offset) && (bytes > 0))
{
if((file->offset + bytes) > file->size) bytes = file->size - file->offset;
*byteswritten = bytes;
while(bytes>0)
{
cache_read(file->offset, file->num);
do
{
sect_buffer[file->offset & 0x1FF] = *(unsigned char*) buffer;
bytes--;
file->offset++;
buffer++;
}
while((file->offset & 0x1FF) && (bytes>0));
cache_write(file->num);
}
return SimpleFile_OK;
}
return SimpleFile_FAIL;
}
enum SimpleFileStatus file_write_flush()
{
return SimpleFile_FAIL;
}
int file_mount(struct SimpleFile * file, unsigned char num, int size)
{
file->num = num;
file->offset = -1;
file->size = size;
file->is_readonly = 0;
file_reset();
}
firmware_eclairexl/mist/file.h
#ifndef _FILE_H_
#define _FILE_H_
struct SimpleFile
{
int num;
int offset;
int is_readonly;
int size;
int type;
};
#endif
firmware_eclairexl/mist/mainmenu.c
#include "main.h" //!!!
#include "atari_drive_emulator.h"
#include "log.h"
#include "utils.h"
#include "sd_direct/spi.h"
#include "printf.h"
#include "menu.h"
unsigned char freezer_rom_present;
unsigned char sd_present;
unsigned char sel_profile;
unsigned char sd_mounted;
void mainmenu()
{
int i;
*atari_colbk = 0xb8;
*atari_colbk = 0x38;
freezer_rom_present = 0;
sd_mounted = 0;
for (i=0; i!=NUM_FILES; ++i)
{
file_init(files[i]);
}
sel_profile = 1;
init_drive_emulator();
reboot(1);
run_drive_emulator();
}
#ifdef DEBUG_SUPPORT
struct EditNumberState
{
unsigned char col;
unsigned char mask;
unsigned char defaultShift;
};
struct DebugMenuData
{
struct EditNumberState state[2];
};
void initDebugMenuData(struct DebugMenuData * menuData2)
{
menuData2->state[0].col = 0;
menuData2->state[0].mask = 0x3;
menuData2->state[0].defaultShift = 12;
menuData2->state[1].col = 0;
menuData2->state[1].mask = 0x1;
menuData2->state[1].defaultShift = 4;
}
void menuDisplayEditNumber(unsigned int num, struct EditNumberState * state)
{
int shift = state->defaultShift;
int i=0;
int adj = debug_adjust;
printf("0x");
while(shift>=0)
{
int val = num;
val = (val>> shift)&0xf;
if (state->col == i)
debug_adjust = adj^128;
else
debug_adjust = adj;
printf("%1x",val);
shift = shift-4;
i=i+1;
}
debug_adjust = adj;
}
void menuPrintDebugAddress(void * menuData, void * itemData)
{
printf("Addr:");
struct DebugMenuData * menuData2 = (struct DebugMenuData *)(menuData);
menuDisplayEditNumber(get_debug_addr(),&menuData2->state[0]);
}
void menuPrintDebugData(void * menuData, void * itemData)
{
printf("Data:");
struct DebugMenuData * menuData2 = (struct DebugMenuData *)(menuData);
menuDisplayEditNumber(get_debug_data(),&menuData2->state[1]);
}
void menuPrintDebugMode(void * menuData, void * itemData)
{
printf("Mode:");
if (get_debug_read_mode())
printf("Read ");
if (get_debug_write_mode())
printf("Write ");
if (get_debug_data_match())
printf("Match ");
}
bool hexDigitToNumber(unsigned char digit, int *val)
{
if (digit>='0' && digit<='9')
{
*val = digit-'0';
return true;
}
else if (digit>='A' && digit<='F')
{
*val = 10 + digit-'A';
return true;
}
return false;
}
bool menuEditNumber(struct EditNumberState * state, struct joystick_status * joy, unsigned int * data)
{
unsigned int val = 0;
unsigned int mask = 0;
int i;
int shift = state->defaultShift;
bool res = false;
if (hexDigitToNumber(joy->keyPressed_,&val))
{
//key pressed, store the number in the current location
for (i=0;i!=state->col;++i)
shift = shift-4;
mask = 0xf;
val = val<<shift;
mask = mask<<shift;
*data = ((*data)&~mask) | val;
state->col = state->col+1;
res = true;
}
else if (joy->keyPressed_==-1)
{
// delete pressed, move back one place
state->col = state->col-1;
}
state->col = state->col & state->mask; // sanitize col
return res;
}
void menuDebugAddress(void * menuData, struct joystick_status * joy, int j)
{
int i;
struct DebugMenuData * menuData2 = (struct DebugMenuData *)(menuData);
unsigned int addr = get_debug_addr();
if (menuEditNumber(&menuData2->state[j],joy,&addr))
set_debug_addr(addr);
}
void menuDebugData(void * menuData, struct joystick_status * joy, int j)
{
int i;
struct DebugMenuData * menuData2 = (struct DebugMenuData *)(menuData);
unsigned int data = get_debug_data();
if (menuEditNumber(&menuData2->state[j],joy,&data))
set_debug_data(data);
}
void menuDebugHotkeys(void * menuData, unsigned char keyPressed)
{
switch (keyPressed)
{
case 'R':
set_debug_read_mode(!get_debug_read_mode());
break;
case 'W':
set_debug_write_mode(!get_debug_write_mode());
break;
case 'M':
set_debug_data_match(!get_debug_data_match());
break;
}
}
int debug_menu()
{
struct MenuEntry entries[] =
{
{&menuPrintDebugAddress,0,&menuDebugAddress,MENU_FLAG_KEYPRESS},
{&menuPrintDebugData,1,&menuDebugData,MENU_FLAG_KEYPRESS},
{&menuPrintDebugMode,0,0,MENU_FLAG_KEYPRESS},
{0,0,0,0}, //blank line
{0,"Exit",0,MENU_FLAG_EXIT},
{0,0,0,MENU_FLAG_FINAL} //blank line
};
struct DebugMenuData menuData;
initDebugMenuData(&menuData);
return display_menu("Debug",&entries[0], &menuDebugHotkeys, &menuData);
}
#endif
void update_keys()
{
#ifdef LINUX_BUILD
check_keys();
#endif
#ifdef USB
usb_poll(&usb_porta);
#endif
#ifdef USB2
usb_poll(&usb_portb);
#endif
}
void actions()
{
update_keys();
// Check for new mounts
unsigned char sd_new_mounted = get_sd_mounted();
if ((sd_mounted & 0x01) != (sd_new_mounted & 0x01))
{
int size = *(int*)zpu_in2;
if (size) {
file_mount(files[0], 0, size);
set_drive_status(0,files[0]);
} else {
// remove
file_init(files[0]);
set_drive_status(0, 0);
}
}
if ((sd_mounted & 0x02) != (sd_new_mounted & 0x02))
{
int size = *(int*)zpu_in2;
if (size) {
file_mount(files[1], 1, size);
set_drive_status(1,files[1]);
} else {
// remove
file_init(files[1]);
set_drive_status(1, 0);
}
}
sd_mounted = sd_new_mounted;
// Hot keys
if (get_hotkey_softboot())
{
reboot(0);
}
else if (get_hotkey_coldboot())
{
reboot(1);
do
{
update_keys();
}
while (get_hotkey_coldboot());
} else if (get_hotkey_settings())
// cold boot with disk unload
{
set_drive_status(0, 0);
set_drive_status(1, 0);
reboot(1);
do
{
update_keys();
}
while (get_hotkey_settings());
}
}
mist/DualPortRAM.vhd
-- Generic dual-port RAM implementation -
-- will hopefully work for both Altera and Xilinx parts
library ieee;
USE ieee.std_logic_1164.all;
use ieee.numeric_std.all;
ENTITY DualPortRAM IS
GENERIC
(
addrbits : integer := 9;
databits : integer := 7
);
PORT
(
address_a : IN STD_LOGIC_VECTOR (addrbits-1 downto 0);
address_b : IN STD_LOGIC_VECTOR (addrbits-1 downto 0);
clock : IN STD_LOGIC := '1';
data_a : IN STD_LOGIC_VECTOR (databits-1 downto 0);
data_b : IN STD_LOGIC_VECTOR (databits-1 downto 0);
wren_a : IN STD_LOGIC := '0';
wren_b : IN STD_LOGIC := '0';
q_a : OUT STD_LOGIC_VECTOR (databits-1 downto 0);
q_b : OUT STD_LOGIC_VECTOR (databits-1 downto 0)
);
END DualPortRAM;
architecture arch of DualPortRAM is
type ram_type is array(natural range ((2**addrbits)-1) downto 0) of std_logic_vector(databits-1 downto 0);
shared variable ram : ram_type;
begin
-- Port A
process (clock)
begin
if (clock'event and clock = '1') then
if wren_a='1' then
ram(to_integer(unsigned(address_a))) := data_a;
q_a <= data_a;
else
q_a <= ram(to_integer(unsigned(address_a)));
end if;
end if;
end process;
-- Port B
process (clock)
begin
if (clock'event and clock = '1') then
if wren_b='1' then
ram(to_integer(unsigned(address_b))) := data_b;
q_b <= data_b;
else
q_b <= ram(to_integer(unsigned(address_b)));
end if;
end if;
end process;
end architecture;
mist/atari800core.qsf
set_global_assignment -name TOP_LEVEL_ENTITY atari800core_mist
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 7.2
set_global_assignment -name PROJECT_CREATION_TIME_DATE "22:27:29 OCTOBER 30, 2007"
set_global_assignment -name LAST_QUARTUS_VERSION "12.1 SP1.33"
set_global_assignment -name LAST_QUARTUS_VERSION "13.1 SP4.26"
set_global_assignment -name USE_GENERATED_PHYSICAL_CONSTRAINTS OFF -section_id eda_palace
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 144
set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "NO HEAT SINK WITH STILL AIR"
......
set_global_assignment -name CYCLONEII_OPTIMIZATION_TECHNIQUE BALANCED
set_global_assignment -name SMART_RECOMPILE ON
set_global_assignment -name ENABLE_SIGNALTAP ON
set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC ON
set_global_assignment -name ENABLE_SIGNALTAP OFF
set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION ON
set_global_assignment -name PHYSICAL_SYNTHESIS_EFFORT NORMAL
set_global_assignment -name FMAX_REQUIREMENT "114 MHz"
set_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING OFF
set_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING ON
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
set_global_assignment -name USE_CONFIGURATION_DEVICE ON
......
set_global_assignment -name TSU_REQUIREMENT "2 ns"
set_global_assignment -name TCO_REQUIREMENT "2 ns"
set_global_assignment -name ALLOW_POWER_UP_DONT_CARE OFF
set_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS OFF
set_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS ON
set_global_assignment -name AUTO_RAM_TO_LCELL_CONVERSION OFF
set_global_assignment -name AUTO_RAM_RECOGNITION ON
set_global_assignment -name AUTO_ROM_RECOGNITION ON
set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING ON
set_global_assignment -name LL_ROOT_REGION ON -section_id "Root Region"
set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id "Root Region"
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
......
set_global_assignment -name PHYSICAL_SYNTHESIS_MAP_LOGIC_TO_MEMORY_FOR_AREA OFF
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY out
set_global_assignment -name PLACEMENT_EFFORT_MULTIPLIER 4.0
set_global_assignment -name ROUTER_EFFORT_MULTIPLIER 4.0
set_global_assignment -name CYCLONEII_M4K_COMPATIBILITY OFF
#set_parameter -name ENABLE_RUNTIME_MOD YES -to "Minimig1:minimig|amiga_boot:BOOTROM1|altsyncram:Ram0_rtl_10"
#set_parameter -name INSTANCE_NAME mig -to "Minimig1:minimig|amiga_boot:BOOTROM1|altsyncram:Ram0_rtl_10"
......
set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[14]
set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[15]
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[0]
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[1]
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[2]
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[3]
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[4]
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[5]
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[6]
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[7]
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[8]
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[9]
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[10]
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[11]
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[12]
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[0]
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[1]
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[2]
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[3]
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[4]
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[5]
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[6]
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[7]
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[8]
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[9]
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[10]
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[11]
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[12]
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[13]
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[14]
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[15]
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_BA[0]
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_BA[1]
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQML
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQMH
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_nRAS
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_nCAS
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_nWE
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_nCS
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_CKE
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_CLK
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to SDRAM_A[0]
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to SDRAM_A[1]
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to SDRAM_A[2]
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to SDRAM_A[3]
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to SDRAM_A[4]
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to SDRAM_A[5]
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to SDRAM_A[6]
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to SDRAM_A[7]
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to SDRAM_A[8]
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to SDRAM_A[9]
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to SDRAM_A[10]
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to SDRAM_A[11]
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to SDRAM_A[12]
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to SDRAM_DQ[0]
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to SDRAM_DQ[1]
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to SDRAM_DQ[2]
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to SDRAM_DQ[3]
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to SDRAM_DQ[4]
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to SDRAM_DQ[5]
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to SDRAM_DQ[6]
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to SDRAM_DQ[7]
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to SDRAM_DQ[8]
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to SDRAM_DQ[9]
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to SDRAM_DQ[10]
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to SDRAM_DQ[11]
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to SDRAM_DQ[12]
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to SDRAM_DQ[13]
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to SDRAM_DQ[14]
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to SDRAM_DQ[15]
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to SDRAM_BA[0]
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to SDRAM_BA[1]
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to SDRAM_DQML
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to SDRAM_DQMH
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to SDRAM_nRAS
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to SDRAM_nCAS
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to SDRAM_nWE
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to SDRAM_nCS
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to SDRAM_CKE
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to SDRAM_CLK
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_R[5]
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_R[4]
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_R[3]
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_R[2]
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_R[1]
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_R[0]
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to VGA_R[5]
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to VGA_R[4]
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to VGA_R[3]
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to VGA_R[2]
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to VGA_R[1]
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to VGA_R[0]
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_G[5]
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_G[4]
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_G[3]
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_G[2]
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_G[1]
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_G[0]
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to VGA_G[5]
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to VGA_G[4]
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to VGA_G[3]
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to VGA_G[2]
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to VGA_G[1]
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to VGA_G[0]
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_B[5]
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_B[4]
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_B[3]
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_B[2]
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_B[1]
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_B[0]
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to VGA_B[5]
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to VGA_B[4]
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to VGA_B[3]
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to VGA_B[2]
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to VGA_B[1]
set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to VGA_B[0]
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
set_global_assignment -name VHDL_FILE atari800core_mist.vhd
set_global_assignment -name SDC_FILE atari800core.sdc
set_global_assignment -name VERILOG_FILE user_io.v
set_global_assignment -name VERILOG_FILE data_io.v
set_global_assignment -name VERILOG_FILE osd.v
set_global_assignment -name QIP_FILE zpu_rom.qip
set_global_assignment -name SDC_FILE atari800core.sdc
set_global_assignment -name QIP_FILE mist_sector_buffer.qip
set_global_assignment -name VHDL_FILE atari800core_mist.vhd
set_global_assignment -name VHDL_FILE DualPortRAM.vhd
set_global_assignment -name VHDL_FILE switch_pal_ntsc.vhd
set_global_assignment -name VERILOG_FILE user_io.v
set_global_assignment -name VERILOG_FILE sd_card.v
set_global_assignment -name QIP_FILE pll_pal.qip
set_global_assignment -name QIP_FILE pll_downstream_pal.qip
set_global_assignment -name QIP_FILE video_pll_reconfig.qip
set_global_assignment -name QIP_FILE video_pll_reconfig_pal.qip
set_global_assignment -name QIP_FILE clkctrl.qip
set_global_assignment -name QIP_FILE pll_reconfig.qip
set_global_assignment -name QIP_FILE pal_rom.qip
set_global_assignment -name QIP_FILE ntsc_rom.qip
mist/atari800core.sdc
create_clock -period 27MHz [get_ports CLOCK_27[0]]
derive_pll_clocks
create_generated_clock -name sdclk_pin -source [get_pins {clock|altpll_component|auto_generated|pll1|clk[2]}] [get_ports {SDRAM_CLK}]
derive_clock_uncertainty
set_input_delay -clock sdclk_pin -max 6.4 [get_ports SDRAM_DQ*]
set_input_delay -clock sdclk_pin -min 3.2 [get_ports SDRAM_DQ*]
set_output_delay -clock sdclk_pin -max 1.5 [get_ports SDRAM_*]
set_output_delay -clock sdclk_pin -min -0.8 [get_ports SDRAM_*]
set_multicycle_path -from [get_clocks {sdclk_pin}] -to [get_clocks {clock|altpll_component|auto_generated|pll1|clk[0]}] -setup -end 2
## Generated SDC file "hello_led.out.sdc"
set sys_clk "clk"
create_clock -name {clk_27} -period 37.037 -waveform { 0.000 18.500 } [get_ports {CLOCK_27[0]}]
## Copyright (C) 1991-2011 Altera Corporation
## Your use of Altera Corporation's design tools, logic functions
## and other software and tools, and its AMPP partner logic
## functions, and any output files from any of the foregoing
## (including device programming or simulation files), and any
## associated documentation or information are expressly subject
## to the terms and conditions of the Altera Program License
## Subscription Agreement, Altera MegaCore Function License
## Agreement, or other applicable license agreement, including,
## without limitation, that your use is for the sole purpose of
## programming logic devices manufactured by Altera and sold by
## Altera or its authorized distributors. Please refer to the
## applicable agreement for further details.
## VENDOR "Altera"
## PROGRAM "Quartus II"
## VERSION "Version 11.1 Build 216 11/23/2011 Service Pack 1 SJ Web Edition"
## DATE "Fri Jul 06 23:05:47 2012"
##
## DEVICE "EP3C25Q240C8"
##
#**************************************************************
# Time Information
#**************************************************************
set_time_format -unit ns -decimal_places 3
#**************************************************************
# Create Clock
#**************************************************************
create_clock -name clk_27 -period 37.037 [get_ports {CLOCK_27[0]}]
create_clock -name {SPI_SCK} -period 41.666 -waveform { 20.8 41.666 } [get_ports {SPI_SCK}]
set_clock_groups -asynchronous -group [get_clocks {SPI_SCK}] -group [get_clocks $sys_clk]
set sdram_clk "pll_switcher|generic_pll2|altpll_component|auto_generated|pll1|clk[2]"
set mem_clk "pll_switcher|generic_pll2|altpll_component|auto_generated|pll1|clk[0]"
set sys_clk "pll_switcher|generic_pll2|altpll_component|auto_generated|pll1|clk[1]"
#**************************************************************
# Create Generated Clock
#**************************************************************
derive_pll_clocks
#**************************************************************
# Set Clock Latency
#**************************************************************
#**************************************************************
# Set Clock Uncertainty
#**************************************************************
derive_clock_uncertainty;
#**************************************************************
# Set Input Delay
#**************************************************************
# SDRAM is clocked from sd1clk_pin, but the SDRAM controller uses memclk
set_input_delay -clock [get_clocks $sdram_clk] -reference_pin [get_ports SDRAM_CLK] -max 6.4 [get_ports SDRAM_DQ[*]]
set_input_delay -clock [get_clocks $sdram_clk] -reference_pin [get_ports SDRAM_CLK] -min 3.2 [get_ports SDRAM_DQ[*]]
#**************************************************************
# Set Output Delay
#**************************************************************
set_output_delay -clock [get_clocks $sdram_clk] -reference_pin [get_ports SDRAM_CLK] -max 1.5 [get_ports {SDRAM_D* SDRAM_A* SDRAM_BA* SDRAM_n* SDRAM_CKE}]
set_output_delay -clock [get_clocks $sdram_clk] -reference_pin [get_ports SDRAM_CLK] -min -0.8 [get_ports {SDRAM_D* SDRAM_A* SDRAM_BA* SDRAM_n* SDRAM_CKE}]
set_output_delay -clock [get_clocks $sys_clk] -max 0 [get_ports {VGA_*}]
set_output_delay -clock [get_clocks $sys_clk] -min -5 [get_ports {VGA_*}]
#**************************************************************
# Set Clock Groups
#**************************************************************
set_clock_groups -asynchronous -group [get_clocks {SPI_SCK}] -group [get_clocks {pll_switcher|*}]
set_clock_groups -asynchronous -group [get_clocks {clk_27}] -group [get_clocks {pll_switcher|*}]
set_clock_groups -asynchronous -group [get_clocks {reconfig_pll|*}] -group [get_clocks {pll_switcher|*}]
#**************************************************************
# Set False Path
#**************************************************************
set_false_path -to [get_ports {UART_TX}]
set_false_path -to [get_ports {AUDIO_L}]
set_false_path -to [get_ports {AUDIO_R}]
set_false_path -to [get_ports {LED}]
#**************************************************************
# Set Multicycle Path
#**************************************************************
set_multicycle_path -to {VGA_*[*]} -setup 2
set_multicycle_path -to {VGA_*[*]} -hold 1
set_multicycle_path -from [get_clocks $sdram_clk] -to [get_clocks $mem_clk] -setup 2
#**************************************************************
# Set Maximum Delay
#**************************************************************
#**************************************************************
# Set Minimum Delay
#**************************************************************
#**************************************************************
# Set Input Transition
#**************************************************************
mist/atari800core_mist.vhd
);
end component;
component osd
generic ( OSD_COLOR : integer := 1 ); -- blue
port (
clk_sys : in std_logic;
R_in : in std_logic_vector(5 downto 0);
G_in : in std_logic_vector(5 downto 0);
B_in : in std_logic_vector(5 downto 0);
HSync : in std_logic;
VSync : in std_logic;
R_out : out std_logic_vector(5 downto 0);
G_out : out std_logic_vector(5 downto 0);
B_out : out std_logic_vector(5 downto 0);
SPI_SCK : in std_logic;
SPI_SS3 : in std_logic;
SPI_DI : in std_logic
);
end component osd;
COMPONENT rgb2ypbpr
PORT (
red : IN std_logic_vector(5 DOWNTO 0);
......
END COMPONENT;
component user_io
GENERIC(
STRLEN : in integer := 0
);
GENERIC (
STRLEN : integer := 0;
PS2DIV : integer := 1500 );
PORT(
-- conf_str? how to do in vhdl...
clk_sys : in std_logic;
clk_sd : in std_logic;
conf_str : in std_logic_vector(8*STRLEN-1 downto 0);
-- mist spi to firmware
SPI_CLK : in std_logic;
......
JOYSTICK_ANALOG_1 : out std_logic_vector(15 downto 0);
BUTTONS : out std_logic_vector(1 downto 0);
SWITCHES : out std_logic_vector(1 downto 0);
STATUS : out std_logic_vector(7 downto 0); -- what is this?
STATUS : out std_logic_vector(63 downto 0);
-- video switches
scandoubler_disable: out std_logic;
ypbpr: out std_logic;
no_csync: out std_logic;
-- ps2
PS2_CLK : in std_logic; --12-16khz
PS2_KBD_CLK : out std_logic;
PS2_KBD_DATA : out std_logic;
......
-- connection to sd card emulation
sd_lba : in std_logic_vector(31 downto 0);
sd_rd : in std_logic;
sd_wr : in std_logic;
sd_rd : in std_logic_vector(1 downto 0);
sd_wr : in std_logic_vector(1 downto 0);
sd_ack : out std_logic;
sd_ack_conf : out std_logic;
sd_conf : in std_logic;
sd_sdhc : in std_logic;
sd_dout : out std_logic_vector(7 downto 0);
sd_dout_strobe : out std_logic;
sd_din : in std_logic_vector(7 downto 0);
sd_din_strobe : out std_logic
sd_din_strobe : out std_logic;
sd_buff_addr : out std_logic_vector(8 downto 0);
img_size : out std_logic_vector(31 downto 0);
img_mounted : out std_logic_vector(1 downto 0)
);
end component;
component sd_card
PORT (
-- link to user_io for io controller
io_lba : out std_logic_vector(31 downto 0);
io_rd : out std_logic;
io_wr : out std_logic;
io_ack : in std_logic;
io_conf : out std_logic;
io_sdhc : out std_logic;
-- data coming in from io controller
io_din : in std_logic_vector(7 downto 0);
io_din_strobe : in std_logic;
-- data going out to io controller
io_dout : out std_logic_vector(7 downto 0);
io_dout_strobe : in std_logic;
-- configuration input
allow_sdhc : in std_logic;
sd_cs : in std_logic;
sd_sck : in std_logic;
sd_sdi : in std_logic;
sd_sdo : out std_logic
);
end component;
component data_io
port (
clk_sys : in std_logic;
SPI_SCK : in std_logic;
SPI_SS2 : in std_logic;
SPI_DI : in std_logic;
ioctl_wait : in std_logic;
ioctl_download : out std_logic;
ioctl_index : out std_logic_vector(7 downto 0);
ioctl_wr : out std_logic;
ioctl_addr : out std_logic_vector(24 downto 0);
ioctl_dout : out std_logic_vector(15 downto 0)
);
end component data_io;
signal AUDIO_L_PCM : std_logic_vector(15 downto 0);
signal AUDIO_R_PCM : std_logic_vector(15 downto 0);
signal AUDIO_R_PCM_IN : std_logic_vector(19 downto 0);
signal VGA_VS_RAW : std_logic;
signal VGA_HS_RAW : std_logic;
......
signal mist_buttons : std_logic_vector(1 downto 0);
signal mist_switches : std_logic_vector(1 downto 0);
signal mist_status : std_logic_vector(63 downto 0);
signal JOY1 : STD_LOGIC_VECTOR(5 DOWNTO 0);
signal JOY2 : STD_LOGIC_VECTOR(5 DOWNTO 0);
......
-- dma/virtual drive
signal DMA_ADDR_FETCH : std_logic_vector(23 downto 0);
signal DMA_ADDR_FETCH_IOCTL : std_logic_vector(23 downto 0);
signal DMA_ADDR_FETCH_ZPU : std_logic_vector(23 downto 0);
signal DMA_WRITE_DATA : std_logic_vector(31 downto 0);
signal DMA_WRITE_DATA_IOCTL : std_logic_vector(31 downto 0);
signal DMA_WRITE_DATA_ZPU : std_logic_vector(31 downto 0);
signal DMA_FETCH : std_logic;
signal DMA_FETCH_ZPU : std_logic;
signal DMA_FETCH_IOCTL : std_logic;
signal DMA_32BIT_WRITE_ENABLE : std_logic;
signal DMA_32BIT_WRITE_ENABLE_ZPU : std_logic;
signal DMA_16BIT_WRITE_ENABLE : std_logic;
signal DMA_16BIT_WRITE_ENABLE_ZPU : std_logic;
signal DMA_16BIT_WRITE_ENABLE_IOCTL : std_logic;
signal DMA_8BIT_WRITE_ENABLE : std_logic;
signal DMA_8BIT_WRITE_ENABLE_ZPU : std_logic;
signal DMA_READ_ENABLE : std_logic;
signal DMA_READ_ENABLE_ZPU : std_logic;
signal DMA_MEMORY_READY : std_logic;
signal DMA_MEMORY_READY_ZPU : std_logic;
signal DMA_MEMORY_DATA : std_logic_vector(31 downto 0);
signal ZPU_ADDR_ROM : std_logic_vector(15 downto 0);
signal ZPU_ROM_DATA : std_logic_vector(31 downto 0);
signal ZPU_IN1 : std_logic_vector(31 downto 0);
signal ZPU_IN2 : std_logic_vector(31 downto 0);
signal ZPU_OUT1 : std_logic_vector(31 downto 0);
signal ZPU_OUT2 : std_logic_vector(31 downto 0);
signal ZPU_OUT3 : std_logic_vector(31 downto 0);
......
SIGNAL speed_6502 : std_logic_vector(5 downto 0);
signal turbo_vblank_only : std_logic;
signal emulated_cartridge_select: std_logic_vector(5 downto 0);
signal cart_type_byte : std_logic_vector(7 downto 0);
signal key_type : std_logic;
signal atari800mode : std_logic;
signal turbo_drive : std_logic_vector(2 downto 0);
-- connection to sd card emulation
signal sd_lba : std_logic_vector(31 downto 0);
signal sd_rd : std_logic;
signal sd_wr : std_logic;
signal sd_rd : std_logic_vector(1 downto 0);
signal sd_wr : std_logic_vector(1 downto 0);
signal sd_ack : std_logic;
signal sd_ack_conf : std_logic;
signal sd_conf : std_logic;
signal sd_sdhc : std_logic;
signal sd_dout : std_logic_vector(7 downto 0);
signal sd_dout_strobe : std_logic;
signal sd_din : std_logic_vector(7 downto 0);
signal sd_din_strobe : std_logic;
signal sd_buff_addr: std_logic_vector(8 downto 0);
signal img_size : std_logic_vector(31 downto 0);
signal img_mounted : std_logic_vector(1 downto 0);
signal zpu_secbuf_addr : std_logic_vector(8 downto 0);
signal zpu_secbuf_d : std_logic_vector(7 downto 0);
signal zpu_secbuf_we : std_logic;
signal zpu_secbuf_q : std_logic_vector(7 downto 0);
signal mist_sd_sdo : std_logic;
signal mist_sd_sck : std_logic;
signal mist_sd_sdi : std_logic;
signal mist_sd_cs : std_logic;
-- data io
signal rom_loaded : std_logic;
type ioctl_t is (
IOCTL_IDLE,
IOCTL_UNLOAD,
IOCTL_WRITE,
IOCTL_ACK);
signal ioctl_state : ioctl_t;
signal ioctl_download : std_logic;
signal ioctl_download_D: std_logic;
signal ioctl_index : std_logic_vector(7 downto 0);
signal ioctl_wr : std_logic;
signal ioctl_addr : std_logic_vector(24 downto 0);
signal ioctl_dout : std_logic_vector(15 downto 0);
signal reset_load : std_logic;
signal cold_reset : std_logic;
signal zpu_cold_reset : std_logic;
signal zpu_unl_reset : std_logic;
-- ps2
signal SLOW_PS2_CLK : std_logic; -- around 16KHz
signal PS2_KEYS : STD_LOGIC_VECTOR(511 downto 0);
signal PS2_KEYS_NEXT : STD_LOGIC_VECTOR(511 downto 0);
......
signal pal : std_logic;
signal scandouble : std_logic;
signal scanlines : std_logic;
signal csync : std_logic;
signal video_mode : std_logic_vector(2 downto 0);
signal scandoubler_disable : std_logic;
signal ypbpr : std_logic;
signal no_csync : std_logic;
signal sd_hs : std_logic;
signal sd_vs : std_logic;
signal sd_red_o : std_logic_vector(5 downto 0);
signal sd_green_o : std_logic_vector(5 downto 0);
signal sd_blue_o : std_logic_vector(5 downto 0);
signal osd_red_o : std_logic_vector(5 downto 0);
signal osd_green_o : std_logic_vector(5 downto 0);
signal osd_blue_o : std_logic_vector(5 downto 0);
signal vga_y_o : std_logic_vector(5 downto 0);
signal vga_pb_o : std_logic_vector(5 downto 0);
signal vga_pr_o : std_logic_vector(5 downto 0);
-- pll reconfig
signal CLK_RECONFIG_PLL : std_logic;
signal CLK_RECONFIG_PLL_LOCKED : std_logic;
-- ypbpr
signal SCANDOUBLE_B : STD_LOGIC_VECTOR(5 DOWNTO 0);
signal SCANDOUBLE_G : STD_LOGIC_VECTOR(5 DOWNTO 0);
signal SCANDOUBLE_R : STD_LOGIC_VECTOR(5 DOWNTO 0);
signal vga_y_o : std_logic_vector(5 downto 0);
signal vga_pb_o : std_logic_vector(5 downto 0);
signal vga_pr_o : std_logic_vector(5 downto 0);
constant SDRAM_BASE : unsigned(23 downto 0) := x"800000";
constant CARTRIDGE_MEM : unsigned(23 downto 0) := x"D00000";
constant SDRAM_ROM_ADDR : unsigned(23 downto 0):= x"F00000";
constant CONF_STR : string :=
"A800XL;;"&
"F,ROM,Load ROM;"&
"F,ROMCAR,Load Cart;"&
"S0,ATRXEX,Load Disk 1;"&
"S1,ATRXEX,Load Disk 2;"&
"P1,Video;"&
"P2,System;"&
"P1O5,Video,NTSC,PAL;"&
"P1O6,Scanlines,Off,On;"&
"P2O8A,CPU Speed,1x,2x,4x,8x,16x;"&
"P2OB,Turbo at VBL only,Off,On;"&
"P2OC,Machine,XL/XE,400/800;"&
"P2ODF,XL/XE Memory,64K,128K,320KB Compy,320KB Rambo,576K Compy,576K Rambo,1088K,4MB;"&
"P2OGI,400/800 Memory,8K,16K,32K,48K,52K;"&
"P2OJ,Keyboard,ISO,ANSI;"&
"P2OKM,Drive speed,Standard,Fast-6,Fast-5,Fast-4,Fast-3,Fast-2,Fast-1,Fast-0;"&
"P2ON,Dual Pokey,No,Yes;"&
"T1,Reset;"&
"T2,Cold reset;"&
"T3,Cold reset with unload;";
-- convert string to std_logic_vector to be given to user_io
function to_slv(s: string) return std_logic_vector is
... This diff was truncated because it exceeds the maximum size that can be displayed.

Also available in: Unified diff